src/intel/perf/gen_perf.c

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <dirent.h>
  25
  26 #include <sys/types.h>
  27 #include <sys/stat.h>
  28 #include <fcntl.h>
  29 #include <unistd.h>
  30 #include <errno.h>
  31
  32 #include <drm-uapi/i915_drm.h>
  33
  34 #include "common/gen_gem.h"
  35 #include "gen_perf.h"
  36 #include "perf/gen_perf_metrics.h"
  37
  38 #include "dev/gen_debug.h"
  39 #include "dev/gen_device_info.h"
  40 #include "util/bitscan.h"
  41
  42 #define FILE_DEBUG_FLAG DEBUG_PERFMON
  43
  44 static bool
  45 get_sysfs_dev_dir(struct gen_perf_config *perf, int fd)
  46 {
  47    struct stat sb;
  48    int min, maj;
  49    DIR *drmdir;
  50    struct dirent *drm_entry;
  51    int len;
  52
  53    perf->sysfs_dev_dir[0] = '\0';
  54
  55    if (fstat(fd, &sb)) {
  56       DBG("Failed to stat DRM fd\n");
  57       return false;
  58    }
  59
  60    maj = major(sb.st_rdev);
  61    min = minor(sb.st_rdev);
  62
  63    if (!S_ISCHR(sb.st_mode)) {
  64       DBG("DRM fd is not a character device as expected\n");
  65       return false;
  66    }
  67
  68    len = snprintf(perf->sysfs_dev_dir,
  69                   sizeof(perf->sysfs_dev_dir),
  70                   "/sys/dev/char/%d:%d/device/drm", maj, min);
  71    if (len < 0 || len >= sizeof(perf->sysfs_dev_dir)) {
  72       DBG("Failed to concatenate sysfs path to drm device\n");
  73       return false;
  74    }
  75
  76    drmdir = opendir(perf->sysfs_dev_dir);
  77    if (!drmdir) {
  78       DBG("Failed to open %s: %m\n", perf->sysfs_dev_dir);
  79       return false;
  80    }
  81
  82    while ((drm_entry = readdir(drmdir))) {
  83       if ((drm_entry->d_type == DT_DIR ||
  84            drm_entry->d_type == DT_LNK) &&
  85           strncmp(drm_entry->d_name, "card", 4) == 0)
  86       {
  87          len = snprintf(perf->sysfs_dev_dir,
  88                         sizeof(perf->sysfs_dev_dir),
  89                         "/sys/dev/char/%d:%d/device/drm/%s",
  90                         maj, min, drm_entry->d_name);
  91          closedir(drmdir);
  92          if (len < 0 || len >= sizeof(perf->sysfs_dev_dir))
  93             return false;
  94          else
  95             return true;
  96       }
  97    }
  98
  99    closedir(drmdir);
 100
 101    DBG("Failed to find cardX directory under /sys/dev/char/%d:%d/device/drm\n",
 102        maj, min);
 103
 104    return false;
 105 }
 106
 107 static bool
 108 read_file_uint64(const char *file, uint64_t *val)
 109 {
 110     char buf[32];
 111     int fd, n;
 112
 113     fd = open(file, 0);
 114     if (fd < 0)
 115        return false;
 116     while ((n = read(fd, buf, sizeof (buf) - 1)) < 0 &&
 117            errno == EINTR);
 118     close(fd);
 119     if (n < 0)
 120        return false;
 121
 122     buf[n] = '\0';
 123     *val = strtoull(buf, NULL, 0);
 124
 125     return true;
 126 }
 127
 128 static bool
 129 read_sysfs_drm_device_file_uint64(struct gen_perf_config *perf,
 130                                   const char *file,
 131                                   uint64_t *value)
 132 {
 133    char buf[512];
 134    int len;
 135
 136    len = snprintf(buf, sizeof(buf), "%s/%s", perf->sysfs_dev_dir, file);
 137    if (len < 0 || len >= sizeof(buf)) {
 138       DBG("Failed to concatenate sys filename to read u64 from\n");
 139       return false;
 140    }
 141
 142    return read_file_uint64(buf, value);
 143 }
 144
 145 static void
 146 register_oa_config(struct gen_perf_config *perf,
 147                    const struct gen_perf_query_info *query,
 148                    uint64_t config_id)
 149 {
 150    struct gen_perf_query_info *registred_query =
 151       gen_perf_query_append_query_info(perf, 0);
 152
 153    *registred_query = *query;
 154    registred_query->oa_metrics_set_id = config_id;
 155    DBG("metric set registred: id = %" PRIu64", guid = %s\n",
 156        registred_query->oa_metrics_set_id, query->guid);
 157 }
 158
 159 static void
 160 enumerate_sysfs_metrics(struct gen_perf_config *perf)
 161 {
 162    DIR *metricsdir = NULL;
 163    struct dirent *metric_entry;
 164    char buf[256];
 165    int len;
 166
 167    len = snprintf(buf, sizeof(buf), "%s/metrics", perf->sysfs_dev_dir);
 168    if (len < 0 || len >= sizeof(buf)) {
 169       DBG("Failed to concatenate path to sysfs metrics/ directory\n");
 170       return;
 171    }
 172
 173    metricsdir = opendir(buf);
 174    if (!metricsdir) {
 175       DBG("Failed to open %s: %m\n", buf);
 176       return;
 177    }
 178
 179    while ((metric_entry = readdir(metricsdir))) {
 180       struct hash_entry *entry;
 181
 182       if ((metric_entry->d_type != DT_DIR &&
 183            metric_entry->d_type != DT_LNK) ||
 184           metric_entry->d_name[0] == '.')
 185          continue;
 186
 187       DBG("metric set: %s\n", metric_entry->d_name);
 188       entry = _mesa_hash_table_search(perf->oa_metrics_table,
 189                                       metric_entry->d_name);
 190       if (entry) {
 191          uint64_t id;
 192
 193          len = snprintf(buf, sizeof(buf), "%s/metrics/%s/id",
 194                         perf->sysfs_dev_dir, metric_entry->d_name);
 195          if (len < 0 || len >= sizeof(buf)) {
 196             DBG("Failed to concatenate path to sysfs metric id file\n");
 197             continue;
 198          }
 199
 200          if (!read_file_uint64(buf, &id)) {
 201             DBG("Failed to read metric set id from %s: %m", buf);
 202             continue;
 203          }
 204
 205          register_oa_config(perf, (const struct gen_perf_query_info *)entry->data, id);
 206       } else
 207          DBG("metric set not known by mesa (skipping)\n");
 208    }
 209
 210    closedir(metricsdir);
 211 }
 212
 213 static bool
 214 kernel_has_dynamic_config_support(struct gen_perf_config *perf, int fd)
 215 {
 216    uint64_t invalid_config_id = UINT64_MAX;
 217
 218    return gen_ioctl(fd, DRM_IOCTL_I915_PERF_REMOVE_CONFIG,
 219                     &invalid_config_id) < 0 && errno == ENOENT;
 220 }
 221
 222 bool
 223 gen_perf_load_metric_id(struct gen_perf_config *perf, const char *guid,
 224                         uint64_t *metric_id)
 225 {
 226    char config_path[280];
 227
 228    snprintf(config_path, sizeof(config_path), "%s/metrics/%s/id",
 229             perf->sysfs_dev_dir, guid);
 230
 231    /* Don't recreate already loaded configs. */
 232    return read_file_uint64(config_path, metric_id);
 233 }
 234
 235 static void
 236 init_oa_configs(struct gen_perf_config *perf, int fd)
 237 {
 238    hash_table_foreach(perf->oa_metrics_table, entry) {
 239       const struct gen_perf_query_info *query = entry->data;
 240       struct drm_i915_perf_oa_config config;
 241       uint64_t config_id;
 242       int ret;
 243
 244       if (gen_perf_load_metric_id(perf, query->guid, &config_id)) {
 245          DBG("metric set: %s (already loaded)\n", query->guid);
 246          register_oa_config(perf, query, config_id);
 247          continue;
 248       }
 249
 250       memset(&config, 0, sizeof(config));
 251
 252       memcpy(config.uuid, query->guid, sizeof(config.uuid));
 253
 254       config.n_mux_regs = query->n_mux_regs;
 255       config.mux_regs_ptr = (uintptr_t) query->mux_regs;
 256
 257       config.n_boolean_regs = query->n_b_counter_regs;
 258       config.boolean_regs_ptr = (uintptr_t) query->b_counter_regs;
 259
 260       config.n_flex_regs = query->n_flex_regs;
 261       config.flex_regs_ptr = (uintptr_t) query->flex_regs;
 262
 263       ret = gen_ioctl(fd, DRM_IOCTL_I915_PERF_ADD_CONFIG, &config);
 264       if (ret < 0) {
 265          DBG("Failed to load \"%s\" (%s) metrics set in kernel: %s\n",
 266              query->name, query->guid, strerror(errno));
 267          continue;
 268       }
 269
 270       register_oa_config(perf, query, ret);
 271       DBG("metric set: %s (added)\n", query->guid);
 272    }
 273 }
 274
 275 static void
 276 compute_topology_builtins(struct gen_perf_config *perf,
 277                           const struct gen_device_info *devinfo)
 278 {
 279    perf->sys_vars.slice_mask = devinfo->slice_masks;
 280    perf->sys_vars.n_eu_slices = devinfo->num_slices;
 281
 282    for (int i = 0; i < sizeof(devinfo->subslice_masks[i]); i++) {
 283       perf->sys_vars.n_eu_sub_slices +=
 284          __builtin_popcount(devinfo->subslice_masks[i]);
 285    }
 286
 287    for (int i = 0; i < sizeof(devinfo->eu_masks); i++)
 288       perf->sys_vars.n_eus += __builtin_popcount(devinfo->eu_masks[i]);
 289
 290    perf->sys_vars.eu_threads_count = devinfo->num_thread_per_eu;
 291
 292    /* The subslice mask builtin contains bits for all slices. Prior to Gen11
 293     * it had groups of 3bits for each slice, on Gen11 it's 8bits for each
 294     * slice.
 295     *
 296     * Ideally equations would be updated to have a slice/subslice query
 297     * function/operator.
 298     */
 299    perf->sys_vars.subslice_mask = 0;
 300
 301    int bits_per_subslice = devinfo->gen == 11 ? 8 : 3;
 302
 303    for (int s = 0; s < util_last_bit(devinfo->slice_masks); s++) {
 304       for (int ss = 0; ss < (devinfo->subslice_slice_stride * 8); ss++) {
 305          if (gen_device_info_subslice_available(devinfo, s, ss))
 306             perf->sys_vars.subslice_mask |= 1ULL << (s * bits_per_subslice + ss);
 307       }
 308    }
 309 }
 310
 311 static bool
 312 init_oa_sys_vars(struct gen_perf_config *perf, const struct gen_device_info *devinfo)
 313 {
 314    uint64_t min_freq_mhz = 0, max_freq_mhz = 0;
 315
 316    if (!read_sysfs_drm_device_file_uint64(perf, "gt_min_freq_mhz", &min_freq_mhz))
 317       return false;
 318
 319    if (!read_sysfs_drm_device_file_uint64(perf,  "gt_max_freq_mhz", &max_freq_mhz))
 320       return false;
 321
 322    memset(&perf->sys_vars, 0, sizeof(perf->sys_vars));
 323    perf->sys_vars.gt_min_freq = min_freq_mhz * 1000000;
 324    perf->sys_vars.gt_max_freq = max_freq_mhz * 1000000;
 325    perf->sys_vars.timestamp_frequency = devinfo->timestamp_frequency;
 326    perf->sys_vars.revision = devinfo->revision;
 327    compute_topology_builtins(perf, devinfo);
 328
 329    return true;
 330 }
 331
 332 typedef void (*perf_register_oa_queries_t)(struct gen_perf_config *);
 333
 334 static perf_register_oa_queries_t
 335 get_register_queries_function(const struct gen_device_info *devinfo)
 336 {
 337    if (devinfo->is_haswell)
 338       return gen_oa_register_queries_hsw;
 339    if (devinfo->is_cherryview)
 340       return gen_oa_register_queries_chv;
 341    if (devinfo->is_broadwell)
 342       return gen_oa_register_queries_bdw;
 343    if (devinfo->is_broxton)
 344       return gen_oa_register_queries_bxt;
 345    if (devinfo->is_skylake) {
 346       if (devinfo->gt == 2)
 347          return gen_oa_register_queries_sklgt2;
 348       if (devinfo->gt == 3)
 349          return gen_oa_register_queries_sklgt3;
 350       if (devinfo->gt == 4)
 351          return gen_oa_register_queries_sklgt4;
 352    }
 353    if (devinfo->is_kabylake) {
 354       if (devinfo->gt == 2)
 355          return gen_oa_register_queries_kblgt2;
 356       if (devinfo->gt == 3)
 357          return gen_oa_register_queries_kblgt3;
 358    }
 359    if (devinfo->is_geminilake)
 360       return gen_oa_register_queries_glk;
 361    if (devinfo->is_coffeelake) {
 362       if (devinfo->gt == 2)
 363          return gen_oa_register_queries_cflgt2;
 364       if (devinfo->gt == 3)
 365          return gen_oa_register_queries_cflgt3;
 366    }
 367    if (devinfo->is_cannonlake)
 368       return gen_oa_register_queries_cnl;
 369    if (devinfo->gen == 11)
 370       return gen_oa_register_queries_icl;
 371
 372    return NULL;
 373 }
 374
 375 bool
 376 gen_perf_load_oa_metrics(struct gen_perf_config *perf, int fd,
 377                          const struct gen_device_info *devinfo)
 378 {
 379    perf_register_oa_queries_t oa_register = get_register_queries_function(devinfo);
 380    bool i915_perf_oa_available = false;
 381    struct stat sb;
 382
 383    /* The existence of this sysctl parameter implies the kernel supports
 384     * the i915 perf interface.
 385     */
 386    if (stat("/proc/sys/dev/i915/perf_stream_paranoid", &sb) == 0) {
 387
 388       /* If _paranoid == 1 then on Gen8+ we won't be able to access OA
 389        * metrics unless running as root.
 390        */
 391       if (devinfo->is_haswell)
 392          i915_perf_oa_available = true;
 393       else {
 394          uint64_t paranoid = 1;
 395
 396          read_file_uint64("/proc/sys/dev/i915/perf_stream_paranoid", &paranoid);
 397
 398          if (paranoid == 0 || geteuid() == 0)
 399             i915_perf_oa_available = true;
 400       }
 401    }
 402
 403    if (!i915_perf_oa_available ||
 404        !oa_register ||
 405        !get_sysfs_dev_dir(perf, fd) ||
 406        !init_oa_sys_vars(perf, devinfo))
 407       return false;
 408
 409    perf->oa_metrics_table =
 410       _mesa_hash_table_create(perf, _mesa_key_hash_string,
 411                               _mesa_key_string_equal);
 412
 413    /* Index all the metric sets mesa knows about before looking to see what
 414     * the kernel is advertising.
 415     */
 416    oa_register(perf);
 417
 418    if (likely((INTEL_DEBUG & DEBUG_NO_OACONFIG) == 0) &&
 419        kernel_has_dynamic_config_support(perf, fd))
 420       init_oa_configs(perf, fd);
 421    else
 422       enumerate_sysfs_metrics(perf);
 423
 424    return true;
 425 }
 426
 427 /* Accumulate 32bits OA counters */
 428 static inline void
 429 accumulate_uint32(const uint32_t *report0,
 430                   const uint32_t *report1,
 431                   uint64_t *accumulator)
 432 {
 433    *accumulator += (uint32_t)(*report1 - *report0);
 434 }
 435
 436 /* Accumulate 40bits OA counters */
 437 static inline void
 438 accumulate_uint40(int a_index,
 439                   const uint32_t *report0,
 440                   const uint32_t *report1,
 441                   uint64_t *accumulator)
 442 {
 443    const uint8_t *high_bytes0 = (uint8_t *)(report0 + 40);
 444    const uint8_t *high_bytes1 = (uint8_t *)(report1 + 40);
 445    uint64_t high0 = (uint64_t)(high_bytes0[a_index]) << 32;
 446    uint64_t high1 = (uint64_t)(high_bytes1[a_index]) << 32;
 447    uint64_t value0 = report0[a_index + 4] | high0;
 448    uint64_t value1 = report1[a_index + 4] | high1;
 449    uint64_t delta;
 450
 451    if (value0 > value1)
 452       delta = (1ULL << 40) + value1 - value0;
 453    else
 454       delta = value1 - value0;
 455
 456    *accumulator += delta;
 457 }
 458
 459 static void
 460 gen8_read_report_clock_ratios(const uint32_t *report,
 461                               uint64_t *slice_freq_hz,
 462                               uint64_t *unslice_freq_hz)
 463 {
 464    /* The lower 16bits of the RPT_ID field of the OA reports contains a
 465     * snapshot of the bits coming from the RP_FREQ_NORMAL register and is
 466     * divided this way :
 467     *
 468     * RPT_ID[31:25]: RP_FREQ_NORMAL[20:14] (low squashed_slice_clock_frequency)
 469     * RPT_ID[10:9]:  RP_FREQ_NORMAL[22:21] (high squashed_slice_clock_frequency)
 470     * RPT_ID[8:0]:   RP_FREQ_NORMAL[31:23] (squashed_unslice_clock_frequency)
 471     *
 472     * RP_FREQ_NORMAL[31:23]: Software Unslice Ratio Request
 473     *                        Multiple of 33.33MHz 2xclk (16 MHz 1xclk)
 474     *
 475     * RP_FREQ_NORMAL[22:14]: Software Slice Ratio Request
 476     *                        Multiple of 33.33MHz 2xclk (16 MHz 1xclk)
 477     */
 478
 479    uint32_t unslice_freq = report[0] & 0x1ff;
 480    uint32_t slice_freq_low = (report[0] >> 25) & 0x7f;
 481    uint32_t slice_freq_high = (report[0] >> 9) & 0x3;
 482    uint32_t slice_freq = slice_freq_low | (slice_freq_high << 7);
 483
 484    *slice_freq_hz = slice_freq * 16666667ULL;
 485    *unslice_freq_hz = unslice_freq * 16666667ULL;
 486 }
 487
 488 void
 489 gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 490                                        const struct gen_device_info *devinfo,
 491                                        const uint32_t *start,
 492                                        const uint32_t *end)
 493 {
 494    /* Slice/Unslice frequency is only available in the OA reports when the
 495     * "Disable OA reports due to clock ratio change" field in
 496     * OA_DEBUG_REGISTER is set to 1. This is how the kernel programs this
 497     * global register (see drivers/gpu/drm/i915/i915_perf.c)
 498     *
 499     * Documentation says this should be available on Gen9+ but experimentation
 500     * shows that Gen8 reports similar values, so we enable it there too.
 501     */
 502    if (devinfo->gen < 8)
 503       return;
 504
 505    gen8_read_report_clock_ratios(start,
 506                                  &result->slice_frequency[0],
 507                                  &result->unslice_frequency[0]);
 508    gen8_read_report_clock_ratios(end,
 509                                  &result->slice_frequency[1],
 510                                  &result->unslice_frequency[1]);
 511 }
 512
 513 void
 514 gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 515                                  const struct gen_perf_query_info *query,
 516                                  const uint32_t *start,
 517                                  const uint32_t *end)
 518 {
 519    int i, idx = 0;
 520
 521    result->hw_id = start[2];
 522    result->reports_accumulated++;
 523
 524    switch (query->oa_format) {
 525    case I915_OA_FORMAT_A32u40_A4u32_B8_C8:
 526       accumulate_uint32(start + 1, end + 1, result->accumulator + idx++); /* timestamp */
 527       accumulate_uint32(start + 3, end + 3, result->accumulator + idx++); /* clock */
 528
 529       /* 32x 40bit A counters... */
 530       for (i = 0; i < 32; i++)
 531          accumulate_uint40(i, start, end, result->accumulator + idx++);
 532
 533       /* 4x 32bit A counters... */
 534       for (i = 0; i < 4; i++)
 535          accumulate_uint32(start + 36 + i, end + 36 + i, result->accumulator + idx++);
 536
 537       /* 8x 32bit B counters + 8x 32bit C counters... */
 538       for (i = 0; i < 16; i++)
 539          accumulate_uint32(start + 48 + i, end + 48 + i, result->accumulator + idx++);
 540       break;
 541
 542    case I915_OA_FORMAT_A45_B8_C8:
 543       accumulate_uint32(start + 1, end + 1, result->accumulator); /* timestamp */
 544
 545       for (i = 0; i < 61; i++)
 546          accumulate_uint32(start + 3 + i, end + 3 + i, result->accumulator + 1 + i);
 547       break;
 548
 549    default:
 550       unreachable("Can't accumulate OA counters in unknown format");
 551    }
 552
 553 }
 554
 555 void
 556 gen_perf_query_result_clear(struct gen_perf_query_result *result)
 557 {
 558    memset(result, 0, sizeof(*result));
 559    result->hw_id = 0xffffffff; /* invalid */
 560 }