src/intel/perf/gen_perf.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_PERF_H
  25 #define GEN_PERF_H
  26
  27 #include <stdio.h>
  28 #include <stdbool.h>
  29 #include <stdint.h>
  30 #include <string.h>
  31
  32 #if defined(MAJOR_IN_SYSMACROS)
  33 #include <sys/sysmacros.h>
  34 #elif defined(MAJOR_IN_MKDEV)
  35 #include <sys/mkdev.h>
  36 #endif
  37
  38 #include "util/hash_table.h"
  39 #include "compiler/glsl/list.h"
  40 #include "util/ralloc.h"
  41
  42 #include "drm-uapi/i915_drm.h"
  43
  44 struct gen_device_info;
  45
  46 struct gen_perf_config;
  47 struct gen_perf_query_info;
  48
  49 enum gen_perf_counter_type {
  50    GEN_PERF_COUNTER_TYPE_EVENT,
  51    GEN_PERF_COUNTER_TYPE_DURATION_NORM,
  52    GEN_PERF_COUNTER_TYPE_DURATION_RAW,
  53    GEN_PERF_COUNTER_TYPE_THROUGHPUT,
  54    GEN_PERF_COUNTER_TYPE_RAW,
  55    GEN_PERF_COUNTER_TYPE_TIMESTAMP,
  56 };
  57
  58 enum gen_perf_counter_data_type {
  59    GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
  60    GEN_PERF_COUNTER_DATA_TYPE_UINT32,
  61    GEN_PERF_COUNTER_DATA_TYPE_UINT64,
  62    GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
  63    GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
  64 };
  65
  66 enum gen_perf_counter_units {
  67    /* size */
  68    GEN_PERF_COUNTER_UNITS_BYTES,
  69
  70    /* frequency */
  71    GEN_PERF_COUNTER_UNITS_HZ,
  72
  73    /* time */
  74    GEN_PERF_COUNTER_UNITS_NS,
  75    GEN_PERF_COUNTER_UNITS_US,
  76
  77    /**/
  78    GEN_PERF_COUNTER_UNITS_PIXELS,
  79    GEN_PERF_COUNTER_UNITS_TEXELS,
  80    GEN_PERF_COUNTER_UNITS_THREADS,
  81    GEN_PERF_COUNTER_UNITS_PERCENT,
  82
  83    /* events */
  84    GEN_PERF_COUNTER_UNITS_MESSAGES,
  85    GEN_PERF_COUNTER_UNITS_NUMBER,
  86    GEN_PERF_COUNTER_UNITS_CYCLES,
  87    GEN_PERF_COUNTER_UNITS_EVENTS,
  88    GEN_PERF_COUNTER_UNITS_UTILIZATION,
  89
  90    /**/
  91    GEN_PERF_COUNTER_UNITS_EU_SENDS_TO_L3_CACHE_LINES,
  92    GEN_PERF_COUNTER_UNITS_EU_ATOMIC_REQUESTS_TO_L3_CACHE_LINES,
  93    GEN_PERF_COUNTER_UNITS_EU_REQUESTS_TO_L3_CACHE_LINES,
  94    GEN_PERF_COUNTER_UNITS_EU_BYTES_PER_L3_CACHE_LINE,
  95
  96    GEN_PERF_COUNTER_UNITS_MAX
  97 };
  98
  99 struct gen_pipeline_stat {
 100    uint32_t reg;
 101    uint32_t numerator;
 102    uint32_t denominator;
 103 };
 104
 105 /*
 106  * The largest OA formats we can use include:
 107  * For Haswell:
 108  *   1 timestamp, 45 A counters, 8 B counters and 8 C counters.
 109  * For Gen8+
 110  *   1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
 111  */
 112 #define MAX_OA_REPORT_COUNTERS 62
 113
 114 /*
 115  * When currently allocate only one page for pipeline statistics queries. Here
 116  * we derived the maximum number of counters for that amount.
 117  */
 118 #define STATS_BO_SIZE               4096
 119 #define STATS_BO_END_OFFSET_BYTES   (STATS_BO_SIZE / 2)
 120 #define MAX_STAT_COUNTERS           (STATS_BO_END_OFFSET_BYTES / 8)
 121
 122 #define I915_PERF_OA_SAMPLE_SIZE (8 +   /* drm_i915_perf_record_header */ \
 123                                   256)  /* OA counter report */
 124
 125 struct gen_perf_query_result {
 126    /**
 127     * Storage for the final accumulated OA counters.
 128     */
 129    uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
 130
 131    /**
 132     * Hw ID used by the context on which the query was running.
 133     */
 134    uint32_t hw_id;
 135
 136    /**
 137     * Number of reports accumulated to produce the results.
 138     */
 139    uint32_t reports_accumulated;
 140
 141    /**
 142     * Frequency in the slices of the GT at the begin and end of the
 143     * query.
 144     */
 145    uint64_t slice_frequency[2];
 146
 147    /**
 148     * Frequency in the unslice of the GT at the begin and end of the
 149     * query.
 150     */
 151    uint64_t unslice_frequency[2];
 152
 153    /**
 154     * Timestamp of the query.
 155     */
 156    uint64_t begin_timestamp;
 157
 158    /**
 159     * Whether the query was interrupted by another workload (aka preemption).
 160     */
 161    bool query_disjoint;
 162 };
 163
 164 struct gen_perf_query_counter {
 165    const char *name;
 166    const char *desc;
 167    const char *symbol_name;
 168    const char *category;
 169    enum gen_perf_counter_type type;
 170    enum gen_perf_counter_data_type data_type;
 171    enum gen_perf_counter_units units;
 172    uint64_t raw_max;
 173    size_t offset;
 174    uint64_t query_mask;
 175
 176    /**
 177     * Each counter can be a part of many groups, each time at different index.
 178     * This struct stores one of those locations.
 179     */
 180    struct {
 181       int group_idx; /* query/group number */
 182       int counter_idx; /* index inside of query/group */
 183    } location;
 184
 185    union {
 186       uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
 187                                          const struct gen_perf_query_info *query,
 188                                          const uint64_t *accumulator);
 189       float (*oa_counter_read_float)(struct gen_perf_config *perf,
 190                                      const struct gen_perf_query_info *query,
 191                                      const uint64_t *accumulator);
 192       struct gen_pipeline_stat pipeline_stat;
 193    };
 194 };
 195
 196 struct gen_perf_query_register_prog {
 197    uint32_t reg;
 198    uint32_t val;
 199 };
 200
 201 /* Register programming for a given query */
 202 struct gen_perf_registers {
 203    struct gen_perf_query_register_prog *flex_regs;
 204    uint32_t n_flex_regs;
 205
 206    struct gen_perf_query_register_prog *mux_regs;
 207    uint32_t n_mux_regs;
 208
 209    struct gen_perf_query_register_prog *b_counter_regs;
 210    uint32_t n_b_counter_regs;
 211 };
 212
 213 struct gen_perf_query_info {
 214    enum gen_perf_query_type {
 215       GEN_PERF_QUERY_TYPE_OA,
 216       GEN_PERF_QUERY_TYPE_RAW,
 217       GEN_PERF_QUERY_TYPE_PIPELINE,
 218    } kind;
 219    const char *name;
 220    const char *guid;
 221    struct gen_perf_query_counter *counters;
 222    int n_counters;
 223    int max_counters;
 224    size_t data_size;
 225
 226    /* OA specific */
 227    uint64_t oa_metrics_set_id;
 228    int oa_format;
 229
 230    /* For indexing into the accumulator[] ... */
 231    int gpu_time_offset;
 232    int gpu_clock_offset;
 233    int a_offset;
 234    int b_offset;
 235    int c_offset;
 236
 237    struct gen_perf_registers config;
 238 };
 239
 240 struct gen_perf_config {
 241    /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
 242    bool i915_query_supported;
 243
 244    /* Version of the i915-perf subsystem, refer to i915_drm.h. */
 245    int i915_perf_version;
 246
 247    /* Powergating configuration for the running the query. */
 248    struct drm_i915_gem_context_param_sseu sseu;
 249
 250    struct gen_perf_query_info *queries;
 251    int n_queries;
 252
 253    struct gen_perf_query_counter **counters;
 254    int n_counters;
 255
 256    /* Variables referenced in the XML meta data for OA performance
 257     * counters, e.g in the normalization equations.
 258     *
 259     * All uint64_t for consistent operand types in generated code
 260     */
 261    struct {
 262       uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
 263       uint64_t n_eus;               /** $EuCoresTotalCount */
 264       uint64_t n_eu_slices;         /** $EuSlicesTotalCount */
 265       uint64_t n_eu_sub_slices;     /** $EuSubslicesTotalCount */
 266       uint64_t eu_threads_count;    /** $EuThreadsCount */
 267       uint64_t slice_mask;          /** $SliceMask */
 268       uint64_t subslice_mask;       /** $SubsliceMask */
 269       uint64_t gt_min_freq;         /** $GpuMinFrequency */
 270       uint64_t gt_max_freq;         /** $GpuMaxFrequency */
 271       uint64_t revision;            /** $SkuRevisionId */
 272    } sys_vars;
 273
 274    /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
 275     * cross-reference with the GUIDs of configs advertised by the kernel at
 276     * runtime
 277     */
 278    struct hash_table *oa_metrics_table;
 279
 280    /* Whether we have support for this platform. If true && n_queries == 0,
 281     * this means we will not be able to use i915-perf because of it is in
 282     * paranoid mode.
 283     */
 284    bool platform_supported;
 285
 286    /* Location of the device's sysfs entry. */
 287    char sysfs_dev_dir[256];
 288
 289    struct {
 290       void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
 291       void (*bo_unreference)(void *bo);
 292       void *(*bo_map)(void *ctx, void *bo, unsigned flags);
 293       void (*bo_unmap)(void *bo);
 294       bool (*batch_references)(void *batch, void *bo);
 295       void (*bo_wait_rendering)(void *bo);
 296       int (*bo_busy)(void *bo);
 297       void (*emit_stall_at_pixel_scoreboard)(void *ctx);
 298       void (*emit_mi_report_perf_count)(void *ctx,
 299                                         void *bo,
 300                                         uint32_t offset_in_bytes,
 301                                         uint32_t report_id);
 302       void (*batchbuffer_flush)(void *ctx,
 303                                 const char *file, int line);
 304       void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
 305
 306    } vtbl;
 307 };
 308
 309 struct gen_perf_counter_pass {
 310    struct gen_perf_query_info *query;
 311    struct gen_perf_query_counter *counter;
 312    uint32_t pass;
 313 };
 314
 315 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
 316                            const struct gen_device_info *devinfo,
 317                            int drm_fd,
 318                            bool include_pipeline_statistics);
 319
 320 /** Query i915 for a metric id using guid.
 321  */
 322 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
 323                              const char *guid,
 324                              uint64_t *metric_id);
 325
 326 /** Load a configuation's content from i915 using a guid.
 327  */
 328 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
 329                                                       int fd, const char *guid);
 330
 331 /** Store a configuration into i915 using guid and return a new metric id.
 332  *
 333  * If guid is NULL, then a generated one will be provided by hashing the
 334  * content of the configuration.
 335  */
 336 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
 337                                       const struct gen_perf_registers *config,
 338                                       const char *guid);
 339
 340 /** Read the slice/unslice frequency from 2 OA reports and store then into
 341  *  result.
 342  */
 343 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
 344                                             const struct gen_device_info *devinfo,
 345                                             const uint32_t *start,
 346                                             const uint32_t *end);
 347 /** Accumulate the delta between 2 OA reports into result for a given query.
 348  */
 349 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
 350                                       const struct gen_perf_query_info *query,
 351                                       const uint32_t *start,
 352                                       const uint32_t *end);
 353 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
 354
 355 static inline size_t
 356 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
 357 {
 358    switch (counter->data_type) {
 359    case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
 360       return sizeof(uint32_t);
 361    case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
 362       return sizeof(uint32_t);
 363    case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
 364       return sizeof(uint64_t);
 365    case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
 366       return sizeof(float);
 367    case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
 368       return sizeof(double);
 369    default:
 370       unreachable("invalid counter data type");
 371    }
 372 }
 373
 374 static inline struct gen_perf_config *
 375 gen_perf_new(void *ctx)
 376 {
 377    struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
 378    return perf;
 379 }
 380
 381 uint32_t gen_perf_get_n_passes(struct gen_perf_config *perf,
 382                                const uint32_t *counter_indices,
 383                                uint32_t counter_indices_count,
 384                                struct gen_perf_query_info **pass_queries);
 385 void gen_perf_get_counters_passes(struct gen_perf_config *perf,
 386                                   const uint32_t *counter_indices,
 387                                   uint32_t counter_indices_count,
 388                                   struct gen_perf_counter_pass *counter_pass);
 389
 390 #endif /* GEN_PERF_H */