intel/perf: store the probed i915-perf version
[mesa.git] / src / intel / perf / gen_perf.h
1 /*
2 * Copyright © 2018 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #ifndef GEN_PERF_H
25 #define GEN_PERF_H
26
27 #include <stdio.h>
28 #include <stdint.h>
29 #include <string.h>
30
31 #if defined(MAJOR_IN_SYSMACROS)
32 #include <sys/sysmacros.h>
33 #elif defined(MAJOR_IN_MKDEV)
34 #include <sys/mkdev.h>
35 #endif
36
37 #include "util/hash_table.h"
38 #include "compiler/glsl/list.h"
39 #include "util/ralloc.h"
40
41 struct gen_device_info;
42
43 struct gen_perf_config;
44 struct gen_perf_query_info;
45
46 enum gen_perf_counter_type {
47 GEN_PERF_COUNTER_TYPE_EVENT,
48 GEN_PERF_COUNTER_TYPE_DURATION_NORM,
49 GEN_PERF_COUNTER_TYPE_DURATION_RAW,
50 GEN_PERF_COUNTER_TYPE_THROUGHPUT,
51 GEN_PERF_COUNTER_TYPE_RAW,
52 GEN_PERF_COUNTER_TYPE_TIMESTAMP,
53 };
54
55 enum gen_perf_counter_data_type {
56 GEN_PERF_COUNTER_DATA_TYPE_BOOL32,
57 GEN_PERF_COUNTER_DATA_TYPE_UINT32,
58 GEN_PERF_COUNTER_DATA_TYPE_UINT64,
59 GEN_PERF_COUNTER_DATA_TYPE_FLOAT,
60 GEN_PERF_COUNTER_DATA_TYPE_DOUBLE,
61 };
62
63 struct gen_pipeline_stat {
64 uint32_t reg;
65 uint32_t numerator;
66 uint32_t denominator;
67 };
68
69 /*
70 * The largest OA formats we can use include:
71 * For Haswell:
72 * 1 timestamp, 45 A counters, 8 B counters and 8 C counters.
73 * For Gen8+
74 * 1 timestamp, 1 clock, 36 A counters, 8 B counters and 8 C counters
75 */
76 #define MAX_OA_REPORT_COUNTERS 62
77
78 /*
79 * When currently allocate only one page for pipeline statistics queries. Here
80 * we derived the maximum number of counters for that amount.
81 */
82 #define STATS_BO_SIZE 4096
83 #define STATS_BO_END_OFFSET_BYTES (STATS_BO_SIZE / 2)
84 #define MAX_STAT_COUNTERS (STATS_BO_END_OFFSET_BYTES / 8)
85
86 #define I915_PERF_OA_SAMPLE_SIZE (8 + /* drm_i915_perf_record_header */ \
87 256) /* OA counter report */
88
89 struct gen_perf_query_result {
90 /**
91 * Storage for the final accumulated OA counters.
92 */
93 uint64_t accumulator[MAX_OA_REPORT_COUNTERS];
94
95 /**
96 * Hw ID used by the context on which the query was running.
97 */
98 uint32_t hw_id;
99
100 /**
101 * Number of reports accumulated to produce the results.
102 */
103 uint32_t reports_accumulated;
104
105 /**
106 * Frequency in the slices of the GT at the begin and end of the
107 * query.
108 */
109 uint64_t slice_frequency[2];
110
111 /**
112 * Frequency in the unslice of the GT at the begin and end of the
113 * query.
114 */
115 uint64_t unslice_frequency[2];
116
117 /**
118 * Timestamp of the query.
119 */
120 uint64_t begin_timestamp;
121
122 /**
123 * Whether the query was interrupted by another workload (aka preemption).
124 */
125 bool query_disjoint;
126 };
127
128 struct gen_perf_query_counter {
129 const char *name;
130 const char *desc;
131 enum gen_perf_counter_type type;
132 enum gen_perf_counter_data_type data_type;
133 uint64_t raw_max;
134 size_t offset;
135
136 union {
137 uint64_t (*oa_counter_read_uint64)(struct gen_perf_config *perf,
138 const struct gen_perf_query_info *query,
139 const uint64_t *accumulator);
140 float (*oa_counter_read_float)(struct gen_perf_config *perf,
141 const struct gen_perf_query_info *query,
142 const uint64_t *accumulator);
143 struct gen_pipeline_stat pipeline_stat;
144 };
145 };
146
147 struct gen_perf_query_register_prog {
148 uint32_t reg;
149 uint32_t val;
150 };
151
152 /* Register programming for a given query */
153 struct gen_perf_registers {
154 struct gen_perf_query_register_prog *flex_regs;
155 uint32_t n_flex_regs;
156
157 struct gen_perf_query_register_prog *mux_regs;
158 uint32_t n_mux_regs;
159
160 struct gen_perf_query_register_prog *b_counter_regs;
161 uint32_t n_b_counter_regs;
162 };
163
164 struct gen_perf_query_info {
165 enum gen_perf_query_type {
166 GEN_PERF_QUERY_TYPE_OA,
167 GEN_PERF_QUERY_TYPE_RAW,
168 GEN_PERF_QUERY_TYPE_PIPELINE,
169 } kind;
170 const char *name;
171 const char *guid;
172 struct gen_perf_query_counter *counters;
173 int n_counters;
174 int max_counters;
175 size_t data_size;
176
177 /* OA specific */
178 uint64_t oa_metrics_set_id;
179 int oa_format;
180
181 /* For indexing into the accumulator[] ... */
182 int gpu_time_offset;
183 int gpu_clock_offset;
184 int a_offset;
185 int b_offset;
186 int c_offset;
187
188 struct gen_perf_registers config;
189 };
190
191 struct gen_perf_config {
192 /* Whether i915 has DRM_I915_QUERY_PERF_CONFIG support. */
193 bool i915_query_supported;
194
195 /* Version of the i915-perf subsystem, refer to i915_drm.h. */
196 int i915_perf_version;
197
198 struct gen_perf_query_info *queries;
199 int n_queries;
200
201 /* Variables referenced in the XML meta data for OA performance
202 * counters, e.g in the normalization equations.
203 *
204 * All uint64_t for consistent operand types in generated code
205 */
206 struct {
207 uint64_t timestamp_frequency; /** $GpuTimestampFrequency */
208 uint64_t n_eus; /** $EuCoresTotalCount */
209 uint64_t n_eu_slices; /** $EuSlicesTotalCount */
210 uint64_t n_eu_sub_slices; /** $EuSubslicesTotalCount */
211 uint64_t eu_threads_count; /** $EuThreadsCount */
212 uint64_t slice_mask; /** $SliceMask */
213 uint64_t subslice_mask; /** $SubsliceMask */
214 uint64_t gt_min_freq; /** $GpuMinFrequency */
215 uint64_t gt_max_freq; /** $GpuMaxFrequency */
216 uint64_t revision; /** $SkuRevisionId */
217 } sys_vars;
218
219 /* OA metric sets, indexed by GUID, as know by Mesa at build time, to
220 * cross-reference with the GUIDs of configs advertised by the kernel at
221 * runtime
222 */
223 struct hash_table *oa_metrics_table;
224
225 /* Location of the device's sysfs entry. */
226 char sysfs_dev_dir[256];
227
228 struct {
229 void *(*bo_alloc)(void *bufmgr, const char *name, uint64_t size);
230 void (*bo_unreference)(void *bo);
231 void *(*bo_map)(void *ctx, void *bo, unsigned flags);
232 void (*bo_unmap)(void *bo);
233 bool (*batch_references)(void *batch, void *bo);
234 void (*bo_wait_rendering)(void *bo);
235 int (*bo_busy)(void *bo);
236 void (*emit_stall_at_pixel_scoreboard)(void *ctx);
237 void (*emit_mi_report_perf_count)(void *ctx,
238 void *bo,
239 uint32_t offset_in_bytes,
240 uint32_t report_id);
241 void (*batchbuffer_flush)(void *ctx,
242 const char *file, int line);
243 void (*store_register_mem)(void *ctx, void *bo, uint32_t reg, uint32_t reg_size, uint32_t offset);
244
245 } vtbl;
246 };
247
248 void gen_perf_init_metrics(struct gen_perf_config *perf_cfg,
249 const struct gen_device_info *devinfo,
250 int drm_fd);
251
252 /** Query i915 for a metric id using guid.
253 */
254 bool gen_perf_load_metric_id(struct gen_perf_config *perf_cfg,
255 const char *guid,
256 uint64_t *metric_id);
257
258 /** Load a configuation's content from i915 using a guid.
259 */
260 struct gen_perf_registers *gen_perf_load_configuration(struct gen_perf_config *perf_cfg,
261 int fd, const char *guid);
262
263 /** Store a configuration into i915 using guid and return a new metric id.
264 *
265 * If guid is NULL, then a generated one will be provided by hashing the
266 * content of the configuration.
267 */
268 uint64_t gen_perf_store_configuration(struct gen_perf_config *perf_cfg, int fd,
269 const struct gen_perf_registers *config,
270 const char *guid);
271
272 /** Read the slice/unslice frequency from 2 OA reports and store then into
273 * result.
274 */
275 void gen_perf_query_result_read_frequencies(struct gen_perf_query_result *result,
276 const struct gen_device_info *devinfo,
277 const uint32_t *start,
278 const uint32_t *end);
279 /** Accumulate the delta between 2 OA reports into result for a given query.
280 */
281 void gen_perf_query_result_accumulate(struct gen_perf_query_result *result,
282 const struct gen_perf_query_info *query,
283 const uint32_t *start,
284 const uint32_t *end);
285 void gen_perf_query_result_clear(struct gen_perf_query_result *result);
286
287 static inline size_t
288 gen_perf_query_counter_get_size(const struct gen_perf_query_counter *counter)
289 {
290 switch (counter->data_type) {
291 case GEN_PERF_COUNTER_DATA_TYPE_BOOL32:
292 return sizeof(uint32_t);
293 case GEN_PERF_COUNTER_DATA_TYPE_UINT32:
294 return sizeof(uint32_t);
295 case GEN_PERF_COUNTER_DATA_TYPE_UINT64:
296 return sizeof(uint64_t);
297 case GEN_PERF_COUNTER_DATA_TYPE_FLOAT:
298 return sizeof(float);
299 case GEN_PERF_COUNTER_DATA_TYPE_DOUBLE:
300 return sizeof(double);
301 default:
302 unreachable("invalid counter data type");
303 }
304 }
305
306 static inline struct gen_perf_config *
307 gen_perf_new(void *ctx)
308 {
309 struct gen_perf_config *perf = rzalloc(ctx, struct gen_perf_config);
310 return perf;
311 }
312
313 #endif /* GEN_PERF_H */