2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "aub_write.h"
33 #include "intel_aub.h"
34 #include "gen_context.h"
37 #define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
40 #define MI_BATCH_NON_SECURE_I965 (1 << 8)
42 #define min(a, b) ({ \
43 __typeof(a) _a = (a); \
44 __typeof(b) _b = (b); \
48 #define max(a, b) ({ \
49 __typeof(a) _a = (a); \
50 __typeof(b) _b = (b); \
61 static const uint32_t *
62 get_context_init(const struct gen_device_info
*devinfo
, enum gen_ring ring
)
64 static const uint32_t *gen8_contexts
[] = {
65 [GEN_RING_RENDER
] = gen8_render_context_init
,
66 [GEN_RING_BLITTER
] = gen8_blitter_context_init
,
67 [GEN_RING_VIDEO
] = gen8_video_context_init
,
69 static const uint32_t *gen10_contexts
[] = {
70 [GEN_RING_RENDER
] = gen10_render_context_init
,
71 [GEN_RING_BLITTER
] = gen10_blitter_context_init
,
72 [GEN_RING_VIDEO
] = gen10_video_context_init
,
75 assert(devinfo
->gen
>= 8);
77 if (devinfo
->gen
<= 10)
78 return gen8_contexts
[ring
];
79 return gen10_contexts
[ring
];
82 static void __attribute__ ((format(__printf__
, 2, 3)))
83 fail_if(int cond
, const char *format
, ...)
90 va_start(args
, format
);
91 vfprintf(stderr
, format
, args
);
97 static inline uint32_t
98 align_u32(uint32_t v
, uint32_t a
)
100 return (v
+ a
- 1) & ~(a
- 1);
104 aub_ppgtt_table_finish(struct aub_ppgtt_table
*table
, int level
)
109 for (unsigned i
= 0; i
< ARRAY_SIZE(table
->subtables
); i
++) {
110 if (table
->subtables
[i
]) {
111 aub_ppgtt_table_finish(table
->subtables
[i
], level
- 1);
112 free(table
->subtables
[i
]);
118 aub_file_init(struct aub_file
*aub
, FILE *file
, uint16_t pci_id
)
120 memset(aub
, 0, sizeof(*aub
));
123 aub
->pci_id
= pci_id
;
124 fail_if(!gen_get_device_info(pci_id
, &aub
->devinfo
),
125 "failed to identify chipset=0x%x\n", pci_id
);
126 aub
->addr_bits
= aub
->devinfo
.gen
>= 8 ? 48 : 32;
128 aub
->pml4
.phys_addr
= PML4_PHYS_ADDR
;
129 aub
->default_addr_space
= AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_PHYSICAL
;
133 aub_file_finish(struct aub_file
*aub
)
135 aub_ppgtt_table_finish(&aub
->pml4
, 4);
140 aub_gtt_size(struct aub_file
*aub
)
142 return NUM_PT_ENTRIES
* (aub
->addr_bits
> 32 ? GEN8_PTE_SIZE
: PTE_SIZE
);
146 data_out(struct aub_file
*aub
, const void *data
, size_t size
)
151 fail_if(fwrite(data
, 1, size
, aub
->file
) == 0,
152 "Writing to output failed\n");
156 dword_out(struct aub_file
*aub
, uint32_t data
)
158 data_out(aub
, &data
, sizeof(data
));
162 mem_trace_memory_write_header_out(struct aub_file
*aub
, uint64_t addr
,
163 uint32_t len
, uint32_t addr_space
,
166 uint32_t dwords
= ALIGN(len
, sizeof(uint32_t)) / sizeof(uint32_t);
168 if (aub
->verbose_log_file
) {
169 fprintf(aub
->verbose_log_file
,
170 " MEM WRITE (0x%016" PRIx64
"-0x%016" PRIx64
") %s\n",
171 addr
, addr
+ len
, desc
);
174 dword_out(aub
, CMD_MEM_TRACE_MEMORY_WRITE
| (5 + dwords
- 1));
175 dword_out(aub
, addr
& 0xFFFFFFFF); /* addr lo */
176 dword_out(aub
, addr
>> 32); /* addr hi */
177 dword_out(aub
, addr_space
); /* gtt */
182 register_write_out(struct aub_file
*aub
, uint32_t addr
, uint32_t value
)
186 dword_out(aub
, CMD_MEM_TRACE_REGISTER_WRITE
| (5 + dwords
- 1));
187 dword_out(aub
, addr
);
188 dword_out(aub
, AUB_MEM_TRACE_REGISTER_SIZE_DWORD
|
189 AUB_MEM_TRACE_REGISTER_SPACE_MMIO
);
190 dword_out(aub
, 0xFFFFFFFF); /* mask lo */
191 dword_out(aub
, 0x00000000); /* mask hi */
192 dword_out(aub
, value
);
196 populate_ppgtt_table(struct aub_file
*aub
, struct aub_ppgtt_table
*table
,
197 int start
, int end
, int level
)
199 static uint64_t phys_addrs_allocator
= (PML4_PHYS_ADDR
>> 12) + 1;
200 uint64_t entries
[512] = {0};
201 int dirty_start
= 512, dirty_end
= 0;
203 if (aub
->verbose_log_file
) {
204 fprintf(aub
->verbose_log_file
,
205 " PPGTT (0x%016" PRIx64
"), lvl %d, start: %x, end: %x\n",
206 table
->phys_addr
, level
, start
, end
);
209 for (int i
= start
; i
<= end
; i
++) {
210 if (!table
->subtables
[i
]) {
211 dirty_start
= min(dirty_start
, i
);
212 dirty_end
= max(dirty_end
, i
);
214 table
->subtables
[i
] =
215 (void *)(phys_addrs_allocator
++ << 12);
216 if (aub
->verbose_log_file
) {
217 fprintf(aub
->verbose_log_file
,
218 " Adding entry: %x, phys_addr: 0x%016" PRIx64
"\n",
219 i
, (uint64_t)table
->subtables
[i
]);
222 table
->subtables
[i
] =
223 calloc(1, sizeof(struct aub_ppgtt_table
));
224 table
->subtables
[i
]->phys_addr
=
225 phys_addrs_allocator
++ << 12;
226 if (aub
->verbose_log_file
) {
227 fprintf(aub
->verbose_log_file
,
228 " Adding entry: %x, phys_addr: 0x%016" PRIx64
"\n",
229 i
, table
->subtables
[i
]->phys_addr
);
233 entries
[i
] = 3 /* read/write | present */ |
234 (level
== 1 ? (uint64_t)table
->subtables
[i
] :
235 table
->subtables
[i
]->phys_addr
);
238 if (dirty_start
<= dirty_end
) {
239 uint64_t write_addr
= table
->phys_addr
+ dirty_start
*
241 uint64_t write_size
= (dirty_end
- dirty_start
+ 1) *
243 mem_trace_memory_write_header_out(aub
, write_addr
, write_size
,
244 aub
->default_addr_space
,
246 data_out(aub
, entries
+ dirty_start
, write_size
);
251 aub_map_ppgtt(struct aub_file
*aub
, uint64_t start
, uint64_t size
)
253 uint64_t l4_start
= start
& 0xff8000000000;
254 uint64_t l4_end
= ((start
+ size
- 1) | 0x007fffffffff) & 0xffffffffffff;
256 #define L4_index(addr) (((addr) >> 39) & 0x1ff)
257 #define L3_index(addr) (((addr) >> 30) & 0x1ff)
258 #define L2_index(addr) (((addr) >> 21) & 0x1ff)
259 #define L1_index(addr) (((addr) >> 12) & 0x1ff)
261 #define L3_table(addr) (aub->pml4.subtables[L4_index(addr)])
262 #define L2_table(addr) (L3_table(addr)->subtables[L3_index(addr)])
263 #define L1_table(addr) (L2_table(addr)->subtables[L2_index(addr)])
265 if (aub
->verbose_log_file
) {
266 fprintf(aub
->verbose_log_file
,
267 " Mapping PPGTT address: 0x%" PRIx64
", size: %" PRIu64
"\n",
271 populate_ppgtt_table(aub
, &aub
->pml4
, L4_index(l4_start
), L4_index(l4_end
), 4);
273 for (uint64_t l4
= l4_start
; l4
< l4_end
; l4
+= (1ULL << 39)) {
274 uint64_t l3_start
= max(l4
, start
& 0xffffc0000000);
275 uint64_t l3_end
= min(l4
+ (1ULL << 39) - 1,
276 ((start
+ size
- 1) | 0x00003fffffff) & 0xffffffffffff);
277 uint64_t l3_start_idx
= L3_index(l3_start
);
278 uint64_t l3_end_idx
= L3_index(l3_end
);
280 populate_ppgtt_table(aub
, L3_table(l4
), l3_start_idx
, l3_end_idx
, 3);
282 for (uint64_t l3
= l3_start
; l3
< l3_end
; l3
+= (1ULL << 30)) {
283 uint64_t l2_start
= max(l3
, start
& 0xffffffe00000);
284 uint64_t l2_end
= min(l3
+ (1ULL << 30) - 1,
285 ((start
+ size
- 1) | 0x0000001fffff) & 0xffffffffffff);
286 uint64_t l2_start_idx
= L2_index(l2_start
);
287 uint64_t l2_end_idx
= L2_index(l2_end
);
289 populate_ppgtt_table(aub
, L2_table(l3
), l2_start_idx
, l2_end_idx
, 2);
291 for (uint64_t l2
= l2_start
; l2
< l2_end
; l2
+= (1ULL << 21)) {
292 uint64_t l1_start
= max(l2
, start
& 0xfffffffff000);
293 uint64_t l1_end
= min(l2
+ (1ULL << 21) - 1,
294 ((start
+ size
- 1) | 0x000000000fff) & 0xffffffffffff);
295 uint64_t l1_start_idx
= L1_index(l1_start
);
296 uint64_t l1_end_idx
= L1_index(l1_end
);
298 populate_ppgtt_table(aub
, L1_table(l2
), l1_start_idx
, l1_end_idx
, 1);
305 ppgtt_lookup(struct aub_file
*aub
, uint64_t ppgtt_addr
)
307 return (uint64_t)L1_table(ppgtt_addr
)->subtables
[L1_index(ppgtt_addr
)];
311 write_execlists_header(struct aub_file
*aub
, const char *name
)
313 char app_name
[8 * 4];
314 int app_name_len
, dwords
;
317 snprintf(app_name
, sizeof(app_name
), "PCI-ID=0x%X %s",
319 app_name_len
= ALIGN(app_name_len
, sizeof(uint32_t));
321 dwords
= 5 + app_name_len
/ sizeof(uint32_t);
322 dword_out(aub
, CMD_MEM_TRACE_VERSION
| (dwords
- 1));
323 dword_out(aub
, AUB_MEM_TRACE_VERSION_FILE_VERSION
);
324 dword_out(aub
, aub
->devinfo
.simulator_id
<< AUB_MEM_TRACE_VERSION_DEVICE_SHIFT
);
325 dword_out(aub
, 0); /* version */
326 dword_out(aub
, 0); /* version */
327 data_out(aub
, app_name
, app_name_len
);
330 uint32_t ggtt_ptes
= STATIC_GGTT_MAP_SIZE
>> 12;
332 mem_trace_memory_write_header_out(aub
, STATIC_GGTT_MAP_START
>> 12,
333 ggtt_ptes
* GEN8_PTE_SIZE
,
334 AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY
,
336 for (uint32_t i
= 0; i
< ggtt_ptes
; i
++) {
337 dword_out(aub
, 1 + 0x1000 * i
+ STATIC_GGTT_MAP_START
);
342 mem_trace_memory_write_header_out(aub
, RENDER_RING_ADDR
, RING_SIZE
,
343 aub
->default_addr_space
,
345 for (uint32_t i
= 0; i
< RING_SIZE
; i
+= sizeof(uint32_t))
349 mem_trace_memory_write_header_out(aub
, RENDER_CONTEXT_ADDR
,
352 aub
->default_addr_space
,
354 for (uint32_t i
= 0; i
< PPHWSP_SIZE
; i
+= sizeof(uint32_t))
358 data_out(aub
, get_context_init(&aub
->devinfo
, GEN_RING_RENDER
), CONTEXT_RENDER_SIZE
);
361 mem_trace_memory_write_header_out(aub
, BLITTER_RING_ADDR
, RING_SIZE
,
362 aub
->default_addr_space
,
364 for (uint32_t i
= 0; i
< RING_SIZE
; i
+= sizeof(uint32_t))
368 mem_trace_memory_write_header_out(aub
, BLITTER_CONTEXT_ADDR
,
371 aub
->default_addr_space
,
373 for (uint32_t i
= 0; i
< PPHWSP_SIZE
; i
+= sizeof(uint32_t))
376 /* BLITTER_CONTEXT */
377 data_out(aub
, get_context_init(&aub
->devinfo
, GEN_RING_BLITTER
), CONTEXT_OTHER_SIZE
);
380 mem_trace_memory_write_header_out(aub
, VIDEO_RING_ADDR
, RING_SIZE
,
381 aub
->default_addr_space
,
383 for (uint32_t i
= 0; i
< RING_SIZE
; i
+= sizeof(uint32_t))
387 mem_trace_memory_write_header_out(aub
, VIDEO_CONTEXT_ADDR
,
390 aub
->default_addr_space
,
392 for (uint32_t i
= 0; i
< PPHWSP_SIZE
; i
+= sizeof(uint32_t))
396 data_out(aub
, get_context_init(&aub
->devinfo
, GEN_RING_VIDEO
), CONTEXT_OTHER_SIZE
);
398 register_write_out(aub
, HWS_PGA_RCSUNIT
, RENDER_CONTEXT_ADDR
);
399 register_write_out(aub
, HWS_PGA_VCSUNIT0
, VIDEO_CONTEXT_ADDR
);
400 register_write_out(aub
, HWS_PGA_BCSUNIT
, BLITTER_CONTEXT_ADDR
);
402 register_write_out(aub
, GFX_MODE_RCSUNIT
, 0x80008000 /* execlist enable */);
403 register_write_out(aub
, GFX_MODE_VCSUNIT0
, 0x80008000 /* execlist enable */);
404 register_write_out(aub
, GFX_MODE_BCSUNIT
, 0x80008000 /* execlist enable */);
407 static void write_legacy_header(struct aub_file
*aub
, const char *name
)
409 char app_name
[8 * 4];
411 int comment_len
, comment_dwords
, dwords
;
412 uint32_t entry
= 0x200003;
414 comment_len
= snprintf(comment
, sizeof(comment
), "PCI-ID=0x%x", aub
->pci_id
);
415 comment_dwords
= ((comment_len
+ 3) / 4);
417 /* Start with a (required) version packet. */
418 dwords
= 13 + comment_dwords
;
419 dword_out(aub
, CMD_AUB_HEADER
| (dwords
- 2));
420 dword_out(aub
, (4 << AUB_HEADER_MAJOR_SHIFT
) |
421 (0 << AUB_HEADER_MINOR_SHIFT
));
423 /* Next comes a 32-byte application name. */
424 strncpy(app_name
, name
, sizeof(app_name
));
425 app_name
[sizeof(app_name
) - 1] = 0;
426 data_out(aub
, app_name
, sizeof(app_name
));
428 dword_out(aub
, 0); /* timestamp */
429 dword_out(aub
, 0); /* timestamp */
430 dword_out(aub
, comment_len
);
431 data_out(aub
, comment
, comment_dwords
* 4);
433 /* Set up the GTT. The max we can handle is 64M */
434 dword_out(aub
, CMD_AUB_TRACE_HEADER_BLOCK
|
435 ((aub
->addr_bits
> 32 ? 6 : 5) - 2));
436 dword_out(aub
, AUB_TRACE_MEMTYPE_GTT_ENTRY
|
437 AUB_TRACE_TYPE_NOTYPE
| AUB_TRACE_OP_DATA_WRITE
);
438 dword_out(aub
, 0); /* subtype */
439 dword_out(aub
, 0); /* offset */
440 dword_out(aub
, aub_gtt_size(aub
)); /* size */
441 if (aub
->addr_bits
> 32)
443 for (uint32_t i
= 0; i
< NUM_PT_ENTRIES
; i
++) {
444 dword_out(aub
, entry
+ 0x1000 * i
);
445 if (aub
->addr_bits
> 32)
451 aub_write_header(struct aub_file
*aub
, const char *app_name
)
453 if (aub_use_execlists(aub
))
454 write_execlists_header(aub
, app_name
);
456 write_legacy_header(aub
, app_name
);
460 * Break up large objects into multiple writes. Otherwise a 128kb VBO
461 * would overflow the 16 bits of size field in the packet header and
462 * everything goes badly after that.
465 aub_write_trace_block(struct aub_file
*aub
,
466 uint32_t type
, void *virtual,
467 uint32_t size
, uint64_t gtt_offset
)
470 uint32_t subtype
= 0;
471 static const char null_block
[8 * 4096];
473 for (uint32_t offset
= 0; offset
< size
; offset
+= block_size
) {
474 block_size
= min(8 * 4096, size
- offset
);
476 if (aub_use_execlists(aub
)) {
477 block_size
= min(4096, block_size
);
478 mem_trace_memory_write_header_out(aub
,
479 ppgtt_lookup(aub
, gtt_offset
+ offset
),
481 aub
->default_addr_space
,
484 dword_out(aub
, CMD_AUB_TRACE_HEADER_BLOCK
|
485 ((aub
->addr_bits
> 32 ? 6 : 5) - 2));
486 dword_out(aub
, AUB_TRACE_MEMTYPE_GTT
|
487 type
| AUB_TRACE_OP_DATA_WRITE
);
488 dword_out(aub
, subtype
);
489 dword_out(aub
, gtt_offset
+ offset
);
490 dword_out(aub
, align_u32(block_size
, 4));
491 if (aub
->addr_bits
> 32)
492 dword_out(aub
, (gtt_offset
+ offset
) >> 32);
496 data_out(aub
, ((char *) virtual) + offset
, block_size
);
498 data_out(aub
, null_block
, block_size
);
500 /* Pad to a multiple of 4 bytes. */
501 data_out(aub
, null_block
, -block_size
& 3);
506 aub_dump_execlist(struct aub_file
*aub
, uint64_t batch_offset
, int ring_flag
)
513 uint32_t control_reg
;
516 case I915_EXEC_DEFAULT
:
517 case I915_EXEC_RENDER
:
518 ring_addr
= RENDER_RING_ADDR
;
519 descriptor
= RENDER_CONTEXT_DESCRIPTOR
;
520 elsp_reg
= EXECLIST_SUBMITPORT_RCSUNIT
;
521 elsq_reg
= EXECLIST_SQ_CONTENTS0_RCSUNIT
;
522 status_reg
= EXECLIST_STATUS_RCSUNIT
;
523 control_reg
= EXECLIST_CONTROL_RCSUNIT
;
526 ring_addr
= VIDEO_RING_ADDR
;
527 descriptor
= VIDEO_CONTEXT_DESCRIPTOR
;
528 elsp_reg
= EXECLIST_SUBMITPORT_VCSUNIT0
;
529 elsq_reg
= EXECLIST_SQ_CONTENTS0_VCSUNIT0
;
530 status_reg
= EXECLIST_STATUS_VCSUNIT0
;
531 control_reg
= EXECLIST_CONTROL_VCSUNIT0
;
534 ring_addr
= BLITTER_RING_ADDR
;
535 descriptor
= BLITTER_CONTEXT_DESCRIPTOR
;
536 elsp_reg
= EXECLIST_SUBMITPORT_BCSUNIT
;
537 elsq_reg
= EXECLIST_SQ_CONTENTS0_BCSUNIT
;
538 status_reg
= EXECLIST_STATUS_BCSUNIT
;
539 control_reg
= EXECLIST_CONTROL_BCSUNIT
;
542 unreachable("unknown ring");
545 mem_trace_memory_write_header_out(aub
, ring_addr
, 16,
546 aub
->default_addr_space
,
547 "RING MI_BATCH_BUFFER_START user");
548 dword_out(aub
, AUB_MI_BATCH_BUFFER_START
| MI_BATCH_NON_SECURE_I965
| (3 - 2));
549 dword_out(aub
, batch_offset
& 0xFFFFFFFF);
550 dword_out(aub
, batch_offset
>> 32);
551 dword_out(aub
, 0 /* MI_NOOP */);
553 mem_trace_memory_write_header_out(aub
, ring_addr
+ 8192 + 20, 4,
554 aub
->default_addr_space
,
556 dword_out(aub
, 0); /* RING_BUFFER_HEAD */
557 mem_trace_memory_write_header_out(aub
, ring_addr
+ 8192 + 28, 4,
558 aub
->default_addr_space
,
560 dword_out(aub
, 16); /* RING_BUFFER_TAIL */
562 if (aub
->devinfo
.gen
>= 11) {
563 register_write_out(aub
, elsq_reg
, descriptor
& 0xFFFFFFFF);
564 register_write_out(aub
, elsq_reg
+ sizeof(uint32_t), descriptor
>> 32);
565 register_write_out(aub
, control_reg
, 1);
567 register_write_out(aub
, elsp_reg
, 0);
568 register_write_out(aub
, elsp_reg
, 0);
569 register_write_out(aub
, elsp_reg
, descriptor
>> 32);
570 register_write_out(aub
, elsp_reg
, descriptor
& 0xFFFFFFFF);
573 dword_out(aub
, CMD_MEM_TRACE_REGISTER_POLL
| (5 + 1 - 1));
574 dword_out(aub
, status_reg
);
575 dword_out(aub
, AUB_MEM_TRACE_REGISTER_SIZE_DWORD
|
576 AUB_MEM_TRACE_REGISTER_SPACE_MMIO
);
577 if (aub
->devinfo
.gen
>= 11) {
578 dword_out(aub
, 0x00000001); /* mask lo */
579 dword_out(aub
, 0x00000000); /* mask hi */
580 dword_out(aub
, 0x00000001);
582 dword_out(aub
, 0x00000010); /* mask lo */
583 dword_out(aub
, 0x00000000); /* mask hi */
584 dword_out(aub
, 0x00000000);
589 aub_dump_ringbuffer(struct aub_file
*aub
, uint64_t batch_offset
,
590 uint64_t offset
, int ring_flag
)
592 uint32_t ringbuffer
[4096];
593 unsigned aub_mi_bbs_len
;
594 int ring
= AUB_TRACE_TYPE_RING_PRB0
; /* The default ring */
597 if (ring_flag
== I915_EXEC_BSD
)
598 ring
= AUB_TRACE_TYPE_RING_PRB1
;
599 else if (ring_flag
== I915_EXEC_BLT
)
600 ring
= AUB_TRACE_TYPE_RING_PRB2
;
602 /* Make a ring buffer to execute our batchbuffer. */
603 memset(ringbuffer
, 0, sizeof(ringbuffer
));
605 aub_mi_bbs_len
= aub
->addr_bits
> 32 ? 3 : 2;
606 ringbuffer
[ring_count
] = AUB_MI_BATCH_BUFFER_START
| (aub_mi_bbs_len
- 2);
607 aub_write_reloc(&aub
->devinfo
, &ringbuffer
[ring_count
+ 1], batch_offset
);
608 ring_count
+= aub_mi_bbs_len
;
610 /* Write out the ring. This appears to trigger execution of
611 * the ring in the simulator.
613 dword_out(aub
, CMD_AUB_TRACE_HEADER_BLOCK
|
614 ((aub
->addr_bits
> 32 ? 6 : 5) - 2));
615 dword_out(aub
, AUB_TRACE_MEMTYPE_GTT
| ring
| AUB_TRACE_OP_COMMAND_WRITE
);
616 dword_out(aub
, 0); /* general/surface subtype */
617 dword_out(aub
, offset
);
618 dword_out(aub
, ring_count
* 4);
619 if (aub
->addr_bits
> 32)
620 dword_out(aub
, offset
>> 32);
622 data_out(aub
, ringbuffer
, ring_count
* 4);
626 aub_write_exec(struct aub_file
*aub
, uint64_t batch_addr
,
627 uint64_t offset
, int ring_flag
)
629 if (aub_use_execlists(aub
)) {
630 aub_dump_execlist(aub
, batch_addr
, ring_flag
);
632 /* Dump ring buffer */
633 aub_dump_ringbuffer(aub
, batch_addr
, offset
, ring_flag
);