src/intel/tools/aub_write.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "aub_write.h"
  25
  26 #include <inttypes.h>
  27 #include <signal.h>
  28 #include <stdarg.h>
  29 #include <stdlib.h>
  30 #include <string.h>
  31
  32 #include "drm-uapi/i915_drm.h"
  33 #include "intel_aub.h"
  34 #include "gen_context.h"
  35
  36 #ifndef ALIGN
  37 #define ALIGN(x, y) (((x) + (y)-1) & ~((y)-1))
  38 #endif
  39
  40 #define MI_BATCH_NON_SECURE_I965 (1 << 8)
  41
  42 #define min(a, b) ({                            \
  43          __typeof(a) _a = (a);                  \
  44          __typeof(b) _b = (b);                  \
  45          _a < _b ? _a : _b;                     \
  46       })
  47
  48 #define max(a, b) ({                            \
  49          __typeof(a) _a = (a);                  \
  50          __typeof(b) _b = (b);                  \
  51          _a > _b ? _a : _b;                     \
  52       })
  53
  54 static void
  55 mem_trace_memory_write_header_out(struct aub_file *aub, uint64_t addr,
  56                                   uint32_t len, uint32_t addr_space,
  57                                   const char *desc);
  58
  59 static void __attribute__ ((format(__printf__, 2, 3)))
  60 fail_if(int cond, const char *format, ...)
  61 {
  62    va_list args;
  63
  64    if (!cond)
  65       return;
  66
  67    va_start(args, format);
  68    vfprintf(stderr, format, args);
  69    va_end(args);
  70
  71    raise(SIGTRAP);
  72 }
  73
  74 static inline uint32_t
  75 align_u32(uint32_t v, uint32_t a)
  76 {
  77    return (v + a - 1) & ~(a - 1);
  78 }
  79
  80 static void
  81 aub_ppgtt_table_finish(struct aub_ppgtt_table *table, int level)
  82 {
  83    if (level == 1)
  84       return;
  85
  86    for (unsigned i = 0; i < ARRAY_SIZE(table->subtables); i++) {
  87       if (table->subtables[i]) {
  88          aub_ppgtt_table_finish(table->subtables[i], level - 1);
  89          free(table->subtables[i]);
  90       }
  91    }
  92 }
  93
  94 static void
  95 data_out(struct aub_file *aub, const void *data, size_t size)
  96 {
  97    if (size == 0)
  98       return;
  99
 100    fail_if(fwrite(data, 1, size, aub->file) == 0,
 101            "Writing to output failed\n");
 102 }
 103
 104 static void
 105 dword_out(struct aub_file *aub, uint32_t data)
 106 {
 107    data_out(aub, &data, sizeof(data));
 108 }
 109
 110 static void
 111 write_execlists_header(struct aub_file *aub, const char *name)
 112 {
 113    char app_name[8 * 4];
 114    int app_name_len, dwords;
 115
 116    app_name_len =
 117       snprintf(app_name, sizeof(app_name), "PCI-ID=0x%X %s",
 118                aub->pci_id, name);
 119    app_name_len = ALIGN(app_name_len, sizeof(uint32_t));
 120
 121    dwords = 5 + app_name_len / sizeof(uint32_t);
 122    dword_out(aub, CMD_MEM_TRACE_VERSION | (dwords - 1));
 123    dword_out(aub, AUB_MEM_TRACE_VERSION_FILE_VERSION);
 124    dword_out(aub, aub->devinfo.simulator_id << AUB_MEM_TRACE_VERSION_DEVICE_SHIFT);
 125    dword_out(aub, 0);      /* version */
 126    dword_out(aub, 0);      /* version */
 127    data_out(aub, app_name, app_name_len);
 128 }
 129
 130 static void
 131 write_legacy_header(struct aub_file *aub, const char *name)
 132 {
 133    char app_name[8 * 4];
 134    char comment[16];
 135    int comment_len, comment_dwords, dwords;
 136
 137    comment_len = snprintf(comment, sizeof(comment), "PCI-ID=0x%x", aub->pci_id);
 138    comment_dwords = ((comment_len + 3) / 4);
 139
 140    /* Start with a (required) version packet. */
 141    dwords = 13 + comment_dwords;
 142    dword_out(aub, CMD_AUB_HEADER | (dwords - 2));
 143    dword_out(aub, (4 << AUB_HEADER_MAJOR_SHIFT) |
 144                   (0 << AUB_HEADER_MINOR_SHIFT));
 145
 146    /* Next comes a 32-byte application name. */
 147    strncpy(app_name, name, sizeof(app_name));
 148    app_name[sizeof(app_name) - 1] = 0;
 149    data_out(aub, app_name, sizeof(app_name));
 150
 151    dword_out(aub, 0); /* timestamp */
 152    dword_out(aub, 0); /* timestamp */
 153    dword_out(aub, comment_len);
 154    data_out(aub, comment, comment_dwords * 4);
 155 }
 156
 157
 158 static void
 159 aub_write_header(struct aub_file *aub, const char *app_name)
 160 {
 161    if (aub_use_execlists(aub))
 162       write_execlists_header(aub, app_name);
 163    else
 164       write_legacy_header(aub, app_name);
 165 }
 166
 167 void
 168 aub_file_init(struct aub_file *aub, FILE *file, FILE *debug, uint16_t pci_id, const char *app_name)
 169 {
 170    memset(aub, 0, sizeof(*aub));
 171
 172    aub->verbose_log_file = debug;
 173    aub->file = file;
 174    aub->pci_id = pci_id;
 175    fail_if(!gen_get_device_info(pci_id, &aub->devinfo),
 176            "failed to identify chipset=0x%x\n", pci_id);
 177    aub->addr_bits = aub->devinfo.gen >= 8 ? 48 : 32;
 178
 179    aub_write_header(aub, app_name);
 180
 181    aub->phys_addrs_allocator = 0;
 182    aub->pml4.phys_addr = aub->phys_addrs_allocator++ << 12;
 183
 184    mem_trace_memory_write_header_out(aub, 0,
 185                                      GEN8_PTE_SIZE,
 186                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY,
 187                                      "GGTT PT");
 188    dword_out(aub, 1);
 189    dword_out(aub, 0);
 190 }
 191
 192 void
 193 aub_file_finish(struct aub_file *aub)
 194 {
 195    aub_ppgtt_table_finish(&aub->pml4, 4);
 196    fclose(aub->file);
 197 }
 198
 199 uint32_t
 200 aub_gtt_size(struct aub_file *aub)
 201 {
 202    return NUM_PT_ENTRIES * (aub->addr_bits > 32 ? GEN8_PTE_SIZE : PTE_SIZE);
 203 }
 204
 205 static void
 206 mem_trace_memory_write_header_out(struct aub_file *aub, uint64_t addr,
 207                                   uint32_t len, uint32_t addr_space,
 208                                   const char *desc)
 209 {
 210    uint32_t dwords = ALIGN(len, sizeof(uint32_t)) / sizeof(uint32_t);
 211
 212    if (aub->verbose_log_file) {
 213       fprintf(aub->verbose_log_file,
 214               "  MEM WRITE (0x%016" PRIx64 "-0x%016" PRIx64 ") %s\n",
 215               addr, addr + len, desc);
 216    }
 217
 218    dword_out(aub, CMD_MEM_TRACE_MEMORY_WRITE | (5 + dwords - 1));
 219    dword_out(aub, addr & 0xFFFFFFFF);   /* addr lo */
 220    dword_out(aub, addr >> 32);   /* addr hi */
 221    dword_out(aub, addr_space);   /* gtt */
 222    dword_out(aub, len);
 223 }
 224
 225 static void
 226 register_write_out(struct aub_file *aub, uint32_t addr, uint32_t value)
 227 {
 228    uint32_t dwords = 1;
 229
 230    if (aub->verbose_log_file) {
 231       fprintf(aub->verbose_log_file,
 232               "  MMIO WRITE (0x%08x = 0x%08x)\n", addr, value);
 233    }
 234
 235    dword_out(aub, CMD_MEM_TRACE_REGISTER_WRITE | (5 + dwords - 1));
 236    dword_out(aub, addr);
 237    dword_out(aub, AUB_MEM_TRACE_REGISTER_SIZE_DWORD |
 238                   AUB_MEM_TRACE_REGISTER_SPACE_MMIO);
 239    dword_out(aub, 0xFFFFFFFF);   /* mask lo */
 240    dword_out(aub, 0x00000000);   /* mask hi */
 241    dword_out(aub, value);
 242 }
 243
 244 static void
 245 populate_ppgtt_table(struct aub_file *aub, struct aub_ppgtt_table *table,
 246                      int start, int end, int level)
 247 {
 248    uint64_t entries[512] = {0};
 249    int dirty_start = 512, dirty_end = 0;
 250
 251    if (aub->verbose_log_file) {
 252       fprintf(aub->verbose_log_file,
 253               "  PPGTT (0x%016" PRIx64 "), lvl %d, start: %x, end: %x\n",
 254               table->phys_addr, level, start, end);
 255    }
 256
 257    for (int i = start; i <= end; i++) {
 258       if (!table->subtables[i]) {
 259          dirty_start = min(dirty_start, i);
 260          dirty_end = max(dirty_end, i);
 261          if (level == 1) {
 262             table->subtables[i] =
 263                (void *)(aub->phys_addrs_allocator++ << 12);
 264             if (aub->verbose_log_file) {
 265                fprintf(aub->verbose_log_file,
 266                        "   Adding entry: %x, phys_addr: 0x%016" PRIx64 "\n",
 267                        i, (uint64_t)table->subtables[i]);
 268             }
 269          } else {
 270             table->subtables[i] =
 271                calloc(1, sizeof(struct aub_ppgtt_table));
 272             table->subtables[i]->phys_addr =
 273                aub->phys_addrs_allocator++ << 12;
 274             if (aub->verbose_log_file) {
 275                fprintf(aub->verbose_log_file,
 276                        "   Adding entry: %x, phys_addr: 0x%016" PRIx64 "\n",
 277                        i, table->subtables[i]->phys_addr);
 278             }
 279          }
 280       }
 281       entries[i] = 3 /* read/write | present */ |
 282          (level == 1 ? (uint64_t)table->subtables[i] :
 283           table->subtables[i]->phys_addr);
 284    }
 285
 286    if (dirty_start <= dirty_end) {
 287       uint64_t write_addr = table->phys_addr + dirty_start *
 288          sizeof(uint64_t);
 289       uint64_t write_size = (dirty_end - dirty_start + 1) *
 290          sizeof(uint64_t);
 291       mem_trace_memory_write_header_out(aub, write_addr, write_size,
 292                                         AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_PHYSICAL,
 293                                         "PPGTT update");
 294       data_out(aub, entries + dirty_start, write_size);
 295    }
 296 }
 297
 298 void
 299 aub_map_ppgtt(struct aub_file *aub, uint64_t start, uint64_t size)
 300 {
 301    uint64_t l4_start = start & 0xff8000000000;
 302    uint64_t l4_end = ((start + size - 1) | 0x007fffffffff) & 0xffffffffffff;
 303
 304 #define L4_index(addr) (((addr) >> 39) & 0x1ff)
 305 #define L3_index(addr) (((addr) >> 30) & 0x1ff)
 306 #define L2_index(addr) (((addr) >> 21) & 0x1ff)
 307 #define L1_index(addr) (((addr) >> 12) & 0x1ff)
 308
 309 #define L3_table(addr) (aub->pml4.subtables[L4_index(addr)])
 310 #define L2_table(addr) (L3_table(addr)->subtables[L3_index(addr)])
 311 #define L1_table(addr) (L2_table(addr)->subtables[L2_index(addr)])
 312
 313    if (aub->verbose_log_file) {
 314       fprintf(aub->verbose_log_file,
 315               " Mapping PPGTT address: 0x%" PRIx64 ", size: %" PRIu64"\n",
 316               start, size);
 317    }
 318
 319    populate_ppgtt_table(aub, &aub->pml4, L4_index(l4_start), L4_index(l4_end), 4);
 320
 321    for (uint64_t l4 = l4_start; l4 < l4_end; l4 += (1ULL << 39)) {
 322       uint64_t l3_start = max(l4, start & 0xffffc0000000);
 323       uint64_t l3_end = min(l4 + (1ULL << 39) - 1,
 324                             ((start + size - 1) | 0x00003fffffff) & 0xffffffffffff);
 325       uint64_t l3_start_idx = L3_index(l3_start);
 326       uint64_t l3_end_idx = L3_index(l3_end);
 327
 328       populate_ppgtt_table(aub, L3_table(l4), l3_start_idx, l3_end_idx, 3);
 329
 330       for (uint64_t l3 = l3_start; l3 < l3_end; l3 += (1ULL << 30)) {
 331          uint64_t l2_start = max(l3, start & 0xffffffe00000);
 332          uint64_t l2_end = min(l3 + (1ULL << 30) - 1,
 333                                ((start + size - 1) | 0x0000001fffff) & 0xffffffffffff);
 334          uint64_t l2_start_idx = L2_index(l2_start);
 335          uint64_t l2_end_idx = L2_index(l2_end);
 336
 337          populate_ppgtt_table(aub, L2_table(l3), l2_start_idx, l2_end_idx, 2);
 338
 339          for (uint64_t l2 = l2_start; l2 < l2_end; l2 += (1ULL << 21)) {
 340             uint64_t l1_start = max(l2, start & 0xfffffffff000);
 341             uint64_t l1_end = min(l2 + (1ULL << 21) - 1,
 342                                   ((start + size - 1) | 0x000000000fff) & 0xffffffffffff);
 343             uint64_t l1_start_idx = L1_index(l1_start);
 344             uint64_t l1_end_idx = L1_index(l1_end);
 345
 346             populate_ppgtt_table(aub, L1_table(l2), l1_start_idx, l1_end_idx, 1);
 347          }
 348       }
 349    }
 350 }
 351
 352 static uint64_t
 353 ppgtt_lookup(struct aub_file *aub, uint64_t ppgtt_addr)
 354 {
 355    return (uint64_t)L1_table(ppgtt_addr)->subtables[L1_index(ppgtt_addr)];
 356 }
 357
 358 static uint32_t *
 359 get_context_init(const struct gen_device_info *devinfo,
 360                  enum drm_i915_gem_engine_class engine_class,
 361                  uint32_t *size)
 362 {
 363    static void (* const gen8_contexts[])(uint32_t *, uint32_t *) = {
 364       [I915_ENGINE_CLASS_RENDER] = gen8_render_context_init,
 365       [I915_ENGINE_CLASS_COPY] = gen8_blitter_context_init,
 366       [I915_ENGINE_CLASS_VIDEO] = gen8_video_context_init,
 367    };
 368    static void (* const gen10_contexts[])(uint32_t *, uint32_t *) = {
 369       [I915_ENGINE_CLASS_RENDER] = gen10_render_context_init,
 370       [I915_ENGINE_CLASS_COPY] = gen10_blitter_context_init,
 371       [I915_ENGINE_CLASS_VIDEO] = gen10_video_context_init,
 372    };
 373
 374    assert(devinfo->gen >= 8);
 375
 376    void (*func)(uint32_t *, uint32_t *);
 377    if (devinfo->gen <= 10)
 378       func = gen8_contexts[engine_class];
 379    else
 380       func = gen10_contexts[engine_class];
 381
 382    func(NULL, size);
 383    uint32_t *data = calloc(*size / sizeof(uint32_t), sizeof(uint32_t));
 384    func(data, size);
 385    return data;
 386 }
 387
 388 static void
 389 write_execlists_default_setup(struct aub_file *aub)
 390 {
 391    /* Allocate a continuous physical chunk of memory (GGTT address match
 392     * physical addresses).
 393     */
 394    uint32_t ggtt_ptes = STATIC_GGTT_MAP_SIZE >> 12;
 395    uint64_t phys_addr = aub->phys_addrs_allocator << 12;
 396    uint32_t context_size;
 397
 398    aub->phys_addrs_allocator += ggtt_ptes;
 399
 400    /* GGTT PT */
 401    mem_trace_memory_write_header_out(aub,
 402                                      sizeof(uint64_t) * (phys_addr >> 12),
 403                                      ggtt_ptes * GEN8_PTE_SIZE,
 404                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT_ENTRY,
 405                                      "GGTT PT");
 406    for (uint32_t i = 0; i < ggtt_ptes; i++) {
 407       dword_out(aub, 1 + 0x1000 * i + phys_addr);
 408       dword_out(aub, 0);
 409    }
 410
 411    /* RENDER_RING */
 412    mem_trace_memory_write_header_out(aub, phys_addr + RENDER_RING_ADDR, RING_SIZE,
 413                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 414                                      "RENDER RING");
 415    for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
 416       dword_out(aub, 0);
 417
 418    /* RENDER_PPHWSP */
 419    mem_trace_memory_write_header_out(aub, phys_addr + RENDER_CONTEXT_ADDR,
 420                                      PPHWSP_SIZE +
 421                                      CONTEXT_RENDER_SIZE,
 422                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 423                                      "RENDER PPHWSP");
 424    for (uint32_t i = 0; i < PPHWSP_SIZE; i += sizeof(uint32_t))
 425       dword_out(aub, 0);
 426
 427    /* RENDER_CONTEXT */
 428    data_out(aub, get_context_init(&aub->devinfo, I915_ENGINE_CLASS_RENDER, &context_size), CONTEXT_RENDER_SIZE);
 429    assert(context_size == CONTEXT_RENDER_SIZE);
 430
 431    /* BLITTER_RING */
 432    mem_trace_memory_write_header_out(aub, phys_addr + BLITTER_RING_ADDR, RING_SIZE,
 433                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 434                                      "BLITTER RING");
 435    for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
 436       dword_out(aub, 0);
 437
 438    /* BLITTER_PPHWSP */
 439    mem_trace_memory_write_header_out(aub, phys_addr + BLITTER_CONTEXT_ADDR,
 440                                      PPHWSP_SIZE +
 441                                      CONTEXT_OTHER_SIZE,
 442                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 443                                      "BLITTER PPHWSP");
 444    for (uint32_t i = 0; i < PPHWSP_SIZE; i += sizeof(uint32_t))
 445       dword_out(aub, 0);
 446
 447    /* BLITTER_CONTEXT */
 448    data_out(aub, get_context_init(&aub->devinfo, I915_ENGINE_CLASS_COPY, &context_size), CONTEXT_OTHER_SIZE);
 449    assert(context_size == CONTEXT_OTHER_SIZE);
 450
 451    /* VIDEO_RING */
 452    mem_trace_memory_write_header_out(aub, phys_addr + VIDEO_RING_ADDR, RING_SIZE,
 453                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 454                                      "VIDEO RING");
 455    for (uint32_t i = 0; i < RING_SIZE; i += sizeof(uint32_t))
 456       dword_out(aub, 0);
 457
 458    /* VIDEO_PPHWSP */
 459    mem_trace_memory_write_header_out(aub, phys_addr + VIDEO_CONTEXT_ADDR,
 460                                      PPHWSP_SIZE +
 461                                      CONTEXT_OTHER_SIZE,
 462                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 463                                      "VIDEO PPHWSP");
 464    for (uint32_t i = 0; i < PPHWSP_SIZE; i += sizeof(uint32_t))
 465       dword_out(aub, 0);
 466
 467    /* VIDEO_CONTEXT */
 468    data_out(aub, get_context_init(&aub->devinfo, I915_ENGINE_CLASS_VIDEO, &context_size), CONTEXT_OTHER_SIZE);
 469    assert(context_size == CONTEXT_OTHER_SIZE);
 470
 471    register_write_out(aub, HWS_PGA_RCSUNIT, RENDER_CONTEXT_ADDR);
 472    register_write_out(aub, HWS_PGA_VCSUNIT0, VIDEO_CONTEXT_ADDR);
 473    register_write_out(aub, HWS_PGA_BCSUNIT, BLITTER_CONTEXT_ADDR);
 474
 475    register_write_out(aub, GFX_MODE_RCSUNIT, 0x80008000 /* execlist enable */);
 476    register_write_out(aub, GFX_MODE_VCSUNIT0, 0x80008000 /* execlist enable */);
 477    register_write_out(aub, GFX_MODE_BCSUNIT, 0x80008000 /* execlist enable */);
 478 }
 479
 480 static void write_legacy_default_setup(struct aub_file *aub)
 481 {
 482    uint32_t entry = 0x200003;
 483
 484    /* Set up the GTT. The max we can handle is 64M */
 485    dword_out(aub, CMD_AUB_TRACE_HEADER_BLOCK |
 486                   ((aub->addr_bits > 32 ? 6 : 5) - 2));
 487    dword_out(aub, AUB_TRACE_MEMTYPE_GTT_ENTRY |
 488                   AUB_TRACE_TYPE_NOTYPE | AUB_TRACE_OP_DATA_WRITE);
 489    dword_out(aub, 0); /* subtype */
 490    dword_out(aub, 0); /* offset */
 491    dword_out(aub, aub_gtt_size(aub)); /* size */
 492    if (aub->addr_bits > 32)
 493       dword_out(aub, 0);
 494    for (uint32_t i = 0; i < NUM_PT_ENTRIES; i++) {
 495       dword_out(aub, entry + 0x1000 * i);
 496       if (aub->addr_bits > 32)
 497          dword_out(aub, 0);
 498    }
 499 }
 500
 501 /**
 502  * Sets up a default GGTT/PPGTT address space and execlists context (when
 503  * supported).
 504  */
 505 void
 506 aub_write_default_setup(struct aub_file *aub)
 507 {
 508    if (aub_use_execlists(aub))
 509       write_execlists_default_setup(aub);
 510    else
 511       write_legacy_default_setup(aub);
 512 }
 513
 514 /**
 515  * Break up large objects into multiple writes.  Otherwise a 128kb VBO
 516  * would overflow the 16 bits of size field in the packet header and
 517  * everything goes badly after that.
 518  */
 519 void
 520 aub_write_trace_block(struct aub_file *aub,
 521                       uint32_t type, void *virtual,
 522                       uint32_t size, uint64_t gtt_offset)
 523 {
 524    uint32_t block_size;
 525    uint32_t subtype = 0;
 526    static const char null_block[8 * 4096];
 527
 528    for (uint32_t offset = 0; offset < size; offset += block_size) {
 529       block_size = min(8 * 4096, size - offset);
 530
 531       if (aub_use_execlists(aub)) {
 532          block_size = min(4096, block_size);
 533          mem_trace_memory_write_header_out(aub,
 534                                            ppgtt_lookup(aub, gtt_offset + offset),
 535                                            block_size,
 536                                            AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_PHYSICAL,
 537                                            "Trace Block");
 538       } else {
 539          dword_out(aub, CMD_AUB_TRACE_HEADER_BLOCK |
 540                         ((aub->addr_bits > 32 ? 6 : 5) - 2));
 541          dword_out(aub, AUB_TRACE_MEMTYPE_GTT |
 542                         type | AUB_TRACE_OP_DATA_WRITE);
 543          dword_out(aub, subtype);
 544          dword_out(aub, gtt_offset + offset);
 545          dword_out(aub, align_u32(block_size, 4));
 546          if (aub->addr_bits > 32)
 547             dword_out(aub, (gtt_offset + offset) >> 32);
 548       }
 549
 550       if (virtual)
 551          data_out(aub, ((char *) virtual) + offset, block_size);
 552       else
 553          data_out(aub, null_block, block_size);
 554
 555       /* Pad to a multiple of 4 bytes. */
 556       data_out(aub, null_block, -block_size & 3);
 557    }
 558 }
 559
 560 static const struct engine {
 561    uint32_t elsp_reg;
 562    uint32_t elsq_reg;
 563    uint32_t status_reg;
 564    uint32_t control_reg;
 565
 566    /* Those are only to be used if using the default context setup. */
 567    uint32_t default_ring_addr;
 568    uint64_t default_descriptor;
 569 } engines[] = {
 570    [I915_ENGINE_CLASS_RENDER] = {
 571       .elsp_reg = EXECLIST_SUBMITPORT_RCSUNIT,
 572       .elsq_reg = EXECLIST_SQ_CONTENTS0_RCSUNIT,
 573       .status_reg = EXECLIST_STATUS_RCSUNIT,
 574       .control_reg = EXECLIST_CONTROL_RCSUNIT,
 575
 576       .default_ring_addr = RENDER_RING_ADDR,
 577       .default_descriptor = RENDER_CONTEXT_DESCRIPTOR,
 578    },
 579    [I915_ENGINE_CLASS_VIDEO] = {
 580       .elsp_reg = EXECLIST_SUBMITPORT_VCSUNIT0,
 581       .elsq_reg = EXECLIST_SQ_CONTENTS0_VCSUNIT0,
 582       .status_reg = EXECLIST_STATUS_VCSUNIT0,
 583       .control_reg = EXECLIST_CONTROL_VCSUNIT0,
 584
 585       .default_ring_addr = VIDEO_RING_ADDR,
 586       .default_descriptor = VIDEO_CONTEXT_DESCRIPTOR,
 587    },
 588    [I915_ENGINE_CLASS_COPY] = {
 589       .elsp_reg = EXECLIST_SUBMITPORT_BCSUNIT,
 590       .elsq_reg = EXECLIST_SQ_CONTENTS0_BCSUNIT,
 591       .status_reg = EXECLIST_STATUS_BCSUNIT,
 592       .control_reg = EXECLIST_CONTROL_BCSUNIT,
 593
 594       .default_ring_addr = BLITTER_RING_ADDR,
 595       .default_descriptor = BLITTER_CONTEXT_DESCRIPTOR,
 596    },
 597 };
 598
 599 static const struct engine *
 600 engine_from_engine_class(enum drm_i915_gem_engine_class engine_class)
 601 {
 602    switch (engine_class) {
 603    case I915_ENGINE_CLASS_RENDER:
 604    case I915_ENGINE_CLASS_COPY:
 605    case I915_ENGINE_CLASS_VIDEO:
 606       return &engines[engine_class];
 607    default:
 608       unreachable("unknown ring");
 609    }
 610 }
 611
 612 static void
 613 aub_dump_ring_buffer_execlist(struct aub_file *aub,
 614                               const struct engine *cs,
 615                               uint64_t batch_offset)
 616 {
 617    mem_trace_memory_write_header_out(aub, cs->default_ring_addr, 16,
 618                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 619                                      "RING MI_BATCH_BUFFER_START user");
 620    dword_out(aub, AUB_MI_BATCH_BUFFER_START | MI_BATCH_NON_SECURE_I965 | (3 - 2));
 621    dword_out(aub, batch_offset & 0xFFFFFFFF);
 622    dword_out(aub, batch_offset >> 32);
 623    dword_out(aub, 0 /* MI_NOOP */);
 624
 625    mem_trace_memory_write_header_out(aub, cs->default_ring_addr + 8192 + 20, 4,
 626                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 627                                      "RING BUFFER HEAD");
 628    dword_out(aub, 0); /* RING_BUFFER_HEAD */
 629    mem_trace_memory_write_header_out(aub, cs->default_ring_addr + 8192 + 28, 4,
 630                                      AUB_MEM_TRACE_MEMORY_ADDRESS_SPACE_GGTT,
 631                                      "RING BUFFER TAIL");
 632    dword_out(aub, 16); /* RING_BUFFER_TAIL */
 633 }
 634
 635 static void
 636 aub_dump_execlist(struct aub_file *aub, const struct engine *cs, uint64_t descriptor)
 637 {
 638    if (aub->devinfo.gen >= 11) {
 639       register_write_out(aub, cs->elsq_reg, descriptor & 0xFFFFFFFF);
 640       register_write_out(aub, cs->elsq_reg + sizeof(uint32_t), descriptor >> 32);
 641       register_write_out(aub, cs->control_reg, 1);
 642    } else {
 643       register_write_out(aub, cs->elsp_reg, 0);
 644       register_write_out(aub, cs->elsp_reg, 0);
 645       register_write_out(aub, cs->elsp_reg, descriptor >> 32);
 646       register_write_out(aub, cs->elsp_reg, descriptor & 0xFFFFFFFF);
 647    }
 648
 649    dword_out(aub, CMD_MEM_TRACE_REGISTER_POLL | (5 + 1 - 1));
 650    dword_out(aub, cs->status_reg);
 651    dword_out(aub, AUB_MEM_TRACE_REGISTER_SIZE_DWORD |
 652                   AUB_MEM_TRACE_REGISTER_SPACE_MMIO);
 653    if (aub->devinfo.gen >= 11) {
 654       dword_out(aub, 0x00000001);   /* mask lo */
 655       dword_out(aub, 0x00000000);   /* mask hi */
 656       dword_out(aub, 0x00000001);
 657    } else {
 658       dword_out(aub, 0x00000010);   /* mask lo */
 659       dword_out(aub, 0x00000000);   /* mask hi */
 660       dword_out(aub, 0x00000000);
 661    }
 662 }
 663
 664 static void
 665 aub_dump_ring_buffer_legacy(struct aub_file *aub,
 666                             uint64_t batch_offset,
 667                             uint64_t offset,
 668                             enum drm_i915_gem_engine_class engine_class)
 669 {
 670    uint32_t ringbuffer[4096];
 671    unsigned aub_mi_bbs_len;
 672    int ring_count = 0;
 673    static const int engine_class_to_ring[] = {
 674       [I915_ENGINE_CLASS_RENDER] = AUB_TRACE_TYPE_RING_PRB0,
 675       [I915_ENGINE_CLASS_VIDEO]  = AUB_TRACE_TYPE_RING_PRB1,
 676       [I915_ENGINE_CLASS_COPY]   = AUB_TRACE_TYPE_RING_PRB2,
 677    };
 678    int ring = engine_class_to_ring[engine_class];
 679
 680    /* Make a ring buffer to execute our batchbuffer. */
 681    memset(ringbuffer, 0, sizeof(ringbuffer));
 682
 683    aub_mi_bbs_len = aub->addr_bits > 32 ? 3 : 2;
 684    ringbuffer[ring_count] = AUB_MI_BATCH_BUFFER_START | (aub_mi_bbs_len - 2);
 685    aub_write_reloc(&aub->devinfo, &ringbuffer[ring_count + 1], batch_offset);
 686    ring_count += aub_mi_bbs_len;
 687
 688    /* Write out the ring.  This appears to trigger execution of
 689     * the ring in the simulator.
 690     */
 691    dword_out(aub, CMD_AUB_TRACE_HEADER_BLOCK |
 692                   ((aub->addr_bits > 32 ? 6 : 5) - 2));
 693    dword_out(aub, AUB_TRACE_MEMTYPE_GTT | ring | AUB_TRACE_OP_COMMAND_WRITE);
 694    dword_out(aub, 0); /* general/surface subtype */
 695    dword_out(aub, offset);
 696    dword_out(aub, ring_count * 4);
 697    if (aub->addr_bits > 32)
 698       dword_out(aub, offset >> 32);
 699
 700    data_out(aub, ringbuffer, ring_count * 4);
 701 }
 702
 703 void
 704 aub_write_exec(struct aub_file *aub, uint64_t batch_addr,
 705                uint64_t offset, enum drm_i915_gem_engine_class engine_class)
 706 {
 707    const struct engine *cs = engine_from_engine_class(engine_class);
 708
 709    if (aub_use_execlists(aub)) {
 710       aub_dump_ring_buffer_execlist(aub, cs, batch_addr);
 711       aub_dump_execlist(aub, cs, cs->default_descriptor);
 712    } else {
 713       /* Dump ring buffer */
 714       aub_dump_ring_buffer_legacy(aub, batch_addr, offset, engine_class);
 715    }
 716    fflush(aub->file);
 717 }