src/intel/tools/aub_write.h

   1 /*
   2  * Copyright © 2007-2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24
  25 #ifndef INTEL_AUB_WRITE
  26 #define INTEL_AUB_WRITE
  27
  28 #include <stdint.h>
  29 #include <stdio.h>
  30
  31 #include "drm-uapi/i915_drm.h"
  32
  33 #include "dev/gen_device_info.h"
  34 #include "common/gen_gem.h"
  35
  36 #ifdef __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 struct aub_ppgtt_table {
  41    uint64_t phys_addr;
  42    struct aub_ppgtt_table *subtables[512];
  43 };
  44
  45 struct aub_file {
  46    FILE *file;
  47
  48    bool has_default_setup;
  49
  50    /* Set if you want extra logging */
  51    FILE *verbose_log_file;
  52
  53    uint16_t pci_id;
  54    struct gen_device_info devinfo;
  55
  56    int addr_bits;
  57
  58    struct aub_ppgtt_table pml4;
  59    uint64_t phys_addrs_allocator;
  60
  61    struct {
  62       uint64_t ring_addr;
  63       uint64_t pphwsp_addr;
  64       uint64_t descriptor;
  65    } engine_setup[I915_ENGINE_CLASS_VIDEO_ENHANCE + 1];
  66 };
  67
  68 void aub_file_init(struct aub_file *aub, FILE *file, FILE *debug, uint16_t pci_id, const char *app_name);
  69 void aub_file_finish(struct aub_file *aub);
  70
  71 static inline bool aub_use_execlists(const struct aub_file *aub)
  72 {
  73    return aub->devinfo.gen >= 8;
  74 }
  75
  76 uint32_t aub_gtt_size(struct aub_file *aub);
  77
  78 static inline void
  79 aub_write_reloc(const struct gen_device_info *devinfo, void *p, uint64_t v)
  80 {
  81    if (devinfo->gen >= 8) {
  82       *(uint64_t *)p = gen_canonical_address(v);
  83    } else {
  84       *(uint32_t *)p = v;
  85    }
  86 }
  87
  88 void aub_write_default_setup(struct aub_file *aub);
  89 void aub_map_ppgtt(struct aub_file *aub, uint64_t start, uint64_t size);
  90 void aub_write_ggtt(struct aub_file *aub, uint64_t virt_addr, uint64_t size, const void *data);
  91 void aub_write_trace_block(struct aub_file *aub,
  92                            uint32_t type, void *virtual,
  93                            uint32_t size, uint64_t gtt_offset);
  94 void aub_write_exec(struct aub_file *aub, uint64_t batch_addr,
  95                     uint64_t offset, enum drm_i915_gem_engine_class engine_class);
  96 void aub_write_context_execlists(struct aub_file *aub, uint64_t context_addr,
  97                                  enum drm_i915_gem_engine_class engine_class);
  98
  99 #ifdef __cplusplus
 100 }
 101 #endif
 102
 103 #endif /* INTEL_AUB_WRITE */