2 * Copyright © 2007-2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
34 #include <sys/types.h>
41 #include "common/gen_decoder.h"
42 #include "util/macros.h"
43 #include "gen_disasm.h"
46 #define BLUE_HEADER CSI "0;44m"
47 #define GREEN_HEADER CSI "1;42m"
48 #define NORMAL CSI "0m"
50 #define MIN(a, b) ((a) < (b) ? (a) : (b))
54 static bool option_full_decode
= true;
55 static bool option_print_offsets
= true;
56 static enum { COLOR_AUTO
, COLOR_ALWAYS
, COLOR_NEVER
} option_color
;
57 static char *xml_path
= NULL
;
60 print_head(unsigned int reg
)
62 printf(" head = 0x%08x, wraps = %d\n", reg
& (0x7ffff<<2), reg
>> 21);
63 return reg
& (0x7ffff<<2);
67 print_register(struct gen_spec
*spec
, const char *name
, uint32_t reg
)
69 struct gen_group
*reg_spec
= gen_spec_find_register_by_name(spec
, name
);
72 gen_print_group(stdout
, reg_spec
, 0, ®
, option_color
== COLOR_ALWAYS
);
75 struct ring_register_mapping
{
76 const char *ring_name
;
77 const char *register_name
;
80 static const struct ring_register_mapping acthd_registers
[] = {
81 { "blt", "BCS_ACTHD_UDW" },
82 { "bsd", "VCS_ACTHD_UDW" },
83 { "bsd2", "VCS2_ACTHD_UDW" },
84 { "render", "ACTHD_UDW" },
85 { "vebox", "VECS_ACTHD_UDW" },
88 static const struct ring_register_mapping ctl_registers
[] = {
89 { "blt", "BCS_RING_BUFFER_CTL" },
90 { "bsd", "VCS_RING_BUFFER_CTL" },
91 { "bsd2", "VCS2_RING_BUFFER_CTL" },
92 { "render", "RCS_RING_BUFFER_CTL" },
93 { "vebox", "VECS_RING_BUFFER_CTL" },
96 static const struct ring_register_mapping fault_registers
[] = {
97 { "blt", "BCS_FAULT_REG" },
98 { "bsd", "VCS_FAULT_REG" },
99 { "render", "RCS_FAULT_REG" },
100 { "vebox", "VECS_FAULT_REG" },
104 register_name_from_ring(const struct ring_register_mapping
*mapping
,
106 const char *ring_name
)
108 for (unsigned i
= 0; i
< nb_mapping
; i
++) {
109 if (strcmp(mapping
[i
].ring_name
, ring_name
) == 0)
110 return mapping
[i
].register_name
;
116 instdone_register_for_ring(const struct gen_device_info
*devinfo
,
117 const char *ring_name
)
119 if (strcmp(ring_name
, "blt") == 0)
120 return "BCS_INSTDONE";
121 else if (strcmp(ring_name
, "vebox") == 0)
122 return "VECS_INSTDONE";
123 else if (strcmp(ring_name
, "bsd") == 0)
124 return "VCS_INSTDONE";
125 else if (strcmp(ring_name
, "render") == 0) {
126 if (devinfo
->gen
== 6)
135 print_pgtbl_err(unsigned int reg
, struct gen_device_info
*devinfo
)
138 printf(" Invalid Sampler Cache GTT entry\n");
140 printf(" Invalid Render Cache GTT entry\n");
142 printf(" Invalid Instruction/State Cache GTT entry\n");
144 printf(" There is no ROC, this cannot occur!\n");
146 printf(" Invalid GTT entry during Vertex Fetch\n");
148 printf(" Invalid GTT entry during Command Fetch\n");
150 printf(" Invalid GTT entry during CS\n");
152 printf(" Invalid GTT entry during Cursor Fetch\n");
154 printf(" Invalid GTT entry during Overlay Fetch\n");
156 printf(" Invalid GTT entry during Display B Fetch\n");
158 printf(" Invalid GTT entry during Display A Fetch\n");
160 printf(" Valid PTE references illegal memory\n");
162 printf(" Invalid GTT entry during fetch for host\n");
166 print_snb_fence(struct gen_device_info
*devinfo
, uint64_t fence
)
168 printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n",
169 fence
& 1 ? "" : "in",
170 fence
& (1<<1) ? 'y' : 'x',
171 (int)(((fence
>>32)&0xfff)+1)*128,
172 (uint32_t)fence
& 0xfffff000,
173 (uint32_t)(((fence
>>32)&0xfffff000) - (fence
&0xfffff000) + 4096));
177 print_i965_fence(struct gen_device_info
*devinfo
, uint64_t fence
)
179 printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n",
180 fence
& 1 ? "" : "in",
181 fence
& (1<<1) ? 'y' : 'x',
182 (int)(((fence
>>2)&0x1ff)+1)*128,
183 (uint32_t)fence
& 0xfffff000,
184 (uint32_t)(((fence
>>32)&0xfffff000) - (fence
&0xfffff000) + 4096));
188 print_fence(struct gen_device_info
*devinfo
, uint64_t fence
)
190 if (devinfo
->gen
== 6 || devinfo
->gen
== 7) {
191 return print_snb_fence(devinfo
, fence
);
192 } else if (devinfo
->gen
== 4 || devinfo
->gen
== 5) {
193 return print_i965_fence(devinfo
, fence
);
198 print_fault_data(struct gen_device_info
*devinfo
, uint32_t data1
, uint32_t data0
)
202 if (devinfo
->gen
< 8)
205 address
= ((uint64_t)(data0
) << 12) | ((uint64_t)data1
& 0xf) << 44;
206 printf(" Address 0x%016" PRIx64
" %s\n", address
,
207 data1
& (1 << 4) ? "GGTT" : "PPGTT");
211 #define NORMAL CSI "0m"
216 uint64_t command_offset
;
217 uint64_t instruction_base_address
;
221 #define MAX_NUM_PROGRAMS 4096
222 static struct program programs
[MAX_NUM_PROGRAMS
];
223 static int idx_program
= 0, num_programs
= 0;
225 static int next_program(void)
227 int ret
= idx_program
;
228 idx_program
= (idx_program
+ 1) % MAX_NUM_PROGRAMS
;
229 num_programs
= MIN(num_programs
+ 1, MAX_NUM_PROGRAMS
);
233 static void decode(struct gen_spec
*spec
,
238 uint32_t *p
, *end
= (data
+ count
);
240 struct gen_group
*inst
;
241 uint64_t current_instruction_base_address
= 0;
243 for (p
= data
; p
< end
; p
+= length
) {
244 const char *color
= option_full_decode
? BLUE_HEADER
: NORMAL
,
245 *reset_color
= NORMAL
;
246 uint64_t offset
= gtt_offset
+ 4 * (p
- data
);
248 inst
= gen_spec_find_instruction(spec
, p
);
249 length
= gen_group_get_length(inst
, p
);
250 assert(inst
== NULL
|| length
> 0);
251 length
= MAX2(1, length
);
253 printf("unknown instruction %08x\n", p
[0]);
256 if (option_color
== COLOR_NEVER
) {
261 printf("%s0x%08"PRIx64
": 0x%08x: %-80s%s\n",
262 color
, offset
, p
[0], gen_group_get_name(inst
), reset_color
);
264 gen_print_group(stdout
, inst
, offset
, p
,
265 option_color
== COLOR_ALWAYS
);
267 if (strcmp(inst
->name
, "MI_BATCH_BUFFER_END") == 0)
270 if (strcmp(inst
->name
, "STATE_BASE_ADDRESS") == 0) {
271 struct gen_field_iterator iter
;
272 gen_field_iterator_init(&iter
, inst
, p
, false);
274 while (gen_field_iterator_next(&iter
)) {
275 if (strcmp(iter
.name
, "Instruction Base Address") == 0) {
276 current_instruction_base_address
= strtol(iter
.value
, NULL
, 16);
279 } else if (strcmp(inst
->name
, "WM_STATE") == 0 ||
280 strcmp(inst
->name
, "3DSTATE_PS") == 0 ||
281 strcmp(inst
->name
, "3DSTATE_WM") == 0) {
282 struct gen_field_iterator iter
;
283 gen_field_iterator_init(&iter
, inst
, p
, false);
284 uint64_t ksp
[3] = {0, 0, 0};
285 bool enabled
[3] = {false, false, false};
287 while (gen_field_iterator_next(&iter
)) {
288 if (strncmp(iter
.name
, "Kernel Start Pointer ",
289 strlen("Kernel Start Pointer ")) == 0) {
290 int idx
= iter
.name
[strlen("Kernel Start Pointer ")] - '0';
291 ksp
[idx
] = strtol(iter
.value
, NULL
, 16);
292 } else if (strcmp(iter
.name
, "8 Pixel Dispatch Enable") == 0) {
293 enabled
[0] = strcmp(iter
.value
, "true") == 0;
294 } else if (strcmp(iter
.name
, "16 Pixel Dispatch Enable") == 0) {
295 enabled
[1] = strcmp(iter
.value
, "true") == 0;
296 } else if (strcmp(iter
.name
, "32 Pixel Dispatch Enable") == 0) {
297 enabled
[2] = strcmp(iter
.value
, "true") == 0;
301 /* FINISHME: Broken for multi-program WM_STATE,
302 * which Mesa does not use
304 if (enabled
[0] + enabled
[1] + enabled
[2] == 1) {
305 const char *type
= enabled
[0] ? "SIMD8 fragment shader" :
306 enabled
[1] ? "SIMD16 fragment shader" :
307 enabled
[2] ? "SIMD32 fragment shader" : NULL
;
309 programs
[next_program()] = (struct program
) {
311 .command
= inst
->name
,
312 .command_offset
= offset
,
313 .instruction_base_address
= current_instruction_base_address
,
317 if (enabled
[0]) /* SIMD8 */ {
318 programs
[next_program()] = (struct program
) {
319 .type
= "SIMD8 fragment shader",
320 .command
= inst
->name
,
321 .command_offset
= offset
,
322 .instruction_base_address
= current_instruction_base_address
,
323 .ksp
= ksp
[0], /* SIMD8 shader is specified by ksp[0] */
326 if (enabled
[1]) /* SIMD16 */ {
327 programs
[next_program()] = (struct program
) {
328 .type
= "SIMD16 fragment shader",
329 .command
= inst
->name
,
330 .command_offset
= offset
,
331 .instruction_base_address
= current_instruction_base_address
,
332 .ksp
= ksp
[2], /* SIMD16 shader is specified by ksp[2] */
335 if (enabled
[2]) /* SIMD32 */ {
336 programs
[next_program()] = (struct program
) {
337 .type
= "SIMD32 fragment shader",
338 .command
= inst
->name
,
339 .command_offset
= offset
,
340 .instruction_base_address
= current_instruction_base_address
,
341 .ksp
= ksp
[1], /* SIMD32 shader is specified by ksp[1] */
345 } else if (strcmp(inst
->name
, "VS_STATE") == 0 ||
346 strcmp(inst
->name
, "GS_STATE") == 0 ||
347 strcmp(inst
->name
, "SF_STATE") == 0 ||
348 strcmp(inst
->name
, "CLIP_STATE") == 0 ||
349 strcmp(inst
->name
, "3DSTATE_DS") == 0 ||
350 strcmp(inst
->name
, "3DSTATE_HS") == 0 ||
351 strcmp(inst
->name
, "3DSTATE_GS") == 0 ||
352 strcmp(inst
->name
, "3DSTATE_VS") == 0) {
353 struct gen_field_iterator iter
;
354 gen_field_iterator_init(&iter
, inst
, p
, false);
356 bool is_simd8
= false; /* vertex shaders on Gen8+ only */
357 bool is_enabled
= true;
359 while (gen_field_iterator_next(&iter
)) {
360 if (strcmp(iter
.name
, "Kernel Start Pointer") == 0) {
361 ksp
= strtol(iter
.value
, NULL
, 16);
362 } else if (strcmp(iter
.name
, "SIMD8 Dispatch Enable") == 0) {
363 is_simd8
= strcmp(iter
.value
, "true") == 0;
364 } else if (strcmp(iter
.name
, "Dispatch Enable") == 0) {
365 is_simd8
= strcmp(iter
.value
, "SIMD8") == 0;
366 } else if (strcmp(iter
.name
, "Enable") == 0) {
367 is_enabled
= strcmp(iter
.value
, "true") == 0;
372 strcmp(inst
->name
, "VS_STATE") == 0 ? "vertex shader" :
373 strcmp(inst
->name
, "GS_STATE") == 0 ? "geometry shader" :
374 strcmp(inst
->name
, "SF_STATE") == 0 ? "strips and fans shader" :
375 strcmp(inst
->name
, "CLIP_STATE") == 0 ? "clip shader" :
376 strcmp(inst
->name
, "3DSTATE_DS") == 0 ? "tessellation control shader" :
377 strcmp(inst
->name
, "3DSTATE_HS") == 0 ? "tessellation evaluation shader" :
378 strcmp(inst
->name
, "3DSTATE_VS") == 0 ? (is_simd8
? "SIMD8 vertex shader" : "vec4 vertex shader") :
379 strcmp(inst
->name
, "3DSTATE_GS") == 0 ? (is_simd8
? "SIMD8 geometry shader" : "vec4 geometry shader") :
383 programs
[next_program()] = (struct program
) {
385 .command
= inst
->name
,
386 .command_offset
= offset
,
387 .instruction_base_address
= current_instruction_base_address
,
395 static int zlib_inflate(uint32_t **ptr
, int len
)
397 struct z_stream_s zstream
;
399 const uint32_t out_size
= 128*4096; /* approximate obj size */
401 memset(&zstream
, 0, sizeof(zstream
));
403 zstream
.next_in
= (unsigned char *)*ptr
;
404 zstream
.avail_in
= 4*len
;
406 if (inflateInit(&zstream
) != Z_OK
)
409 out
= malloc(out_size
);
410 zstream
.next_out
= out
;
411 zstream
.avail_out
= out_size
;
414 switch (inflate(&zstream
, Z_SYNC_FLUSH
)) {
420 inflateEnd(&zstream
);
424 if (zstream
.avail_out
)
427 out
= realloc(out
, 2*zstream
.total_out
);
429 inflateEnd(&zstream
);
433 zstream
.next_out
= (unsigned char *)out
+ zstream
.total_out
;
434 zstream
.avail_out
= zstream
.total_out
;
437 inflateEnd(&zstream
);
440 return zstream
.total_out
/ 4;
443 static int ascii85_decode(const char *in
, uint32_t **out
, bool inflate
)
445 int len
= 0, size
= 1024;
447 *out
= realloc(*out
, sizeof(uint32_t)*size
);
451 while (*in
>= '!' && *in
<= 'z') {
456 *out
= realloc(*out
, sizeof(uint32_t)*size
);
464 v
+= in
[0] - 33; v
*= 85;
465 v
+= in
[1] - 33; v
*= 85;
466 v
+= in
[2] - 33; v
*= 85;
467 v
+= in
[3] - 33; v
*= 85;
477 return zlib_inflate(out
, len
);
481 read_data_file(FILE *file
)
483 struct gen_spec
*spec
= NULL
;
484 long long unsigned fence
;
488 uint32_t offset
, value
;
489 uint64_t gtt_offset
= 0;
490 const char *buffer_name
= "batch buffer";
491 char *ring_name
= NULL
;
492 struct gen_device_info devinfo
;
493 struct gen_disasm
*disasm
= NULL
;
495 while (getline(&line
, &line_size
, file
) > 0) {
496 char *new_ring_name
= NULL
;
499 if (sscanf(line
, "%m[^ ] command stream\n", &new_ring_name
) > 0) {
501 ring_name
= new_ring_name
;
504 if (line
[0] == ':' || line
[0] == '~') {
505 uint32_t *data
= NULL
;
506 int count
= ascii85_decode(line
+1, &data
, line
[0] == ':');
508 fprintf(stderr
, "ASCII85 decode failed.\n");
512 if (strcmp(buffer_name
, "user") == 0) {
513 printf("Disassembly of programs in instruction buffer at "
514 "0x%08"PRIx64
":\n", gtt_offset
);
515 for (int i
= 0; i
< num_programs
; i
++) {
516 int idx
= (idx_program
+ i
) % MAX_NUM_PROGRAMS
;
517 if (programs
[idx
].instruction_base_address
== gtt_offset
) {
518 printf("\n%s (specified by %s at batch offset "
519 "0x%08"PRIx64
") at offset 0x%08"PRIx64
"\n",
521 programs
[idx
].command
,
522 programs
[idx
].command_offset
,
524 gen_disasm_disassemble(disasm
, data
, programs
[idx
].ksp
,
528 } else if (strcmp(buffer_name
, "batch buffer") == 0 ||
529 strcmp(buffer_name
, "ring buffer") == 0 ||
530 strcmp(buffer_name
, "HW Context") == 0) {
531 decode(spec
, gtt_offset
, data
, count
);
537 dashes
= strstr(line
, "---");
543 { "ringbuffer", "ring buffer" },
544 { "gtt_offset", "batch buffer" },
545 { "hw context", "HW Context" },
546 { "hw status", "HW status" },
547 { "wa context", "WA context" },
548 { "wa batchbuffer", "WA batch" },
550 { "semaphores", "semaphores", },
551 { "guc log buffer", "GuC log", },
560 ring_name
= malloc(dashes
- line
);
561 strncpy(ring_name
, line
, dashes
- line
);
562 ring_name
[dashes
- line
- 1] = '\0';
565 for (b
= buffers
; b
->match
; b
++) {
566 if (strncasecmp(dashes
, b
->match
, strlen(b
->match
)) == 0)
570 buffer_name
= b
->name
;
573 dashes
= strchr(dashes
, '=');
574 if (dashes
&& sscanf(dashes
, "= 0x%08x %08x\n", &hi
, &lo
))
575 gtt_offset
= ((uint64_t) hi
) << 32 | lo
;
580 matched
= sscanf(line
, "%08x : %08x", &offset
, &value
);
584 /* display reg section is after the ringbuffers, don't mix them */
587 matched
= sscanf(line
, "PCI ID: 0x%04x\n", ®
);
589 matched
= sscanf(line
, " PCI ID: 0x%04x\n", ®
);
591 const char *pci_id_start
= strstr(line
, "PCI ID");
593 matched
= sscanf(pci_id_start
, "PCI ID: 0x%04x\n", ®
);
596 if (!gen_get_device_info(reg
, &devinfo
)) {
597 printf("Unable to identify devid=%x\n", reg
);
601 disasm
= gen_disasm_create(reg
);
603 printf("Detected GEN%i chipset\n", devinfo
.gen
);
605 if (xml_path
== NULL
)
606 spec
= gen_spec_load(&devinfo
);
608 spec
= gen_spec_load_from_path(&devinfo
, xml_path
);
611 matched
= sscanf(line
, " CTL: 0x%08x\n", ®
);
614 register_name_from_ring(ctl_registers
,
615 ARRAY_SIZE(ctl_registers
),
619 matched
= sscanf(line
, " HEAD: 0x%08x\n", ®
);
623 matched
= sscanf(line
, " ACTHD: 0x%08x\n", ®
);
626 register_name_from_ring(acthd_registers
,
627 ARRAY_SIZE(acthd_registers
),
631 matched
= sscanf(line
, " PGTBL_ER: 0x%08x\n", ®
);
632 if (matched
== 1 && reg
)
633 print_pgtbl_err(reg
, &devinfo
);
635 matched
= sscanf(line
, " ERROR: 0x%08x\n", ®
);
636 if (matched
== 1 && reg
) {
637 print_register(spec
, "GFX_ARB_ERROR_RPT", reg
);
640 matched
= sscanf(line
, " INSTDONE: 0x%08x\n", ®
);
642 const char *reg_name
=
643 instdone_register_for_ring(&devinfo
, ring_name
);
645 print_register(spec
, reg_name
, reg
);
648 matched
= sscanf(line
, " INSTDONE1: 0x%08x\n", ®
);
650 print_register(spec
, "INSTDONE_1", reg
);
652 matched
= sscanf(line
, " fence[%i] = %Lx\n", ®
, &fence
);
654 print_fence(&devinfo
, fence
);
656 matched
= sscanf(line
, " FAULT_REG: 0x%08x\n", ®
);
657 if (matched
== 1 && reg
) {
658 const char *reg_name
=
659 register_name_from_ring(fault_registers
,
660 ARRAY_SIZE(fault_registers
),
662 if (reg_name
== NULL
)
663 reg_name
= "FAULT_REG";
664 print_register(spec
, reg_name
, reg
);
667 matched
= sscanf(line
, " FAULT_TLB_DATA: 0x%08x 0x%08x\n", ®
, ®2
);
669 print_fault_data(&devinfo
, reg
, reg2
);
675 gen_disasm_destroy(disasm
);
699 execlp("less", "less", "-FRSi", NULL
);
708 print_help(const char *progname
, FILE *file
)
711 "Usage: %s [OPTION]... [FILE]\n"
712 "Parse an Intel GPU i915_error_state.\n"
713 "With no FILE, debugfs-dri-directory is probed for in /debug and \n"
714 "/sys/kernel/debug. Otherwise, it may be specified. If a file is given,\n"
715 "it is parsed as an GPU dump in the format of /debug/dri/0/i915_error_state.\n\n"
716 " --help display this help and exit\n"
717 " --headers decode only command headers\n"
718 " --color[=WHEN] colorize the output; WHEN can be 'auto' (default\n"
719 " if omitted), 'always', or 'never'\n"
720 " --no-pager don't launch pager\n"
721 " --no-offsets don't print instruction offsets\n"
722 " --xml=DIR load hardware xml description from directory DIR\n",
727 main(int argc
, char *argv
[])
733 bool help
= false, pager
= true;
734 const struct option aubinator_opts
[] = {
735 { "help", no_argument
, (int *) &help
, true },
736 { "no-pager", no_argument
, (int *) &pager
, false },
737 { "no-offsets", no_argument
, (int *) &option_print_offsets
, false },
738 { "headers", no_argument
, (int *) &option_full_decode
, false },
739 { "color", required_argument
, NULL
, 'c' },
740 { "xml", required_argument
, NULL
, 'x' },
745 while ((c
= getopt_long(argc
, argv
, "", aubinator_opts
, &i
)) != -1) {
748 if (optarg
== NULL
|| strcmp(optarg
, "always") == 0)
749 option_color
= COLOR_ALWAYS
;
750 else if (strcmp(optarg
, "never") == 0)
751 option_color
= COLOR_NEVER
;
752 else if (strcmp(optarg
, "auto") == 0)
753 option_color
= COLOR_AUTO
;
755 fprintf(stderr
, "invalid value for --color: %s", optarg
);
760 xml_path
= strdup(optarg
);
767 if (help
|| argc
== 1) {
768 print_help(argv
[0], stderr
);
772 if (optind
>= argc
) {
774 path
= "/sys/class/drm/card0/error";
775 error
= stat(path
, &st
);
778 error
= stat(path
, &st
);
781 path
= "/sys/kernel/debug/dri";
782 error
= stat(path
, &st
);
786 "Couldn't find i915 debugfs directory.\n\n"
787 "Is debugfs mounted? You might try mounting it with a command such as:\n\n"
788 "\tsudo mount -t debugfs debugfs /sys/kernel/debug\n");
791 read_data_file(stdin
);
796 error
= stat(path
, &st
);
798 fprintf(stderr
, "Error opening %s: %s\n",
799 path
, strerror(errno
));
804 if (option_color
== COLOR_AUTO
)
805 option_color
= isatty(1) ? COLOR_ALWAYS
: COLOR_NEVER
;
807 if (isatty(1) && pager
)
810 if (S_ISDIR(st
.st_mode
)) {
814 ret
= asprintf(&filename
, "%s/i915_error_state", path
);
816 file
= fopen(filename
, "r");
820 for (minor
= 0; minor
< 64; minor
++) {
821 ret
= asprintf(&filename
, "%s/%d/i915_error_state", path
, minor
);
824 file
= fopen(filename
, "r");
832 fprintf(stderr
, "Failed to find i915_error_state beneath %s\n",
837 file
= fopen(path
, "r");
839 fprintf(stderr
, "Failed to open %s: %s\n",
840 path
, strerror(errno
));
845 read_data_file(file
);
848 /* close the stdout which is opened to write the output */
859 /* vim: set ts=8 sw=8 tw=0 cino=:0,(0 noet :*/