2 * Copyright © 2007-2017 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
34 #include <sys/types.h>
41 #include "common/gen_decoder.h"
42 #include "util/macros.h"
43 #include "gen_disasm.h"
46 #define BLUE_HEADER CSI "0;44m"
47 #define GREEN_HEADER CSI "1;42m"
48 #define NORMAL CSI "0m"
52 static bool option_full_decode
= true;
53 static bool option_print_offsets
= true;
54 static enum { COLOR_AUTO
, COLOR_ALWAYS
, COLOR_NEVER
} option_color
;
55 static char *xml_path
= NULL
;
58 print_head(unsigned int reg
)
60 printf(" head = 0x%08x, wraps = %d\n", reg
& (0x7ffff<<2), reg
>> 21);
61 return reg
& (0x7ffff<<2);
65 print_register(struct gen_spec
*spec
, const char *name
, uint32_t reg
)
67 struct gen_group
*reg_spec
= gen_spec_find_register_by_name(spec
, name
);
70 gen_print_group(stdout
, reg_spec
, 0, ®
, option_color
== COLOR_ALWAYS
);
73 struct ring_register_mapping
{
74 const char *ring_name
;
75 const char *register_name
;
78 static const struct ring_register_mapping acthd_registers
[] = {
79 { "blt", "BCS_ACTHD_UDW" },
80 { "bsd", "VCS_ACTHD_UDW" },
81 { "bsd2", "VCS2_ACTHD_UDW" },
82 { "render", "ACTHD_UDW" },
83 { "vebox", "VECS_ACTHD_UDW" },
86 static const struct ring_register_mapping ctl_registers
[] = {
87 { "blt", "BCS_RING_BUFFER_CTL" },
88 { "bsd", "VCS_RING_BUFFER_CTL" },
89 { "bsd2", "VCS2_RING_BUFFER_CTL" },
90 { "render", "RCS_RING_BUFFER_CTL" },
91 { "vebox", "VECS_RING_BUFFER_CTL" },
94 static const struct ring_register_mapping fault_registers
[] = {
95 { "blt", "BCS_FAULT_REG" },
96 { "bsd", "VCS_FAULT_REG" },
97 { "render", "RCS_FAULT_REG" },
98 { "vebox", "VECS_FAULT_REG" },
102 register_name_from_ring(const struct ring_register_mapping
*mapping
,
104 const char *ring_name
)
106 for (unsigned i
= 0; i
< nb_mapping
; i
++) {
107 if (strcmp(mapping
[i
].ring_name
, ring_name
) == 0)
108 return mapping
[i
].register_name
;
114 instdone_register_for_ring(const struct gen_device_info
*devinfo
,
115 const char *ring_name
)
117 if (strcmp(ring_name
, "blt") == 0)
118 return "BCS_INSTDONE";
119 else if (strcmp(ring_name
, "vebox") == 0)
120 return "VECS_INSTDONE";
121 else if (strcmp(ring_name
, "bsd") == 0)
122 return "VCS_INSTDONE";
123 else if (strcmp(ring_name
, "render") == 0) {
124 if (devinfo
->gen
== 6)
133 print_pgtbl_err(unsigned int reg
, struct gen_device_info
*devinfo
)
136 printf(" Invalid Sampler Cache GTT entry\n");
138 printf(" Invalid Render Cache GTT entry\n");
140 printf(" Invalid Instruction/State Cache GTT entry\n");
142 printf(" There is no ROC, this cannot occur!\n");
144 printf(" Invalid GTT entry during Vertex Fetch\n");
146 printf(" Invalid GTT entry during Command Fetch\n");
148 printf(" Invalid GTT entry during CS\n");
150 printf(" Invalid GTT entry during Cursor Fetch\n");
152 printf(" Invalid GTT entry during Overlay Fetch\n");
154 printf(" Invalid GTT entry during Display B Fetch\n");
156 printf(" Invalid GTT entry during Display A Fetch\n");
158 printf(" Valid PTE references illegal memory\n");
160 printf(" Invalid GTT entry during fetch for host\n");
164 print_snb_fence(struct gen_device_info
*devinfo
, uint64_t fence
)
166 printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n",
167 fence
& 1 ? "" : "in",
168 fence
& (1<<1) ? 'y' : 'x',
169 (int)(((fence
>>32)&0xfff)+1)*128,
170 (uint32_t)fence
& 0xfffff000,
171 (uint32_t)(((fence
>>32)&0xfffff000) - (fence
&0xfffff000) + 4096));
175 print_i965_fence(struct gen_device_info
*devinfo
, uint64_t fence
)
177 printf(" %svalid, %c-tiled, pitch: %i, start: 0x%08x, size: %u\n",
178 fence
& 1 ? "" : "in",
179 fence
& (1<<1) ? 'y' : 'x',
180 (int)(((fence
>>2)&0x1ff)+1)*128,
181 (uint32_t)fence
& 0xfffff000,
182 (uint32_t)(((fence
>>32)&0xfffff000) - (fence
&0xfffff000) + 4096));
186 print_fence(struct gen_device_info
*devinfo
, uint64_t fence
)
188 if (devinfo
->gen
== 6 || devinfo
->gen
== 7) {
189 return print_snb_fence(devinfo
, fence
);
190 } else if (devinfo
->gen
== 4 || devinfo
->gen
== 5) {
191 return print_i965_fence(devinfo
, fence
);
196 print_fault_data(struct gen_device_info
*devinfo
, uint32_t data1
, uint32_t data0
)
200 if (devinfo
->gen
< 8)
203 address
= ((uint64_t)(data0
) << 12) | ((uint64_t)data1
& 0xf) << 44;
204 printf(" Address 0x%016" PRIx64
" %s\n", address
,
205 data1
& (1 << 4) ? "GGTT" : "PPGTT");
208 #define MAX_RINGS 10 /* I really hope this never... */
211 #define NORMAL CSI "0m"
216 uint64_t command_offset
;
217 uint64_t instruction_base_address
;
221 #define MAX_NUM_PROGRAMS 4096
222 static struct program programs
[MAX_NUM_PROGRAMS
];
223 static int num_programs
= 0;
225 static void decode(struct gen_spec
*spec
,
226 const char *buffer_name
,
227 const char *ring_name
,
232 uint32_t *p
, *end
= (data
+ *count
);
234 struct gen_group
*inst
;
235 uint64_t current_instruction_base_address
= 0;
237 for (p
= data
; p
< end
; p
+= length
) {
238 const char *color
= option_full_decode
? BLUE_HEADER
: NORMAL
,
239 *reset_color
= NORMAL
;
240 uint64_t offset
= gtt_offset
+ 4 * (p
- data
);
242 inst
= gen_spec_find_instruction(spec
, p
);
243 length
= gen_group_get_length(inst
, p
);
244 assert(inst
== NULL
|| length
> 0);
245 length
= MAX2(1, length
);
247 printf("unknown instruction %08x\n", p
[0]);
250 if (option_color
== COLOR_NEVER
) {
255 printf("%s0x%08"PRIx64
": 0x%08x: %-80s%s\n",
256 color
, offset
, p
[0], gen_group_get_name(inst
), reset_color
);
258 gen_print_group(stdout
, inst
, offset
, p
,
259 option_color
== COLOR_ALWAYS
);
261 if (strcmp(inst
->name
, "MI_BATCH_BUFFER_END") == 0)
264 if (strcmp(inst
->name
, "STATE_BASE_ADDRESS") == 0) {
265 struct gen_field_iterator iter
;
266 gen_field_iterator_init(&iter
, inst
, p
, false);
268 while (gen_field_iterator_next(&iter
)) {
269 if (strcmp(iter
.name
, "Instruction Base Address") == 0) {
270 current_instruction_base_address
= strtol(iter
.value
, NULL
, 16);
273 } else if (strcmp(inst
->name
, "WM_STATE") == 0 ||
274 strcmp(inst
->name
, "3DSTATE_PS") == 0 ||
275 strcmp(inst
->name
, "3DSTATE_WM") == 0) {
276 struct gen_field_iterator iter
;
277 gen_field_iterator_init(&iter
, inst
, p
, false);
278 uint64_t ksp
[3] = {0, 0, 0};
279 bool enabled
[3] = {false, false, false};
281 while (gen_field_iterator_next(&iter
)) {
282 if (strncmp(iter
.name
, "Kernel Start Pointer ",
283 strlen("Kernel Start Pointer ")) == 0) {
284 int idx
= iter
.name
[strlen("Kernel Start Pointer ")] - '0';
285 ksp
[idx
] = strtol(iter
.value
, NULL
, 16);
286 } else if (strcmp(iter
.name
, "8 Pixel Dispatch Enable") == 0) {
287 enabled
[0] = strcmp(iter
.value
, "true") == 0;
288 } else if (strcmp(iter
.name
, "16 Pixel Dispatch Enable") == 0) {
289 enabled
[1] = strcmp(iter
.value
, "true") == 0;
290 } else if (strcmp(iter
.name
, "32 Pixel Dispatch Enable") == 0) {
291 enabled
[2] = strcmp(iter
.value
, "true") == 0;
295 /* FINISHME: Broken for multi-program WM_STATE,
296 * which Mesa does not use
298 if (enabled
[0] + enabled
[1] + enabled
[2] == 1) {
299 const char *type
= enabled
[0] ? "SIMD8 fragment shader" :
300 enabled
[1] ? "SIMD16 fragment shader" :
301 enabled
[2] ? "SIMD32 fragment shader" : NULL
;
303 programs
[num_programs
++] = (struct program
) {
305 .command
= inst
->name
,
306 .command_offset
= offset
,
307 .instruction_base_address
= current_instruction_base_address
,
311 if (enabled
[0]) /* SIMD8 */ {
312 programs
[num_programs
++] = (struct program
) {
313 .type
= "SIMD8 fragment shader",
314 .command
= inst
->name
,
315 .command_offset
= offset
,
316 .instruction_base_address
= current_instruction_base_address
,
317 .ksp
= ksp
[0], /* SIMD8 shader is specified by ksp[0] */
320 if (enabled
[1]) /* SIMD16 */ {
321 programs
[num_programs
++] = (struct program
) {
322 .type
= "SIMD16 fragment shader",
323 .command
= inst
->name
,
324 .command_offset
= offset
,
325 .instruction_base_address
= current_instruction_base_address
,
326 .ksp
= ksp
[2], /* SIMD16 shader is specified by ksp[2] */
329 if (enabled
[2]) /* SIMD32 */ {
330 programs
[num_programs
++] = (struct program
) {
331 .type
= "SIMD32 fragment shader",
332 .command
= inst
->name
,
333 .command_offset
= offset
,
334 .instruction_base_address
= current_instruction_base_address
,
335 .ksp
= ksp
[1], /* SIMD32 shader is specified by ksp[1] */
339 } else if (strcmp(inst
->name
, "VS_STATE") == 0 ||
340 strcmp(inst
->name
, "GS_STATE") == 0 ||
341 strcmp(inst
->name
, "SF_STATE") == 0 ||
342 strcmp(inst
->name
, "CLIP_STATE") == 0 ||
343 strcmp(inst
->name
, "3DSTATE_DS") == 0 ||
344 strcmp(inst
->name
, "3DSTATE_HS") == 0 ||
345 strcmp(inst
->name
, "3DSTATE_GS") == 0 ||
346 strcmp(inst
->name
, "3DSTATE_VS") == 0) {
347 struct gen_field_iterator iter
;
348 gen_field_iterator_init(&iter
, inst
, p
, false);
350 bool is_simd8
= false; /* vertex shaders on Gen8+ only */
351 bool is_enabled
= true;
353 while (gen_field_iterator_next(&iter
)) {
354 if (strcmp(iter
.name
, "Kernel Start Pointer") == 0) {
355 ksp
= strtol(iter
.value
, NULL
, 16);
356 } else if (strcmp(iter
.name
, "SIMD8 Dispatch Enable") == 0) {
357 is_simd8
= strcmp(iter
.value
, "true") == 0;
358 } else if (strcmp(iter
.name
, "Dispatch Enable") == 0) {
359 is_simd8
= strcmp(iter
.value
, "SIMD8") == 0;
360 } else if (strcmp(iter
.name
, "Function Enable") == 0) {
361 is_enabled
= strcmp(iter
.value
, "true") == 0;
366 strcmp(inst
->name
, "VS_STATE") == 0 ? "vertex shader" :
367 strcmp(inst
->name
, "GS_STATE") == 0 ? "geometry shader" :
368 strcmp(inst
->name
, "SF_STATE") == 0 ? "strips and fans shader" :
369 strcmp(inst
->name
, "CLIP_STATE") == 0 ? "clip shader" :
370 strcmp(inst
->name
, "3DSTATE_DS") == 0 ? "tessellation control shader" :
371 strcmp(inst
->name
, "3DSTATE_HS") == 0 ? "tessellation evaluation shader" :
372 strcmp(inst
->name
, "3DSTATE_VS") == 0 ? (is_simd8
? "SIMD8 vertex shader" : "vec4 vertex shader") :
373 strcmp(inst
->name
, "3DSTATE_GS") == 0 ? (is_simd8
? "SIMD8 geometry shader" : "vec4 geometry shader") :
377 programs
[num_programs
++] = (struct program
) {
379 .command
= inst
->name
,
380 .command_offset
= offset
,
381 .instruction_base_address
= current_instruction_base_address
,
387 assert(num_programs
< MAX_NUM_PROGRAMS
);
391 static int zlib_inflate(uint32_t **ptr
, int len
)
393 struct z_stream_s zstream
;
395 const uint32_t out_size
= 128*4096; /* approximate obj size */
397 memset(&zstream
, 0, sizeof(zstream
));
399 zstream
.next_in
= (unsigned char *)*ptr
;
400 zstream
.avail_in
= 4*len
;
402 if (inflateInit(&zstream
) != Z_OK
)
405 out
= malloc(out_size
);
406 zstream
.next_out
= out
;
407 zstream
.avail_out
= out_size
;
410 switch (inflate(&zstream
, Z_SYNC_FLUSH
)) {
416 inflateEnd(&zstream
);
420 if (zstream
.avail_out
)
423 out
= realloc(out
, 2*zstream
.total_out
);
425 inflateEnd(&zstream
);
429 zstream
.next_out
= (unsigned char *)out
+ zstream
.total_out
;
430 zstream
.avail_out
= zstream
.total_out
;
433 inflateEnd(&zstream
);
436 return zstream
.total_out
/ 4;
439 static int ascii85_decode(const char *in
, uint32_t **out
, bool inflate
)
441 int len
= 0, size
= 1024;
443 *out
= realloc(*out
, sizeof(uint32_t)*size
);
447 while (*in
>= '!' && *in
<= 'z') {
452 *out
= realloc(*out
, sizeof(uint32_t)*size
);
460 v
+= in
[0] - 33; v
*= 85;
461 v
+= in
[1] - 33; v
*= 85;
462 v
+= in
[2] - 33; v
*= 85;
463 v
+= in
[3] - 33; v
*= 85;
473 return zlib_inflate(out
, len
);
477 read_data_file(FILE *file
)
479 struct gen_spec
*spec
= NULL
;
480 uint32_t *data
= NULL
;
481 long long unsigned fence
;
482 int data_size
= 0, count
= 0, line_number
= 0, matched
;
485 uint32_t offset
, value
;
486 uint64_t gtt_offset
= 0, new_gtt_offset
;
487 const char *buffer_name
= "batch buffer";
488 char *ring_name
= NULL
;
489 struct gen_device_info devinfo
;
490 struct gen_disasm
*disasm
= NULL
;
492 while (getline(&line
, &line_size
, file
) > 0) {
493 char *new_ring_name
= NULL
;
497 if (sscanf(line
, "%m[^ ] command stream\n", &new_ring_name
) > 0) {
499 ring_name
= new_ring_name
;
502 dashes
= strstr(line
, "---");
505 char *new_ring_name
= malloc(dashes
- line
);
506 strncpy(new_ring_name
, line
, dashes
- line
);
507 new_ring_name
[dashes
- line
- 1] = '\0';
511 matched
= sscanf(dashes
, "--- gtt_offset = 0x%08x %08x\n",
516 new_gtt_offset
<<= 32;
517 new_gtt_offset
|= lo
;
521 buffer_name
, ring_name
,
522 gtt_offset
, data
, &count
);
523 gtt_offset
= new_gtt_offset
;
525 ring_name
= new_ring_name
;
526 buffer_name
= "batch buffer";
530 matched
= sscanf(dashes
, "--- ringbuffer = 0x%08x %08x\n",
535 new_gtt_offset
<<= 32;
536 new_gtt_offset
|= lo
;
540 buffer_name
, ring_name
,
541 gtt_offset
, data
, &count
);
542 gtt_offset
= new_gtt_offset
;
544 ring_name
= new_ring_name
;
545 buffer_name
= "ring buffer";
549 matched
= sscanf(dashes
, "--- HW Context = 0x%08x %08x\n",
554 new_gtt_offset
<<= 32;
555 new_gtt_offset
|= lo
;
559 buffer_name
, ring_name
,
560 gtt_offset
, data
, &count
);
561 gtt_offset
= new_gtt_offset
;
563 ring_name
= new_ring_name
;
564 buffer_name
= "HW Context";
568 matched
= sscanf(dashes
, "--- user = 0x%08x %08x\n",
573 new_gtt_offset
<<= 32;
574 new_gtt_offset
|= lo
;
577 gtt_offset
= new_gtt_offset
;
579 ring_name
= new_ring_name
;
580 buffer_name
= "user";
585 if (line
[0] == ':' || line
[0] == '~') {
586 count
= ascii85_decode(line
+1, &data
, line
[0] == ':');
588 fprintf(stderr
, "ASCII85 decode failed.\n");
592 if (strcmp(buffer_name
, "user") == 0) {
593 printf("Disassembly of programs in instruction buffer at "
594 "0x%08"PRIx64
":\n", gtt_offset
);
595 for (int i
= 0; i
< num_programs
; i
++) {
596 if (programs
[i
].instruction_base_address
== gtt_offset
) {
597 printf("\n%s (specified by %s at batch offset "
598 "0x%08"PRIx64
") at offset 0x%08"PRIx64
"\n",
601 programs
[i
].command_offset
,
603 gen_disasm_disassemble(disasm
, data
, programs
[i
].ksp
,
609 buffer_name
, ring_name
,
610 gtt_offset
, data
, &count
);
615 matched
= sscanf(line
, "%08x : %08x", &offset
, &value
);
619 /* display reg section is after the ringbuffers, don't mix them */
621 buffer_name
, ring_name
,
622 gtt_offset
, data
, &count
);
626 matched
= sscanf(line
, "PCI ID: 0x%04x\n", ®
);
628 matched
= sscanf(line
, " PCI ID: 0x%04x\n", ®
);
630 const char *pci_id_start
= strstr(line
, "PCI ID");
632 matched
= sscanf(pci_id_start
, "PCI ID: 0x%04x\n", ®
);
635 if (!gen_get_device_info(reg
, &devinfo
)) {
636 printf("Unable to identify devid=%x\n", reg
);
640 disasm
= gen_disasm_create(reg
);
642 printf("Detected GEN%i chipset\n", devinfo
.gen
);
644 if (xml_path
== NULL
)
645 spec
= gen_spec_load(&devinfo
);
647 spec
= gen_spec_load_from_path(&devinfo
, xml_path
);
650 matched
= sscanf(line
, " CTL: 0x%08x\n", ®
);
653 register_name_from_ring(ctl_registers
,
654 ARRAY_SIZE(ctl_registers
),
658 matched
= sscanf(line
, " HEAD: 0x%08x\n", ®
);
662 matched
= sscanf(line
, " ACTHD: 0x%08x\n", ®
);
665 register_name_from_ring(acthd_registers
,
666 ARRAY_SIZE(acthd_registers
),
670 matched
= sscanf(line
, " PGTBL_ER: 0x%08x\n", ®
);
671 if (matched
== 1 && reg
)
672 print_pgtbl_err(reg
, &devinfo
);
674 matched
= sscanf(line
, " ERROR: 0x%08x\n", ®
);
675 if (matched
== 1 && reg
) {
676 print_register(spec
, "GFX_ARB_ERROR_RPT", reg
);
679 matched
= sscanf(line
, " INSTDONE: 0x%08x\n", ®
);
681 const char *reg_name
=
682 instdone_register_for_ring(&devinfo
, ring_name
);
684 print_register(spec
, reg_name
, reg
);
687 matched
= sscanf(line
, " INSTDONE1: 0x%08x\n", ®
);
689 print_register(spec
, "INSTDONE_1", reg
);
691 matched
= sscanf(line
, " fence[%i] = %Lx\n", ®
, &fence
);
693 print_fence(&devinfo
, fence
);
695 matched
= sscanf(line
, " FAULT_REG: 0x%08x\n", ®
);
696 if (matched
== 1 && reg
) {
697 const char *reg_name
=
698 register_name_from_ring(fault_registers
,
699 ARRAY_SIZE(fault_registers
),
701 if (reg_name
== NULL
)
702 reg_name
= "FAULT_REG";
703 print_register(spec
, reg_name
, reg
);
706 matched
= sscanf(line
, " FAULT_TLB_DATA: 0x%08x 0x%08x\n", ®
, ®2
);
708 print_fault_data(&devinfo
, reg
, reg2
);
715 if (count
> data_size
) {
716 data_size
= data_size
? data_size
* 2 : 1024;
717 data
= realloc(data
, data_size
* sizeof (uint32_t));
719 fprintf(stderr
, "Out of memory.\n");
724 data
[count
-1] = value
;
728 buffer_name
, ring_name
,
729 gtt_offset
, data
, &count
);
731 gen_disasm_destroy(disasm
);
756 execlp("less", "less", "-FRSi", NULL
);
765 print_help(const char *progname
, FILE *file
)
768 "Usage: %s [OPTION]... [FILE]\n"
769 "Parse an Intel GPU i915_error_state.\n"
770 "With no FILE, debugfs-dri-directory is probed for in /debug and \n"
771 "/sys/kernel/debug. Otherwise, it may be specified. If a file is given,\n"
772 "it is parsed as an GPU dump in the format of /debug/dri/0/i915_error_state.\n\n"
773 " --help display this help and exit\n"
774 " --headers decode only command headers\n"
775 " --color[=WHEN] colorize the output; WHEN can be 'auto' (default\n"
776 " if omitted), 'always', or 'never'\n"
777 " --no-pager don't launch pager\n"
778 " --no-offsets don't print instruction offsets\n"
779 " --xml=DIR load hardware xml description from directory DIR\n",
784 main(int argc
, char *argv
[])
790 bool help
= false, pager
= true;
791 const struct option aubinator_opts
[] = {
792 { "help", no_argument
, (int *) &help
, true },
793 { "no-pager", no_argument
, (int *) &pager
, false },
794 { "no-offsets", no_argument
, (int *) &option_print_offsets
, false },
795 { "headers", no_argument
, (int *) &option_full_decode
, false },
796 { "color", required_argument
, NULL
, 'c' },
797 { "xml", required_argument
, NULL
, 'x' },
802 while ((c
= getopt_long(argc
, argv
, "", aubinator_opts
, &i
)) != -1) {
805 if (optarg
== NULL
|| strcmp(optarg
, "always") == 0)
806 option_color
= COLOR_ALWAYS
;
807 else if (strcmp(optarg
, "never") == 0)
808 option_color
= COLOR_NEVER
;
809 else if (strcmp(optarg
, "auto") == 0)
810 option_color
= COLOR_AUTO
;
812 fprintf(stderr
, "invalid value for --color: %s", optarg
);
817 xml_path
= strdup(optarg
);
824 if (help
|| argc
== 1) {
825 print_help(argv
[0], stderr
);
829 if (optind
>= argc
) {
831 path
= "/sys/class/drm/card0/error";
832 error
= stat(path
, &st
);
835 error
= stat(path
, &st
);
838 path
= "/sys/kernel/debug/dri";
839 error
= stat(path
, &st
);
843 "Couldn't find i915 debugfs directory.\n\n"
844 "Is debugfs mounted? You might try mounting it with a command such as:\n\n"
845 "\tsudo mount -t debugfs debugfs /sys/kernel/debug\n");
848 read_data_file(stdin
);
853 error
= stat(path
, &st
);
855 fprintf(stderr
, "Error opening %s: %s\n",
856 path
, strerror(errno
));
861 if (option_color
== COLOR_AUTO
)
862 option_color
= isatty(1) ? COLOR_ALWAYS
: COLOR_NEVER
;
864 if (isatty(1) && pager
)
867 if (S_ISDIR(st
.st_mode
)) {
871 ret
= asprintf(&filename
, "%s/i915_error_state", path
);
873 file
= fopen(filename
, "r");
877 for (minor
= 0; minor
< 64; minor
++) {
878 ret
= asprintf(&filename
, "%s/%d/i915_error_state", path
, minor
);
881 file
= fopen(filename
, "r");
889 fprintf(stderr
, "Failed to find i915_error_state beneath %s\n",
894 file
= fopen(path
, "r");
896 fprintf(stderr
, "Failed to open %s: %s\n",
897 path
, strerror(errno
));
902 read_data_file(file
);
905 /* close the stdout which is opened to write the output */
916 /* vim: set ts=8 sw=8 tw=0 cino=:0,(0 noet :*/