src/intel/tools/gen_context.h

   1 /*
   2  * Copyright © 2018 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #ifndef GEN_CONTEXT_H
  25 #define GEN_CONTEXT_H
  26
  27 #include <stdint.h>
  28
  29 #define RING_SIZE         (1 * 4096)
  30 #define PPHWSP_SIZE         (1 * 4096)
  31
  32 #define GEN11_LR_CONTEXT_RENDER_SIZE    (14 * 4096)
  33 #define GEN10_LR_CONTEXT_RENDER_SIZE    (19 * 4096)
  34 #define GEN9_LR_CONTEXT_RENDER_SIZE     (22 * 4096)
  35 #define GEN8_LR_CONTEXT_RENDER_SIZE     (20 * 4096)
  36 #define GEN8_LR_CONTEXT_OTHER_SIZE      (2 * 4096)
  37
  38 #define CONTEXT_RENDER_SIZE GEN9_LR_CONTEXT_RENDER_SIZE /* largest size */
  39 #define CONTEXT_OTHER_SIZE GEN8_LR_CONTEXT_OTHER_SIZE
  40
  41 #define MI_LOAD_REGISTER_IMM_n(n) ((0x22 << 23) | (2 * (n) - 1))
  42 #define MI_LRI_FORCE_POSTED       (1<<12)
  43
  44 #define MI_BATCH_BUFFER_END (0xA << 23)
  45
  46 #define HWS_PGA_RCSUNIT      0x02080
  47 #define HWS_PGA_VCSUNIT0   0x12080
  48 #define HWS_PGA_BCSUNIT      0x22080
  49
  50 #define GFX_MODE_RCSUNIT   0x0229c
  51 #define GFX_MODE_VCSUNIT0   0x1229c
  52 #define GFX_MODE_BCSUNIT   0x2229c
  53
  54 #define EXECLIST_SUBMITPORT_RCSUNIT   0x02230
  55 #define EXECLIST_SUBMITPORT_VCSUNIT0   0x12230
  56 #define EXECLIST_SUBMITPORT_BCSUNIT   0x22230
  57
  58 #define EXECLIST_STATUS_RCSUNIT      0x02234
  59 #define EXECLIST_STATUS_VCSUNIT0   0x12234
  60 #define EXECLIST_STATUS_BCSUNIT      0x22234
  61
  62 #define EXECLIST_SQ_CONTENTS0_RCSUNIT   0x02510
  63 #define EXECLIST_SQ_CONTENTS0_VCSUNIT0   0x12510
  64 #define EXECLIST_SQ_CONTENTS0_BCSUNIT   0x22510
  65
  66 #define EXECLIST_CONTROL_RCSUNIT   0x02550
  67 #define EXECLIST_CONTROL_VCSUNIT0   0x12550
  68 #define EXECLIST_CONTROL_BCSUNIT   0x22550
  69
  70 #define MEMORY_MAP_SIZE (64 /* MiB */ * 1024 * 1024)
  71
  72 #define PTE_SIZE 4
  73 #define GEN8_PTE_SIZE 8
  74
  75 #define NUM_PT_ENTRIES (ALIGN(MEMORY_MAP_SIZE, 4096) / 4096)
  76 #define PT_SIZE ALIGN(NUM_PT_ENTRIES * GEN8_PTE_SIZE, 4096)
  77
  78 #define STATIC_GGTT_MAP_START 0
  79
  80 #define RENDER_RING_ADDR STATIC_GGTT_MAP_START
  81 #define RENDER_CONTEXT_ADDR (RENDER_RING_ADDR + RING_SIZE)
  82
  83 #define BLITTER_RING_ADDR (RENDER_CONTEXT_ADDR + PPHWSP_SIZE + GEN9_LR_CONTEXT_RENDER_SIZE)
  84 #define BLITTER_CONTEXT_ADDR (BLITTER_RING_ADDR + RING_SIZE)
  85
  86 #define VIDEO_RING_ADDR (BLITTER_CONTEXT_ADDR + PPHWSP_SIZE + GEN8_LR_CONTEXT_OTHER_SIZE)
  87 #define VIDEO_CONTEXT_ADDR (VIDEO_RING_ADDR + RING_SIZE)
  88
  89 #define STATIC_GGTT_MAP_END (VIDEO_CONTEXT_ADDR + PPHWSP_SIZE + GEN8_LR_CONTEXT_OTHER_SIZE)
  90 #define STATIC_GGTT_MAP_SIZE (STATIC_GGTT_MAP_END - STATIC_GGTT_MAP_START)
  91
  92 #define PML4_PHYS_ADDR ((uint64_t)(STATIC_GGTT_MAP_END))
  93
  94 #define CONTEXT_FLAGS (0x339)   /* Normal Priority | L3-LLC Coherency |
  95                                  * PPGTT Enabled |
  96                                  * Legacy Context with 64 bit VA support |
  97                                  * Valid
  98                                  */
  99
 100 #define MI_LOAD_REGISTER_IMM_vals(data, flags, ...) do {                \
 101       uint32_t __regs[] = { __VA_ARGS__ };                              \
 102       assert((ARRAY_SIZE(__regs) % 2) == 0);                            \
 103       *(data)++ = MI_LOAD_REGISTER_IMM_n(ARRAY_SIZE(__regs) / 2) | (flags); \
 104       for (unsigned __e = 0; __e < ARRAY_SIZE(__regs); __e++)           \
 105          *(data)++ = __regs[__e];                                       \
 106    } while (0)
 107
 108 #define RENDER_CONTEXT_DESCRIPTOR  ((uint64_t)1 << 62 | RENDER_CONTEXT_ADDR  | CONTEXT_FLAGS)
 109 #define BLITTER_CONTEXT_DESCRIPTOR ((uint64_t)2 << 62 | BLITTER_CONTEXT_ADDR | CONTEXT_FLAGS)
 110 #define VIDEO_CONTEXT_DESCRIPTOR   ((uint64_t)3 << 62 | VIDEO_CONTEXT_ADDR   | CONTEXT_FLAGS)
 111
 112 #include "gen8_context.h"
 113 #include "gen10_context.h"
 114
 115 #endif /* GEN_CONTEXT_H */