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anv: Refactor setting descriptors with immutable sampler
[mesa.git] / src / intel / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "vk_format_info.h"
33 #include "vk_util.h"
34
35 /** \file anv_cmd_buffer.c
36 *
37 * This file contains all of the stuff for emitting commands into a command
38 * buffer. This includes implementations of most of the vkCmd*
39 * entrypoints. This file is concerned entirely with state emission and
40 * not with the command buffer data structure itself. As far as this file
41 * is concerned, most of anv_cmd_buffer is magic.
42 */
43
44 /* TODO: These are taken from GLES. We should check the Vulkan spec */
45 const struct anv_dynamic_state default_dynamic_state = {
46 .viewport = {
47 .count = 0,
48 },
49 .scissor = {
50 .count = 0,
51 },
52 .line_width = 1.0f,
53 .depth_bias = {
54 .bias = 0.0f,
55 .clamp = 0.0f,
56 .slope = 0.0f,
57 },
58 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
59 .depth_bounds = {
60 .min = 0.0f,
61 .max = 1.0f,
62 },
63 .stencil_compare_mask = {
64 .front = ~0u,
65 .back = ~0u,
66 },
67 .stencil_write_mask = {
68 .front = ~0u,
69 .back = ~0u,
70 },
71 .stencil_reference = {
72 .front = 0u,
73 .back = 0u,
74 },
75 .line_stipple = {
76 .factor = 0u,
77 .pattern = 0u,
78 },
79 };
80
81 /**
82 * Copy the dynamic state from src to dest based on the copy_mask.
83 *
84 * Avoid copying states that have not changed, except for VIEWPORT, SCISSOR and
85 * BLEND_CONSTANTS (always copy them if they are in the copy_mask).
86 *
87 * Returns a mask of the states which changed.
88 */
89 anv_cmd_dirty_mask_t
90 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
91 const struct anv_dynamic_state *src,
92 anv_cmd_dirty_mask_t copy_mask)
93 {
94 anv_cmd_dirty_mask_t changed = 0;
95
96 if (copy_mask & ANV_CMD_DIRTY_DYNAMIC_VIEWPORT) {
97 dest->viewport.count = src->viewport.count;
98 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
99 src->viewport.count);
100 changed |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
101 }
102
103 if (copy_mask & ANV_CMD_DIRTY_DYNAMIC_SCISSOR) {
104 dest->scissor.count = src->scissor.count;
105 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
106 src->scissor.count);
107 changed |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
108 }
109
110 if (copy_mask & ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS) {
111 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
112 changed |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
113 }
114
115 #define ANV_CMP_COPY(field, flag) \
116 if (copy_mask & flag) { \
117 if (dest->field != src->field) { \
118 dest->field = src->field; \
119 changed |= flag; \
120 } \
121 }
122
123 ANV_CMP_COPY(line_width, ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH);
124
125 ANV_CMP_COPY(depth_bias.bias, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS);
126 ANV_CMP_COPY(depth_bias.clamp, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS);
127 ANV_CMP_COPY(depth_bias.slope, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS);
128
129 ANV_CMP_COPY(depth_bounds.min, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS);
130 ANV_CMP_COPY(depth_bounds.max, ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS);
131
132 ANV_CMP_COPY(stencil_compare_mask.front, ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK);
133 ANV_CMP_COPY(stencil_compare_mask.back, ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK);
134
135 ANV_CMP_COPY(stencil_write_mask.front, ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK);
136 ANV_CMP_COPY(stencil_write_mask.back, ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK);
137
138 ANV_CMP_COPY(stencil_reference.front, ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE);
139 ANV_CMP_COPY(stencil_reference.back, ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE);
140
141 ANV_CMP_COPY(line_stipple.factor, ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE);
142 ANV_CMP_COPY(line_stipple.pattern, ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE);
143
144 #undef ANV_CMP_COPY
145
146 return changed;
147 }
148
149 static void
150 anv_cmd_state_init(struct anv_cmd_buffer *cmd_buffer)
151 {
152 struct anv_cmd_state *state = &cmd_buffer->state;
153
154 memset(state, 0, sizeof(*state));
155
156 state->current_pipeline = UINT32_MAX;
157 state->restart_index = UINT32_MAX;
158 state->gfx.dynamic = default_dynamic_state;
159 }
160
161 static void
162 anv_cmd_pipeline_state_finish(struct anv_cmd_buffer *cmd_buffer,
163 struct anv_cmd_pipeline_state *pipe_state)
164 {
165 for (uint32_t i = 0; i < ARRAY_SIZE(pipe_state->push_descriptors); i++) {
166 if (pipe_state->push_descriptors[i]) {
167 anv_descriptor_set_layout_unref(cmd_buffer->device,
168 pipe_state->push_descriptors[i]->set.layout);
169 vk_free(&cmd_buffer->pool->alloc, pipe_state->push_descriptors[i]);
170 }
171 }
172 }
173
174 static void
175 anv_cmd_state_finish(struct anv_cmd_buffer *cmd_buffer)
176 {
177 struct anv_cmd_state *state = &cmd_buffer->state;
178
179 anv_cmd_pipeline_state_finish(cmd_buffer, &state->gfx.base);
180 anv_cmd_pipeline_state_finish(cmd_buffer, &state->compute.base);
181
182 vk_free(&cmd_buffer->pool->alloc, state->attachments);
183 }
184
185 static void
186 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
187 {
188 anv_cmd_state_finish(cmd_buffer);
189 anv_cmd_state_init(cmd_buffer);
190 }
191
192 static VkResult anv_create_cmd_buffer(
193 struct anv_device * device,
194 struct anv_cmd_pool * pool,
195 VkCommandBufferLevel level,
196 VkCommandBuffer* pCommandBuffer)
197 {
198 struct anv_cmd_buffer *cmd_buffer;
199 VkResult result;
200
201 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
202 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
203 if (cmd_buffer == NULL)
204 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
205
206 vk_object_base_init(&device->vk, &cmd_buffer->base,
207 VK_OBJECT_TYPE_COMMAND_BUFFER);
208
209 cmd_buffer->batch.status = VK_SUCCESS;
210
211 cmd_buffer->device = device;
212 cmd_buffer->pool = pool;
213 cmd_buffer->level = level;
214
215 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
216 if (result != VK_SUCCESS)
217 goto fail;
218
219 anv_state_stream_init(&cmd_buffer->surface_state_stream,
220 &device->surface_state_pool, 4096);
221 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
222 &device->dynamic_state_pool, 16384);
223
224 anv_cmd_state_init(cmd_buffer);
225
226 if (pool) {
227 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
228 } else {
229 /* Init the pool_link so we can safefly call list_del when we destroy
230 * the command buffer
231 */
232 list_inithead(&cmd_buffer->pool_link);
233 }
234
235 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
236
237 return VK_SUCCESS;
238
239 fail:
240 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
241
242 return result;
243 }
244
245 VkResult anv_AllocateCommandBuffers(
246 VkDevice _device,
247 const VkCommandBufferAllocateInfo* pAllocateInfo,
248 VkCommandBuffer* pCommandBuffers)
249 {
250 ANV_FROM_HANDLE(anv_device, device, _device);
251 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
252
253 VkResult result = VK_SUCCESS;
254 uint32_t i;
255
256 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
257 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
258 &pCommandBuffers[i]);
259 if (result != VK_SUCCESS)
260 break;
261 }
262
263 if (result != VK_SUCCESS) {
264 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
265 i, pCommandBuffers);
266 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
267 pCommandBuffers[i] = VK_NULL_HANDLE;
268 }
269
270 return result;
271 }
272
273 static void
274 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
275 {
276 list_del(&cmd_buffer->pool_link);
277
278 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
279
280 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
281 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
282
283 anv_cmd_state_finish(cmd_buffer);
284
285 vk_object_base_finish(&cmd_buffer->base);
286 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
287 }
288
289 void anv_FreeCommandBuffers(
290 VkDevice device,
291 VkCommandPool commandPool,
292 uint32_t commandBufferCount,
293 const VkCommandBuffer* pCommandBuffers)
294 {
295 for (uint32_t i = 0; i < commandBufferCount; i++) {
296 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
297
298 if (!cmd_buffer)
299 continue;
300
301 anv_cmd_buffer_destroy(cmd_buffer);
302 }
303 }
304
305 VkResult
306 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
307 {
308 cmd_buffer->usage_flags = 0;
309 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
310 anv_cmd_state_reset(cmd_buffer);
311
312 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
313 anv_state_stream_init(&cmd_buffer->surface_state_stream,
314 &cmd_buffer->device->surface_state_pool, 4096);
315
316 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
317 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
318 &cmd_buffer->device->dynamic_state_pool, 16384);
319 return VK_SUCCESS;
320 }
321
322 VkResult anv_ResetCommandBuffer(
323 VkCommandBuffer commandBuffer,
324 VkCommandBufferResetFlags flags)
325 {
326 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
327 return anv_cmd_buffer_reset(cmd_buffer);
328 }
329
330 #define anv_genX_call(devinfo, func, ...) \
331 switch ((devinfo)->gen) { \
332 case 7: \
333 if ((devinfo)->is_haswell) { \
334 gen75_##func(__VA_ARGS__); \
335 } else { \
336 gen7_##func(__VA_ARGS__); \
337 } \
338 break; \
339 case 8: \
340 gen8_##func(__VA_ARGS__); \
341 break; \
342 case 9: \
343 gen9_##func(__VA_ARGS__); \
344 break; \
345 case 10: \
346 gen10_##func(__VA_ARGS__); \
347 break; \
348 case 11: \
349 gen11_##func(__VA_ARGS__); \
350 break; \
351 case 12: \
352 gen12_##func(__VA_ARGS__); \
353 break; \
354 default: \
355 assert(!"Unknown hardware generation"); \
356 }
357
358 void
359 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
360 {
361 anv_genX_call(&cmd_buffer->device->info,
362 cmd_buffer_emit_state_base_address,
363 cmd_buffer);
364 }
365
366 void
367 anv_cmd_buffer_mark_image_written(struct anv_cmd_buffer *cmd_buffer,
368 const struct anv_image *image,
369 VkImageAspectFlagBits aspect,
370 enum isl_aux_usage aux_usage,
371 uint32_t level,
372 uint32_t base_layer,
373 uint32_t layer_count)
374 {
375 anv_genX_call(&cmd_buffer->device->info,
376 cmd_buffer_mark_image_written,
377 cmd_buffer, image, aspect, aux_usage,
378 level, base_layer, layer_count);
379 }
380
381 void
382 anv_cmd_emit_conditional_render_predicate(struct anv_cmd_buffer *cmd_buffer)
383 {
384 anv_genX_call(&cmd_buffer->device->info,
385 cmd_emit_conditional_render_predicate,
386 cmd_buffer);
387 }
388
389 static bool
390 mem_update(void *dst, const void *src, size_t size)
391 {
392 if (memcmp(dst, src, size) == 0)
393 return false;
394
395 memcpy(dst, src, size);
396 return true;
397 }
398
399 static void
400 set_dirty_for_bind_map(struct anv_cmd_buffer *cmd_buffer,
401 gl_shader_stage stage,
402 const struct anv_pipeline_bind_map *map)
403 {
404 if (mem_update(cmd_buffer->state.surface_sha1s[stage],
405 map->surface_sha1, sizeof(map->surface_sha1)))
406 cmd_buffer->state.descriptors_dirty |= mesa_to_vk_shader_stage(stage);
407
408 if (mem_update(cmd_buffer->state.sampler_sha1s[stage],
409 map->sampler_sha1, sizeof(map->sampler_sha1)))
410 cmd_buffer->state.descriptors_dirty |= mesa_to_vk_shader_stage(stage);
411
412 if (mem_update(cmd_buffer->state.push_sha1s[stage],
413 map->push_sha1, sizeof(map->push_sha1)))
414 cmd_buffer->state.push_constants_dirty |= mesa_to_vk_shader_stage(stage);
415 }
416
417 void anv_CmdBindPipeline(
418 VkCommandBuffer commandBuffer,
419 VkPipelineBindPoint pipelineBindPoint,
420 VkPipeline _pipeline)
421 {
422 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
423 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
424
425 switch (pipelineBindPoint) {
426 case VK_PIPELINE_BIND_POINT_COMPUTE: {
427 struct anv_compute_pipeline *compute_pipeline =
428 anv_pipeline_to_compute(pipeline);
429 if (cmd_buffer->state.compute.pipeline == compute_pipeline)
430 return;
431
432 cmd_buffer->state.compute.pipeline = compute_pipeline;
433 cmd_buffer->state.compute.pipeline_dirty = true;
434 set_dirty_for_bind_map(cmd_buffer, MESA_SHADER_COMPUTE,
435 &compute_pipeline->cs->bind_map);
436 break;
437 }
438
439 case VK_PIPELINE_BIND_POINT_GRAPHICS: {
440 struct anv_graphics_pipeline *gfx_pipeline =
441 anv_pipeline_to_graphics(pipeline);
442 if (cmd_buffer->state.gfx.pipeline == gfx_pipeline)
443 return;
444
445 cmd_buffer->state.gfx.pipeline = gfx_pipeline;
446 cmd_buffer->state.gfx.vb_dirty |= gfx_pipeline->vb_used;
447 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_PIPELINE;
448
449 anv_foreach_stage(stage, gfx_pipeline->active_stages) {
450 set_dirty_for_bind_map(cmd_buffer, stage,
451 &gfx_pipeline->shaders[stage]->bind_map);
452 }
453
454 /* Apply the dynamic state from the pipeline */
455 cmd_buffer->state.gfx.dirty |=
456 anv_dynamic_state_copy(&cmd_buffer->state.gfx.dynamic,
457 &gfx_pipeline->dynamic_state,
458 gfx_pipeline->dynamic_state_mask);
459 break;
460 }
461
462 default:
463 assert(!"invalid bind point");
464 break;
465 }
466 }
467
468 void anv_CmdSetViewport(
469 VkCommandBuffer commandBuffer,
470 uint32_t firstViewport,
471 uint32_t viewportCount,
472 const VkViewport* pViewports)
473 {
474 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
475
476 const uint32_t total_count = firstViewport + viewportCount;
477 if (cmd_buffer->state.gfx.dynamic.viewport.count < total_count)
478 cmd_buffer->state.gfx.dynamic.viewport.count = total_count;
479
480 memcpy(cmd_buffer->state.gfx.dynamic.viewport.viewports + firstViewport,
481 pViewports, viewportCount * sizeof(*pViewports));
482
483 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
484 }
485
486 void anv_CmdSetScissor(
487 VkCommandBuffer commandBuffer,
488 uint32_t firstScissor,
489 uint32_t scissorCount,
490 const VkRect2D* pScissors)
491 {
492 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
493
494 const uint32_t total_count = firstScissor + scissorCount;
495 if (cmd_buffer->state.gfx.dynamic.scissor.count < total_count)
496 cmd_buffer->state.gfx.dynamic.scissor.count = total_count;
497
498 memcpy(cmd_buffer->state.gfx.dynamic.scissor.scissors + firstScissor,
499 pScissors, scissorCount * sizeof(*pScissors));
500
501 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
502 }
503
504 void anv_CmdSetLineWidth(
505 VkCommandBuffer commandBuffer,
506 float lineWidth)
507 {
508 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
509
510 cmd_buffer->state.gfx.dynamic.line_width = lineWidth;
511 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
512 }
513
514 void anv_CmdSetDepthBias(
515 VkCommandBuffer commandBuffer,
516 float depthBiasConstantFactor,
517 float depthBiasClamp,
518 float depthBiasSlopeFactor)
519 {
520 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
521
522 cmd_buffer->state.gfx.dynamic.depth_bias.bias = depthBiasConstantFactor;
523 cmd_buffer->state.gfx.dynamic.depth_bias.clamp = depthBiasClamp;
524 cmd_buffer->state.gfx.dynamic.depth_bias.slope = depthBiasSlopeFactor;
525
526 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
527 }
528
529 void anv_CmdSetBlendConstants(
530 VkCommandBuffer commandBuffer,
531 const float blendConstants[4])
532 {
533 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
534
535 memcpy(cmd_buffer->state.gfx.dynamic.blend_constants,
536 blendConstants, sizeof(float) * 4);
537
538 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
539 }
540
541 void anv_CmdSetDepthBounds(
542 VkCommandBuffer commandBuffer,
543 float minDepthBounds,
544 float maxDepthBounds)
545 {
546 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
547
548 cmd_buffer->state.gfx.dynamic.depth_bounds.min = minDepthBounds;
549 cmd_buffer->state.gfx.dynamic.depth_bounds.max = maxDepthBounds;
550
551 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
552 }
553
554 void anv_CmdSetStencilCompareMask(
555 VkCommandBuffer commandBuffer,
556 VkStencilFaceFlags faceMask,
557 uint32_t compareMask)
558 {
559 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
560
561 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
562 cmd_buffer->state.gfx.dynamic.stencil_compare_mask.front = compareMask;
563 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
564 cmd_buffer->state.gfx.dynamic.stencil_compare_mask.back = compareMask;
565
566 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
567 }
568
569 void anv_CmdSetStencilWriteMask(
570 VkCommandBuffer commandBuffer,
571 VkStencilFaceFlags faceMask,
572 uint32_t writeMask)
573 {
574 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
575
576 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
577 cmd_buffer->state.gfx.dynamic.stencil_write_mask.front = writeMask;
578 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
579 cmd_buffer->state.gfx.dynamic.stencil_write_mask.back = writeMask;
580
581 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
582 }
583
584 void anv_CmdSetStencilReference(
585 VkCommandBuffer commandBuffer,
586 VkStencilFaceFlags faceMask,
587 uint32_t reference)
588 {
589 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
590
591 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
592 cmd_buffer->state.gfx.dynamic.stencil_reference.front = reference;
593 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
594 cmd_buffer->state.gfx.dynamic.stencil_reference.back = reference;
595
596 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
597 }
598
599 void anv_CmdSetLineStippleEXT(
600 VkCommandBuffer commandBuffer,
601 uint32_t lineStippleFactor,
602 uint16_t lineStipplePattern)
603 {
604 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
605
606 cmd_buffer->state.gfx.dynamic.line_stipple.factor = lineStippleFactor;
607 cmd_buffer->state.gfx.dynamic.line_stipple.pattern = lineStipplePattern;
608
609 cmd_buffer->state.gfx.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_STIPPLE;
610 }
611
612 static void
613 anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
614 VkPipelineBindPoint bind_point,
615 struct anv_pipeline_layout *layout,
616 uint32_t set_index,
617 struct anv_descriptor_set *set,
618 uint32_t *dynamic_offset_count,
619 const uint32_t **dynamic_offsets)
620 {
621 struct anv_descriptor_set_layout *set_layout =
622 layout->set[set_index].layout;
623
624 VkShaderStageFlags stages = set_layout->shader_stages;
625 struct anv_cmd_pipeline_state *pipe_state;
626
627 switch (bind_point) {
628 case VK_PIPELINE_BIND_POINT_GRAPHICS:
629 stages &= VK_SHADER_STAGE_ALL_GRAPHICS;
630 pipe_state = &cmd_buffer->state.gfx.base;
631 break;
632
633 case VK_PIPELINE_BIND_POINT_COMPUTE:
634 stages &= VK_SHADER_STAGE_COMPUTE_BIT;
635 pipe_state = &cmd_buffer->state.compute.base;
636 break;
637
638 default:
639 unreachable("invalid bind point");
640 }
641
642 VkShaderStageFlags dirty_stages = 0;
643 if (pipe_state->descriptors[set_index] != set) {
644 pipe_state->descriptors[set_index] = set;
645 dirty_stages |= stages;
646 }
647
648 /* If it's a push descriptor set, we have to flag things as dirty
649 * regardless of whether or not the CPU-side data structure changed as we
650 * may have edited in-place.
651 */
652 if (set->pool == NULL)
653 dirty_stages |= stages;
654
655 if (dynamic_offsets) {
656 if (set_layout->dynamic_offset_count > 0) {
657 uint32_t dynamic_offset_start =
658 layout->set[set_index].dynamic_offset_start;
659
660 anv_foreach_stage(stage, stages) {
661 struct anv_push_constants *push =
662 &cmd_buffer->state.push_constants[stage];
663 uint32_t *push_offsets =
664 &push->dynamic_offsets[dynamic_offset_start];
665
666 /* Assert that everything is in range */
667 assert(set_layout->dynamic_offset_count <= *dynamic_offset_count);
668 assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
669 ARRAY_SIZE(push->dynamic_offsets));
670
671 unsigned mask = set_layout->stage_dynamic_offsets[stage];
672 STATIC_ASSERT(MAX_DYNAMIC_BUFFERS <= sizeof(mask) * 8);
673 while (mask) {
674 int i = u_bit_scan(&mask);
675 if (push_offsets[i] != (*dynamic_offsets)[i]) {
676 push_offsets[i] = (*dynamic_offsets)[i];
677 dirty_stages |= mesa_to_vk_shader_stage(stage);
678 }
679 }
680 }
681
682 *dynamic_offsets += set_layout->dynamic_offset_count;
683 *dynamic_offset_count -= set_layout->dynamic_offset_count;
684 }
685 }
686
687 cmd_buffer->state.descriptors_dirty |= dirty_stages;
688 cmd_buffer->state.push_constants_dirty |= dirty_stages;
689 }
690
691 void anv_CmdBindDescriptorSets(
692 VkCommandBuffer commandBuffer,
693 VkPipelineBindPoint pipelineBindPoint,
694 VkPipelineLayout _layout,
695 uint32_t firstSet,
696 uint32_t descriptorSetCount,
697 const VkDescriptorSet* pDescriptorSets,
698 uint32_t dynamicOffsetCount,
699 const uint32_t* pDynamicOffsets)
700 {
701 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
702 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
703
704 assert(firstSet + descriptorSetCount <= MAX_SETS);
705
706 for (uint32_t i = 0; i < descriptorSetCount; i++) {
707 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
708 anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
709 layout, firstSet + i, set,
710 &dynamicOffsetCount,
711 &pDynamicOffsets);
712 }
713 }
714
715 void anv_CmdBindVertexBuffers(
716 VkCommandBuffer commandBuffer,
717 uint32_t firstBinding,
718 uint32_t bindingCount,
719 const VkBuffer* pBuffers,
720 const VkDeviceSize* pOffsets)
721 {
722 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
723 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
724
725 /* We have to defer setting up vertex buffer since we need the buffer
726 * stride from the pipeline. */
727
728 assert(firstBinding + bindingCount <= MAX_VBS);
729 for (uint32_t i = 0; i < bindingCount; i++) {
730 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
731 vb[firstBinding + i].offset = pOffsets[i];
732 cmd_buffer->state.gfx.vb_dirty |= 1 << (firstBinding + i);
733 }
734 }
735
736 void anv_CmdBindTransformFeedbackBuffersEXT(
737 VkCommandBuffer commandBuffer,
738 uint32_t firstBinding,
739 uint32_t bindingCount,
740 const VkBuffer* pBuffers,
741 const VkDeviceSize* pOffsets,
742 const VkDeviceSize* pSizes)
743 {
744 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
745 struct anv_xfb_binding *xfb = cmd_buffer->state.xfb_bindings;
746
747 /* We have to defer setting up vertex buffer since we need the buffer
748 * stride from the pipeline. */
749
750 assert(firstBinding + bindingCount <= MAX_XFB_BUFFERS);
751 for (uint32_t i = 0; i < bindingCount; i++) {
752 if (pBuffers[i] == VK_NULL_HANDLE) {
753 xfb[firstBinding + i].buffer = NULL;
754 } else {
755 ANV_FROM_HANDLE(anv_buffer, buffer, pBuffers[i]);
756 xfb[firstBinding + i].buffer = buffer;
757 xfb[firstBinding + i].offset = pOffsets[i];
758 xfb[firstBinding + i].size =
759 anv_buffer_get_range(buffer, pOffsets[i],
760 pSizes ? pSizes[i] : VK_WHOLE_SIZE);
761 }
762 }
763 }
764
765 enum isl_format
766 anv_isl_format_for_descriptor_type(VkDescriptorType type)
767 {
768 switch (type) {
769 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
770 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
771 return ISL_FORMAT_R32G32B32A32_FLOAT;
772
773 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
774 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
775 return ISL_FORMAT_RAW;
776
777 default:
778 unreachable("Invalid descriptor type");
779 }
780 }
781
782 struct anv_state
783 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
784 const void *data, uint32_t size, uint32_t alignment)
785 {
786 struct anv_state state;
787
788 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
789 memcpy(state.map, data, size);
790
791 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
792
793 return state;
794 }
795
796 struct anv_state
797 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
798 uint32_t *a, uint32_t *b,
799 uint32_t dwords, uint32_t alignment)
800 {
801 struct anv_state state;
802 uint32_t *p;
803
804 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
805 dwords * 4, alignment);
806 p = state.map;
807 for (uint32_t i = 0; i < dwords; i++)
808 p[i] = a[i] | b[i];
809
810 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
811
812 return state;
813 }
814
815 struct anv_state
816 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
817 gl_shader_stage stage)
818 {
819 struct anv_push_constants *data =
820 &cmd_buffer->state.push_constants[stage];
821
822 struct anv_state state =
823 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
824 sizeof(struct anv_push_constants),
825 32 /* bottom 5 bits MBZ */);
826 memcpy(state.map, data, sizeof(struct anv_push_constants));
827
828 return state;
829 }
830
831 struct anv_state
832 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
833 {
834 struct anv_push_constants *data =
835 &cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
836 struct anv_compute_pipeline *pipeline = cmd_buffer->state.compute.pipeline;
837 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
838 const struct anv_push_range *range = &pipeline->cs->bind_map.push_ranges[0];
839
840 const uint32_t threads = anv_cs_threads(pipeline);
841 const unsigned total_push_constants_size =
842 brw_cs_push_const_total_size(cs_prog_data, threads);
843 if (total_push_constants_size == 0)
844 return (struct anv_state) { .offset = 0 };
845
846 const unsigned push_constant_alignment =
847 cmd_buffer->device->info.gen < 8 ? 32 : 64;
848 const unsigned aligned_total_push_constants_size =
849 ALIGN(total_push_constants_size, push_constant_alignment);
850 struct anv_state state =
851 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
852 aligned_total_push_constants_size,
853 push_constant_alignment);
854
855 void *dst = state.map;
856 const void *src = (char *)data + (range->start * 32);
857
858 if (cs_prog_data->push.cross_thread.size > 0) {
859 memcpy(dst, src, cs_prog_data->push.cross_thread.size);
860 dst += cs_prog_data->push.cross_thread.size;
861 src += cs_prog_data->push.cross_thread.size;
862 }
863
864 if (cs_prog_data->push.per_thread.size > 0) {
865 for (unsigned t = 0; t < threads; t++) {
866 memcpy(dst, src, cs_prog_data->push.per_thread.size);
867
868 uint32_t *subgroup_id = dst +
869 offsetof(struct anv_push_constants, cs.subgroup_id) -
870 (range->start * 32 + cs_prog_data->push.cross_thread.size);
871 *subgroup_id = t;
872
873 dst += cs_prog_data->push.per_thread.size;
874 }
875 }
876
877 return state;
878 }
879
880 void anv_CmdPushConstants(
881 VkCommandBuffer commandBuffer,
882 VkPipelineLayout layout,
883 VkShaderStageFlags stageFlags,
884 uint32_t offset,
885 uint32_t size,
886 const void* pValues)
887 {
888 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
889
890 anv_foreach_stage(stage, stageFlags) {
891 memcpy(cmd_buffer->state.push_constants[stage].client_data + offset,
892 pValues, size);
893 }
894
895 cmd_buffer->state.push_constants_dirty |= stageFlags;
896 }
897
898 VkResult anv_CreateCommandPool(
899 VkDevice _device,
900 const VkCommandPoolCreateInfo* pCreateInfo,
901 const VkAllocationCallbacks* pAllocator,
902 VkCommandPool* pCmdPool)
903 {
904 ANV_FROM_HANDLE(anv_device, device, _device);
905 struct anv_cmd_pool *pool;
906
907 pool = vk_alloc2(&device->vk.alloc, pAllocator, sizeof(*pool), 8,
908 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
909 if (pool == NULL)
910 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
911
912 vk_object_base_init(&device->vk, &pool->base, VK_OBJECT_TYPE_COMMAND_POOL);
913
914 if (pAllocator)
915 pool->alloc = *pAllocator;
916 else
917 pool->alloc = device->vk.alloc;
918
919 list_inithead(&pool->cmd_buffers);
920
921 *pCmdPool = anv_cmd_pool_to_handle(pool);
922
923 return VK_SUCCESS;
924 }
925
926 void anv_DestroyCommandPool(
927 VkDevice _device,
928 VkCommandPool commandPool,
929 const VkAllocationCallbacks* pAllocator)
930 {
931 ANV_FROM_HANDLE(anv_device, device, _device);
932 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
933
934 if (!pool)
935 return;
936
937 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
938 &pool->cmd_buffers, pool_link) {
939 anv_cmd_buffer_destroy(cmd_buffer);
940 }
941
942 vk_object_base_finish(&pool->base);
943 vk_free2(&device->vk.alloc, pAllocator, pool);
944 }
945
946 VkResult anv_ResetCommandPool(
947 VkDevice device,
948 VkCommandPool commandPool,
949 VkCommandPoolResetFlags flags)
950 {
951 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
952
953 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
954 &pool->cmd_buffers, pool_link) {
955 anv_cmd_buffer_reset(cmd_buffer);
956 }
957
958 return VK_SUCCESS;
959 }
960
961 void anv_TrimCommandPool(
962 VkDevice device,
963 VkCommandPool commandPool,
964 VkCommandPoolTrimFlags flags)
965 {
966 /* Nothing for us to do here. Our pools stay pretty tidy. */
967 }
968
969 /**
970 * Return NULL if the current subpass has no depthstencil attachment.
971 */
972 const struct anv_image_view *
973 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
974 {
975 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
976
977 if (subpass->depth_stencil_attachment == NULL)
978 return NULL;
979
980 const struct anv_image_view *iview =
981 cmd_buffer->state.attachments[subpass->depth_stencil_attachment->attachment].image_view;
982
983 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
984 VK_IMAGE_ASPECT_STENCIL_BIT));
985
986 return iview;
987 }
988
989 static struct anv_descriptor_set *
990 anv_cmd_buffer_push_descriptor_set(struct anv_cmd_buffer *cmd_buffer,
991 VkPipelineBindPoint bind_point,
992 struct anv_descriptor_set_layout *layout,
993 uint32_t _set)
994 {
995 struct anv_cmd_pipeline_state *pipe_state;
996 if (bind_point == VK_PIPELINE_BIND_POINT_COMPUTE) {
997 pipe_state = &cmd_buffer->state.compute.base;
998 } else {
999 assert(bind_point == VK_PIPELINE_BIND_POINT_GRAPHICS);
1000 pipe_state = &cmd_buffer->state.gfx.base;
1001 }
1002
1003 struct anv_push_descriptor_set **push_set =
1004 &pipe_state->push_descriptors[_set];
1005
1006 if (*push_set == NULL) {
1007 *push_set = vk_zalloc(&cmd_buffer->pool->alloc,
1008 sizeof(struct anv_push_descriptor_set), 8,
1009 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1010 if (*push_set == NULL) {
1011 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
1012 return NULL;
1013 }
1014 }
1015
1016 struct anv_descriptor_set *set = &(*push_set)->set;
1017
1018 if (set->layout != layout) {
1019 if (set->layout)
1020 anv_descriptor_set_layout_unref(cmd_buffer->device, set->layout);
1021 anv_descriptor_set_layout_ref(layout);
1022 set->layout = layout;
1023 }
1024 set->size = anv_descriptor_set_layout_size(layout);
1025 set->buffer_view_count = layout->buffer_view_count;
1026 set->buffer_views = (*push_set)->buffer_views;
1027
1028 if (layout->descriptor_buffer_size &&
1029 ((*push_set)->set_used_on_gpu ||
1030 set->desc_mem.alloc_size < layout->descriptor_buffer_size)) {
1031 /* The previous buffer is either actively used by some GPU command (so
1032 * we can't modify it) or is too small. Allocate a new one.
1033 */
1034 struct anv_state desc_mem =
1035 anv_state_stream_alloc(&cmd_buffer->dynamic_state_stream,
1036 layout->descriptor_buffer_size, 32);
1037 if (set->desc_mem.alloc_size) {
1038 /* TODO: Do we really need to copy all the time? */
1039 memcpy(desc_mem.map, set->desc_mem.map,
1040 MIN2(desc_mem.alloc_size, set->desc_mem.alloc_size));
1041 }
1042 set->desc_mem = desc_mem;
1043
1044 struct anv_address addr = {
1045 .bo = cmd_buffer->dynamic_state_stream.state_pool->block_pool.bo,
1046 .offset = set->desc_mem.offset,
1047 };
1048
1049 const struct isl_device *isl_dev = &cmd_buffer->device->isl_dev;
1050 set->desc_surface_state =
1051 anv_state_stream_alloc(&cmd_buffer->surface_state_stream,
1052 isl_dev->ss.size, isl_dev->ss.align);
1053 anv_fill_buffer_surface_state(cmd_buffer->device,
1054 set->desc_surface_state,
1055 ISL_FORMAT_R32G32B32A32_FLOAT,
1056 addr, layout->descriptor_buffer_size, 1);
1057 }
1058
1059 return set;
1060 }
1061
1062 void anv_CmdPushDescriptorSetKHR(
1063 VkCommandBuffer commandBuffer,
1064 VkPipelineBindPoint pipelineBindPoint,
1065 VkPipelineLayout _layout,
1066 uint32_t _set,
1067 uint32_t descriptorWriteCount,
1068 const VkWriteDescriptorSet* pDescriptorWrites)
1069 {
1070 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1071 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
1072
1073 assert(_set < MAX_SETS);
1074
1075 struct anv_descriptor_set_layout *set_layout = layout->set[_set].layout;
1076
1077 struct anv_descriptor_set *set =
1078 anv_cmd_buffer_push_descriptor_set(cmd_buffer, pipelineBindPoint,
1079 set_layout, _set);
1080 if (!set)
1081 return;
1082
1083 /* Go through the user supplied descriptors. */
1084 for (uint32_t i = 0; i < descriptorWriteCount; i++) {
1085 const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
1086
1087 switch (write->descriptorType) {
1088 case VK_DESCRIPTOR_TYPE_SAMPLER:
1089 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
1090 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
1091 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
1092 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
1093 for (uint32_t j = 0; j < write->descriptorCount; j++) {
1094 anv_descriptor_set_write_image_view(cmd_buffer->device, set,
1095 write->pImageInfo + j,
1096 write->descriptorType,
1097 write->dstBinding,
1098 write->dstArrayElement + j);
1099 }
1100 break;
1101
1102 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
1103 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
1104 for (uint32_t j = 0; j < write->descriptorCount; j++) {
1105 ANV_FROM_HANDLE(anv_buffer_view, bview,
1106 write->pTexelBufferView[j]);
1107
1108 anv_descriptor_set_write_buffer_view(cmd_buffer->device, set,
1109 write->descriptorType,
1110 bview,
1111 write->dstBinding,
1112 write->dstArrayElement + j);
1113 }
1114 break;
1115
1116 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
1117 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
1118 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
1119 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
1120 for (uint32_t j = 0; j < write->descriptorCount; j++) {
1121 ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
1122
1123 anv_descriptor_set_write_buffer(cmd_buffer->device, set,
1124 &cmd_buffer->surface_state_stream,
1125 write->descriptorType,
1126 buffer,
1127 write->dstBinding,
1128 write->dstArrayElement + j,
1129 write->pBufferInfo[j].offset,
1130 write->pBufferInfo[j].range);
1131 }
1132 break;
1133
1134 default:
1135 break;
1136 }
1137 }
1138
1139 anv_cmd_buffer_bind_descriptor_set(cmd_buffer, pipelineBindPoint,
1140 layout, _set, set, NULL, NULL);
1141 }
1142
1143 void anv_CmdPushDescriptorSetWithTemplateKHR(
1144 VkCommandBuffer commandBuffer,
1145 VkDescriptorUpdateTemplate descriptorUpdateTemplate,
1146 VkPipelineLayout _layout,
1147 uint32_t _set,
1148 const void* pData)
1149 {
1150 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1151 ANV_FROM_HANDLE(anv_descriptor_update_template, template,
1152 descriptorUpdateTemplate);
1153 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
1154
1155 assert(_set < MAX_PUSH_DESCRIPTORS);
1156
1157 struct anv_descriptor_set_layout *set_layout = layout->set[_set].layout;
1158
1159 struct anv_descriptor_set *set =
1160 anv_cmd_buffer_push_descriptor_set(cmd_buffer, template->bind_point,
1161 set_layout, _set);
1162 if (!set)
1163 return;
1164
1165 anv_descriptor_set_write_template(cmd_buffer->device, set,
1166 &cmd_buffer->surface_state_stream,
1167 template,
1168 pData);
1169
1170 anv_cmd_buffer_bind_descriptor_set(cmd_buffer, template->bind_point,
1171 layout, _set, set, NULL, NULL);
1172 }
1173
1174 void anv_CmdSetDeviceMask(
1175 VkCommandBuffer commandBuffer,
1176 uint32_t deviceMask)
1177 {
1178 /* No-op */
1179 }