anv/device: keep track of 'device lost' state
[mesa.git] / src / intel / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "vk_format_info.h"
33
34 /** \file anv_cmd_buffer.c
35 *
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
41 */
42
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
45 .viewport = {
46 .count = 0,
47 },
48 .scissor = {
49 .count = 0,
50 },
51 .line_width = 1.0f,
52 .depth_bias = {
53 .bias = 0.0f,
54 .clamp = 0.0f,
55 .slope = 0.0f,
56 },
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
58 .depth_bounds = {
59 .min = 0.0f,
60 .max = 1.0f,
61 },
62 .stencil_compare_mask = {
63 .front = ~0u,
64 .back = ~0u,
65 },
66 .stencil_write_mask = {
67 .front = ~0u,
68 .back = ~0u,
69 },
70 .stencil_reference = {
71 .front = 0u,
72 .back = 0u,
73 },
74 };
75
76 void
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
79 uint32_t copy_mask)
80 {
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
84 src->viewport.count);
85 }
86
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
90 src->scissor.count);
91 }
92
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
95
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
98
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
101
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
104
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
107
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
110
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
113 }
114
115 static void
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
117 {
118 struct anv_cmd_state *state = &cmd_buffer->state;
119
120 cmd_buffer->batch.status = VK_SUCCESS;
121
122 memset(&state->descriptors, 0, sizeof(state->descriptors));
123 memset(&state->push_constants, 0, sizeof(state->push_constants));
124 memset(state->binding_tables, 0, sizeof(state->binding_tables));
125 memset(state->samplers, 0, sizeof(state->samplers));
126
127 /* 0 isn't a valid config. This ensures that we always configure L3$. */
128 cmd_buffer->state.current_l3_config = 0;
129
130 state->dirty = 0;
131 state->vb_dirty = 0;
132 state->pending_pipe_bits = 0;
133 state->descriptors_dirty = 0;
134 state->push_constants_dirty = 0;
135 state->pipeline = NULL;
136 state->framebuffer = NULL;
137 state->pass = NULL;
138 state->subpass = NULL;
139 state->push_constant_stages = 0;
140 state->restart_index = UINT32_MAX;
141 state->dynamic = default_dynamic_state;
142 state->need_query_wa = true;
143 state->pma_fix_enabled = false;
144 state->hiz_enabled = false;
145
146 if (state->attachments != NULL) {
147 vk_free(&cmd_buffer->pool->alloc, state->attachments);
148 state->attachments = NULL;
149 }
150
151 state->gen7.index_buffer = NULL;
152 }
153
154 VkResult
155 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
156 gl_shader_stage stage, uint32_t size)
157 {
158 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
159
160 if (*ptr == NULL) {
161 *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
162 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
163 if (*ptr == NULL) {
164 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
165 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
166 }
167 } else if ((*ptr)->size < size) {
168 *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
169 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
170 if (*ptr == NULL) {
171 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
172 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
173 }
174 }
175 (*ptr)->size = size;
176
177 return VK_SUCCESS;
178 }
179
180 static VkResult anv_create_cmd_buffer(
181 struct anv_device * device,
182 struct anv_cmd_pool * pool,
183 VkCommandBufferLevel level,
184 VkCommandBuffer* pCommandBuffer)
185 {
186 struct anv_cmd_buffer *cmd_buffer;
187 VkResult result;
188
189 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
190 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
191 if (cmd_buffer == NULL)
192 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
193
194 cmd_buffer->batch.status = VK_SUCCESS;
195
196 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
197 cmd_buffer->device = device;
198 cmd_buffer->pool = pool;
199 cmd_buffer->level = level;
200 cmd_buffer->state.attachments = NULL;
201
202 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
203 if (result != VK_SUCCESS)
204 goto fail;
205
206 anv_state_stream_init(&cmd_buffer->surface_state_stream,
207 &device->surface_state_block_pool);
208 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
209 &device->dynamic_state_block_pool);
210
211 memset(&cmd_buffer->state.push_descriptor, 0,
212 sizeof(cmd_buffer->state.push_descriptor));
213
214 if (pool) {
215 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
216 } else {
217 /* Init the pool_link so we can safefly call list_del when we destroy
218 * the command buffer
219 */
220 list_inithead(&cmd_buffer->pool_link);
221 }
222
223 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
224
225 return VK_SUCCESS;
226
227 fail:
228 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
229
230 return result;
231 }
232
233 VkResult anv_AllocateCommandBuffers(
234 VkDevice _device,
235 const VkCommandBufferAllocateInfo* pAllocateInfo,
236 VkCommandBuffer* pCommandBuffers)
237 {
238 ANV_FROM_HANDLE(anv_device, device, _device);
239 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
240
241 VkResult result = VK_SUCCESS;
242 uint32_t i;
243
244 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
245 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
246 &pCommandBuffers[i]);
247 if (result != VK_SUCCESS)
248 break;
249 }
250
251 if (result != VK_SUCCESS) {
252 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
253 i, pCommandBuffers);
254 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
255 pCommandBuffers[i] = VK_NULL_HANDLE;
256 }
257
258 return result;
259 }
260
261 static void
262 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
263 {
264 list_del(&cmd_buffer->pool_link);
265
266 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
267
268 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
269 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
270
271 vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
272 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
273 }
274
275 void anv_FreeCommandBuffers(
276 VkDevice device,
277 VkCommandPool commandPool,
278 uint32_t commandBufferCount,
279 const VkCommandBuffer* pCommandBuffers)
280 {
281 for (uint32_t i = 0; i < commandBufferCount; i++) {
282 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
283
284 if (!cmd_buffer)
285 continue;
286
287 anv_cmd_buffer_destroy(cmd_buffer);
288 }
289 }
290
291 VkResult
292 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
293 {
294 cmd_buffer->usage_flags = 0;
295 cmd_buffer->state.current_pipeline = UINT32_MAX;
296 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
297 anv_cmd_state_reset(cmd_buffer);
298
299 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
300 anv_state_stream_init(&cmd_buffer->surface_state_stream,
301 &cmd_buffer->device->surface_state_block_pool);
302
303 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
304 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
305 &cmd_buffer->device->dynamic_state_block_pool);
306 return VK_SUCCESS;
307 }
308
309 VkResult anv_ResetCommandBuffer(
310 VkCommandBuffer commandBuffer,
311 VkCommandBufferResetFlags flags)
312 {
313 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
314 return anv_cmd_buffer_reset(cmd_buffer);
315 }
316
317 void
318 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
319 {
320 switch (cmd_buffer->device->info.gen) {
321 case 7:
322 if (cmd_buffer->device->info.is_haswell)
323 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
324 else
325 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
326 case 8:
327 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
328 case 9:
329 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
330 default:
331 unreachable("unsupported gen\n");
332 }
333 }
334
335 void anv_CmdBindPipeline(
336 VkCommandBuffer commandBuffer,
337 VkPipelineBindPoint pipelineBindPoint,
338 VkPipeline _pipeline)
339 {
340 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
341 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
342
343 switch (pipelineBindPoint) {
344 case VK_PIPELINE_BIND_POINT_COMPUTE:
345 cmd_buffer->state.compute_pipeline = pipeline;
346 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
347 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
348 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
349 break;
350
351 case VK_PIPELINE_BIND_POINT_GRAPHICS:
352 cmd_buffer->state.pipeline = pipeline;
353 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
354 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
355 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
356 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
357
358 /* Apply the dynamic state from the pipeline */
359 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
360 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
361 &pipeline->dynamic_state,
362 pipeline->dynamic_state_mask);
363 break;
364
365 default:
366 assert(!"invalid bind point");
367 break;
368 }
369 }
370
371 void anv_CmdSetViewport(
372 VkCommandBuffer commandBuffer,
373 uint32_t firstViewport,
374 uint32_t viewportCount,
375 const VkViewport* pViewports)
376 {
377 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
378
379 const uint32_t total_count = firstViewport + viewportCount;
380 if (cmd_buffer->state.dynamic.viewport.count < total_count)
381 cmd_buffer->state.dynamic.viewport.count = total_count;
382
383 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
384 pViewports, viewportCount * sizeof(*pViewports));
385
386 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
387 }
388
389 void anv_CmdSetScissor(
390 VkCommandBuffer commandBuffer,
391 uint32_t firstScissor,
392 uint32_t scissorCount,
393 const VkRect2D* pScissors)
394 {
395 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
396
397 const uint32_t total_count = firstScissor + scissorCount;
398 if (cmd_buffer->state.dynamic.scissor.count < total_count)
399 cmd_buffer->state.dynamic.scissor.count = total_count;
400
401 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
402 pScissors, scissorCount * sizeof(*pScissors));
403
404 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
405 }
406
407 void anv_CmdSetLineWidth(
408 VkCommandBuffer commandBuffer,
409 float lineWidth)
410 {
411 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
412
413 cmd_buffer->state.dynamic.line_width = lineWidth;
414 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
415 }
416
417 void anv_CmdSetDepthBias(
418 VkCommandBuffer commandBuffer,
419 float depthBiasConstantFactor,
420 float depthBiasClamp,
421 float depthBiasSlopeFactor)
422 {
423 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
424
425 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
426 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
427 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
428
429 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
430 }
431
432 void anv_CmdSetBlendConstants(
433 VkCommandBuffer commandBuffer,
434 const float blendConstants[4])
435 {
436 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
437
438 memcpy(cmd_buffer->state.dynamic.blend_constants,
439 blendConstants, sizeof(float) * 4);
440
441 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
442 }
443
444 void anv_CmdSetDepthBounds(
445 VkCommandBuffer commandBuffer,
446 float minDepthBounds,
447 float maxDepthBounds)
448 {
449 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
450
451 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
452 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
453
454 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
455 }
456
457 void anv_CmdSetStencilCompareMask(
458 VkCommandBuffer commandBuffer,
459 VkStencilFaceFlags faceMask,
460 uint32_t compareMask)
461 {
462 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
463
464 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
465 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
466 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
467 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
468
469 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
470 }
471
472 void anv_CmdSetStencilWriteMask(
473 VkCommandBuffer commandBuffer,
474 VkStencilFaceFlags faceMask,
475 uint32_t writeMask)
476 {
477 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
478
479 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
480 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
481 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
482 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
483
484 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
485 }
486
487 void anv_CmdSetStencilReference(
488 VkCommandBuffer commandBuffer,
489 VkStencilFaceFlags faceMask,
490 uint32_t reference)
491 {
492 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
493
494 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
495 cmd_buffer->state.dynamic.stencil_reference.front = reference;
496 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
497 cmd_buffer->state.dynamic.stencil_reference.back = reference;
498
499 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
500 }
501
502 void anv_CmdBindDescriptorSets(
503 VkCommandBuffer commandBuffer,
504 VkPipelineBindPoint pipelineBindPoint,
505 VkPipelineLayout _layout,
506 uint32_t firstSet,
507 uint32_t descriptorSetCount,
508 const VkDescriptorSet* pDescriptorSets,
509 uint32_t dynamicOffsetCount,
510 const uint32_t* pDynamicOffsets)
511 {
512 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
513 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
514 struct anv_descriptor_set_layout *set_layout;
515
516 assert(firstSet + descriptorSetCount < MAX_SETS);
517
518 uint32_t dynamic_slot = 0;
519 for (uint32_t i = 0; i < descriptorSetCount; i++) {
520 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
521 set_layout = layout->set[firstSet + i].layout;
522
523 cmd_buffer->state.descriptors[firstSet + i] = set;
524
525 if (set_layout->dynamic_offset_count > 0) {
526 uint32_t dynamic_offset_start =
527 layout->set[firstSet + i].dynamic_offset_start;
528
529 /* Assert that everything is in range */
530 assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
531 ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
532 assert(dynamic_slot + set_layout->dynamic_offset_count <=
533 dynamicOffsetCount);
534
535 typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
536 &pDynamicOffsets[dynamic_slot],
537 set_layout->dynamic_offset_count);
538
539 dynamic_slot += set_layout->dynamic_offset_count;
540 }
541
542 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
543 }
544 }
545
546 void anv_CmdBindVertexBuffers(
547 VkCommandBuffer commandBuffer,
548 uint32_t firstBinding,
549 uint32_t bindingCount,
550 const VkBuffer* pBuffers,
551 const VkDeviceSize* pOffsets)
552 {
553 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
554 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
555
556 /* We have to defer setting up vertex buffer since we need the buffer
557 * stride from the pipeline. */
558
559 assert(firstBinding + bindingCount < MAX_VBS);
560 for (uint32_t i = 0; i < bindingCount; i++) {
561 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
562 vb[firstBinding + i].offset = pOffsets[i];
563 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
564 }
565 }
566
567 enum isl_format
568 anv_isl_format_for_descriptor_type(VkDescriptorType type)
569 {
570 switch (type) {
571 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
572 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
573 return ISL_FORMAT_R32G32B32A32_FLOAT;
574
575 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
576 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
577 return ISL_FORMAT_RAW;
578
579 default:
580 unreachable("Invalid descriptor type");
581 }
582 }
583
584 struct anv_state
585 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
586 const void *data, uint32_t size, uint32_t alignment)
587 {
588 struct anv_state state;
589
590 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
591 memcpy(state.map, data, size);
592
593 anv_state_flush(cmd_buffer->device, state);
594
595 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
596
597 return state;
598 }
599
600 struct anv_state
601 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
602 uint32_t *a, uint32_t *b,
603 uint32_t dwords, uint32_t alignment)
604 {
605 struct anv_state state;
606 uint32_t *p;
607
608 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
609 dwords * 4, alignment);
610 p = state.map;
611 for (uint32_t i = 0; i < dwords; i++)
612 p[i] = a[i] | b[i];
613
614 anv_state_flush(cmd_buffer->device, state);
615
616 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
617
618 return state;
619 }
620
621 struct anv_state
622 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
623 gl_shader_stage stage)
624 {
625 /* If we don't have this stage, bail. */
626 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
627 return (struct anv_state) { .offset = 0 };
628
629 struct anv_push_constants *data =
630 cmd_buffer->state.push_constants[stage];
631 const struct brw_stage_prog_data *prog_data =
632 cmd_buffer->state.pipeline->shaders[stage]->prog_data;
633
634 /* If we don't actually have any push constants, bail. */
635 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
636 return (struct anv_state) { .offset = 0 };
637
638 struct anv_state state =
639 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
640 prog_data->nr_params * sizeof(float),
641 32 /* bottom 5 bits MBZ */);
642
643 /* Walk through the param array and fill the buffer with data */
644 uint32_t *u32_map = state.map;
645 for (unsigned i = 0; i < prog_data->nr_params; i++) {
646 uint32_t offset = (uintptr_t)prog_data->param[i];
647 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
648 }
649
650 anv_state_flush(cmd_buffer->device, state);
651
652 return state;
653 }
654
655 struct anv_state
656 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
657 {
658 struct anv_push_constants *data =
659 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
660 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
661 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
662 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
663
664 /* If we don't actually have any push constants, bail. */
665 if (cs_prog_data->push.total.size == 0)
666 return (struct anv_state) { .offset = 0 };
667
668 const unsigned push_constant_alignment =
669 cmd_buffer->device->info.gen < 8 ? 32 : 64;
670 const unsigned aligned_total_push_constants_size =
671 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
672 struct anv_state state =
673 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
674 aligned_total_push_constants_size,
675 push_constant_alignment);
676
677 /* Walk through the param array and fill the buffer with data */
678 uint32_t *u32_map = state.map;
679
680 if (cs_prog_data->push.cross_thread.size > 0) {
681 assert(cs_prog_data->thread_local_id_index < 0 ||
682 cs_prog_data->thread_local_id_index >=
683 cs_prog_data->push.cross_thread.dwords);
684 for (unsigned i = 0;
685 i < cs_prog_data->push.cross_thread.dwords;
686 i++) {
687 uint32_t offset = (uintptr_t)prog_data->param[i];
688 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
689 }
690 }
691
692 if (cs_prog_data->push.per_thread.size > 0) {
693 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
694 unsigned dst =
695 8 * (cs_prog_data->push.per_thread.regs * t +
696 cs_prog_data->push.cross_thread.regs);
697 unsigned src = cs_prog_data->push.cross_thread.dwords;
698 for ( ; src < prog_data->nr_params; src++, dst++) {
699 if (src != cs_prog_data->thread_local_id_index) {
700 uint32_t offset = (uintptr_t)prog_data->param[src];
701 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
702 } else {
703 u32_map[dst] = t * cs_prog_data->simd_size;
704 }
705 }
706 }
707 }
708
709 anv_state_flush(cmd_buffer->device, state);
710
711 return state;
712 }
713
714 void anv_CmdPushConstants(
715 VkCommandBuffer commandBuffer,
716 VkPipelineLayout layout,
717 VkShaderStageFlags stageFlags,
718 uint32_t offset,
719 uint32_t size,
720 const void* pValues)
721 {
722 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
723
724 anv_foreach_stage(stage, stageFlags) {
725 VkResult result =
726 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer,
727 stage, client_data);
728 if (result != VK_SUCCESS)
729 return;
730
731 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
732 pValues, size);
733 }
734
735 cmd_buffer->state.push_constants_dirty |= stageFlags;
736 }
737
738 VkResult anv_CreateCommandPool(
739 VkDevice _device,
740 const VkCommandPoolCreateInfo* pCreateInfo,
741 const VkAllocationCallbacks* pAllocator,
742 VkCommandPool* pCmdPool)
743 {
744 ANV_FROM_HANDLE(anv_device, device, _device);
745 struct anv_cmd_pool *pool;
746
747 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
748 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
749 if (pool == NULL)
750 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
751
752 if (pAllocator)
753 pool->alloc = *pAllocator;
754 else
755 pool->alloc = device->alloc;
756
757 list_inithead(&pool->cmd_buffers);
758
759 *pCmdPool = anv_cmd_pool_to_handle(pool);
760
761 return VK_SUCCESS;
762 }
763
764 void anv_DestroyCommandPool(
765 VkDevice _device,
766 VkCommandPool commandPool,
767 const VkAllocationCallbacks* pAllocator)
768 {
769 ANV_FROM_HANDLE(anv_device, device, _device);
770 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
771
772 if (!pool)
773 return;
774
775 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
776 &pool->cmd_buffers, pool_link) {
777 anv_cmd_buffer_destroy(cmd_buffer);
778 }
779
780 vk_free2(&device->alloc, pAllocator, pool);
781 }
782
783 VkResult anv_ResetCommandPool(
784 VkDevice device,
785 VkCommandPool commandPool,
786 VkCommandPoolResetFlags flags)
787 {
788 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
789
790 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
791 &pool->cmd_buffers, pool_link) {
792 anv_cmd_buffer_reset(cmd_buffer);
793 }
794
795 return VK_SUCCESS;
796 }
797
798 void anv_TrimCommandPoolKHR(
799 VkDevice device,
800 VkCommandPool commandPool,
801 VkCommandPoolTrimFlagsKHR flags)
802 {
803 /* Nothing for us to do here. Our pools stay pretty tidy. */
804 }
805
806 /**
807 * Return NULL if the current subpass has no depthstencil attachment.
808 */
809 const struct anv_image_view *
810 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
811 {
812 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
813 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
814
815 if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED)
816 return NULL;
817
818 const struct anv_image_view *iview =
819 fb->attachments[subpass->depth_stencil_attachment.attachment];
820
821 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
822 VK_IMAGE_ASPECT_STENCIL_BIT));
823
824 return iview;
825 }
826
827 void anv_CmdPushDescriptorSetKHR(
828 VkCommandBuffer commandBuffer,
829 VkPipelineBindPoint pipelineBindPoint,
830 VkPipelineLayout _layout,
831 uint32_t _set,
832 uint32_t descriptorWriteCount,
833 const VkWriteDescriptorSet* pDescriptorWrites)
834 {
835 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
836 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
837
838 assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
839 pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
840 assert(_set < MAX_SETS);
841
842 const struct anv_descriptor_set_layout *set_layout =
843 layout->set[_set].layout;
844 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
845
846 set->layout = set_layout;
847 set->size = anv_descriptor_set_layout_size(set_layout);
848 set->buffer_count = set_layout->buffer_count;
849 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
850
851 /* Go through the user supplied descriptors. */
852 for (uint32_t i = 0; i < descriptorWriteCount; i++) {
853 const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
854
855 switch (write->descriptorType) {
856 case VK_DESCRIPTOR_TYPE_SAMPLER:
857 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
858 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
859 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
860 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
861 for (uint32_t j = 0; j < write->descriptorCount; j++) {
862 anv_descriptor_set_write_image_view(set, &cmd_buffer->device->info,
863 write->pImageInfo + j,
864 write->descriptorType,
865 write->dstBinding,
866 write->dstArrayElement + j);
867 }
868 break;
869
870 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
871 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
872 for (uint32_t j = 0; j < write->descriptorCount; j++) {
873 ANV_FROM_HANDLE(anv_buffer_view, bview,
874 write->pTexelBufferView[j]);
875
876 anv_descriptor_set_write_buffer_view(set,
877 write->descriptorType,
878 bview,
879 write->dstBinding,
880 write->dstArrayElement + j);
881 }
882 break;
883
884 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
885 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
886 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
887 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
888 for (uint32_t j = 0; j < write->descriptorCount; j++) {
889 assert(write->pBufferInfo[j].buffer);
890 ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
891 assert(buffer);
892
893 anv_descriptor_set_write_buffer(set,
894 cmd_buffer->device,
895 &cmd_buffer->surface_state_stream,
896 write->descriptorType,
897 buffer,
898 write->dstBinding,
899 write->dstArrayElement + j,
900 write->pBufferInfo[j].offset,
901 write->pBufferInfo[j].range);
902 }
903 break;
904
905 default:
906 break;
907 }
908 }
909
910 cmd_buffer->state.descriptors[_set] = set;
911 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
912 }
913
914 void anv_CmdPushDescriptorSetWithTemplateKHR(
915 VkCommandBuffer commandBuffer,
916 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
917 VkPipelineLayout _layout,
918 uint32_t _set,
919 const void* pData)
920 {
921 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
922 ANV_FROM_HANDLE(anv_descriptor_update_template, template,
923 descriptorUpdateTemplate);
924 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
925
926 assert(_set < MAX_PUSH_DESCRIPTORS);
927
928 const struct anv_descriptor_set_layout *set_layout =
929 layout->set[_set].layout;
930 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
931
932 set->layout = set_layout;
933 set->size = anv_descriptor_set_layout_size(set_layout);
934 set->buffer_count = set_layout->buffer_count;
935 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
936
937 anv_descriptor_set_write_template(set,
938 cmd_buffer->device,
939 &cmd_buffer->surface_state_stream,
940 template,
941 pData);
942
943 cmd_buffer->state.descriptors[_set] = set;
944 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
945 }