anv: Rename clflush_range and state_clflush
[mesa.git] / src / intel / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "vk_format_info.h"
33
34 /** \file anv_cmd_buffer.c
35 *
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
41 */
42
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
45 .viewport = {
46 .count = 0,
47 },
48 .scissor = {
49 .count = 0,
50 },
51 .line_width = 1.0f,
52 .depth_bias = {
53 .bias = 0.0f,
54 .clamp = 0.0f,
55 .slope = 0.0f,
56 },
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
58 .depth_bounds = {
59 .min = 0.0f,
60 .max = 1.0f,
61 },
62 .stencil_compare_mask = {
63 .front = ~0u,
64 .back = ~0u,
65 },
66 .stencil_write_mask = {
67 .front = ~0u,
68 .back = ~0u,
69 },
70 .stencil_reference = {
71 .front = 0u,
72 .back = 0u,
73 },
74 };
75
76 void
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
79 uint32_t copy_mask)
80 {
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
84 src->viewport.count);
85 }
86
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
90 src->scissor.count);
91 }
92
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
95
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
98
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
101
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
104
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
107
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
110
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
113 }
114
115 static void
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
117 {
118 struct anv_cmd_state *state = &cmd_buffer->state;
119
120 memset(&state->descriptors, 0, sizeof(state->descriptors));
121 memset(&state->push_constants, 0, sizeof(state->push_constants));
122 memset(state->binding_tables, 0, sizeof(state->binding_tables));
123 memset(state->samplers, 0, sizeof(state->samplers));
124
125 /* 0 isn't a valid config. This ensures that we always configure L3$. */
126 cmd_buffer->state.current_l3_config = 0;
127
128 state->dirty = 0;
129 state->vb_dirty = 0;
130 state->pending_pipe_bits = 0;
131 state->descriptors_dirty = 0;
132 state->push_constants_dirty = 0;
133 state->pipeline = NULL;
134 state->push_constant_stages = 0;
135 state->restart_index = UINT32_MAX;
136 state->dynamic = default_dynamic_state;
137 state->need_query_wa = true;
138 state->pma_fix_enabled = false;
139 state->hiz_enabled = false;
140
141 if (state->attachments != NULL) {
142 vk_free(&cmd_buffer->pool->alloc, state->attachments);
143 state->attachments = NULL;
144 }
145
146 state->gen7.index_buffer = NULL;
147 }
148
149 VkResult
150 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
151 gl_shader_stage stage, uint32_t size)
152 {
153 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
154
155 if (*ptr == NULL) {
156 *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
157 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
158 if (*ptr == NULL)
159 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
160 } else if ((*ptr)->size < size) {
161 *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
162 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
163 if (*ptr == NULL)
164 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
165 }
166 (*ptr)->size = size;
167
168 return VK_SUCCESS;
169 }
170
171 static VkResult anv_create_cmd_buffer(
172 struct anv_device * device,
173 struct anv_cmd_pool * pool,
174 VkCommandBufferLevel level,
175 VkCommandBuffer* pCommandBuffer)
176 {
177 struct anv_cmd_buffer *cmd_buffer;
178 VkResult result;
179
180 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
181 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
182 if (cmd_buffer == NULL)
183 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
184
185 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
186 cmd_buffer->device = device;
187 cmd_buffer->pool = pool;
188 cmd_buffer->level = level;
189 cmd_buffer->state.attachments = NULL;
190
191 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
192 if (result != VK_SUCCESS)
193 goto fail;
194
195 anv_state_stream_init(&cmd_buffer->surface_state_stream,
196 &device->surface_state_block_pool);
197 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
198 &device->dynamic_state_block_pool);
199
200 if (pool) {
201 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
202 } else {
203 /* Init the pool_link so we can safefly call list_del when we destroy
204 * the command buffer
205 */
206 list_inithead(&cmd_buffer->pool_link);
207 }
208
209 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
210
211 return VK_SUCCESS;
212
213 fail:
214 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
215
216 return result;
217 }
218
219 VkResult anv_AllocateCommandBuffers(
220 VkDevice _device,
221 const VkCommandBufferAllocateInfo* pAllocateInfo,
222 VkCommandBuffer* pCommandBuffers)
223 {
224 ANV_FROM_HANDLE(anv_device, device, _device);
225 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
226
227 VkResult result = VK_SUCCESS;
228 uint32_t i;
229
230 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
231 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
232 &pCommandBuffers[i]);
233 if (result != VK_SUCCESS)
234 break;
235 }
236
237 if (result != VK_SUCCESS) {
238 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
239 i, pCommandBuffers);
240 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
241 pCommandBuffers[i] = VK_NULL_HANDLE;
242 }
243
244 return result;
245 }
246
247 static void
248 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
249 {
250 list_del(&cmd_buffer->pool_link);
251
252 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
253
254 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
255 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
256
257 vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
258 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
259 }
260
261 void anv_FreeCommandBuffers(
262 VkDevice device,
263 VkCommandPool commandPool,
264 uint32_t commandBufferCount,
265 const VkCommandBuffer* pCommandBuffers)
266 {
267 for (uint32_t i = 0; i < commandBufferCount; i++) {
268 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
269
270 if (!cmd_buffer)
271 continue;
272
273 anv_cmd_buffer_destroy(cmd_buffer);
274 }
275 }
276
277 VkResult
278 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
279 {
280 cmd_buffer->usage_flags = 0;
281 cmd_buffer->state.current_pipeline = UINT32_MAX;
282 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
283 anv_cmd_state_reset(cmd_buffer);
284
285 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
286 anv_state_stream_init(&cmd_buffer->surface_state_stream,
287 &cmd_buffer->device->surface_state_block_pool);
288
289 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
290 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
291 &cmd_buffer->device->dynamic_state_block_pool);
292 return VK_SUCCESS;
293 }
294
295 VkResult anv_ResetCommandBuffer(
296 VkCommandBuffer commandBuffer,
297 VkCommandBufferResetFlags flags)
298 {
299 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
300 return anv_cmd_buffer_reset(cmd_buffer);
301 }
302
303 void
304 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
305 {
306 switch (cmd_buffer->device->info.gen) {
307 case 7:
308 if (cmd_buffer->device->info.is_haswell)
309 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
310 else
311 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
312 case 8:
313 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
314 case 9:
315 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
316 default:
317 unreachable("unsupported gen\n");
318 }
319 }
320
321 void anv_CmdBindPipeline(
322 VkCommandBuffer commandBuffer,
323 VkPipelineBindPoint pipelineBindPoint,
324 VkPipeline _pipeline)
325 {
326 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
327 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
328
329 switch (pipelineBindPoint) {
330 case VK_PIPELINE_BIND_POINT_COMPUTE:
331 cmd_buffer->state.compute_pipeline = pipeline;
332 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
333 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
334 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
335 break;
336
337 case VK_PIPELINE_BIND_POINT_GRAPHICS:
338 cmd_buffer->state.pipeline = pipeline;
339 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
340 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
341 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
342 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
343
344 /* Apply the dynamic state from the pipeline */
345 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
346 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
347 &pipeline->dynamic_state,
348 pipeline->dynamic_state_mask);
349 break;
350
351 default:
352 assert(!"invalid bind point");
353 break;
354 }
355 }
356
357 void anv_CmdSetViewport(
358 VkCommandBuffer commandBuffer,
359 uint32_t firstViewport,
360 uint32_t viewportCount,
361 const VkViewport* pViewports)
362 {
363 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
364
365 const uint32_t total_count = firstViewport + viewportCount;
366 if (cmd_buffer->state.dynamic.viewport.count < total_count)
367 cmd_buffer->state.dynamic.viewport.count = total_count;
368
369 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
370 pViewports, viewportCount * sizeof(*pViewports));
371
372 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
373 }
374
375 void anv_CmdSetScissor(
376 VkCommandBuffer commandBuffer,
377 uint32_t firstScissor,
378 uint32_t scissorCount,
379 const VkRect2D* pScissors)
380 {
381 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
382
383 const uint32_t total_count = firstScissor + scissorCount;
384 if (cmd_buffer->state.dynamic.scissor.count < total_count)
385 cmd_buffer->state.dynamic.scissor.count = total_count;
386
387 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
388 pScissors, scissorCount * sizeof(*pScissors));
389
390 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
391 }
392
393 void anv_CmdSetLineWidth(
394 VkCommandBuffer commandBuffer,
395 float lineWidth)
396 {
397 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
398
399 cmd_buffer->state.dynamic.line_width = lineWidth;
400 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
401 }
402
403 void anv_CmdSetDepthBias(
404 VkCommandBuffer commandBuffer,
405 float depthBiasConstantFactor,
406 float depthBiasClamp,
407 float depthBiasSlopeFactor)
408 {
409 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
410
411 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
412 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
413 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
414
415 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
416 }
417
418 void anv_CmdSetBlendConstants(
419 VkCommandBuffer commandBuffer,
420 const float blendConstants[4])
421 {
422 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
423
424 memcpy(cmd_buffer->state.dynamic.blend_constants,
425 blendConstants, sizeof(float) * 4);
426
427 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
428 }
429
430 void anv_CmdSetDepthBounds(
431 VkCommandBuffer commandBuffer,
432 float minDepthBounds,
433 float maxDepthBounds)
434 {
435 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
436
437 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
438 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
439
440 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
441 }
442
443 void anv_CmdSetStencilCompareMask(
444 VkCommandBuffer commandBuffer,
445 VkStencilFaceFlags faceMask,
446 uint32_t compareMask)
447 {
448 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
449
450 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
451 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
452 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
453 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
454
455 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
456 }
457
458 void anv_CmdSetStencilWriteMask(
459 VkCommandBuffer commandBuffer,
460 VkStencilFaceFlags faceMask,
461 uint32_t writeMask)
462 {
463 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
464
465 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
466 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
467 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
468 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
469
470 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
471 }
472
473 void anv_CmdSetStencilReference(
474 VkCommandBuffer commandBuffer,
475 VkStencilFaceFlags faceMask,
476 uint32_t reference)
477 {
478 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
479
480 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
481 cmd_buffer->state.dynamic.stencil_reference.front = reference;
482 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
483 cmd_buffer->state.dynamic.stencil_reference.back = reference;
484
485 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
486 }
487
488 void anv_CmdBindDescriptorSets(
489 VkCommandBuffer commandBuffer,
490 VkPipelineBindPoint pipelineBindPoint,
491 VkPipelineLayout _layout,
492 uint32_t firstSet,
493 uint32_t descriptorSetCount,
494 const VkDescriptorSet* pDescriptorSets,
495 uint32_t dynamicOffsetCount,
496 const uint32_t* pDynamicOffsets)
497 {
498 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
499 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
500 struct anv_descriptor_set_layout *set_layout;
501
502 assert(firstSet + descriptorSetCount < MAX_SETS);
503
504 for (uint32_t i = 0; i < descriptorSetCount; i++) {
505 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
506 set_layout = layout->set[firstSet + i].layout;
507
508 if (cmd_buffer->state.descriptors[firstSet + i] != set) {
509 cmd_buffer->state.descriptors[firstSet + i] = set;
510 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
511 }
512
513 if (set_layout->dynamic_offset_count > 0) {
514 anv_foreach_stage(s, set_layout->shader_stages) {
515 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, s, dynamic);
516
517 struct anv_push_constants *push =
518 cmd_buffer->state.push_constants[s];
519
520 unsigned d = layout->set[firstSet + i].dynamic_offset_start;
521 const uint32_t *offsets = pDynamicOffsets;
522 struct anv_descriptor *desc = set->descriptors;
523
524 for (unsigned b = 0; b < set_layout->binding_count; b++) {
525 if (set_layout->binding[b].dynamic_offset_index < 0)
526 continue;
527
528 unsigned array_size = set_layout->binding[b].array_size;
529 for (unsigned j = 0; j < array_size; j++) {
530 push->dynamic[d].offset = *(offsets++);
531 push->dynamic[d].range = (desc->buffer_view) ?
532 desc->buffer_view->range : 0;
533 desc++;
534 d++;
535 }
536 }
537 }
538 cmd_buffer->state.push_constants_dirty |= set_layout->shader_stages;
539 }
540 }
541 }
542
543 void anv_CmdBindVertexBuffers(
544 VkCommandBuffer commandBuffer,
545 uint32_t firstBinding,
546 uint32_t bindingCount,
547 const VkBuffer* pBuffers,
548 const VkDeviceSize* pOffsets)
549 {
550 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
551 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
552
553 /* We have to defer setting up vertex buffer since we need the buffer
554 * stride from the pipeline. */
555
556 assert(firstBinding + bindingCount < MAX_VBS);
557 for (uint32_t i = 0; i < bindingCount; i++) {
558 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
559 vb[firstBinding + i].offset = pOffsets[i];
560 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
561 }
562 }
563
564 enum isl_format
565 anv_isl_format_for_descriptor_type(VkDescriptorType type)
566 {
567 switch (type) {
568 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
569 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
570 return ISL_FORMAT_R32G32B32A32_FLOAT;
571
572 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
573 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
574 return ISL_FORMAT_RAW;
575
576 default:
577 unreachable("Invalid descriptor type");
578 }
579 }
580
581 struct anv_state
582 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
583 const void *data, uint32_t size, uint32_t alignment)
584 {
585 struct anv_state state;
586
587 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
588 memcpy(state.map, data, size);
589
590 if (!cmd_buffer->device->info.has_llc)
591 anv_state_flush(state);
592
593 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
594
595 return state;
596 }
597
598 struct anv_state
599 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
600 uint32_t *a, uint32_t *b,
601 uint32_t dwords, uint32_t alignment)
602 {
603 struct anv_state state;
604 uint32_t *p;
605
606 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
607 dwords * 4, alignment);
608 p = state.map;
609 for (uint32_t i = 0; i < dwords; i++)
610 p[i] = a[i] | b[i];
611
612 if (!cmd_buffer->device->info.has_llc)
613 anv_state_flush(state);
614
615 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
616
617 return state;
618 }
619
620 struct anv_state
621 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
622 gl_shader_stage stage)
623 {
624 /* If we don't have this stage, bail. */
625 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
626 return (struct anv_state) { .offset = 0 };
627
628 struct anv_push_constants *data =
629 cmd_buffer->state.push_constants[stage];
630 const struct brw_stage_prog_data *prog_data =
631 cmd_buffer->state.pipeline->shaders[stage]->prog_data;
632
633 /* If we don't actually have any push constants, bail. */
634 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
635 return (struct anv_state) { .offset = 0 };
636
637 struct anv_state state =
638 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
639 prog_data->nr_params * sizeof(float),
640 32 /* bottom 5 bits MBZ */);
641
642 /* Walk through the param array and fill the buffer with data */
643 uint32_t *u32_map = state.map;
644 for (unsigned i = 0; i < prog_data->nr_params; i++) {
645 uint32_t offset = (uintptr_t)prog_data->param[i];
646 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
647 }
648
649 if (!cmd_buffer->device->info.has_llc)
650 anv_state_flush(state);
651
652 return state;
653 }
654
655 struct anv_state
656 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
657 {
658 struct anv_push_constants *data =
659 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
660 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
661 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
662 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
663
664 /* If we don't actually have any push constants, bail. */
665 if (cs_prog_data->push.total.size == 0)
666 return (struct anv_state) { .offset = 0 };
667
668 const unsigned push_constant_alignment =
669 cmd_buffer->device->info.gen < 8 ? 32 : 64;
670 const unsigned aligned_total_push_constants_size =
671 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
672 struct anv_state state =
673 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
674 aligned_total_push_constants_size,
675 push_constant_alignment);
676
677 /* Walk through the param array and fill the buffer with data */
678 uint32_t *u32_map = state.map;
679
680 if (cs_prog_data->push.cross_thread.size > 0) {
681 assert(cs_prog_data->thread_local_id_index < 0 ||
682 cs_prog_data->thread_local_id_index >=
683 cs_prog_data->push.cross_thread.dwords);
684 for (unsigned i = 0;
685 i < cs_prog_data->push.cross_thread.dwords;
686 i++) {
687 uint32_t offset = (uintptr_t)prog_data->param[i];
688 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
689 }
690 }
691
692 if (cs_prog_data->push.per_thread.size > 0) {
693 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
694 unsigned dst =
695 8 * (cs_prog_data->push.per_thread.regs * t +
696 cs_prog_data->push.cross_thread.regs);
697 unsigned src = cs_prog_data->push.cross_thread.dwords;
698 for ( ; src < prog_data->nr_params; src++, dst++) {
699 if (src != cs_prog_data->thread_local_id_index) {
700 uint32_t offset = (uintptr_t)prog_data->param[src];
701 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
702 } else {
703 u32_map[dst] = t * cs_prog_data->simd_size;
704 }
705 }
706 }
707 }
708
709 if (!cmd_buffer->device->info.has_llc)
710 anv_state_flush(state);
711
712 return state;
713 }
714
715 void anv_CmdPushConstants(
716 VkCommandBuffer commandBuffer,
717 VkPipelineLayout layout,
718 VkShaderStageFlags stageFlags,
719 uint32_t offset,
720 uint32_t size,
721 const void* pValues)
722 {
723 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
724
725 anv_foreach_stage(stage, stageFlags) {
726 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
727
728 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
729 pValues, size);
730 }
731
732 cmd_buffer->state.push_constants_dirty |= stageFlags;
733 }
734
735 VkResult anv_CreateCommandPool(
736 VkDevice _device,
737 const VkCommandPoolCreateInfo* pCreateInfo,
738 const VkAllocationCallbacks* pAllocator,
739 VkCommandPool* pCmdPool)
740 {
741 ANV_FROM_HANDLE(anv_device, device, _device);
742 struct anv_cmd_pool *pool;
743
744 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
745 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
746 if (pool == NULL)
747 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
748
749 if (pAllocator)
750 pool->alloc = *pAllocator;
751 else
752 pool->alloc = device->alloc;
753
754 list_inithead(&pool->cmd_buffers);
755
756 *pCmdPool = anv_cmd_pool_to_handle(pool);
757
758 return VK_SUCCESS;
759 }
760
761 void anv_DestroyCommandPool(
762 VkDevice _device,
763 VkCommandPool commandPool,
764 const VkAllocationCallbacks* pAllocator)
765 {
766 ANV_FROM_HANDLE(anv_device, device, _device);
767 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
768
769 if (!pool)
770 return;
771
772 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
773 &pool->cmd_buffers, pool_link) {
774 anv_cmd_buffer_destroy(cmd_buffer);
775 }
776
777 vk_free2(&device->alloc, pAllocator, pool);
778 }
779
780 VkResult anv_ResetCommandPool(
781 VkDevice device,
782 VkCommandPool commandPool,
783 VkCommandPoolResetFlags flags)
784 {
785 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
786
787 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
788 &pool->cmd_buffers, pool_link) {
789 anv_cmd_buffer_reset(cmd_buffer);
790 }
791
792 return VK_SUCCESS;
793 }
794
795 void anv_TrimCommandPoolKHR(
796 VkDevice device,
797 VkCommandPool commandPool,
798 VkCommandPoolTrimFlagsKHR flags)
799 {
800 /* Nothing for us to do here. Our pools stay pretty tidy. */
801 }
802
803 /**
804 * Return NULL if the current subpass has no depthstencil attachment.
805 */
806 const struct anv_image_view *
807 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
808 {
809 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
810 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
811
812 if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED)
813 return NULL;
814
815 const struct anv_image_view *iview =
816 fb->attachments[subpass->depth_stencil_attachment];
817
818 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
819 VK_IMAGE_ASPECT_STENCIL_BIT));
820
821 return iview;
822 }