anv/cmd_buffer: fix off by one error in assertion
[mesa.git] / src / intel / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "vk_format_info.h"
33
34 /** \file anv_cmd_buffer.c
35 *
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
41 */
42
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
45 .viewport = {
46 .count = 0,
47 },
48 .scissor = {
49 .count = 0,
50 },
51 .line_width = 1.0f,
52 .depth_bias = {
53 .bias = 0.0f,
54 .clamp = 0.0f,
55 .slope = 0.0f,
56 },
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
58 .depth_bounds = {
59 .min = 0.0f,
60 .max = 1.0f,
61 },
62 .stencil_compare_mask = {
63 .front = ~0u,
64 .back = ~0u,
65 },
66 .stencil_write_mask = {
67 .front = ~0u,
68 .back = ~0u,
69 },
70 .stencil_reference = {
71 .front = 0u,
72 .back = 0u,
73 },
74 };
75
76 void
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
79 uint32_t copy_mask)
80 {
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
84 src->viewport.count);
85 }
86
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
90 src->scissor.count);
91 }
92
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
95
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
98
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
101
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
104
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
107
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
110
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
113 }
114
115 static void
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
117 {
118 struct anv_cmd_state *state = &cmd_buffer->state;
119
120 cmd_buffer->batch.status = VK_SUCCESS;
121
122 memset(&state->descriptors, 0, sizeof(state->descriptors));
123 for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
124 if (state->push_constants[i] != NULL) {
125 vk_free(&cmd_buffer->pool->alloc, state->push_constants[i]);
126 state->push_constants[i] = NULL;
127 }
128 }
129 memset(state->binding_tables, 0, sizeof(state->binding_tables));
130 memset(state->samplers, 0, sizeof(state->samplers));
131
132 /* 0 isn't a valid config. This ensures that we always configure L3$. */
133 cmd_buffer->state.current_l3_config = 0;
134
135 state->dirty = 0;
136 state->vb_dirty = 0;
137 state->pending_pipe_bits = 0;
138 state->descriptors_dirty = 0;
139 state->push_constants_dirty = 0;
140 state->pipeline = NULL;
141 state->framebuffer = NULL;
142 state->pass = NULL;
143 state->subpass = NULL;
144 state->push_constant_stages = 0;
145 state->restart_index = UINT32_MAX;
146 state->dynamic = default_dynamic_state;
147 state->need_query_wa = true;
148 state->pma_fix_enabled = false;
149 state->hiz_enabled = false;
150
151 if (state->attachments != NULL) {
152 vk_free(&cmd_buffer->pool->alloc, state->attachments);
153 state->attachments = NULL;
154 }
155
156 state->gen7.index_buffer = NULL;
157 }
158
159 VkResult
160 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
161 gl_shader_stage stage, uint32_t size)
162 {
163 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
164
165 if (*ptr == NULL) {
166 *ptr = vk_alloc(&cmd_buffer->pool->alloc, size, 8,
167 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
168 if (*ptr == NULL) {
169 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
170 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
171 }
172 } else if ((*ptr)->size < size) {
173 *ptr = vk_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
174 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
175 if (*ptr == NULL) {
176 anv_batch_set_error(&cmd_buffer->batch, VK_ERROR_OUT_OF_HOST_MEMORY);
177 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
178 }
179 }
180 (*ptr)->size = size;
181
182 return VK_SUCCESS;
183 }
184
185 static VkResult anv_create_cmd_buffer(
186 struct anv_device * device,
187 struct anv_cmd_pool * pool,
188 VkCommandBufferLevel level,
189 VkCommandBuffer* pCommandBuffer)
190 {
191 struct anv_cmd_buffer *cmd_buffer;
192 VkResult result;
193
194 cmd_buffer = vk_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
195 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
196 if (cmd_buffer == NULL)
197 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
198
199 cmd_buffer->batch.status = VK_SUCCESS;
200
201 for (uint32_t i = 0; i < MESA_SHADER_STAGES; i++) {
202 cmd_buffer->state.push_constants[i] = NULL;
203 }
204 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
205 cmd_buffer->device = device;
206 cmd_buffer->pool = pool;
207 cmd_buffer->level = level;
208 cmd_buffer->state.attachments = NULL;
209
210 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
211 if (result != VK_SUCCESS)
212 goto fail;
213
214 anv_state_stream_init(&cmd_buffer->surface_state_stream,
215 &device->surface_state_pool, 4096);
216 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
217 &device->dynamic_state_pool, 16384);
218
219 memset(&cmd_buffer->state.push_descriptor, 0,
220 sizeof(cmd_buffer->state.push_descriptor));
221
222 if (pool) {
223 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
224 } else {
225 /* Init the pool_link so we can safefly call list_del when we destroy
226 * the command buffer
227 */
228 list_inithead(&cmd_buffer->pool_link);
229 }
230
231 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
232
233 return VK_SUCCESS;
234
235 fail:
236 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
237
238 return result;
239 }
240
241 VkResult anv_AllocateCommandBuffers(
242 VkDevice _device,
243 const VkCommandBufferAllocateInfo* pAllocateInfo,
244 VkCommandBuffer* pCommandBuffers)
245 {
246 ANV_FROM_HANDLE(anv_device, device, _device);
247 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
248
249 VkResult result = VK_SUCCESS;
250 uint32_t i;
251
252 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
253 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
254 &pCommandBuffers[i]);
255 if (result != VK_SUCCESS)
256 break;
257 }
258
259 if (result != VK_SUCCESS) {
260 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
261 i, pCommandBuffers);
262 for (i = 0; i < pAllocateInfo->commandBufferCount; i++)
263 pCommandBuffers[i] = VK_NULL_HANDLE;
264 }
265
266 return result;
267 }
268
269 static void
270 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
271 {
272 list_del(&cmd_buffer->pool_link);
273
274 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
275
276 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
277 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
278
279 vk_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
280 vk_free(&cmd_buffer->pool->alloc, cmd_buffer);
281 }
282
283 void anv_FreeCommandBuffers(
284 VkDevice device,
285 VkCommandPool commandPool,
286 uint32_t commandBufferCount,
287 const VkCommandBuffer* pCommandBuffers)
288 {
289 for (uint32_t i = 0; i < commandBufferCount; i++) {
290 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
291
292 if (!cmd_buffer)
293 continue;
294
295 anv_cmd_buffer_destroy(cmd_buffer);
296 }
297 }
298
299 VkResult
300 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
301 {
302 cmd_buffer->usage_flags = 0;
303 cmd_buffer->state.current_pipeline = UINT32_MAX;
304 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
305 anv_cmd_state_reset(cmd_buffer);
306
307 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
308 anv_state_stream_init(&cmd_buffer->surface_state_stream,
309 &cmd_buffer->device->surface_state_pool, 4096);
310
311 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
312 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
313 &cmd_buffer->device->dynamic_state_pool, 16384);
314 return VK_SUCCESS;
315 }
316
317 VkResult anv_ResetCommandBuffer(
318 VkCommandBuffer commandBuffer,
319 VkCommandBufferResetFlags flags)
320 {
321 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
322 return anv_cmd_buffer_reset(cmd_buffer);
323 }
324
325 void
326 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
327 {
328 switch (cmd_buffer->device->info.gen) {
329 case 7:
330 if (cmd_buffer->device->info.is_haswell)
331 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
332 else
333 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
334 case 8:
335 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
336 case 9:
337 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
338 case 10:
339 return gen10_cmd_buffer_emit_state_base_address(cmd_buffer);
340 default:
341 unreachable("unsupported gen\n");
342 }
343 }
344
345 void anv_CmdBindPipeline(
346 VkCommandBuffer commandBuffer,
347 VkPipelineBindPoint pipelineBindPoint,
348 VkPipeline _pipeline)
349 {
350 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
351 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
352
353 switch (pipelineBindPoint) {
354 case VK_PIPELINE_BIND_POINT_COMPUTE:
355 cmd_buffer->state.compute_pipeline = pipeline;
356 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
357 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
358 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
359 break;
360
361 case VK_PIPELINE_BIND_POINT_GRAPHICS:
362 cmd_buffer->state.pipeline = pipeline;
363 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
364 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
365 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
366 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
367
368 /* Apply the dynamic state from the pipeline */
369 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
370 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
371 &pipeline->dynamic_state,
372 pipeline->dynamic_state_mask);
373 break;
374
375 default:
376 assert(!"invalid bind point");
377 break;
378 }
379 }
380
381 void anv_CmdSetViewport(
382 VkCommandBuffer commandBuffer,
383 uint32_t firstViewport,
384 uint32_t viewportCount,
385 const VkViewport* pViewports)
386 {
387 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
388
389 const uint32_t total_count = firstViewport + viewportCount;
390 if (cmd_buffer->state.dynamic.viewport.count < total_count)
391 cmd_buffer->state.dynamic.viewport.count = total_count;
392
393 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
394 pViewports, viewportCount * sizeof(*pViewports));
395
396 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
397 }
398
399 void anv_CmdSetScissor(
400 VkCommandBuffer commandBuffer,
401 uint32_t firstScissor,
402 uint32_t scissorCount,
403 const VkRect2D* pScissors)
404 {
405 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
406
407 const uint32_t total_count = firstScissor + scissorCount;
408 if (cmd_buffer->state.dynamic.scissor.count < total_count)
409 cmd_buffer->state.dynamic.scissor.count = total_count;
410
411 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
412 pScissors, scissorCount * sizeof(*pScissors));
413
414 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
415 }
416
417 void anv_CmdSetLineWidth(
418 VkCommandBuffer commandBuffer,
419 float lineWidth)
420 {
421 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
422
423 cmd_buffer->state.dynamic.line_width = lineWidth;
424 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
425 }
426
427 void anv_CmdSetDepthBias(
428 VkCommandBuffer commandBuffer,
429 float depthBiasConstantFactor,
430 float depthBiasClamp,
431 float depthBiasSlopeFactor)
432 {
433 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
434
435 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
436 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
437 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
438
439 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
440 }
441
442 void anv_CmdSetBlendConstants(
443 VkCommandBuffer commandBuffer,
444 const float blendConstants[4])
445 {
446 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
447
448 memcpy(cmd_buffer->state.dynamic.blend_constants,
449 blendConstants, sizeof(float) * 4);
450
451 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
452 }
453
454 void anv_CmdSetDepthBounds(
455 VkCommandBuffer commandBuffer,
456 float minDepthBounds,
457 float maxDepthBounds)
458 {
459 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
460
461 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
462 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
463
464 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
465 }
466
467 void anv_CmdSetStencilCompareMask(
468 VkCommandBuffer commandBuffer,
469 VkStencilFaceFlags faceMask,
470 uint32_t compareMask)
471 {
472 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
473
474 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
475 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
476 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
477 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
478
479 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
480 }
481
482 void anv_CmdSetStencilWriteMask(
483 VkCommandBuffer commandBuffer,
484 VkStencilFaceFlags faceMask,
485 uint32_t writeMask)
486 {
487 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
488
489 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
490 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
491 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
492 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
493
494 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
495 }
496
497 void anv_CmdSetStencilReference(
498 VkCommandBuffer commandBuffer,
499 VkStencilFaceFlags faceMask,
500 uint32_t reference)
501 {
502 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
503
504 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
505 cmd_buffer->state.dynamic.stencil_reference.front = reference;
506 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
507 cmd_buffer->state.dynamic.stencil_reference.back = reference;
508
509 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
510 }
511
512 void anv_CmdBindDescriptorSets(
513 VkCommandBuffer commandBuffer,
514 VkPipelineBindPoint pipelineBindPoint,
515 VkPipelineLayout _layout,
516 uint32_t firstSet,
517 uint32_t descriptorSetCount,
518 const VkDescriptorSet* pDescriptorSets,
519 uint32_t dynamicOffsetCount,
520 const uint32_t* pDynamicOffsets)
521 {
522 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
523 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
524 struct anv_descriptor_set_layout *set_layout;
525
526 assert(firstSet + descriptorSetCount < MAX_SETS);
527
528 uint32_t dynamic_slot = 0;
529 for (uint32_t i = 0; i < descriptorSetCount; i++) {
530 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
531 set_layout = layout->set[firstSet + i].layout;
532
533 cmd_buffer->state.descriptors[firstSet + i] = set;
534
535 if (set_layout->dynamic_offset_count > 0) {
536 uint32_t dynamic_offset_start =
537 layout->set[firstSet + i].dynamic_offset_start;
538
539 /* Assert that everything is in range */
540 assert(dynamic_offset_start + set_layout->dynamic_offset_count <=
541 ARRAY_SIZE(cmd_buffer->state.dynamic_offsets));
542 assert(dynamic_slot + set_layout->dynamic_offset_count <=
543 dynamicOffsetCount);
544
545 typed_memcpy(&cmd_buffer->state.dynamic_offsets[dynamic_offset_start],
546 &pDynamicOffsets[dynamic_slot],
547 set_layout->dynamic_offset_count);
548
549 dynamic_slot += set_layout->dynamic_offset_count;
550 }
551
552 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
553 }
554 }
555
556 void anv_CmdBindVertexBuffers(
557 VkCommandBuffer commandBuffer,
558 uint32_t firstBinding,
559 uint32_t bindingCount,
560 const VkBuffer* pBuffers,
561 const VkDeviceSize* pOffsets)
562 {
563 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
564 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
565
566 /* We have to defer setting up vertex buffer since we need the buffer
567 * stride from the pipeline. */
568
569 assert(firstBinding + bindingCount <= MAX_VBS);
570 for (uint32_t i = 0; i < bindingCount; i++) {
571 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
572 vb[firstBinding + i].offset = pOffsets[i];
573 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
574 }
575 }
576
577 enum isl_format
578 anv_isl_format_for_descriptor_type(VkDescriptorType type)
579 {
580 switch (type) {
581 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
582 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
583 return ISL_FORMAT_R32G32B32A32_FLOAT;
584
585 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
586 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
587 return ISL_FORMAT_RAW;
588
589 default:
590 unreachable("Invalid descriptor type");
591 }
592 }
593
594 struct anv_state
595 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
596 const void *data, uint32_t size, uint32_t alignment)
597 {
598 struct anv_state state;
599
600 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
601 memcpy(state.map, data, size);
602
603 anv_state_flush(cmd_buffer->device, state);
604
605 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
606
607 return state;
608 }
609
610 struct anv_state
611 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
612 uint32_t *a, uint32_t *b,
613 uint32_t dwords, uint32_t alignment)
614 {
615 struct anv_state state;
616 uint32_t *p;
617
618 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
619 dwords * 4, alignment);
620 p = state.map;
621 for (uint32_t i = 0; i < dwords; i++)
622 p[i] = a[i] | b[i];
623
624 anv_state_flush(cmd_buffer->device, state);
625
626 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
627
628 return state;
629 }
630
631 struct anv_state
632 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
633 gl_shader_stage stage)
634 {
635 /* If we don't have this stage, bail. */
636 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
637 return (struct anv_state) { .offset = 0 };
638
639 struct anv_push_constants *data =
640 cmd_buffer->state.push_constants[stage];
641 const struct brw_stage_prog_data *prog_data =
642 cmd_buffer->state.pipeline->shaders[stage]->prog_data;
643
644 /* If we don't actually have any push constants, bail. */
645 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
646 return (struct anv_state) { .offset = 0 };
647
648 struct anv_state state =
649 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
650 prog_data->nr_params * sizeof(float),
651 32 /* bottom 5 bits MBZ */);
652
653 /* Walk through the param array and fill the buffer with data */
654 uint32_t *u32_map = state.map;
655 for (unsigned i = 0; i < prog_data->nr_params; i++) {
656 uint32_t offset = (uintptr_t)prog_data->param[i];
657 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
658 }
659
660 anv_state_flush(cmd_buffer->device, state);
661
662 return state;
663 }
664
665 struct anv_state
666 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
667 {
668 struct anv_push_constants *data =
669 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
670 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
671 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
672 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
673
674 /* If we don't actually have any push constants, bail. */
675 if (cs_prog_data->push.total.size == 0)
676 return (struct anv_state) { .offset = 0 };
677
678 const unsigned push_constant_alignment =
679 cmd_buffer->device->info.gen < 8 ? 32 : 64;
680 const unsigned aligned_total_push_constants_size =
681 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
682 struct anv_state state =
683 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
684 aligned_total_push_constants_size,
685 push_constant_alignment);
686
687 /* Walk through the param array and fill the buffer with data */
688 uint32_t *u32_map = state.map;
689
690 if (cs_prog_data->push.cross_thread.size > 0) {
691 assert(cs_prog_data->thread_local_id_index < 0 ||
692 cs_prog_data->thread_local_id_index >=
693 cs_prog_data->push.cross_thread.dwords);
694 for (unsigned i = 0;
695 i < cs_prog_data->push.cross_thread.dwords;
696 i++) {
697 uint32_t offset = (uintptr_t)prog_data->param[i];
698 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
699 }
700 }
701
702 if (cs_prog_data->push.per_thread.size > 0) {
703 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
704 unsigned dst =
705 8 * (cs_prog_data->push.per_thread.regs * t +
706 cs_prog_data->push.cross_thread.regs);
707 unsigned src = cs_prog_data->push.cross_thread.dwords;
708 for ( ; src < prog_data->nr_params; src++, dst++) {
709 if (src != cs_prog_data->thread_local_id_index) {
710 uint32_t offset = (uintptr_t)prog_data->param[src];
711 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
712 } else {
713 u32_map[dst] = t * cs_prog_data->simd_size;
714 }
715 }
716 }
717 }
718
719 anv_state_flush(cmd_buffer->device, state);
720
721 return state;
722 }
723
724 void anv_CmdPushConstants(
725 VkCommandBuffer commandBuffer,
726 VkPipelineLayout layout,
727 VkShaderStageFlags stageFlags,
728 uint32_t offset,
729 uint32_t size,
730 const void* pValues)
731 {
732 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
733
734 anv_foreach_stage(stage, stageFlags) {
735 VkResult result =
736 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer,
737 stage, client_data);
738 if (result != VK_SUCCESS)
739 return;
740
741 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
742 pValues, size);
743 }
744
745 cmd_buffer->state.push_constants_dirty |= stageFlags;
746 }
747
748 VkResult anv_CreateCommandPool(
749 VkDevice _device,
750 const VkCommandPoolCreateInfo* pCreateInfo,
751 const VkAllocationCallbacks* pAllocator,
752 VkCommandPool* pCmdPool)
753 {
754 ANV_FROM_HANDLE(anv_device, device, _device);
755 struct anv_cmd_pool *pool;
756
757 pool = vk_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
758 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
759 if (pool == NULL)
760 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
761
762 if (pAllocator)
763 pool->alloc = *pAllocator;
764 else
765 pool->alloc = device->alloc;
766
767 list_inithead(&pool->cmd_buffers);
768
769 *pCmdPool = anv_cmd_pool_to_handle(pool);
770
771 return VK_SUCCESS;
772 }
773
774 void anv_DestroyCommandPool(
775 VkDevice _device,
776 VkCommandPool commandPool,
777 const VkAllocationCallbacks* pAllocator)
778 {
779 ANV_FROM_HANDLE(anv_device, device, _device);
780 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
781
782 if (!pool)
783 return;
784
785 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
786 &pool->cmd_buffers, pool_link) {
787 anv_cmd_buffer_destroy(cmd_buffer);
788 }
789
790 vk_free2(&device->alloc, pAllocator, pool);
791 }
792
793 VkResult anv_ResetCommandPool(
794 VkDevice device,
795 VkCommandPool commandPool,
796 VkCommandPoolResetFlags flags)
797 {
798 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
799
800 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
801 &pool->cmd_buffers, pool_link) {
802 anv_cmd_buffer_reset(cmd_buffer);
803 }
804
805 return VK_SUCCESS;
806 }
807
808 void anv_TrimCommandPoolKHR(
809 VkDevice device,
810 VkCommandPool commandPool,
811 VkCommandPoolTrimFlagsKHR flags)
812 {
813 /* Nothing for us to do here. Our pools stay pretty tidy. */
814 }
815
816 /**
817 * Return NULL if the current subpass has no depthstencil attachment.
818 */
819 const struct anv_image_view *
820 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
821 {
822 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
823 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
824
825 if (subpass->depth_stencil_attachment.attachment == VK_ATTACHMENT_UNUSED)
826 return NULL;
827
828 const struct anv_image_view *iview =
829 fb->attachments[subpass->depth_stencil_attachment.attachment];
830
831 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
832 VK_IMAGE_ASPECT_STENCIL_BIT));
833
834 return iview;
835 }
836
837 void anv_CmdPushDescriptorSetKHR(
838 VkCommandBuffer commandBuffer,
839 VkPipelineBindPoint pipelineBindPoint,
840 VkPipelineLayout _layout,
841 uint32_t _set,
842 uint32_t descriptorWriteCount,
843 const VkWriteDescriptorSet* pDescriptorWrites)
844 {
845 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
846 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
847
848 assert(pipelineBindPoint == VK_PIPELINE_BIND_POINT_GRAPHICS ||
849 pipelineBindPoint == VK_PIPELINE_BIND_POINT_COMPUTE);
850 assert(_set < MAX_SETS);
851
852 const struct anv_descriptor_set_layout *set_layout =
853 layout->set[_set].layout;
854 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
855
856 set->layout = set_layout;
857 set->size = anv_descriptor_set_layout_size(set_layout);
858 set->buffer_count = set_layout->buffer_count;
859 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
860
861 /* Go through the user supplied descriptors. */
862 for (uint32_t i = 0; i < descriptorWriteCount; i++) {
863 const VkWriteDescriptorSet *write = &pDescriptorWrites[i];
864
865 switch (write->descriptorType) {
866 case VK_DESCRIPTOR_TYPE_SAMPLER:
867 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
868 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
869 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE:
870 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
871 for (uint32_t j = 0; j < write->descriptorCount; j++) {
872 anv_descriptor_set_write_image_view(set, &cmd_buffer->device->info,
873 write->pImageInfo + j,
874 write->descriptorType,
875 write->dstBinding,
876 write->dstArrayElement + j);
877 }
878 break;
879
880 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
881 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
882 for (uint32_t j = 0; j < write->descriptorCount; j++) {
883 ANV_FROM_HANDLE(anv_buffer_view, bview,
884 write->pTexelBufferView[j]);
885
886 anv_descriptor_set_write_buffer_view(set,
887 write->descriptorType,
888 bview,
889 write->dstBinding,
890 write->dstArrayElement + j);
891 }
892 break;
893
894 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
895 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
896 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
897 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
898 for (uint32_t j = 0; j < write->descriptorCount; j++) {
899 assert(write->pBufferInfo[j].buffer);
900 ANV_FROM_HANDLE(anv_buffer, buffer, write->pBufferInfo[j].buffer);
901 assert(buffer);
902
903 anv_descriptor_set_write_buffer(set,
904 cmd_buffer->device,
905 &cmd_buffer->surface_state_stream,
906 write->descriptorType,
907 buffer,
908 write->dstBinding,
909 write->dstArrayElement + j,
910 write->pBufferInfo[j].offset,
911 write->pBufferInfo[j].range);
912 }
913 break;
914
915 default:
916 break;
917 }
918 }
919
920 cmd_buffer->state.descriptors[_set] = set;
921 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
922 }
923
924 void anv_CmdPushDescriptorSetWithTemplateKHR(
925 VkCommandBuffer commandBuffer,
926 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate,
927 VkPipelineLayout _layout,
928 uint32_t _set,
929 const void* pData)
930 {
931 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
932 ANV_FROM_HANDLE(anv_descriptor_update_template, template,
933 descriptorUpdateTemplate);
934 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
935
936 assert(_set < MAX_PUSH_DESCRIPTORS);
937
938 const struct anv_descriptor_set_layout *set_layout =
939 layout->set[_set].layout;
940 struct anv_descriptor_set *set = &cmd_buffer->state.push_descriptor.set;
941
942 set->layout = set_layout;
943 set->size = anv_descriptor_set_layout_size(set_layout);
944 set->buffer_count = set_layout->buffer_count;
945 set->buffer_views = cmd_buffer->state.push_descriptor.buffer_views;
946
947 anv_descriptor_set_write_template(set,
948 cmd_buffer->device,
949 &cmd_buffer->surface_state_stream,
950 template,
951 pData);
952
953 cmd_buffer->state.descriptors[_set] = set;
954 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
955 }