anv/cmd_buffer: Move state base address re-emit into ExecuteCommands
[mesa.git] / src / intel / vulkan / anv_cmd_buffer.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31
32 #include "vk_format_info.h"
33
34 /** \file anv_cmd_buffer.c
35 *
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
41 */
42
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state = {
45 .viewport = {
46 .count = 0,
47 },
48 .scissor = {
49 .count = 0,
50 },
51 .line_width = 1.0f,
52 .depth_bias = {
53 .bias = 0.0f,
54 .clamp = 0.0f,
55 .slope = 0.0f,
56 },
57 .blend_constants = { 0.0f, 0.0f, 0.0f, 0.0f },
58 .depth_bounds = {
59 .min = 0.0f,
60 .max = 1.0f,
61 },
62 .stencil_compare_mask = {
63 .front = ~0u,
64 .back = ~0u,
65 },
66 .stencil_write_mask = {
67 .front = ~0u,
68 .back = ~0u,
69 },
70 .stencil_reference = {
71 .front = 0u,
72 .back = 0u,
73 },
74 };
75
76 void
77 anv_dynamic_state_copy(struct anv_dynamic_state *dest,
78 const struct anv_dynamic_state *src,
79 uint32_t copy_mask)
80 {
81 if (copy_mask & (1 << VK_DYNAMIC_STATE_VIEWPORT)) {
82 dest->viewport.count = src->viewport.count;
83 typed_memcpy(dest->viewport.viewports, src->viewport.viewports,
84 src->viewport.count);
85 }
86
87 if (copy_mask & (1 << VK_DYNAMIC_STATE_SCISSOR)) {
88 dest->scissor.count = src->scissor.count;
89 typed_memcpy(dest->scissor.scissors, src->scissor.scissors,
90 src->scissor.count);
91 }
92
93 if (copy_mask & (1 << VK_DYNAMIC_STATE_LINE_WIDTH))
94 dest->line_width = src->line_width;
95
96 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BIAS))
97 dest->depth_bias = src->depth_bias;
98
99 if (copy_mask & (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS))
100 typed_memcpy(dest->blend_constants, src->blend_constants, 4);
101
102 if (copy_mask & (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS))
103 dest->depth_bounds = src->depth_bounds;
104
105 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK))
106 dest->stencil_compare_mask = src->stencil_compare_mask;
107
108 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK))
109 dest->stencil_write_mask = src->stencil_write_mask;
110
111 if (copy_mask & (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE))
112 dest->stencil_reference = src->stencil_reference;
113 }
114
115 static void
116 anv_cmd_state_reset(struct anv_cmd_buffer *cmd_buffer)
117 {
118 struct anv_cmd_state *state = &cmd_buffer->state;
119
120 memset(&state->descriptors, 0, sizeof(state->descriptors));
121 memset(&state->push_constants, 0, sizeof(state->push_constants));
122 memset(state->binding_tables, 0, sizeof(state->binding_tables));
123 memset(state->samplers, 0, sizeof(state->samplers));
124
125 /* 0 isn't a valid config. This ensures that we always configure L3$. */
126 cmd_buffer->state.current_l3_config = 0;
127
128 state->dirty = 0;
129 state->vb_dirty = 0;
130 state->pending_pipe_bits = 0;
131 state->descriptors_dirty = 0;
132 state->push_constants_dirty = 0;
133 state->pipeline = NULL;
134 state->push_constant_stages = 0;
135 state->restart_index = UINT32_MAX;
136 state->dynamic = default_dynamic_state;
137 state->need_query_wa = true;
138
139 if (state->attachments != NULL) {
140 anv_free(&cmd_buffer->pool->alloc, state->attachments);
141 state->attachments = NULL;
142 }
143
144 state->gen7.index_buffer = NULL;
145 }
146
147 /**
148 * Setup anv_cmd_state::attachments for vkCmdBeginRenderPass.
149 */
150 void
151 anv_cmd_state_setup_attachments(struct anv_cmd_buffer *cmd_buffer,
152 const VkRenderPassBeginInfo *info)
153 {
154 struct anv_cmd_state *state = &cmd_buffer->state;
155 ANV_FROM_HANDLE(anv_render_pass, pass, info->renderPass);
156
157 anv_free(&cmd_buffer->pool->alloc, state->attachments);
158
159 if (pass->attachment_count == 0) {
160 state->attachments = NULL;
161 return;
162 }
163
164 state->attachments = anv_alloc(&cmd_buffer->pool->alloc,
165 pass->attachment_count *
166 sizeof(state->attachments[0]),
167 8, VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
168 if (state->attachments == NULL) {
169 /* FIXME: Propagate VK_ERROR_OUT_OF_HOST_MEMORY to vkEndCommandBuffer */
170 abort();
171 }
172
173 for (uint32_t i = 0; i < pass->attachment_count; ++i) {
174 struct anv_render_pass_attachment *att = &pass->attachments[i];
175 VkImageAspectFlags att_aspects = vk_format_aspects(att->format);
176 VkImageAspectFlags clear_aspects = 0;
177
178 if (att_aspects == VK_IMAGE_ASPECT_COLOR_BIT) {
179 /* color attachment */
180 if (att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
181 clear_aspects |= VK_IMAGE_ASPECT_COLOR_BIT;
182 }
183 } else {
184 /* depthstencil attachment */
185 if ((att_aspects & VK_IMAGE_ASPECT_DEPTH_BIT) &&
186 att->load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
187 clear_aspects |= VK_IMAGE_ASPECT_DEPTH_BIT;
188 }
189 if ((att_aspects & VK_IMAGE_ASPECT_STENCIL_BIT) &&
190 att->stencil_load_op == VK_ATTACHMENT_LOAD_OP_CLEAR) {
191 clear_aspects |= VK_IMAGE_ASPECT_STENCIL_BIT;
192 }
193 }
194
195 state->attachments[i].pending_clear_aspects = clear_aspects;
196 if (clear_aspects) {
197 assert(info->clearValueCount > i);
198 state->attachments[i].clear_value = info->pClearValues[i];
199 }
200 }
201 }
202
203 static VkResult
204 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer *cmd_buffer,
205 gl_shader_stage stage, uint32_t size)
206 {
207 struct anv_push_constants **ptr = &cmd_buffer->state.push_constants[stage];
208
209 if (*ptr == NULL) {
210 *ptr = anv_alloc(&cmd_buffer->pool->alloc, size, 8,
211 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
212 if (*ptr == NULL)
213 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
214 } else if ((*ptr)->size < size) {
215 *ptr = anv_realloc(&cmd_buffer->pool->alloc, *ptr, size, 8,
216 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
217 if (*ptr == NULL)
218 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
219 }
220 (*ptr)->size = size;
221
222 return VK_SUCCESS;
223 }
224
225 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
226 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
227 (offsetof(struct anv_push_constants, field) + \
228 sizeof(cmd_buffer->state.push_constants[0]->field)))
229
230 static VkResult anv_create_cmd_buffer(
231 struct anv_device * device,
232 struct anv_cmd_pool * pool,
233 VkCommandBufferLevel level,
234 VkCommandBuffer* pCommandBuffer)
235 {
236 struct anv_cmd_buffer *cmd_buffer;
237 VkResult result;
238
239 cmd_buffer = anv_alloc(&pool->alloc, sizeof(*cmd_buffer), 8,
240 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
241 if (cmd_buffer == NULL)
242 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
243
244 cmd_buffer->_loader_data.loaderMagic = ICD_LOADER_MAGIC;
245 cmd_buffer->device = device;
246 cmd_buffer->pool = pool;
247 cmd_buffer->level = level;
248 cmd_buffer->state.attachments = NULL;
249
250 result = anv_cmd_buffer_init_batch_bo_chain(cmd_buffer);
251 if (result != VK_SUCCESS)
252 goto fail;
253
254 anv_state_stream_init(&cmd_buffer->surface_state_stream,
255 &device->surface_state_block_pool);
256 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
257 &device->dynamic_state_block_pool);
258
259 if (pool) {
260 list_addtail(&cmd_buffer->pool_link, &pool->cmd_buffers);
261 } else {
262 /* Init the pool_link so we can safefly call list_del when we destroy
263 * the command buffer
264 */
265 list_inithead(&cmd_buffer->pool_link);
266 }
267
268 *pCommandBuffer = anv_cmd_buffer_to_handle(cmd_buffer);
269
270 return VK_SUCCESS;
271
272 fail:
273 anv_free(&cmd_buffer->pool->alloc, cmd_buffer);
274
275 return result;
276 }
277
278 VkResult anv_AllocateCommandBuffers(
279 VkDevice _device,
280 const VkCommandBufferAllocateInfo* pAllocateInfo,
281 VkCommandBuffer* pCommandBuffers)
282 {
283 ANV_FROM_HANDLE(anv_device, device, _device);
284 ANV_FROM_HANDLE(anv_cmd_pool, pool, pAllocateInfo->commandPool);
285
286 VkResult result = VK_SUCCESS;
287 uint32_t i;
288
289 for (i = 0; i < pAllocateInfo->commandBufferCount; i++) {
290 result = anv_create_cmd_buffer(device, pool, pAllocateInfo->level,
291 &pCommandBuffers[i]);
292 if (result != VK_SUCCESS)
293 break;
294 }
295
296 if (result != VK_SUCCESS)
297 anv_FreeCommandBuffers(_device, pAllocateInfo->commandPool,
298 i, pCommandBuffers);
299
300 return result;
301 }
302
303 static void
304 anv_cmd_buffer_destroy(struct anv_cmd_buffer *cmd_buffer)
305 {
306 list_del(&cmd_buffer->pool_link);
307
308 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer);
309
310 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
311 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
312
313 anv_free(&cmd_buffer->pool->alloc, cmd_buffer->state.attachments);
314 anv_free(&cmd_buffer->pool->alloc, cmd_buffer);
315 }
316
317 void anv_FreeCommandBuffers(
318 VkDevice device,
319 VkCommandPool commandPool,
320 uint32_t commandBufferCount,
321 const VkCommandBuffer* pCommandBuffers)
322 {
323 for (uint32_t i = 0; i < commandBufferCount; i++) {
324 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, pCommandBuffers[i]);
325
326 anv_cmd_buffer_destroy(cmd_buffer);
327 }
328 }
329
330 static VkResult
331 anv_cmd_buffer_reset(struct anv_cmd_buffer *cmd_buffer)
332 {
333 cmd_buffer->usage_flags = 0;
334 cmd_buffer->state.current_pipeline = UINT32_MAX;
335 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer);
336 anv_cmd_state_reset(cmd_buffer);
337
338 anv_state_stream_finish(&cmd_buffer->surface_state_stream);
339 anv_state_stream_init(&cmd_buffer->surface_state_stream,
340 &cmd_buffer->device->surface_state_block_pool);
341
342 anv_state_stream_finish(&cmd_buffer->dynamic_state_stream);
343 anv_state_stream_init(&cmd_buffer->dynamic_state_stream,
344 &cmd_buffer->device->dynamic_state_block_pool);
345 return VK_SUCCESS;
346 }
347
348 VkResult anv_ResetCommandBuffer(
349 VkCommandBuffer commandBuffer,
350 VkCommandBufferResetFlags flags)
351 {
352 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
353 return anv_cmd_buffer_reset(cmd_buffer);
354 }
355
356 void
357 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer *cmd_buffer)
358 {
359 switch (cmd_buffer->device->info.gen) {
360 case 7:
361 if (cmd_buffer->device->info.is_haswell)
362 return gen75_cmd_buffer_emit_state_base_address(cmd_buffer);
363 else
364 return gen7_cmd_buffer_emit_state_base_address(cmd_buffer);
365 case 8:
366 return gen8_cmd_buffer_emit_state_base_address(cmd_buffer);
367 case 9:
368 return gen9_cmd_buffer_emit_state_base_address(cmd_buffer);
369 default:
370 unreachable("unsupported gen\n");
371 }
372 }
373
374 VkResult anv_BeginCommandBuffer(
375 VkCommandBuffer commandBuffer,
376 const VkCommandBufferBeginInfo* pBeginInfo)
377 {
378 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
379
380 /* If this is the first vkBeginCommandBuffer, we must *initialize* the
381 * command buffer's state. Otherwise, we must *reset* its state. In both
382 * cases we reset it.
383 *
384 * From the Vulkan 1.0 spec:
385 *
386 * If a command buffer is in the executable state and the command buffer
387 * was allocated from a command pool with the
388 * VK_COMMAND_POOL_CREATE_RESET_COMMAND_BUFFER_BIT flag set, then
389 * vkBeginCommandBuffer implicitly resets the command buffer, behaving
390 * as if vkResetCommandBuffer had been called with
391 * VK_COMMAND_BUFFER_RESET_RELEASE_RESOURCES_BIT not set. It then puts
392 * the command buffer in the recording state.
393 */
394 anv_cmd_buffer_reset(cmd_buffer);
395
396 cmd_buffer->usage_flags = pBeginInfo->flags;
397
398 assert(cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY ||
399 !(cmd_buffer->usage_flags & VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT));
400
401 anv_cmd_buffer_emit_state_base_address(cmd_buffer);
402
403 if (cmd_buffer->usage_flags &
404 VK_COMMAND_BUFFER_USAGE_RENDER_PASS_CONTINUE_BIT) {
405 cmd_buffer->state.framebuffer =
406 anv_framebuffer_from_handle(pBeginInfo->pInheritanceInfo->framebuffer);
407 cmd_buffer->state.pass =
408 anv_render_pass_from_handle(pBeginInfo->pInheritanceInfo->renderPass);
409 cmd_buffer->state.subpass =
410 &cmd_buffer->state.pass->subpasses[pBeginInfo->pInheritanceInfo->subpass];
411
412 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_RENDER_TARGETS;
413 }
414
415 return VK_SUCCESS;
416 }
417
418 VkResult anv_EndCommandBuffer(
419 VkCommandBuffer commandBuffer)
420 {
421 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
422 struct anv_device *device = cmd_buffer->device;
423
424 anv_cmd_buffer_end_batch_buffer(cmd_buffer);
425
426 if (cmd_buffer->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY) {
427 /* The algorithm used to compute the validate list is not threadsafe as
428 * it uses the bo->index field. We have to lock the device around it.
429 * Fortunately, the chances for contention here are probably very low.
430 */
431 pthread_mutex_lock(&device->mutex);
432 anv_cmd_buffer_prepare_execbuf(cmd_buffer);
433 pthread_mutex_unlock(&device->mutex);
434 }
435
436 return VK_SUCCESS;
437 }
438
439 void anv_CmdBindPipeline(
440 VkCommandBuffer commandBuffer,
441 VkPipelineBindPoint pipelineBindPoint,
442 VkPipeline _pipeline)
443 {
444 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
445 ANV_FROM_HANDLE(anv_pipeline, pipeline, _pipeline);
446
447 switch (pipelineBindPoint) {
448 case VK_PIPELINE_BIND_POINT_COMPUTE:
449 cmd_buffer->state.compute_pipeline = pipeline;
450 cmd_buffer->state.compute_dirty |= ANV_CMD_DIRTY_PIPELINE;
451 cmd_buffer->state.push_constants_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
452 cmd_buffer->state.descriptors_dirty |= VK_SHADER_STAGE_COMPUTE_BIT;
453 break;
454
455 case VK_PIPELINE_BIND_POINT_GRAPHICS:
456 cmd_buffer->state.pipeline = pipeline;
457 cmd_buffer->state.vb_dirty |= pipeline->vb_used;
458 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_PIPELINE;
459 cmd_buffer->state.push_constants_dirty |= pipeline->active_stages;
460 cmd_buffer->state.descriptors_dirty |= pipeline->active_stages;
461
462 /* Apply the dynamic state from the pipeline */
463 cmd_buffer->state.dirty |= pipeline->dynamic_state_mask;
464 anv_dynamic_state_copy(&cmd_buffer->state.dynamic,
465 &pipeline->dynamic_state,
466 pipeline->dynamic_state_mask);
467 break;
468
469 default:
470 assert(!"invalid bind point");
471 break;
472 }
473 }
474
475 void anv_CmdSetViewport(
476 VkCommandBuffer commandBuffer,
477 uint32_t firstViewport,
478 uint32_t viewportCount,
479 const VkViewport* pViewports)
480 {
481 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
482
483 const uint32_t total_count = firstViewport + viewportCount;
484 if (cmd_buffer->state.dynamic.viewport.count < total_count)
485 cmd_buffer->state.dynamic.viewport.count = total_count;
486
487 memcpy(cmd_buffer->state.dynamic.viewport.viewports + firstViewport,
488 pViewports, viewportCount * sizeof(*pViewports));
489
490 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT;
491 }
492
493 void anv_CmdSetScissor(
494 VkCommandBuffer commandBuffer,
495 uint32_t firstScissor,
496 uint32_t scissorCount,
497 const VkRect2D* pScissors)
498 {
499 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
500
501 const uint32_t total_count = firstScissor + scissorCount;
502 if (cmd_buffer->state.dynamic.scissor.count < total_count)
503 cmd_buffer->state.dynamic.scissor.count = total_count;
504
505 memcpy(cmd_buffer->state.dynamic.scissor.scissors + firstScissor,
506 pScissors, scissorCount * sizeof(*pScissors));
507
508 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_SCISSOR;
509 }
510
511 void anv_CmdSetLineWidth(
512 VkCommandBuffer commandBuffer,
513 float lineWidth)
514 {
515 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
516
517 cmd_buffer->state.dynamic.line_width = lineWidth;
518 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH;
519 }
520
521 void anv_CmdSetDepthBias(
522 VkCommandBuffer commandBuffer,
523 float depthBiasConstantFactor,
524 float depthBiasClamp,
525 float depthBiasSlopeFactor)
526 {
527 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
528
529 cmd_buffer->state.dynamic.depth_bias.bias = depthBiasConstantFactor;
530 cmd_buffer->state.dynamic.depth_bias.clamp = depthBiasClamp;
531 cmd_buffer->state.dynamic.depth_bias.slope = depthBiasSlopeFactor;
532
533 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS;
534 }
535
536 void anv_CmdSetBlendConstants(
537 VkCommandBuffer commandBuffer,
538 const float blendConstants[4])
539 {
540 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
541
542 memcpy(cmd_buffer->state.dynamic.blend_constants,
543 blendConstants, sizeof(float) * 4);
544
545 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS;
546 }
547
548 void anv_CmdSetDepthBounds(
549 VkCommandBuffer commandBuffer,
550 float minDepthBounds,
551 float maxDepthBounds)
552 {
553 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
554
555 cmd_buffer->state.dynamic.depth_bounds.min = minDepthBounds;
556 cmd_buffer->state.dynamic.depth_bounds.max = maxDepthBounds;
557
558 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS;
559 }
560
561 void anv_CmdSetStencilCompareMask(
562 VkCommandBuffer commandBuffer,
563 VkStencilFaceFlags faceMask,
564 uint32_t compareMask)
565 {
566 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
567
568 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
569 cmd_buffer->state.dynamic.stencil_compare_mask.front = compareMask;
570 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
571 cmd_buffer->state.dynamic.stencil_compare_mask.back = compareMask;
572
573 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK;
574 }
575
576 void anv_CmdSetStencilWriteMask(
577 VkCommandBuffer commandBuffer,
578 VkStencilFaceFlags faceMask,
579 uint32_t writeMask)
580 {
581 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
582
583 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
584 cmd_buffer->state.dynamic.stencil_write_mask.front = writeMask;
585 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
586 cmd_buffer->state.dynamic.stencil_write_mask.back = writeMask;
587
588 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK;
589 }
590
591 void anv_CmdSetStencilReference(
592 VkCommandBuffer commandBuffer,
593 VkStencilFaceFlags faceMask,
594 uint32_t reference)
595 {
596 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
597
598 if (faceMask & VK_STENCIL_FACE_FRONT_BIT)
599 cmd_buffer->state.dynamic.stencil_reference.front = reference;
600 if (faceMask & VK_STENCIL_FACE_BACK_BIT)
601 cmd_buffer->state.dynamic.stencil_reference.back = reference;
602
603 cmd_buffer->state.dirty |= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE;
604 }
605
606 void anv_CmdBindDescriptorSets(
607 VkCommandBuffer commandBuffer,
608 VkPipelineBindPoint pipelineBindPoint,
609 VkPipelineLayout _layout,
610 uint32_t firstSet,
611 uint32_t descriptorSetCount,
612 const VkDescriptorSet* pDescriptorSets,
613 uint32_t dynamicOffsetCount,
614 const uint32_t* pDynamicOffsets)
615 {
616 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
617 ANV_FROM_HANDLE(anv_pipeline_layout, layout, _layout);
618 struct anv_descriptor_set_layout *set_layout;
619
620 assert(firstSet + descriptorSetCount < MAX_SETS);
621
622 for (uint32_t i = 0; i < descriptorSetCount; i++) {
623 ANV_FROM_HANDLE(anv_descriptor_set, set, pDescriptorSets[i]);
624 set_layout = layout->set[firstSet + i].layout;
625
626 if (cmd_buffer->state.descriptors[firstSet + i] != set) {
627 cmd_buffer->state.descriptors[firstSet + i] = set;
628 cmd_buffer->state.descriptors_dirty |= set_layout->shader_stages;
629 }
630
631 if (set_layout->dynamic_offset_count > 0) {
632 anv_foreach_stage(s, set_layout->shader_stages) {
633 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, s, dynamic);
634
635 struct anv_push_constants *push =
636 cmd_buffer->state.push_constants[s];
637
638 unsigned d = layout->set[firstSet + i].dynamic_offset_start;
639 const uint32_t *offsets = pDynamicOffsets;
640 struct anv_descriptor *desc = set->descriptors;
641
642 for (unsigned b = 0; b < set_layout->binding_count; b++) {
643 if (set_layout->binding[b].dynamic_offset_index < 0)
644 continue;
645
646 unsigned array_size = set_layout->binding[b].array_size;
647 for (unsigned j = 0; j < array_size; j++) {
648 push->dynamic[d].offset = *(offsets++);
649 push->dynamic[d].range = (desc->buffer_view) ?
650 desc->buffer_view->range : 0;
651 desc++;
652 d++;
653 }
654 }
655 }
656 cmd_buffer->state.push_constants_dirty |= set_layout->shader_stages;
657 }
658 }
659 }
660
661 void anv_CmdBindVertexBuffers(
662 VkCommandBuffer commandBuffer,
663 uint32_t firstBinding,
664 uint32_t bindingCount,
665 const VkBuffer* pBuffers,
666 const VkDeviceSize* pOffsets)
667 {
668 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
669 struct anv_vertex_binding *vb = cmd_buffer->state.vertex_bindings;
670
671 /* We have to defer setting up vertex buffer since we need the buffer
672 * stride from the pipeline. */
673
674 assert(firstBinding + bindingCount < MAX_VBS);
675 for (uint32_t i = 0; i < bindingCount; i++) {
676 vb[firstBinding + i].buffer = anv_buffer_from_handle(pBuffers[i]);
677 vb[firstBinding + i].offset = pOffsets[i];
678 cmd_buffer->state.vb_dirty |= 1 << (firstBinding + i);
679 }
680 }
681
682 static void
683 add_surface_state_reloc(struct anv_cmd_buffer *cmd_buffer,
684 struct anv_state state, struct anv_bo *bo, uint32_t offset)
685 {
686 /* The address goes in SURFACE_STATE dword 1 for gens < 8 and dwords 8 and
687 * 9 for gen8+. We only write the first dword for gen8+ here and rely on
688 * the initial state to set the high bits to 0. */
689
690 const uint32_t dword = cmd_buffer->device->info.gen < 8 ? 1 : 8;
691
692 anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc,
693 state.offset + dword * 4, bo, offset);
694 }
695
696 enum isl_format
697 anv_isl_format_for_descriptor_type(VkDescriptorType type)
698 {
699 switch (type) {
700 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
701 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
702 return ISL_FORMAT_R32G32B32A32_FLOAT;
703
704 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
705 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
706 return ISL_FORMAT_RAW;
707
708 default:
709 unreachable("Invalid descriptor type");
710 }
711 }
712
713 static struct anv_state
714 anv_cmd_buffer_alloc_null_surface_state(struct anv_cmd_buffer *cmd_buffer,
715 struct anv_framebuffer *fb)
716 {
717 switch (cmd_buffer->device->info.gen) {
718 case 7:
719 if (cmd_buffer->device->info.is_haswell) {
720 return gen75_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb);
721 } else {
722 return gen7_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb);
723 }
724 case 8:
725 return gen8_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb);
726 case 9:
727 return gen9_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb);
728 default:
729 unreachable("Invalid hardware generation");
730 }
731 }
732
733 VkResult
734 anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer *cmd_buffer,
735 gl_shader_stage stage,
736 struct anv_state *bt_state)
737 {
738 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
739 struct anv_subpass *subpass = cmd_buffer->state.subpass;
740 struct anv_pipeline *pipeline;
741 uint32_t bias, state_offset;
742
743 switch (stage) {
744 case MESA_SHADER_COMPUTE:
745 pipeline = cmd_buffer->state.compute_pipeline;
746 bias = 1;
747 break;
748 default:
749 pipeline = cmd_buffer->state.pipeline;
750 bias = 0;
751 break;
752 }
753
754 if (!anv_pipeline_has_stage(pipeline, stage)) {
755 *bt_state = (struct anv_state) { 0, };
756 return VK_SUCCESS;
757 }
758
759 struct anv_pipeline_bind_map *map = &pipeline->shaders[stage]->bind_map;
760 if (bias + map->surface_count == 0) {
761 *bt_state = (struct anv_state) { 0, };
762 return VK_SUCCESS;
763 }
764
765 *bt_state = anv_cmd_buffer_alloc_binding_table(cmd_buffer,
766 bias + map->surface_count,
767 &state_offset);
768 uint32_t *bt_map = bt_state->map;
769
770 if (bt_state->map == NULL)
771 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
772
773 if (stage == MESA_SHADER_COMPUTE &&
774 get_cs_prog_data(cmd_buffer->state.compute_pipeline)->uses_num_work_groups) {
775 struct anv_bo *bo = cmd_buffer->state.num_workgroups_bo;
776 uint32_t bo_offset = cmd_buffer->state.num_workgroups_offset;
777
778 struct anv_state surface_state;
779 surface_state =
780 anv_cmd_buffer_alloc_surface_state(cmd_buffer);
781
782 const enum isl_format format =
783 anv_isl_format_for_descriptor_type(VK_DESCRIPTOR_TYPE_STORAGE_BUFFER);
784 anv_fill_buffer_surface_state(cmd_buffer->device, surface_state,
785 format, bo_offset, 12, 1);
786
787 bt_map[0] = surface_state.offset + state_offset;
788 add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset);
789 }
790
791 if (map->surface_count == 0)
792 goto out;
793
794 if (map->image_count > 0) {
795 VkResult result =
796 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, images);
797 if (result != VK_SUCCESS)
798 return result;
799
800 cmd_buffer->state.push_constants_dirty |= 1 << stage;
801 }
802
803 uint32_t image = 0;
804 for (uint32_t s = 0; s < map->surface_count; s++) {
805 struct anv_pipeline_binding *binding = &map->surface_to_descriptor[s];
806
807 struct anv_state surface_state;
808 struct anv_bo *bo;
809 uint32_t bo_offset;
810
811 if (binding->set == ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS) {
812 /* Color attachment binding */
813 assert(stage == MESA_SHADER_FRAGMENT);
814 assert(binding->binding == 0);
815 if (binding->index < subpass->color_count) {
816 const struct anv_image_view *iview =
817 fb->attachments[subpass->color_attachments[binding->index]];
818
819 assert(iview->color_rt_surface_state.alloc_size);
820 surface_state = iview->color_rt_surface_state;
821 add_surface_state_reloc(cmd_buffer, iview->color_rt_surface_state,
822 iview->bo, iview->offset);
823 } else {
824 /* Null render target */
825 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
826 surface_state =
827 anv_cmd_buffer_alloc_null_surface_state(cmd_buffer, fb);
828 }
829
830 bt_map[bias + s] = surface_state.offset + state_offset;
831 continue;
832 }
833
834 struct anv_descriptor_set *set =
835 cmd_buffer->state.descriptors[binding->set];
836 uint32_t offset = set->layout->binding[binding->binding].descriptor_index;
837 struct anv_descriptor *desc = &set->descriptors[offset + binding->index];
838
839 switch (desc->type) {
840 case VK_DESCRIPTOR_TYPE_SAMPLER:
841 /* Nothing for us to do here */
842 continue;
843
844 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER:
845 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE:
846 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT:
847 surface_state = desc->image_view->sampler_surface_state;
848 assert(surface_state.alloc_size);
849 bo = desc->image_view->bo;
850 bo_offset = desc->image_view->offset;
851 break;
852
853 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE: {
854 surface_state = desc->image_view->storage_surface_state;
855 assert(surface_state.alloc_size);
856 bo = desc->image_view->bo;
857 bo_offset = desc->image_view->offset;
858
859 struct brw_image_param *image_param =
860 &cmd_buffer->state.push_constants[stage]->images[image++];
861
862 *image_param = desc->image_view->storage_image_param;
863 image_param->surface_idx = bias + s;
864 break;
865 }
866
867 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER:
868 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER:
869 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC:
870 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC:
871 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER:
872 surface_state = desc->buffer_view->surface_state;
873 assert(surface_state.alloc_size);
874 bo = desc->buffer_view->bo;
875 bo_offset = desc->buffer_view->offset;
876 break;
877
878 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER:
879 surface_state = desc->buffer_view->storage_surface_state;
880 assert(surface_state.alloc_size);
881 bo = desc->buffer_view->bo;
882 bo_offset = desc->buffer_view->offset;
883
884 struct brw_image_param *image_param =
885 &cmd_buffer->state.push_constants[stage]->images[image++];
886
887 *image_param = desc->buffer_view->storage_image_param;
888 image_param->surface_idx = bias + s;
889 break;
890
891 default:
892 assert(!"Invalid descriptor type");
893 continue;
894 }
895
896 bt_map[bias + s] = surface_state.offset + state_offset;
897 add_surface_state_reloc(cmd_buffer, surface_state, bo, bo_offset);
898 }
899 assert(image == map->image_count);
900
901 out:
902 if (!cmd_buffer->device->info.has_llc)
903 anv_state_clflush(*bt_state);
904
905 return VK_SUCCESS;
906 }
907
908 VkResult
909 anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer *cmd_buffer,
910 gl_shader_stage stage, struct anv_state *state)
911 {
912 struct anv_pipeline *pipeline;
913
914 if (stage == MESA_SHADER_COMPUTE)
915 pipeline = cmd_buffer->state.compute_pipeline;
916 else
917 pipeline = cmd_buffer->state.pipeline;
918
919 if (!anv_pipeline_has_stage(pipeline, stage)) {
920 *state = (struct anv_state) { 0, };
921 return VK_SUCCESS;
922 }
923
924 struct anv_pipeline_bind_map *map = &pipeline->shaders[stage]->bind_map;
925 if (map->sampler_count == 0) {
926 *state = (struct anv_state) { 0, };
927 return VK_SUCCESS;
928 }
929
930 uint32_t size = map->sampler_count * 16;
931 *state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 32);
932
933 if (state->map == NULL)
934 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
935
936 for (uint32_t s = 0; s < map->sampler_count; s++) {
937 struct anv_pipeline_binding *binding = &map->sampler_to_descriptor[s];
938 struct anv_descriptor_set *set =
939 cmd_buffer->state.descriptors[binding->set];
940 uint32_t offset = set->layout->binding[binding->binding].descriptor_index;
941 struct anv_descriptor *desc = &set->descriptors[offset + binding->index];
942
943 if (desc->type != VK_DESCRIPTOR_TYPE_SAMPLER &&
944 desc->type != VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER)
945 continue;
946
947 struct anv_sampler *sampler = desc->sampler;
948
949 /* This can happen if we have an unfilled slot since TYPE_SAMPLER
950 * happens to be zero.
951 */
952 if (sampler == NULL)
953 continue;
954
955 memcpy(state->map + (s * 16),
956 sampler->state, sizeof(sampler->state));
957 }
958
959 if (!cmd_buffer->device->info.has_llc)
960 anv_state_clflush(*state);
961
962 return VK_SUCCESS;
963 }
964
965 uint32_t
966 anv_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer *cmd_buffer)
967 {
968 VkShaderStageFlags dirty = cmd_buffer->state.descriptors_dirty &
969 cmd_buffer->state.pipeline->active_stages;
970
971 VkResult result = VK_SUCCESS;
972 anv_foreach_stage(s, dirty) {
973 result = anv_cmd_buffer_emit_samplers(cmd_buffer, s,
974 &cmd_buffer->state.samplers[s]);
975 if (result != VK_SUCCESS)
976 break;
977 result = anv_cmd_buffer_emit_binding_table(cmd_buffer, s,
978 &cmd_buffer->state.binding_tables[s]);
979 if (result != VK_SUCCESS)
980 break;
981 }
982
983 if (result != VK_SUCCESS) {
984 assert(result == VK_ERROR_OUT_OF_DEVICE_MEMORY);
985
986 result = anv_cmd_buffer_new_binding_table_block(cmd_buffer);
987 assert(result == VK_SUCCESS);
988
989 /* Re-emit state base addresses so we get the new surface state base
990 * address before we start emitting binding tables etc.
991 */
992 anv_cmd_buffer_emit_state_base_address(cmd_buffer);
993
994 /* Re-emit all active binding tables */
995 dirty |= cmd_buffer->state.pipeline->active_stages;
996 anv_foreach_stage(s, dirty) {
997 result = anv_cmd_buffer_emit_samplers(cmd_buffer, s,
998 &cmd_buffer->state.samplers[s]);
999 if (result != VK_SUCCESS)
1000 return result;
1001 result = anv_cmd_buffer_emit_binding_table(cmd_buffer, s,
1002 &cmd_buffer->state.binding_tables[s]);
1003 if (result != VK_SUCCESS)
1004 return result;
1005 }
1006 }
1007
1008 cmd_buffer->state.descriptors_dirty &= ~dirty;
1009
1010 return dirty;
1011 }
1012
1013 struct anv_state
1014 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer *cmd_buffer,
1015 const void *data, uint32_t size, uint32_t alignment)
1016 {
1017 struct anv_state state;
1018
1019 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
1020 memcpy(state.map, data, size);
1021
1022 if (!cmd_buffer->device->info.has_llc)
1023 anv_state_clflush(state);
1024
1025 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state.map, size));
1026
1027 return state;
1028 }
1029
1030 struct anv_state
1031 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer *cmd_buffer,
1032 uint32_t *a, uint32_t *b,
1033 uint32_t dwords, uint32_t alignment)
1034 {
1035 struct anv_state state;
1036 uint32_t *p;
1037
1038 state = anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
1039 dwords * 4, alignment);
1040 p = state.map;
1041 for (uint32_t i = 0; i < dwords; i++)
1042 p[i] = a[i] | b[i];
1043
1044 if (!cmd_buffer->device->info.has_llc)
1045 anv_state_clflush(state);
1046
1047 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p, dwords * 4));
1048
1049 return state;
1050 }
1051
1052 struct anv_state
1053 anv_cmd_buffer_push_constants(struct anv_cmd_buffer *cmd_buffer,
1054 gl_shader_stage stage)
1055 {
1056 /* If we don't have this stage, bail. */
1057 if (!anv_pipeline_has_stage(cmd_buffer->state.pipeline, stage))
1058 return (struct anv_state) { .offset = 0 };
1059
1060 struct anv_push_constants *data =
1061 cmd_buffer->state.push_constants[stage];
1062 const struct brw_stage_prog_data *prog_data =
1063 anv_shader_bin_get_prog_data(cmd_buffer->state.pipeline->shaders[stage]);
1064
1065 /* If we don't actually have any push constants, bail. */
1066 if (data == NULL || prog_data == NULL || prog_data->nr_params == 0)
1067 return (struct anv_state) { .offset = 0 };
1068
1069 struct anv_state state =
1070 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
1071 prog_data->nr_params * sizeof(float),
1072 32 /* bottom 5 bits MBZ */);
1073
1074 /* Walk through the param array and fill the buffer with data */
1075 uint32_t *u32_map = state.map;
1076 for (unsigned i = 0; i < prog_data->nr_params; i++) {
1077 uint32_t offset = (uintptr_t)prog_data->param[i];
1078 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
1079 }
1080
1081 if (!cmd_buffer->device->info.has_llc)
1082 anv_state_clflush(state);
1083
1084 return state;
1085 }
1086
1087 struct anv_state
1088 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
1089 {
1090 struct anv_push_constants *data =
1091 cmd_buffer->state.push_constants[MESA_SHADER_COMPUTE];
1092 struct anv_pipeline *pipeline = cmd_buffer->state.compute_pipeline;
1093 const struct brw_cs_prog_data *cs_prog_data = get_cs_prog_data(pipeline);
1094 const struct brw_stage_prog_data *prog_data = &cs_prog_data->base;
1095
1096 /* If we don't actually have any push constants, bail. */
1097 if (cs_prog_data->push.total.size == 0)
1098 return (struct anv_state) { .offset = 0 };
1099
1100 const unsigned push_constant_alignment =
1101 cmd_buffer->device->info.gen < 8 ? 32 : 64;
1102 const unsigned aligned_total_push_constants_size =
1103 ALIGN(cs_prog_data->push.total.size, push_constant_alignment);
1104 struct anv_state state =
1105 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer,
1106 aligned_total_push_constants_size,
1107 push_constant_alignment);
1108
1109 /* Walk through the param array and fill the buffer with data */
1110 uint32_t *u32_map = state.map;
1111
1112 if (cs_prog_data->push.cross_thread.size > 0) {
1113 assert(cs_prog_data->thread_local_id_index < 0 ||
1114 cs_prog_data->thread_local_id_index >=
1115 cs_prog_data->push.cross_thread.dwords);
1116 for (unsigned i = 0;
1117 i < cs_prog_data->push.cross_thread.dwords;
1118 i++) {
1119 uint32_t offset = (uintptr_t)prog_data->param[i];
1120 u32_map[i] = *(uint32_t *)((uint8_t *)data + offset);
1121 }
1122 }
1123
1124 if (cs_prog_data->push.per_thread.size > 0) {
1125 for (unsigned t = 0; t < cs_prog_data->threads; t++) {
1126 unsigned dst =
1127 8 * (cs_prog_data->push.per_thread.regs * t +
1128 cs_prog_data->push.cross_thread.regs);
1129 unsigned src = cs_prog_data->push.cross_thread.dwords;
1130 for ( ; src < prog_data->nr_params; src++, dst++) {
1131 if (src != cs_prog_data->thread_local_id_index) {
1132 uint32_t offset = (uintptr_t)prog_data->param[src];
1133 u32_map[dst] = *(uint32_t *)((uint8_t *)data + offset);
1134 } else {
1135 u32_map[dst] = t * cs_prog_data->simd_size;
1136 }
1137 }
1138 }
1139 }
1140
1141 if (!cmd_buffer->device->info.has_llc)
1142 anv_state_clflush(state);
1143
1144 return state;
1145 }
1146
1147 void anv_CmdPushConstants(
1148 VkCommandBuffer commandBuffer,
1149 VkPipelineLayout layout,
1150 VkShaderStageFlags stageFlags,
1151 uint32_t offset,
1152 uint32_t size,
1153 const void* pValues)
1154 {
1155 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1156
1157 anv_foreach_stage(stage, stageFlags) {
1158 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, client_data);
1159
1160 memcpy(cmd_buffer->state.push_constants[stage]->client_data + offset,
1161 pValues, size);
1162 }
1163
1164 cmd_buffer->state.push_constants_dirty |= stageFlags;
1165 }
1166
1167 void anv_CmdExecuteCommands(
1168 VkCommandBuffer commandBuffer,
1169 uint32_t commandBufferCount,
1170 const VkCommandBuffer* pCmdBuffers)
1171 {
1172 ANV_FROM_HANDLE(anv_cmd_buffer, primary, commandBuffer);
1173
1174 assert(primary->level == VK_COMMAND_BUFFER_LEVEL_PRIMARY);
1175
1176 for (uint32_t i = 0; i < commandBufferCount; i++) {
1177 ANV_FROM_HANDLE(anv_cmd_buffer, secondary, pCmdBuffers[i]);
1178
1179 assert(secondary->level == VK_COMMAND_BUFFER_LEVEL_SECONDARY);
1180
1181 anv_cmd_buffer_add_secondary(primary, secondary);
1182 }
1183
1184 /* Each of the secondary command buffers will use its own state base
1185 * address. We need to re-emit state base address for the primary after
1186 * all of the secondaries are done.
1187 *
1188 * TODO: Maybe we want to make this a dirty bit to avoid extra state base
1189 * address calls?
1190 */
1191 anv_cmd_buffer_emit_state_base_address(primary);
1192 }
1193
1194 VkResult anv_CreateCommandPool(
1195 VkDevice _device,
1196 const VkCommandPoolCreateInfo* pCreateInfo,
1197 const VkAllocationCallbacks* pAllocator,
1198 VkCommandPool* pCmdPool)
1199 {
1200 ANV_FROM_HANDLE(anv_device, device, _device);
1201 struct anv_cmd_pool *pool;
1202
1203 pool = anv_alloc2(&device->alloc, pAllocator, sizeof(*pool), 8,
1204 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1205 if (pool == NULL)
1206 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1207
1208 if (pAllocator)
1209 pool->alloc = *pAllocator;
1210 else
1211 pool->alloc = device->alloc;
1212
1213 list_inithead(&pool->cmd_buffers);
1214
1215 *pCmdPool = anv_cmd_pool_to_handle(pool);
1216
1217 return VK_SUCCESS;
1218 }
1219
1220 void anv_DestroyCommandPool(
1221 VkDevice _device,
1222 VkCommandPool commandPool,
1223 const VkAllocationCallbacks* pAllocator)
1224 {
1225 ANV_FROM_HANDLE(anv_device, device, _device);
1226 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
1227
1228 list_for_each_entry_safe(struct anv_cmd_buffer, cmd_buffer,
1229 &pool->cmd_buffers, pool_link) {
1230 anv_cmd_buffer_destroy(cmd_buffer);
1231 }
1232
1233 anv_free2(&device->alloc, pAllocator, pool);
1234 }
1235
1236 VkResult anv_ResetCommandPool(
1237 VkDevice device,
1238 VkCommandPool commandPool,
1239 VkCommandPoolResetFlags flags)
1240 {
1241 ANV_FROM_HANDLE(anv_cmd_pool, pool, commandPool);
1242
1243 list_for_each_entry(struct anv_cmd_buffer, cmd_buffer,
1244 &pool->cmd_buffers, pool_link) {
1245 anv_cmd_buffer_reset(cmd_buffer);
1246 }
1247
1248 return VK_SUCCESS;
1249 }
1250
1251 /**
1252 * Return NULL if the current subpass has no depthstencil attachment.
1253 */
1254 const struct anv_image_view *
1255 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer *cmd_buffer)
1256 {
1257 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
1258 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
1259
1260 if (subpass->depth_stencil_attachment == VK_ATTACHMENT_UNUSED)
1261 return NULL;
1262
1263 const struct anv_image_view *iview =
1264 fb->attachments[subpass->depth_stencil_attachment];
1265
1266 assert(iview->aspect_mask & (VK_IMAGE_ASPECT_DEPTH_BIT |
1267 VK_IMAGE_ASPECT_STENCIL_BIT));
1268
1269 return iview;
1270 }