2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "vk_format_info.h"
34 /** \file anv_cmd_buffer.c
36 * This file contains all of the stuff for emitting commands into a command
37 * buffer. This includes implementations of most of the vkCmd*
38 * entrypoints. This file is concerned entirely with state emission and
39 * not with the command buffer data structure itself. As far as this file
40 * is concerned, most of anv_cmd_buffer is magic.
43 /* TODO: These are taken from GLES. We should check the Vulkan spec */
44 const struct anv_dynamic_state default_dynamic_state
= {
57 .blend_constants
= { 0.0f
, 0.0f
, 0.0f
, 0.0f
},
62 .stencil_compare_mask
= {
66 .stencil_write_mask
= {
70 .stencil_reference
= {
77 anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
78 const struct anv_dynamic_state
*src
,
81 if (copy_mask
& (1 << VK_DYNAMIC_STATE_VIEWPORT
)) {
82 dest
->viewport
.count
= src
->viewport
.count
;
83 typed_memcpy(dest
->viewport
.viewports
, src
->viewport
.viewports
,
87 if (copy_mask
& (1 << VK_DYNAMIC_STATE_SCISSOR
)) {
88 dest
->scissor
.count
= src
->scissor
.count
;
89 typed_memcpy(dest
->scissor
.scissors
, src
->scissor
.scissors
,
93 if (copy_mask
& (1 << VK_DYNAMIC_STATE_LINE_WIDTH
))
94 dest
->line_width
= src
->line_width
;
96 if (copy_mask
& (1 << VK_DYNAMIC_STATE_DEPTH_BIAS
))
97 dest
->depth_bias
= src
->depth_bias
;
99 if (copy_mask
& (1 << VK_DYNAMIC_STATE_BLEND_CONSTANTS
))
100 typed_memcpy(dest
->blend_constants
, src
->blend_constants
, 4);
102 if (copy_mask
& (1 << VK_DYNAMIC_STATE_DEPTH_BOUNDS
))
103 dest
->depth_bounds
= src
->depth_bounds
;
105 if (copy_mask
& (1 << VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK
))
106 dest
->stencil_compare_mask
= src
->stencil_compare_mask
;
108 if (copy_mask
& (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK
))
109 dest
->stencil_write_mask
= src
->stencil_write_mask
;
111 if (copy_mask
& (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE
))
112 dest
->stencil_reference
= src
->stencil_reference
;
116 anv_cmd_state_init(struct anv_cmd_buffer
*cmd_buffer
)
118 struct anv_cmd_state
*state
= &cmd_buffer
->state
;
120 memset(state
, 0, sizeof(*state
));
122 state
->restart_index
= UINT32_MAX
;
123 state
->gfx
.dynamic
= default_dynamic_state
;
127 anv_cmd_pipeline_state_finish(struct anv_cmd_buffer
*cmd_buffer
,
128 struct anv_cmd_pipeline_state
*pipe_state
)
130 for (uint32_t i
= 0; i
< ARRAY_SIZE(pipe_state
->push_descriptors
); i
++)
131 vk_free(&cmd_buffer
->pool
->alloc
, pipe_state
->push_descriptors
[i
]);
135 anv_cmd_state_finish(struct anv_cmd_buffer
*cmd_buffer
)
137 struct anv_cmd_state
*state
= &cmd_buffer
->state
;
139 anv_cmd_pipeline_state_finish(cmd_buffer
, &state
->gfx
.base
);
140 anv_cmd_pipeline_state_finish(cmd_buffer
, &state
->compute
.base
);
142 for (uint32_t i
= 0; i
< MESA_SHADER_STAGES
; i
++)
143 vk_free(&cmd_buffer
->pool
->alloc
, state
->push_constants
[i
]);
145 vk_free(&cmd_buffer
->pool
->alloc
, state
->attachments
);
149 anv_cmd_state_reset(struct anv_cmd_buffer
*cmd_buffer
)
151 anv_cmd_state_finish(cmd_buffer
);
152 anv_cmd_state_init(cmd_buffer
);
156 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer
*cmd_buffer
,
157 gl_shader_stage stage
, uint32_t size
)
159 struct anv_push_constants
**ptr
= &cmd_buffer
->state
.push_constants
[stage
];
162 *ptr
= vk_alloc(&cmd_buffer
->pool
->alloc
, size
, 8,
163 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
165 anv_batch_set_error(&cmd_buffer
->batch
, VK_ERROR_OUT_OF_HOST_MEMORY
);
166 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
168 } else if ((*ptr
)->size
< size
) {
169 *ptr
= vk_realloc(&cmd_buffer
->pool
->alloc
, *ptr
, size
, 8,
170 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
172 anv_batch_set_error(&cmd_buffer
->batch
, VK_ERROR_OUT_OF_HOST_MEMORY
);
173 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
181 static VkResult
anv_create_cmd_buffer(
182 struct anv_device
* device
,
183 struct anv_cmd_pool
* pool
,
184 VkCommandBufferLevel level
,
185 VkCommandBuffer
* pCommandBuffer
)
187 struct anv_cmd_buffer
*cmd_buffer
;
190 cmd_buffer
= vk_alloc(&pool
->alloc
, sizeof(*cmd_buffer
), 8,
191 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
192 if (cmd_buffer
== NULL
)
193 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
195 cmd_buffer
->batch
.status
= VK_SUCCESS
;
197 cmd_buffer
->_loader_data
.loaderMagic
= ICD_LOADER_MAGIC
;
198 cmd_buffer
->device
= device
;
199 cmd_buffer
->pool
= pool
;
200 cmd_buffer
->level
= level
;
202 result
= anv_cmd_buffer_init_batch_bo_chain(cmd_buffer
);
203 if (result
!= VK_SUCCESS
)
206 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
207 &device
->surface_state_pool
, 4096);
208 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
209 &device
->dynamic_state_pool
, 16384);
211 anv_cmd_state_init(cmd_buffer
);
214 list_addtail(&cmd_buffer
->pool_link
, &pool
->cmd_buffers
);
216 /* Init the pool_link so we can safefly call list_del when we destroy
219 list_inithead(&cmd_buffer
->pool_link
);
222 *pCommandBuffer
= anv_cmd_buffer_to_handle(cmd_buffer
);
227 vk_free(&cmd_buffer
->pool
->alloc
, cmd_buffer
);
232 VkResult
anv_AllocateCommandBuffers(
234 const VkCommandBufferAllocateInfo
* pAllocateInfo
,
235 VkCommandBuffer
* pCommandBuffers
)
237 ANV_FROM_HANDLE(anv_device
, device
, _device
);
238 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, pAllocateInfo
->commandPool
);
240 VkResult result
= VK_SUCCESS
;
243 for (i
= 0; i
< pAllocateInfo
->commandBufferCount
; i
++) {
244 result
= anv_create_cmd_buffer(device
, pool
, pAllocateInfo
->level
,
245 &pCommandBuffers
[i
]);
246 if (result
!= VK_SUCCESS
)
250 if (result
!= VK_SUCCESS
) {
251 anv_FreeCommandBuffers(_device
, pAllocateInfo
->commandPool
,
253 for (i
= 0; i
< pAllocateInfo
->commandBufferCount
; i
++)
254 pCommandBuffers
[i
] = VK_NULL_HANDLE
;
261 anv_cmd_buffer_destroy(struct anv_cmd_buffer
*cmd_buffer
)
263 list_del(&cmd_buffer
->pool_link
);
265 anv_cmd_buffer_fini_batch_bo_chain(cmd_buffer
);
267 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
268 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
270 anv_cmd_state_finish(cmd_buffer
);
272 vk_free(&cmd_buffer
->pool
->alloc
, cmd_buffer
);
275 void anv_FreeCommandBuffers(
277 VkCommandPool commandPool
,
278 uint32_t commandBufferCount
,
279 const VkCommandBuffer
* pCommandBuffers
)
281 for (uint32_t i
= 0; i
< commandBufferCount
; i
++) {
282 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, pCommandBuffers
[i
]);
287 anv_cmd_buffer_destroy(cmd_buffer
);
292 anv_cmd_buffer_reset(struct anv_cmd_buffer
*cmd_buffer
)
294 cmd_buffer
->usage_flags
= 0;
295 cmd_buffer
->state
.current_pipeline
= UINT32_MAX
;
296 anv_cmd_buffer_reset_batch_bo_chain(cmd_buffer
);
297 anv_cmd_state_reset(cmd_buffer
);
299 anv_state_stream_finish(&cmd_buffer
->surface_state_stream
);
300 anv_state_stream_init(&cmd_buffer
->surface_state_stream
,
301 &cmd_buffer
->device
->surface_state_pool
, 4096);
303 anv_state_stream_finish(&cmd_buffer
->dynamic_state_stream
);
304 anv_state_stream_init(&cmd_buffer
->dynamic_state_stream
,
305 &cmd_buffer
->device
->dynamic_state_pool
, 16384);
309 VkResult
anv_ResetCommandBuffer(
310 VkCommandBuffer commandBuffer
,
311 VkCommandBufferResetFlags flags
)
313 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
314 return anv_cmd_buffer_reset(cmd_buffer
);
317 #define anv_genX_call(devinfo, func, ...) \
318 switch ((devinfo)->gen) { \
320 if ((devinfo)->is_haswell) { \
321 gen75_##func(__VA_ARGS__); \
323 gen7_##func(__VA_ARGS__); \
327 gen8_##func(__VA_ARGS__); \
330 gen9_##func(__VA_ARGS__); \
333 gen10_##func(__VA_ARGS__); \
336 assert(!"Unknown hardware generation"); \
340 anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
)
342 anv_genX_call(&cmd_buffer
->device
->info
,
343 cmd_buffer_emit_state_base_address
,
347 void anv_CmdBindPipeline(
348 VkCommandBuffer commandBuffer
,
349 VkPipelineBindPoint pipelineBindPoint
,
350 VkPipeline _pipeline
)
352 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
353 ANV_FROM_HANDLE(anv_pipeline
, pipeline
, _pipeline
);
355 switch (pipelineBindPoint
) {
356 case VK_PIPELINE_BIND_POINT_COMPUTE
:
357 cmd_buffer
->state
.compute
.base
.pipeline
= pipeline
;
358 cmd_buffer
->state
.compute
.pipeline_dirty
= true;
359 cmd_buffer
->state
.push_constants_dirty
|= VK_SHADER_STAGE_COMPUTE_BIT
;
360 cmd_buffer
->state
.descriptors_dirty
|= VK_SHADER_STAGE_COMPUTE_BIT
;
363 case VK_PIPELINE_BIND_POINT_GRAPHICS
:
364 cmd_buffer
->state
.gfx
.base
.pipeline
= pipeline
;
365 cmd_buffer
->state
.gfx
.vb_dirty
|= pipeline
->vb_used
;
366 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_PIPELINE
;
367 cmd_buffer
->state
.push_constants_dirty
|= pipeline
->active_stages
;
368 cmd_buffer
->state
.descriptors_dirty
|= pipeline
->active_stages
;
370 /* Apply the dynamic state from the pipeline */
371 cmd_buffer
->state
.gfx
.dirty
|= pipeline
->dynamic_state_mask
;
372 anv_dynamic_state_copy(&cmd_buffer
->state
.gfx
.dynamic
,
373 &pipeline
->dynamic_state
,
374 pipeline
->dynamic_state_mask
);
378 assert(!"invalid bind point");
383 void anv_CmdSetViewport(
384 VkCommandBuffer commandBuffer
,
385 uint32_t firstViewport
,
386 uint32_t viewportCount
,
387 const VkViewport
* pViewports
)
389 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
391 const uint32_t total_count
= firstViewport
+ viewportCount
;
392 if (cmd_buffer
->state
.gfx
.dynamic
.viewport
.count
< total_count
)
393 cmd_buffer
->state
.gfx
.dynamic
.viewport
.count
= total_count
;
395 memcpy(cmd_buffer
->state
.gfx
.dynamic
.viewport
.viewports
+ firstViewport
,
396 pViewports
, viewportCount
* sizeof(*pViewports
));
398 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
;
401 void anv_CmdSetScissor(
402 VkCommandBuffer commandBuffer
,
403 uint32_t firstScissor
,
404 uint32_t scissorCount
,
405 const VkRect2D
* pScissors
)
407 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
409 const uint32_t total_count
= firstScissor
+ scissorCount
;
410 if (cmd_buffer
->state
.gfx
.dynamic
.scissor
.count
< total_count
)
411 cmd_buffer
->state
.gfx
.dynamic
.scissor
.count
= total_count
;
413 memcpy(cmd_buffer
->state
.gfx
.dynamic
.scissor
.scissors
+ firstScissor
,
414 pScissors
, scissorCount
* sizeof(*pScissors
));
416 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_SCISSOR
;
419 void anv_CmdSetLineWidth(
420 VkCommandBuffer commandBuffer
,
423 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
425 cmd_buffer
->state
.gfx
.dynamic
.line_width
= lineWidth
;
426 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
;
429 void anv_CmdSetDepthBias(
430 VkCommandBuffer commandBuffer
,
431 float depthBiasConstantFactor
,
432 float depthBiasClamp
,
433 float depthBiasSlopeFactor
)
435 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
437 cmd_buffer
->state
.gfx
.dynamic
.depth_bias
.bias
= depthBiasConstantFactor
;
438 cmd_buffer
->state
.gfx
.dynamic
.depth_bias
.clamp
= depthBiasClamp
;
439 cmd_buffer
->state
.gfx
.dynamic
.depth_bias
.slope
= depthBiasSlopeFactor
;
441 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
;
444 void anv_CmdSetBlendConstants(
445 VkCommandBuffer commandBuffer
,
446 const float blendConstants
[4])
448 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
450 memcpy(cmd_buffer
->state
.gfx
.dynamic
.blend_constants
,
451 blendConstants
, sizeof(float) * 4);
453 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
;
456 void anv_CmdSetDepthBounds(
457 VkCommandBuffer commandBuffer
,
458 float minDepthBounds
,
459 float maxDepthBounds
)
461 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
463 cmd_buffer
->state
.gfx
.dynamic
.depth_bounds
.min
= minDepthBounds
;
464 cmd_buffer
->state
.gfx
.dynamic
.depth_bounds
.max
= maxDepthBounds
;
466 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
;
469 void anv_CmdSetStencilCompareMask(
470 VkCommandBuffer commandBuffer
,
471 VkStencilFaceFlags faceMask
,
472 uint32_t compareMask
)
474 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
476 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
477 cmd_buffer
->state
.gfx
.dynamic
.stencil_compare_mask
.front
= compareMask
;
478 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
479 cmd_buffer
->state
.gfx
.dynamic
.stencil_compare_mask
.back
= compareMask
;
481 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
;
484 void anv_CmdSetStencilWriteMask(
485 VkCommandBuffer commandBuffer
,
486 VkStencilFaceFlags faceMask
,
489 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
491 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
492 cmd_buffer
->state
.gfx
.dynamic
.stencil_write_mask
.front
= writeMask
;
493 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
494 cmd_buffer
->state
.gfx
.dynamic
.stencil_write_mask
.back
= writeMask
;
496 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
;
499 void anv_CmdSetStencilReference(
500 VkCommandBuffer commandBuffer
,
501 VkStencilFaceFlags faceMask
,
504 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
506 if (faceMask
& VK_STENCIL_FACE_FRONT_BIT
)
507 cmd_buffer
->state
.gfx
.dynamic
.stencil_reference
.front
= reference
;
508 if (faceMask
& VK_STENCIL_FACE_BACK_BIT
)
509 cmd_buffer
->state
.gfx
.dynamic
.stencil_reference
.back
= reference
;
511 cmd_buffer
->state
.gfx
.dirty
|= ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
;
515 anv_cmd_buffer_bind_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
,
516 VkPipelineBindPoint bind_point
,
517 struct anv_pipeline_layout
*layout
,
519 struct anv_descriptor_set
*set
,
520 uint32_t *dynamic_offset_count
,
521 const uint32_t **dynamic_offsets
)
523 struct anv_descriptor_set_layout
*set_layout
=
524 layout
->set
[set_index
].layout
;
526 struct anv_cmd_pipeline_state
*pipe_state
;
527 if (bind_point
== VK_PIPELINE_BIND_POINT_COMPUTE
) {
528 pipe_state
= &cmd_buffer
->state
.compute
.base
;
530 assert(bind_point
== VK_PIPELINE_BIND_POINT_GRAPHICS
);
531 pipe_state
= &cmd_buffer
->state
.gfx
.base
;
533 pipe_state
->descriptors
[set_index
] = set
;
535 if (dynamic_offsets
) {
536 if (set_layout
->dynamic_offset_count
> 0) {
537 uint32_t dynamic_offset_start
=
538 layout
->set
[set_index
].dynamic_offset_start
;
540 /* Assert that everything is in range */
541 assert(set_layout
->dynamic_offset_count
<= *dynamic_offset_count
);
542 assert(dynamic_offset_start
+ set_layout
->dynamic_offset_count
<=
543 ARRAY_SIZE(pipe_state
->dynamic_offsets
));
545 typed_memcpy(&pipe_state
->dynamic_offsets
[dynamic_offset_start
],
546 *dynamic_offsets
, set_layout
->dynamic_offset_count
);
548 *dynamic_offsets
+= set_layout
->dynamic_offset_count
;
549 *dynamic_offset_count
-= set_layout
->dynamic_offset_count
;
553 if (bind_point
== VK_PIPELINE_BIND_POINT_COMPUTE
) {
554 cmd_buffer
->state
.descriptors_dirty
|= VK_SHADER_STAGE_COMPUTE_BIT
;
556 assert(bind_point
== VK_PIPELINE_BIND_POINT_GRAPHICS
);
557 cmd_buffer
->state
.descriptors_dirty
|=
558 set_layout
->shader_stages
& VK_SHADER_STAGE_ALL_GRAPHICS
;
561 /* Pipeline layout objects are required to live at least while any command
562 * buffers that use them are in recording state. We need to grab a reference
563 * to the pipeline layout being bound here so we can compute correct dynamic
564 * offsets for VK_DESCRIPTOR_TYPE_*_DYNAMIC in dynamic_offset_for_binding()
565 * when we record draw commands that come after this.
567 pipe_state
->layout
= layout
;
570 void anv_CmdBindDescriptorSets(
571 VkCommandBuffer commandBuffer
,
572 VkPipelineBindPoint pipelineBindPoint
,
573 VkPipelineLayout _layout
,
575 uint32_t descriptorSetCount
,
576 const VkDescriptorSet
* pDescriptorSets
,
577 uint32_t dynamicOffsetCount
,
578 const uint32_t* pDynamicOffsets
)
580 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
581 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
583 assert(firstSet
+ descriptorSetCount
< MAX_SETS
);
585 for (uint32_t i
= 0; i
< descriptorSetCount
; i
++) {
586 ANV_FROM_HANDLE(anv_descriptor_set
, set
, pDescriptorSets
[i
]);
587 anv_cmd_buffer_bind_descriptor_set(cmd_buffer
, pipelineBindPoint
,
588 layout
, firstSet
+ i
, set
,
594 void anv_CmdBindVertexBuffers(
595 VkCommandBuffer commandBuffer
,
596 uint32_t firstBinding
,
597 uint32_t bindingCount
,
598 const VkBuffer
* pBuffers
,
599 const VkDeviceSize
* pOffsets
)
601 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
602 struct anv_vertex_binding
*vb
= cmd_buffer
->state
.vertex_bindings
;
604 /* We have to defer setting up vertex buffer since we need the buffer
605 * stride from the pipeline. */
607 assert(firstBinding
+ bindingCount
<= MAX_VBS
);
608 for (uint32_t i
= 0; i
< bindingCount
; i
++) {
609 vb
[firstBinding
+ i
].buffer
= anv_buffer_from_handle(pBuffers
[i
]);
610 vb
[firstBinding
+ i
].offset
= pOffsets
[i
];
611 cmd_buffer
->state
.gfx
.vb_dirty
|= 1 << (firstBinding
+ i
);
616 anv_isl_format_for_descriptor_type(VkDescriptorType type
)
619 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
620 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
621 return ISL_FORMAT_R32G32B32A32_FLOAT
;
623 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
624 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
625 return ISL_FORMAT_RAW
;
628 unreachable("Invalid descriptor type");
633 anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
634 const void *data
, uint32_t size
, uint32_t alignment
)
636 struct anv_state state
;
638 state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
, size
, alignment
);
639 memcpy(state
.map
, data
, size
);
641 anv_state_flush(cmd_buffer
->device
, state
);
643 VG(VALGRIND_CHECK_MEM_IS_DEFINED(state
.map
, size
));
649 anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
650 uint32_t *a
, uint32_t *b
,
651 uint32_t dwords
, uint32_t alignment
)
653 struct anv_state state
;
656 state
= anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
657 dwords
* 4, alignment
);
659 for (uint32_t i
= 0; i
< dwords
; i
++)
662 anv_state_flush(cmd_buffer
->device
, state
);
664 VG(VALGRIND_CHECK_MEM_IS_DEFINED(p
, dwords
* 4));
670 anv_push_constant_value(struct anv_push_constants
*data
, uint32_t param
)
672 if (BRW_PARAM_IS_BUILTIN(param
)) {
674 case BRW_PARAM_BUILTIN_ZERO
:
677 unreachable("Invalid param builtin");
680 uint32_t offset
= ANV_PARAM_PUSH_OFFSET(param
);
681 assert(offset
% sizeof(uint32_t) == 0);
682 if (offset
< data
->size
)
683 return *(uint32_t *)((uint8_t *)data
+ offset
);
690 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
691 gl_shader_stage stage
)
693 struct anv_pipeline
*pipeline
= cmd_buffer
->state
.gfx
.base
.pipeline
;
695 /* If we don't have this stage, bail. */
696 if (!anv_pipeline_has_stage(pipeline
, stage
))
697 return (struct anv_state
) { .offset
= 0 };
699 struct anv_push_constants
*data
=
700 cmd_buffer
->state
.push_constants
[stage
];
701 const struct brw_stage_prog_data
*prog_data
=
702 pipeline
->shaders
[stage
]->prog_data
;
704 /* If we don't actually have any push constants, bail. */
705 if (data
== NULL
|| prog_data
== NULL
|| prog_data
->nr_params
== 0)
706 return (struct anv_state
) { .offset
= 0 };
708 struct anv_state state
=
709 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
710 prog_data
->nr_params
* sizeof(float),
711 32 /* bottom 5 bits MBZ */);
713 /* Walk through the param array and fill the buffer with data */
714 uint32_t *u32_map
= state
.map
;
715 for (unsigned i
= 0; i
< prog_data
->nr_params
; i
++)
716 u32_map
[i
] = anv_push_constant_value(data
, prog_data
->param
[i
]);
718 anv_state_flush(cmd_buffer
->device
, state
);
724 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
)
726 struct anv_push_constants
*data
=
727 cmd_buffer
->state
.push_constants
[MESA_SHADER_COMPUTE
];
728 struct anv_pipeline
*pipeline
= cmd_buffer
->state
.compute
.base
.pipeline
;
729 const struct brw_cs_prog_data
*cs_prog_data
= get_cs_prog_data(pipeline
);
730 const struct brw_stage_prog_data
*prog_data
= &cs_prog_data
->base
;
732 /* If we don't actually have any push constants, bail. */
733 if (cs_prog_data
->push
.total
.size
== 0)
734 return (struct anv_state
) { .offset
= 0 };
736 const unsigned push_constant_alignment
=
737 cmd_buffer
->device
->info
.gen
< 8 ? 32 : 64;
738 const unsigned aligned_total_push_constants_size
=
739 ALIGN(cs_prog_data
->push
.total
.size
, push_constant_alignment
);
740 struct anv_state state
=
741 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
742 aligned_total_push_constants_size
,
743 push_constant_alignment
);
745 /* Walk through the param array and fill the buffer with data */
746 uint32_t *u32_map
= state
.map
;
748 if (cs_prog_data
->push
.cross_thread
.size
> 0) {
750 i
< cs_prog_data
->push
.cross_thread
.dwords
;
752 assert(prog_data
->param
[i
] != BRW_PARAM_BUILTIN_SUBGROUP_ID
);
753 u32_map
[i
] = anv_push_constant_value(data
, prog_data
->param
[i
]);
757 if (cs_prog_data
->push
.per_thread
.size
> 0) {
758 for (unsigned t
= 0; t
< cs_prog_data
->threads
; t
++) {
760 8 * (cs_prog_data
->push
.per_thread
.regs
* t
+
761 cs_prog_data
->push
.cross_thread
.regs
);
762 unsigned src
= cs_prog_data
->push
.cross_thread
.dwords
;
763 for ( ; src
< prog_data
->nr_params
; src
++, dst
++) {
764 if (prog_data
->param
[src
] == BRW_PARAM_BUILTIN_SUBGROUP_ID
) {
768 anv_push_constant_value(data
, prog_data
->param
[src
]);
774 anv_state_flush(cmd_buffer
->device
, state
);
779 void anv_CmdPushConstants(
780 VkCommandBuffer commandBuffer
,
781 VkPipelineLayout layout
,
782 VkShaderStageFlags stageFlags
,
787 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
789 anv_foreach_stage(stage
, stageFlags
) {
791 anv_cmd_buffer_ensure_push_constant_field(cmd_buffer
,
793 if (result
!= VK_SUCCESS
)
796 memcpy(cmd_buffer
->state
.push_constants
[stage
]->client_data
+ offset
,
800 cmd_buffer
->state
.push_constants_dirty
|= stageFlags
;
803 VkResult
anv_CreateCommandPool(
805 const VkCommandPoolCreateInfo
* pCreateInfo
,
806 const VkAllocationCallbacks
* pAllocator
,
807 VkCommandPool
* pCmdPool
)
809 ANV_FROM_HANDLE(anv_device
, device
, _device
);
810 struct anv_cmd_pool
*pool
;
812 pool
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*pool
), 8,
813 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
815 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
818 pool
->alloc
= *pAllocator
;
820 pool
->alloc
= device
->alloc
;
822 list_inithead(&pool
->cmd_buffers
);
824 *pCmdPool
= anv_cmd_pool_to_handle(pool
);
829 void anv_DestroyCommandPool(
831 VkCommandPool commandPool
,
832 const VkAllocationCallbacks
* pAllocator
)
834 ANV_FROM_HANDLE(anv_device
, device
, _device
);
835 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, commandPool
);
840 list_for_each_entry_safe(struct anv_cmd_buffer
, cmd_buffer
,
841 &pool
->cmd_buffers
, pool_link
) {
842 anv_cmd_buffer_destroy(cmd_buffer
);
845 vk_free2(&device
->alloc
, pAllocator
, pool
);
848 VkResult
anv_ResetCommandPool(
850 VkCommandPool commandPool
,
851 VkCommandPoolResetFlags flags
)
853 ANV_FROM_HANDLE(anv_cmd_pool
, pool
, commandPool
);
855 list_for_each_entry(struct anv_cmd_buffer
, cmd_buffer
,
856 &pool
->cmd_buffers
, pool_link
) {
857 anv_cmd_buffer_reset(cmd_buffer
);
863 void anv_TrimCommandPoolKHR(
865 VkCommandPool commandPool
,
866 VkCommandPoolTrimFlagsKHR flags
)
868 /* Nothing for us to do here. Our pools stay pretty tidy. */
872 * Return NULL if the current subpass has no depthstencil attachment.
874 const struct anv_image_view
*
875 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
)
877 const struct anv_subpass
*subpass
= cmd_buffer
->state
.subpass
;
878 const struct anv_framebuffer
*fb
= cmd_buffer
->state
.framebuffer
;
880 if (subpass
->depth_stencil_attachment
.attachment
== VK_ATTACHMENT_UNUSED
)
883 const struct anv_image_view
*iview
=
884 fb
->attachments
[subpass
->depth_stencil_attachment
.attachment
];
886 assert(iview
->aspect_mask
& (VK_IMAGE_ASPECT_DEPTH_BIT
|
887 VK_IMAGE_ASPECT_STENCIL_BIT
));
892 static struct anv_push_descriptor_set
*
893 anv_cmd_buffer_get_push_descriptor_set(struct anv_cmd_buffer
*cmd_buffer
,
894 VkPipelineBindPoint bind_point
,
897 struct anv_cmd_pipeline_state
*pipe_state
;
898 if (bind_point
== VK_PIPELINE_BIND_POINT_COMPUTE
) {
899 pipe_state
= &cmd_buffer
->state
.compute
.base
;
901 assert(bind_point
== VK_PIPELINE_BIND_POINT_GRAPHICS
);
902 pipe_state
= &cmd_buffer
->state
.gfx
.base
;
905 struct anv_push_descriptor_set
**push_set
=
906 &pipe_state
->push_descriptors
[set
];
908 if (*push_set
== NULL
) {
909 *push_set
= vk_alloc(&cmd_buffer
->pool
->alloc
,
910 sizeof(struct anv_push_descriptor_set
), 8,
911 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
912 if (*push_set
== NULL
) {
913 anv_batch_set_error(&cmd_buffer
->batch
, VK_ERROR_OUT_OF_HOST_MEMORY
);
921 void anv_CmdPushDescriptorSetKHR(
922 VkCommandBuffer commandBuffer
,
923 VkPipelineBindPoint pipelineBindPoint
,
924 VkPipelineLayout _layout
,
926 uint32_t descriptorWriteCount
,
927 const VkWriteDescriptorSet
* pDescriptorWrites
)
929 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
930 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
932 assert(_set
< MAX_SETS
);
934 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[_set
].layout
;
936 struct anv_push_descriptor_set
*push_set
=
937 anv_cmd_buffer_get_push_descriptor_set(cmd_buffer
,
938 pipelineBindPoint
, _set
);
942 struct anv_descriptor_set
*set
= &push_set
->set
;
944 set
->layout
= set_layout
;
945 set
->size
= anv_descriptor_set_layout_size(set_layout
);
946 set
->buffer_count
= set_layout
->buffer_count
;
947 set
->buffer_views
= push_set
->buffer_views
;
949 /* Go through the user supplied descriptors. */
950 for (uint32_t i
= 0; i
< descriptorWriteCount
; i
++) {
951 const VkWriteDescriptorSet
*write
= &pDescriptorWrites
[i
];
953 switch (write
->descriptorType
) {
954 case VK_DESCRIPTOR_TYPE_SAMPLER
:
955 case VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
:
956 case VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE
:
957 case VK_DESCRIPTOR_TYPE_STORAGE_IMAGE
:
958 case VK_DESCRIPTOR_TYPE_INPUT_ATTACHMENT
:
959 for (uint32_t j
= 0; j
< write
->descriptorCount
; j
++) {
960 anv_descriptor_set_write_image_view(set
, &cmd_buffer
->device
->info
,
961 write
->pImageInfo
+ j
,
962 write
->descriptorType
,
964 write
->dstArrayElement
+ j
);
968 case VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER
:
969 case VK_DESCRIPTOR_TYPE_STORAGE_TEXEL_BUFFER
:
970 for (uint32_t j
= 0; j
< write
->descriptorCount
; j
++) {
971 ANV_FROM_HANDLE(anv_buffer_view
, bview
,
972 write
->pTexelBufferView
[j
]);
974 anv_descriptor_set_write_buffer_view(set
,
975 write
->descriptorType
,
978 write
->dstArrayElement
+ j
);
982 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER
:
983 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER
:
984 case VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
:
985 case VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
:
986 for (uint32_t j
= 0; j
< write
->descriptorCount
; j
++) {
987 assert(write
->pBufferInfo
[j
].buffer
);
988 ANV_FROM_HANDLE(anv_buffer
, buffer
, write
->pBufferInfo
[j
].buffer
);
991 anv_descriptor_set_write_buffer(set
,
993 &cmd_buffer
->surface_state_stream
,
994 write
->descriptorType
,
997 write
->dstArrayElement
+ j
,
998 write
->pBufferInfo
[j
].offset
,
999 write
->pBufferInfo
[j
].range
);
1008 anv_cmd_buffer_bind_descriptor_set(cmd_buffer
, pipelineBindPoint
,
1009 layout
, _set
, set
, NULL
, NULL
);
1012 void anv_CmdPushDescriptorSetWithTemplateKHR(
1013 VkCommandBuffer commandBuffer
,
1014 VkDescriptorUpdateTemplateKHR descriptorUpdateTemplate
,
1015 VkPipelineLayout _layout
,
1019 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
1020 ANV_FROM_HANDLE(anv_descriptor_update_template
, template,
1021 descriptorUpdateTemplate
);
1022 ANV_FROM_HANDLE(anv_pipeline_layout
, layout
, _layout
);
1024 assert(_set
< MAX_PUSH_DESCRIPTORS
);
1026 struct anv_descriptor_set_layout
*set_layout
= layout
->set
[_set
].layout
;
1028 struct anv_push_descriptor_set
*push_set
=
1029 anv_cmd_buffer_get_push_descriptor_set(cmd_buffer
,
1030 template->bind_point
, _set
);
1034 struct anv_descriptor_set
*set
= &push_set
->set
;
1036 set
->layout
= set_layout
;
1037 set
->size
= anv_descriptor_set_layout_size(set_layout
);
1038 set
->buffer_count
= set_layout
->buffer_count
;
1039 set
->buffer_views
= push_set
->buffer_views
;
1041 anv_descriptor_set_write_template(set
,
1043 &cmd_buffer
->surface_state_stream
,
1047 anv_cmd_buffer_bind_descriptor_set(cmd_buffer
, template->bind_point
,
1048 layout
, _set
, set
, NULL
, NULL
);