2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
31 #include "util/debug.h"
33 #include "vk_format_info.h"
36 * Exactly one bit must be set in \a aspect.
38 static isl_surf_usage_flags_t
39 choose_isl_surf_usage(VkImageUsageFlags vk_usage
,
40 VkImageAspectFlags aspect
)
42 isl_surf_usage_flags_t isl_usage
= 0;
44 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
45 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
47 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
53 if (vk_usage
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
56 /* Even if we're only using it for transfer operations, clears to depth and
57 * stencil images happen as depth and stencil so they need the right ISL
58 * usage bits or else things will fall apart.
61 case VK_IMAGE_ASPECT_DEPTH_BIT
:
62 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
64 case VK_IMAGE_ASPECT_STENCIL_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
67 case VK_IMAGE_ASPECT_COLOR_BIT
:
70 unreachable("bad VkImageAspect");
73 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
74 /* blorp implements transfers by sampling from the source image. */
75 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
78 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
79 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
80 /* blorp implements transfers by rendering into the destination image.
81 * Only request this with color images, as we deal with depth/stencil
82 * formats differently. */
83 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
90 * Exactly one bit must be set in \a aspect.
92 static struct anv_surface
*
93 get_surface(struct anv_image
*image
, VkImageAspectFlags aspect
)
97 unreachable("bad VkImageAspect");
98 case VK_IMAGE_ASPECT_COLOR_BIT
:
99 return &image
->color_surface
;
100 case VK_IMAGE_ASPECT_DEPTH_BIT
:
101 return &image
->depth_surface
;
102 case VK_IMAGE_ASPECT_STENCIL_BIT
:
103 return &image
->stencil_surface
;
108 add_surface(struct anv_image
*image
, struct anv_surface
*surf
)
110 assert(surf
->isl
.size
> 0); /* isl surface must be initialized */
112 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment
);
113 image
->size
= surf
->offset
+ surf
->isl
.size
;
114 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment
);
118 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
119 * image's memory requirements (that is, the image's size and alignment).
121 * Exactly one bit must be set in \a aspect.
124 make_surface(const struct anv_device
*dev
,
125 struct anv_image
*image
,
126 const struct anv_image_create_info
*anv_info
,
127 VkImageAspectFlags aspect
)
129 const VkImageCreateInfo
*vk_info
= anv_info
->vk_info
;
132 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
133 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
134 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
135 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
138 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
139 * result with an optionally provided ISL tiling argument.
141 isl_tiling_flags_t tiling_flags
=
142 (vk_info
->tiling
== VK_IMAGE_TILING_LINEAR
) ?
143 ISL_TILING_LINEAR_BIT
: ISL_TILING_ANY_MASK
;
145 if (anv_info
->isl_tiling_flags
)
146 tiling_flags
&= anv_info
->isl_tiling_flags
;
148 assert(tiling_flags
);
150 struct anv_surface
*anv_surf
= get_surface(image
, aspect
);
152 image
->extent
= anv_sanitize_image_extent(vk_info
->imageType
,
155 enum isl_format format
= anv_get_isl_format(&dev
->info
, vk_info
->format
,
156 aspect
, vk_info
->tiling
);
157 assert(format
!= ISL_FORMAT_UNSUPPORTED
);
159 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
160 .dim
= vk_to_isl_surf_dim
[vk_info
->imageType
],
162 .width
= image
->extent
.width
,
163 .height
= image
->extent
.height
,
164 .depth
= image
->extent
.depth
,
165 .levels
= vk_info
->mipLevels
,
166 .array_len
= vk_info
->arrayLayers
,
167 .samples
= vk_info
->samples
,
169 .min_pitch
= anv_info
->stride
,
170 .usage
= choose_isl_surf_usage(image
->usage
, aspect
),
171 .tiling_flags
= tiling_flags
);
173 /* isl_surf_init() will fail only if provided invalid input. Invalid input
174 * is illegal in Vulkan.
178 add_surface(image
, anv_surf
);
180 /* Add a HiZ surface to a depth buffer that will be used for rendering.
182 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
183 /* We don't advertise that depth buffers could be used as storage
186 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
188 /* Allow the user to control HiZ enabling. Disable by default on gen7
189 * because resolves are not currently implemented pre-BDW.
191 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
192 /* It will never be used as an attachment, HiZ is pointless. */
193 } else if (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
) {
194 /* From the 1.0.37 spec:
196 * "An attachment used as an input attachment and depth/stencil
197 * attachment must be in either VK_IMAGE_LAYOUT_GENERAL or
198 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL."
200 * It will never have a layout of
201 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, so HiZ is
202 * currently pointless. If transfer operations learn to use the HiZ
203 * buffer, we can enable HiZ for VK_IMAGE_LAYOUT_GENERAL and support
206 anv_finishme("Implement HiZ for input attachments");
207 } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev
->info
.gen
>= 8)) {
208 anv_finishme("Implement gen7 HiZ");
209 } else if (vk_info
->mipLevels
> 1) {
210 anv_finishme("Test multi-LOD HiZ");
211 } else if (vk_info
->arrayLayers
> 1) {
212 anv_finishme("Implement multi-arrayLayer HiZ clears and resolves");
213 } else if (dev
->info
.gen
== 8 && vk_info
->samples
> 1) {
214 anv_finishme("Test gen8 multisampled HiZ");
216 assert(image
->aux_surface
.isl
.size
== 0);
217 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
, &image
->depth_surface
.isl
,
218 &image
->aux_surface
.isl
);
220 add_surface(image
, &image
->aux_surface
);
221 image
->aux_usage
= ISL_AUX_USAGE_HIZ
;
223 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
== 1) {
224 if (!unlikely(INTEL_DEBUG
& DEBUG_NO_RBC
)) {
225 assert(image
->aux_surface
.isl
.size
== 0);
226 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
227 &image
->aux_surface
.isl
);
229 add_surface(image
, &image
->aux_surface
);
231 /* For images created without MUTABLE_FORMAT_BIT set, we know that
232 * they will always be used with the original format. In
233 * particular, they will always be used with a format that
234 * supports color compression. If it's never used as a storage
235 * image, then it will only be used through the sampler or the as
236 * a render target. This means that it's safe to just leave
237 * compression on at all times for these formats.
239 if (!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
240 !(vk_info
->flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
) &&
241 isl_format_supports_ccs_e(&dev
->info
, format
)) {
242 image
->aux_usage
= ISL_AUX_USAGE_CCS_E
;
246 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
> 1) {
247 assert(image
->aux_surface
.isl
.size
== 0);
248 assert(!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
249 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
250 &image
->aux_surface
.isl
);
252 add_surface(image
, &image
->aux_surface
);
253 image
->aux_usage
= ISL_AUX_USAGE_MCS
;
261 anv_image_create(VkDevice _device
,
262 const struct anv_image_create_info
*create_info
,
263 const VkAllocationCallbacks
* alloc
,
266 ANV_FROM_HANDLE(anv_device
, device
, _device
);
267 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
268 struct anv_image
*image
= NULL
;
271 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
273 anv_assert(pCreateInfo
->mipLevels
> 0);
274 anv_assert(pCreateInfo
->arrayLayers
> 0);
275 anv_assert(pCreateInfo
->samples
> 0);
276 anv_assert(pCreateInfo
->extent
.width
> 0);
277 anv_assert(pCreateInfo
->extent
.height
> 0);
278 anv_assert(pCreateInfo
->extent
.depth
> 0);
280 image
= vk_alloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
281 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
283 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
285 memset(image
, 0, sizeof(*image
));
286 image
->type
= pCreateInfo
->imageType
;
287 image
->extent
= pCreateInfo
->extent
;
288 image
->vk_format
= pCreateInfo
->format
;
289 image
->aspects
= vk_format_aspects(image
->vk_format
);
290 image
->levels
= pCreateInfo
->mipLevels
;
291 image
->array_size
= pCreateInfo
->arrayLayers
;
292 image
->samples
= pCreateInfo
->samples
;
293 image
->usage
= pCreateInfo
->usage
;
294 image
->tiling
= pCreateInfo
->tiling
;
295 image
->aux_usage
= ISL_AUX_USAGE_NONE
;
298 for_each_bit(b
, image
->aspects
) {
299 r
= make_surface(device
, image
, create_info
, (1 << b
));
304 *pImage
= anv_image_to_handle(image
);
310 vk_free2(&device
->alloc
, alloc
, image
);
316 anv_CreateImage(VkDevice device
,
317 const VkImageCreateInfo
*pCreateInfo
,
318 const VkAllocationCallbacks
*pAllocator
,
321 return anv_image_create(device
,
322 &(struct anv_image_create_info
) {
323 .vk_info
= pCreateInfo
,
330 anv_DestroyImage(VkDevice _device
, VkImage _image
,
331 const VkAllocationCallbacks
*pAllocator
)
333 ANV_FROM_HANDLE(anv_device
, device
, _device
);
334 ANV_FROM_HANDLE(anv_image
, image
, _image
);
339 vk_free2(&device
->alloc
, pAllocator
, image
);
342 VkResult
anv_BindImageMemory(
345 VkDeviceMemory _memory
,
346 VkDeviceSize memoryOffset
)
348 ANV_FROM_HANDLE(anv_device
, device
, _device
);
349 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
350 ANV_FROM_HANDLE(anv_image
, image
, _image
);
353 image
->bo
= &mem
->bo
;
354 image
->offset
= memoryOffset
;
360 if (image
->aux_surface
.isl
.size
> 0) {
362 /* The offset and size must be a multiple of 4K or else the
363 * anv_gem_mmap call below will return NULL.
365 assert((image
->offset
+ image
->aux_surface
.offset
) % 4096 == 0);
366 assert(image
->aux_surface
.isl
.size
% 4096 == 0);
368 /* Auxiliary surfaces need to have their memory cleared to 0 before they
369 * can be used. For CCS surfaces, this puts them in the "resolved"
370 * state so they can be used with CCS enabled before we ever touch it
371 * from the GPU. For HiZ, we need something valid or else we may get
372 * GPU hangs on some hardware and 0 works fine.
374 void *map
= anv_gem_mmap(device
, image
->bo
->gem_handle
,
375 image
->offset
+ image
->aux_surface
.offset
,
376 image
->aux_surface
.isl
.size
,
377 device
->info
.has_llc
? 0 : I915_MMAP_WC
);
379 /* If anv_gem_mmap returns NULL, it's likely that the kernel was
380 * not able to find space on the host to create a proper mapping.
383 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
385 memset(map
, 0, image
->aux_surface
.isl
.size
);
387 anv_gem_munmap(map
, image
->aux_surface
.isl
.size
);
394 anv_surface_get_subresource_layout(struct anv_image
*image
,
395 struct anv_surface
*surface
,
396 const VkImageSubresource
*subresource
,
397 VkSubresourceLayout
*layout
)
399 /* If we are on a non-zero mip level or array slice, we need to
400 * calculate a real offset.
402 anv_assert(subresource
->mipLevel
== 0);
403 anv_assert(subresource
->arrayLayer
== 0);
405 layout
->offset
= surface
->offset
;
406 layout
->rowPitch
= surface
->isl
.row_pitch
;
407 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
408 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
409 layout
->size
= surface
->isl
.size
;
412 void anv_GetImageSubresourceLayout(
415 const VkImageSubresource
* pSubresource
,
416 VkSubresourceLayout
* pLayout
)
418 ANV_FROM_HANDLE(anv_image
, image
, _image
);
420 assert(__builtin_popcount(pSubresource
->aspectMask
) == 1);
422 switch (pSubresource
->aspectMask
) {
423 case VK_IMAGE_ASPECT_COLOR_BIT
:
424 anv_surface_get_subresource_layout(image
, &image
->color_surface
,
425 pSubresource
, pLayout
);
427 case VK_IMAGE_ASPECT_DEPTH_BIT
:
428 anv_surface_get_subresource_layout(image
, &image
->depth_surface
,
429 pSubresource
, pLayout
);
431 case VK_IMAGE_ASPECT_STENCIL_BIT
:
432 anv_surface_get_subresource_layout(image
, &image
->stencil_surface
,
433 pSubresource
, pLayout
);
436 assert(!"Invalid image aspect");
441 * This function determines the optimal buffer to use for device
442 * accesses given a VkImageLayout and other pieces of information needed to
443 * make that determination. This does not determine the optimal buffer to
444 * use during a resolve operation.
446 * NOTE: Some layouts do not support device access.
448 * @param devinfo The device information of the Intel GPU.
449 * @param image The image that may contain a collection of buffers.
450 * @param aspects The aspect(s) of the image to be accessed.
451 * @param layout The current layout of the image aspect(s).
453 * @return The primary buffer that should be used for the given layout.
456 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
457 const struct anv_image
* const image
,
458 const VkImageAspectFlags aspects
,
459 const VkImageLayout layout
)
461 /* Validate the inputs. */
463 /* The devinfo is needed as the optimal buffer varies across generations. */
464 assert(devinfo
!= NULL
);
466 /* The layout of a NULL image is not properly defined. */
467 assert(image
!= NULL
);
469 /* The aspects must be a subset of the image aspects. */
470 assert(aspects
& image
->aspects
&& aspects
<= image
->aspects
);
472 /* Determine the optimal buffer. */
474 /* If there is no auxiliary surface allocated, we must use the one and only
477 if (image
->aux_surface
.isl
.size
== 0)
478 return ISL_AUX_USAGE_NONE
;
480 /* All images that use an auxiliary surface are required to be tiled. */
481 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
483 /* On BDW+, when clearing the stencil aspect of a depth stencil image,
484 * the HiZ buffer allows us to record the clear with a relatively small
485 * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
486 * to the stencil aspect.
488 if (devinfo
->gen
< 8 && aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
)
489 return ISL_AUX_USAGE_NONE
;
491 const bool color_aspect
= aspects
== VK_IMAGE_ASPECT_COLOR_BIT
;
493 /* The following switch currently only handles depth stencil aspects.
494 * TODO: Handle the color aspect.
497 return image
->aux_usage
;
501 /* Invalid Layouts */
503 /* According to the Vulkan Spec, the following layouts are valid only as
504 * initial layouts in a layout transition and don't support device access.
506 case VK_IMAGE_LAYOUT_UNDEFINED
:
507 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
508 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
509 case VK_IMAGE_LAYOUT_MAX_ENUM
:
510 unreachable("Invalid image layout for device access.");
515 * This buffer could be a depth buffer used in a transfer operation. BLORP
516 * currently doesn't use HiZ for transfer operations so we must use the main
517 * buffer for this layout. TODO: Enable HiZ in BLORP.
519 case VK_IMAGE_LAYOUT_GENERAL
:
520 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
521 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
522 return ISL_AUX_USAGE_NONE
;
525 /* Sampling Layouts */
526 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
527 assert(!color_aspect
);
529 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
530 if (anv_can_sample_with_hiz(devinfo
, aspects
, image
->samples
))
531 return ISL_AUX_USAGE_HIZ
;
533 return ISL_AUX_USAGE_NONE
;
535 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
536 assert(color_aspect
);
538 /* On SKL+, the render buffer can be decompressed by the presentation
539 * engine. Support for this feature has not yet landed in the wider
540 * ecosystem. TODO: Update this code when support lands.
542 * From the BDW PRM, Vol 7, Render Target Resolve:
544 * If the MCS is enabled on a non-multisampled render target, the
545 * render target must be resolved before being used for other
546 * purposes (display, texture, CPU lock) The clear value from
547 * SURFACE_STATE is written into pixels in the render target
548 * indicated as clear in the MCS.
550 * Pre-SKL, the render buffer must be resolved before being used for
551 * presentation. We can infer that the auxiliary buffer is not used.
553 return ISL_AUX_USAGE_NONE
;
556 /* Rendering Layouts */
557 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
558 assert(color_aspect
);
559 unreachable("Color images are not yet supported.");
561 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
562 assert(!color_aspect
);
563 return ISL_AUX_USAGE_HIZ
;
566 /* If the layout isn't recognized in the exhaustive switch above, the
567 * VkImageLayout value is not defined in vulkan.h.
569 unreachable("layout is not a VkImageLayout enumeration member.");
573 static struct anv_state
574 alloc_surface_state(struct anv_device
*device
)
576 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
579 static enum isl_channel_select
580 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
581 struct isl_swizzle format_swizzle
)
583 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
587 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
588 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
589 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
590 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
591 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
592 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
594 unreachable("Invalid swizzle");
600 anv_CreateImageView(VkDevice _device
,
601 const VkImageViewCreateInfo
*pCreateInfo
,
602 const VkAllocationCallbacks
*pAllocator
,
605 ANV_FROM_HANDLE(anv_device
, device
, _device
);
606 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
607 struct anv_image_view
*iview
;
609 iview
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
610 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
612 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
614 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
616 assert(range
->layerCount
> 0);
617 assert(range
->baseMipLevel
< image
->levels
);
618 assert(image
->usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
619 VK_IMAGE_USAGE_STORAGE_BIT
|
620 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
621 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
623 switch (image
->type
) {
625 unreachable("bad VkImageType");
626 case VK_IMAGE_TYPE_1D
:
627 case VK_IMAGE_TYPE_2D
:
628 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
630 case VK_IMAGE_TYPE_3D
:
631 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
632 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
636 const struct anv_surface
*surface
=
637 anv_image_get_surface_for_aspect_mask(image
, range
->aspectMask
);
639 iview
->image
= image
;
640 iview
->bo
= image
->bo
;
641 iview
->offset
= image
->offset
+ surface
->offset
;
643 iview
->aspect_mask
= pCreateInfo
->subresourceRange
.aspectMask
;
644 iview
->vk_format
= pCreateInfo
->format
;
646 struct anv_format format
= anv_get_format(&device
->info
, pCreateInfo
->format
,
647 range
->aspectMask
, image
->tiling
);
649 iview
->isl
= (struct isl_view
) {
650 .format
= format
.isl_format
,
651 .base_level
= range
->baseMipLevel
,
652 .levels
= anv_get_levelCount(image
, range
),
653 .base_array_layer
= range
->baseArrayLayer
,
654 .array_len
= anv_get_layerCount(image
, range
),
656 .r
= remap_swizzle(pCreateInfo
->components
.r
,
657 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
658 .g
= remap_swizzle(pCreateInfo
->components
.g
,
659 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
660 .b
= remap_swizzle(pCreateInfo
->components
.b
,
661 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
662 .a
= remap_swizzle(pCreateInfo
->components
.a
,
663 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
667 iview
->extent
= (VkExtent3D
) {
668 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
669 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
670 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
673 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
674 iview
->isl
.base_array_layer
= 0;
675 iview
->isl
.array_len
= iview
->extent
.depth
;
678 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
679 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
680 iview
->isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
682 iview
->isl
.usage
= 0;
685 /* If the HiZ buffer can be sampled from, set the constant clear color.
686 * If it cannot, disable the isl aux usage flag.
688 float red_clear_color
= 0.0f
;
689 enum isl_aux_usage surf_usage
= image
->aux_usage
;
690 if (image
->aux_usage
== ISL_AUX_USAGE_HIZ
) {
691 if (anv_can_sample_with_hiz(&device
->info
, iview
->aspect_mask
,
693 /* When a HiZ buffer is sampled on gen9+, ensure that
694 * the constant fast clear value is set in the surface state.
696 if (device
->info
.gen
>= 9)
697 red_clear_color
= ANV_HZ_FC_VAL
;
699 surf_usage
= ISL_AUX_USAGE_NONE
;
703 /* Input attachment surfaces for color are allocated and filled
704 * out at BeginRenderPass time because they need compression information.
705 * Compression is not yet enabled for depth textures and stencil doesn't
706 * allow compression so we can just use the texture surface state from the
709 if (image
->usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
710 (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
711 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
712 iview
->sampler_surface_state
= alloc_surface_state(device
);
714 struct isl_view view
= iview
->isl
;
715 view
.usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
716 isl_surf_fill_state(&device
->isl_dev
,
717 iview
->sampler_surface_state
.map
,
718 .surf
= &surface
->isl
,
720 .clear_color
.f32
= { red_clear_color
,},
721 .aux_surf
= &image
->aux_surface
.isl
,
722 .aux_usage
= surf_usage
,
723 .mocs
= device
->default_mocs
);
725 anv_state_flush(device
, iview
->sampler_surface_state
);
727 iview
->sampler_surface_state
.alloc_size
= 0;
730 /* NOTE: This one needs to go last since it may stomp isl_view.format */
731 if (image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
732 iview
->storage_surface_state
= alloc_surface_state(device
);
733 iview
->writeonly_storage_surface_state
= alloc_surface_state(device
);
735 struct isl_view view
= iview
->isl
;
736 view
.usage
|= ISL_SURF_USAGE_STORAGE_BIT
;
738 /* Write-only accesses always used a typed write instruction and should
739 * therefore use the real format.
741 isl_surf_fill_state(&device
->isl_dev
,
742 iview
->writeonly_storage_surface_state
.map
,
743 .surf
= &surface
->isl
,
745 .aux_surf
= &image
->aux_surface
.isl
,
746 .aux_usage
= image
->aux_usage
,
747 .mocs
= device
->default_mocs
);
749 if (isl_has_matching_typed_storage_image_format(&device
->info
,
750 format
.isl_format
)) {
751 /* Typed surface reads support a very limited subset of the shader
752 * image formats. Translate it into the closest format the hardware
755 view
.format
= isl_lower_storage_image_format(&device
->info
,
758 isl_surf_fill_state(&device
->isl_dev
,
759 iview
->storage_surface_state
.map
,
760 .surf
= &surface
->isl
,
762 .aux_surf
= &image
->aux_surface
.isl
,
763 .aux_usage
= image
->aux_usage
,
764 .mocs
= device
->default_mocs
);
766 anv_fill_buffer_surface_state(device
, iview
->storage_surface_state
,
769 iview
->bo
->size
- iview
->offset
, 1);
772 isl_surf_fill_image_param(&device
->isl_dev
,
773 &iview
->storage_image_param
,
774 &surface
->isl
, &iview
->isl
);
776 anv_state_flush(device
, iview
->storage_surface_state
);
777 anv_state_flush(device
, iview
->writeonly_storage_surface_state
);
779 iview
->storage_surface_state
.alloc_size
= 0;
780 iview
->writeonly_storage_surface_state
.alloc_size
= 0;
783 *pView
= anv_image_view_to_handle(iview
);
789 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
790 const VkAllocationCallbacks
*pAllocator
)
792 ANV_FROM_HANDLE(anv_device
, device
, _device
);
793 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
798 if (iview
->sampler_surface_state
.alloc_size
> 0) {
799 anv_state_pool_free(&device
->surface_state_pool
,
800 iview
->sampler_surface_state
);
803 if (iview
->storage_surface_state
.alloc_size
> 0) {
804 anv_state_pool_free(&device
->surface_state_pool
,
805 iview
->storage_surface_state
);
808 if (iview
->writeonly_storage_surface_state
.alloc_size
> 0) {
809 anv_state_pool_free(&device
->surface_state_pool
,
810 iview
->writeonly_storage_surface_state
);
813 vk_free2(&device
->alloc
, pAllocator
, iview
);
818 anv_CreateBufferView(VkDevice _device
,
819 const VkBufferViewCreateInfo
*pCreateInfo
,
820 const VkAllocationCallbacks
*pAllocator
,
823 ANV_FROM_HANDLE(anv_device
, device
, _device
);
824 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
825 struct anv_buffer_view
*view
;
827 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
828 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
830 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
832 /* TODO: Handle the format swizzle? */
834 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
835 VK_IMAGE_ASPECT_COLOR_BIT
,
836 VK_IMAGE_TILING_LINEAR
);
837 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
838 view
->bo
= buffer
->bo
;
839 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
840 view
->range
= pCreateInfo
->range
== VK_WHOLE_SIZE
?
841 buffer
->size
- pCreateInfo
->offset
: pCreateInfo
->range
;
842 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
844 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
845 view
->surface_state
= alloc_surface_state(device
);
847 anv_fill_buffer_surface_state(device
, view
->surface_state
,
849 view
->offset
, view
->range
, format_bs
);
851 view
->surface_state
= (struct anv_state
){ 0 };
854 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
855 view
->storage_surface_state
= alloc_surface_state(device
);
856 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
858 enum isl_format storage_format
=
859 isl_has_matching_typed_storage_image_format(&device
->info
,
861 isl_lower_storage_image_format(&device
->info
, view
->format
) :
864 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
866 view
->offset
, view
->range
,
867 (storage_format
== ISL_FORMAT_RAW
? 1 :
868 isl_format_get_layout(storage_format
)->bpb
/ 8));
870 /* Write-only accesses should use the original format. */
871 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
873 view
->offset
, view
->range
,
874 isl_format_get_layout(view
->format
)->bpb
/ 8);
876 isl_buffer_fill_image_param(&device
->isl_dev
,
877 &view
->storage_image_param
,
878 view
->format
, view
->range
);
880 view
->storage_surface_state
= (struct anv_state
){ 0 };
881 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
884 *pView
= anv_buffer_view_to_handle(view
);
890 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
891 const VkAllocationCallbacks
*pAllocator
)
893 ANV_FROM_HANDLE(anv_device
, device
, _device
);
894 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
899 if (view
->surface_state
.alloc_size
> 0)
900 anv_state_pool_free(&device
->surface_state_pool
,
901 view
->surface_state
);
903 if (view
->storage_surface_state
.alloc_size
> 0)
904 anv_state_pool_free(&device
->surface_state_pool
,
905 view
->storage_surface_state
);
907 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
908 anv_state_pool_free(&device
->surface_state_pool
,
909 view
->writeonly_storage_surface_state
);
911 vk_free2(&device
->alloc
, pAllocator
, view
);
914 const struct anv_surface
*
915 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
916 VkImageAspectFlags aspect_mask
)
918 switch (aspect_mask
) {
919 case VK_IMAGE_ASPECT_COLOR_BIT
:
920 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
921 return &image
->color_surface
;
922 case VK_IMAGE_ASPECT_DEPTH_BIT
:
923 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
924 return &image
->depth_surface
;
925 case VK_IMAGE_ASPECT_STENCIL_BIT
:
926 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
927 return &image
->stencil_surface
;
928 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
929 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
930 * combined depth stencil formats. Specifically, it states:
932 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
933 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
935 * Image views with both depth and stencil aspects are only valid for
936 * render target attachments, in which case
937 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
938 * stencil surfaces from the underlying surface.
940 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
941 return &image
->depth_surface
;
943 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
944 return &image
->stencil_surface
;
947 unreachable("image does not have aspect");