2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
31 #include "anv_private.h"
32 #include "util/debug.h"
35 #include "vk_format_info.h"
37 static isl_surf_usage_flags_t
38 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
39 VkImageUsageFlags vk_usage
,
40 isl_surf_usage_flags_t isl_extra_usage
,
41 VkImageAspectFlagBits aspect
)
43 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
45 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
46 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
48 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
49 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
51 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
52 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
54 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
55 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
57 /* Even if we're only using it for transfer operations, clears to depth and
58 * stencil images happen as depth and stencil so they need the right ISL
59 * usage bits or else things will fall apart.
62 case VK_IMAGE_ASPECT_DEPTH_BIT
:
63 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
65 case VK_IMAGE_ASPECT_STENCIL_BIT
:
66 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
68 case VK_IMAGE_ASPECT_COLOR_BIT
:
69 case VK_IMAGE_ASPECT_PLANE_0_BIT_KHR
:
70 case VK_IMAGE_ASPECT_PLANE_1_BIT_KHR
:
71 case VK_IMAGE_ASPECT_PLANE_2_BIT_KHR
:
74 unreachable("bad VkImageAspect");
77 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
78 /* blorp implements transfers by sampling from the source image. */
79 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
82 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
83 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
84 /* blorp implements transfers by rendering into the destination image.
85 * Only request this with color images, as we deal with depth/stencil
86 * formats differently. */
87 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
93 static struct anv_surface
*
94 get_surface(struct anv_image
*image
, VkImageAspectFlagBits aspect
)
96 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
97 return &image
->planes
[plane
].surface
;
101 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
103 assert(surf
->isl
.size
> 0); /* isl surface must be initialized */
105 if (image
->disjoint
) {
106 surf
->offset
= align_u32(image
->planes
[plane
].size
, surf
->isl
.alignment
);
107 /* Plane offset is always 0 when it's disjoint. */
109 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment
);
110 /* Determine plane's offset only once when the first surface is added. */
111 if (image
->planes
[plane
].size
== 0)
112 image
->planes
[plane
].offset
= image
->size
;
115 image
->size
= surf
->offset
+ surf
->isl
.size
;
116 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size
) - image
->planes
[plane
].offset
;
118 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment
);
119 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
120 surf
->isl
.alignment
);
125 all_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
126 const struct VkImageCreateInfo
*vk_info
)
128 enum isl_format format
=
129 anv_get_isl_format(devinfo
, vk_info
->format
,
130 VK_IMAGE_ASPECT_COLOR_BIT
, vk_info
->tiling
);
132 if (!isl_format_supports_ccs_e(devinfo
, format
))
135 if (!(vk_info
->flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
138 const VkImageFormatListCreateInfoKHR
*fmt_list
=
139 vk_find_struct_const(vk_info
->pNext
, IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
141 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
144 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
145 enum isl_format view_format
=
146 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
147 VK_IMAGE_ASPECT_COLOR_BIT
, vk_info
->tiling
);
149 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
157 * For color images that have an auxiliary surface, request allocation for an
158 * additional buffer that mainly stores fast-clear values. Use of this buffer
159 * allows us to access the image's subresources while being aware of their
160 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
161 * which a fast clear has occurred).
163 * For the purpose of discoverability, the algorithm used to manage this buffer
164 * is described here. A clear value in this buffer is updated when a fast clear
165 * is performed on a subresource. One of two synchronization operations is
166 * performed in order for a following memory access to use the fast-clear
168 * a. Copy the value from the buffer to the surface state object used for
169 * reading. This is done implicitly when the value is the clear value
170 * predetermined to be the default in other surface state objects. This
171 * is currently only done explicitly for the operation below.
172 * b. Do (a) and use the surface state object to resolve the subresource.
173 * This is only done during layout transitions for decent performance.
175 * With the above scheme, we can fast-clear whenever the hardware allows except
176 * for two cases in which synchronization becomes impossible or undesirable:
177 * * The subresource is in the GENERAL layout and is cleared to a value
178 * other than the special default value.
180 * Performing a synchronization operation in order to read from the
181 * subresource is undesirable in this case. Firstly, b) is not an option
182 * because a layout transition isn't required between a write and read of
183 * an image in the GENERAL layout. Secondly, it's undesirable to do a)
184 * explicitly because it would require large infrastructural changes. The
185 * Vulkan API supports us in deciding not to optimize this layout by
186 * stating that using this layout may cause suboptimal performance. NOTE:
187 * the auxiliary buffer must always be enabled to support a) implicitly.
190 * * For the given miplevel, only some of the layers are cleared at once.
192 * If the user clears each layer to a different value, then tries to
193 * render to multiple layers at once, we have no ability to perform a
194 * synchronization operation in between. a) is not helpful because the
195 * object can only hold one clear value. b) is not an option because a
196 * layout transition isn't required in this case.
199 add_fast_clear_state_buffer(struct anv_image
*image
,
200 VkImageAspectFlagBits aspect
,
202 const struct anv_device
*device
)
204 assert(image
&& device
);
205 assert(image
->planes
[plane
].aux_surface
.isl
.size
> 0 &&
206 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
208 /* The offset to the buffer of clear values must be dword-aligned for GPU
209 * memcpy operations. It is located immediately after the auxiliary surface.
212 /* Tiled images are guaranteed to be 4K aligned, so the image alignment
213 * should also be dword-aligned.
215 assert(image
->alignment
% 4 == 0);
217 /* Auxiliary buffers should be a multiple of 4K, so the start of the clear
218 * values buffer should already be dword-aligned.
220 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
222 /* This buffer should be at the very end of the plane. */
223 if (image
->disjoint
) {
224 assert(image
->planes
[plane
].size
==
225 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
227 assert(image
->size
==
228 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
231 const unsigned entry_size
= anv_fast_clear_state_entry_size(device
);
232 /* There's no padding between entries, so ensure that they're always a
233 * multiple of 32 bits in order to enable GPU memcpy operations.
235 assert(entry_size
% 4 == 0);
237 const unsigned plane_state_size
=
238 entry_size
* anv_image_aux_levels(image
, aspect
);
240 image
->planes
[plane
].fast_clear_state_offset
=
241 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
243 image
->planes
[plane
].size
+= plane_state_size
;
244 image
->size
+= plane_state_size
;
248 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
249 * image's memory requirements (that is, the image's size and alignment).
252 make_surface(const struct anv_device
*dev
,
253 struct anv_image
*image
,
254 const struct anv_image_create_info
*anv_info
,
255 VkImageAspectFlagBits aspect
)
257 const VkImageCreateInfo
*vk_info
= anv_info
->vk_info
;
260 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
261 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
262 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
263 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
266 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
267 * result with an optionally provided ISL tiling argument.
269 isl_tiling_flags_t tiling_flags
=
270 (vk_info
->tiling
== VK_IMAGE_TILING_LINEAR
) ?
271 ISL_TILING_LINEAR_BIT
: ISL_TILING_ANY_MASK
;
273 if (anv_info
->isl_tiling_flags
)
274 tiling_flags
&= anv_info
->isl_tiling_flags
;
276 assert(tiling_flags
);
278 image
->extent
= anv_sanitize_image_extent(vk_info
->imageType
,
281 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
282 const struct anv_format_plane plane_format
=
283 anv_get_format_plane(&dev
->info
, image
->vk_format
, aspect
, image
->tiling
);
284 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
286 const isl_surf_usage_flags_t usage
=
287 choose_isl_surf_usage(vk_info
->flags
, image
->usage
,
288 anv_info
->isl_extra_usage_flags
, aspect
);
290 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
291 * fall back to linear on Broadwell and earlier because we aren't
292 * guaranteed that we can handle offsets correctly. On Sky Lake, the
293 * horizontal and vertical alignments are sufficiently high that we can
294 * just use RENDER_SURFACE_STATE::X/Y Offset.
296 bool needs_shadow
= false;
297 if (dev
->info
.gen
<= 8 &&
298 (vk_info
->flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT_KHR
) &&
299 vk_info
->tiling
== VK_IMAGE_TILING_OPTIMAL
) {
300 assert(isl_format_is_compressed(plane_format
.isl_format
));
301 tiling_flags
= ISL_TILING_LINEAR_BIT
;
305 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
306 .dim
= vk_to_isl_surf_dim
[vk_info
->imageType
],
307 .format
= plane_format
.isl_format
,
308 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
309 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
310 .depth
= image
->extent
.depth
,
311 .levels
= vk_info
->mipLevels
,
312 .array_len
= vk_info
->arrayLayers
,
313 .samples
= vk_info
->samples
,
315 .row_pitch
= anv_info
->stride
,
317 .tiling_flags
= tiling_flags
);
319 /* isl_surf_init() will fail only if provided invalid input. Invalid input
320 * is illegal in Vulkan.
324 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
326 add_surface(image
, anv_surf
, plane
);
328 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
329 * create an identical tiled shadow surface for use while texturing so we
330 * don't get garbage performance.
333 assert(aspect
== VK_IMAGE_ASPECT_COLOR_BIT
);
334 assert(tiling_flags
== ISL_TILING_LINEAR_BIT
);
336 ok
= isl_surf_init(&dev
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
337 .dim
= vk_to_isl_surf_dim
[vk_info
->imageType
],
338 .format
= plane_format
.isl_format
,
339 .width
= image
->extent
.width
,
340 .height
= image
->extent
.height
,
341 .depth
= image
->extent
.depth
,
342 .levels
= vk_info
->mipLevels
,
343 .array_len
= vk_info
->arrayLayers
,
344 .samples
= vk_info
->samples
,
346 .row_pitch
= anv_info
->stride
,
348 .tiling_flags
= ISL_TILING_ANY_MASK
);
350 /* isl_surf_init() will fail only if provided invalid input. Invalid input
351 * is illegal in Vulkan.
355 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
358 /* Add a HiZ surface to a depth buffer that will be used for rendering.
360 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
361 /* We don't advertise that depth buffers could be used as storage
364 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
366 /* Allow the user to control HiZ enabling. Disable by default on gen7
367 * because resolves are not currently implemented pre-BDW.
369 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
370 /* It will never be used as an attachment, HiZ is pointless. */
371 } else if (dev
->info
.gen
== 7) {
372 anv_perf_warn(dev
->instance
, image
, "Implement gen7 HiZ");
373 } else if (vk_info
->mipLevels
> 1) {
374 anv_perf_warn(dev
->instance
, image
, "Enable multi-LOD HiZ");
375 } else if (vk_info
->arrayLayers
> 1) {
376 anv_perf_warn(dev
->instance
, image
,
377 "Implement multi-arrayLayer HiZ clears and resolves");
378 } else if (dev
->info
.gen
== 8 && vk_info
->samples
> 1) {
379 anv_perf_warn(dev
->instance
, image
, "Enable gen8 multisampled HiZ");
380 } else if (!unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
)) {
381 assert(image
->planes
[plane
].aux_surface
.isl
.size
== 0);
382 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
,
383 &image
->planes
[plane
].surface
.isl
,
384 &image
->planes
[plane
].aux_surface
.isl
);
386 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
387 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
389 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && vk_info
->samples
== 1) {
390 /* TODO: Disallow compression with :
392 * 1) non multiplanar images (We appear to hit a sampler bug with
393 * CCS & R16G16 format. Putting the clear state a page/4096bytes
394 * further fixes the issue).
396 * 2) alias images, because they might be aliases of images
399 * 3) compression disabled by debug
401 const bool allow_compression
=
402 image
->n_planes
== 1 &&
403 (vk_info
->flags
& VK_IMAGE_CREATE_ALIAS_BIT_KHR
) == 0 &&
404 likely((INTEL_DEBUG
& DEBUG_NO_RBC
) == 0);
406 if (allow_compression
) {
407 assert(image
->planes
[plane
].aux_surface
.isl
.size
== 0);
408 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
,
409 &image
->planes
[plane
].surface
.isl
,
410 &image
->planes
[plane
].aux_surface
.isl
, 0);
413 /* Disable CCS when it is not useful (i.e., when you can't render
414 * to the image with CCS enabled).
416 if (!isl_format_supports_rendering(&dev
->info
,
417 plane_format
.isl_format
)) {
418 /* While it may be technically possible to enable CCS for this
419 * image, we currently don't have things hooked up to get it
422 anv_perf_warn(dev
->instance
, image
,
423 "This image format doesn't support rendering. "
424 "Not allocating an CCS buffer.");
425 image
->planes
[plane
].aux_surface
.isl
.size
= 0;
429 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
430 add_fast_clear_state_buffer(image
, aspect
, plane
, dev
);
432 /* For images created without MUTABLE_FORMAT_BIT set, we know that
433 * they will always be used with the original format. In
434 * particular, they will always be used with a format that
435 * supports color compression. If it's never used as a storage
436 * image, then it will only be used through the sampler or the as
437 * a render target. This means that it's safe to just leave
438 * compression on at all times for these formats.
440 if (!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
441 all_formats_ccs_e_compatible(&dev
->info
, vk_info
)) {
442 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
446 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && vk_info
->samples
> 1) {
447 assert(!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
448 assert(image
->planes
[plane
].aux_surface
.isl
.size
== 0);
449 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
,
450 &image
->planes
[plane
].surface
.isl
,
451 &image
->planes
[plane
].aux_surface
.isl
);
453 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
454 add_fast_clear_state_buffer(image
, aspect
, plane
, dev
);
455 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
459 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
461 /* Upper bound of the last surface should be smaller than the plane's
464 assert((MAX2(image
->planes
[plane
].surface
.offset
,
465 image
->planes
[plane
].aux_surface
.offset
) +
466 (image
->planes
[plane
].aux_surface
.isl
.size
> 0 ?
467 image
->planes
[plane
].aux_surface
.isl
.size
:
468 image
->planes
[plane
].surface
.isl
.size
)) <=
469 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
471 if (image
->planes
[plane
].aux_surface
.isl
.size
) {
472 /* assert(image->planes[plane].fast_clear_state_offset == */
473 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size)); */
474 assert(image
->planes
[plane
].fast_clear_state_offset
<
475 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
482 anv_image_create(VkDevice _device
,
483 const struct anv_image_create_info
*create_info
,
484 const VkAllocationCallbacks
* alloc
,
487 ANV_FROM_HANDLE(anv_device
, device
, _device
);
488 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
489 struct anv_image
*image
= NULL
;
492 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
494 anv_assert(pCreateInfo
->mipLevels
> 0);
495 anv_assert(pCreateInfo
->arrayLayers
> 0);
496 anv_assert(pCreateInfo
->samples
> 0);
497 anv_assert(pCreateInfo
->extent
.width
> 0);
498 anv_assert(pCreateInfo
->extent
.height
> 0);
499 anv_assert(pCreateInfo
->extent
.depth
> 0);
501 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
502 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
504 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
506 image
->type
= pCreateInfo
->imageType
;
507 image
->extent
= pCreateInfo
->extent
;
508 image
->vk_format
= pCreateInfo
->format
;
509 image
->format
= anv_get_format(pCreateInfo
->format
);
510 image
->aspects
= vk_format_aspects(image
->vk_format
);
511 image
->levels
= pCreateInfo
->mipLevels
;
512 image
->array_size
= pCreateInfo
->arrayLayers
;
513 image
->samples
= pCreateInfo
->samples
;
514 image
->usage
= pCreateInfo
->usage
;
515 image
->tiling
= pCreateInfo
->tiling
;
516 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT_KHR
;
518 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
519 assert(format
!= NULL
);
521 image
->n_planes
= format
->n_planes
;
524 for_each_bit(b
, image
->aspects
) {
525 r
= make_surface(device
, image
, create_info
, (1 << b
));
530 *pImage
= anv_image_to_handle(image
);
536 vk_free2(&device
->alloc
, alloc
, image
);
542 anv_CreateImage(VkDevice device
,
543 const VkImageCreateInfo
*pCreateInfo
,
544 const VkAllocationCallbacks
*pAllocator
,
548 const VkNativeBufferANDROID
*gralloc_info
=
549 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
552 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
556 return anv_image_create(device
,
557 &(struct anv_image_create_info
) {
558 .vk_info
= pCreateInfo
,
565 anv_DestroyImage(VkDevice _device
, VkImage _image
,
566 const VkAllocationCallbacks
*pAllocator
)
568 ANV_FROM_HANDLE(anv_device
, device
, _device
);
569 ANV_FROM_HANDLE(anv_image
, image
, _image
);
574 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
575 if (image
->planes
[p
].bo_is_owned
) {
576 assert(image
->planes
[p
].bo
!= NULL
);
577 anv_bo_cache_release(device
, &device
->bo_cache
, image
->planes
[p
].bo
);
581 vk_free2(&device
->alloc
, pAllocator
, image
);
584 static void anv_image_bind_memory_plane(struct anv_device
*device
,
585 struct anv_image
*image
,
587 struct anv_device_memory
*memory
,
588 uint32_t memory_offset
)
590 assert(!image
->planes
[plane
].bo_is_owned
);
593 image
->planes
[plane
].bo
= NULL
;
594 image
->planes
[plane
].bo_offset
= 0;
598 image
->planes
[plane
].bo
= memory
->bo
;
599 image
->planes
[plane
].bo_offset
= memory_offset
;
602 VkResult
anv_BindImageMemory(
605 VkDeviceMemory _memory
,
606 VkDeviceSize memoryOffset
)
608 ANV_FROM_HANDLE(anv_device
, device
, _device
);
609 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
610 ANV_FROM_HANDLE(anv_image
, image
, _image
);
613 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
615 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
616 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
622 VkResult
anv_BindImageMemory2KHR(
624 uint32_t bindInfoCount
,
625 const VkBindImageMemoryInfoKHR
* pBindInfos
)
627 ANV_FROM_HANDLE(anv_device
, device
, _device
);
629 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
630 const VkBindImageMemoryInfoKHR
*bind_info
= &pBindInfos
[i
];
631 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
632 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
633 VkImageAspectFlags aspects
= image
->aspects
;
635 vk_foreach_struct_const(s
, bind_info
->pNext
) {
637 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO_KHR
: {
638 const VkBindImagePlaneMemoryInfoKHR
*plane_info
=
639 (const VkBindImagePlaneMemoryInfoKHR
*) s
;
641 aspects
= plane_info
->planeAspect
;
645 anv_debug_ignored_stype(s
->sType
);
651 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
653 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
654 anv_image_bind_memory_plane(device
, image
, plane
,
655 mem
, bind_info
->memoryOffset
);
663 anv_surface_get_subresource_layout(struct anv_image
*image
,
664 struct anv_surface
*surface
,
665 const VkImageSubresource
*subresource
,
666 VkSubresourceLayout
*layout
)
668 /* If we are on a non-zero mip level or array slice, we need to
669 * calculate a real offset.
671 anv_assert(subresource
->mipLevel
== 0);
672 anv_assert(subresource
->arrayLayer
== 0);
674 layout
->offset
= surface
->offset
;
675 layout
->rowPitch
= surface
->isl
.row_pitch
;
676 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
677 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
678 layout
->size
= surface
->isl
.size
;
681 void anv_GetImageSubresourceLayout(
684 const VkImageSubresource
* pSubresource
,
685 VkSubresourceLayout
* pLayout
)
687 ANV_FROM_HANDLE(anv_image
, image
, _image
);
689 assert(__builtin_popcount(pSubresource
->aspectMask
) == 1);
691 anv_surface_get_subresource_layout(image
,
693 pSubresource
->aspectMask
),
694 pSubresource
, pLayout
);
698 * This function determines the optimal buffer to use for a given
699 * VkImageLayout and other pieces of information needed to make that
700 * determination. This does not determine the optimal buffer to use
701 * during a resolve operation.
703 * @param devinfo The device information of the Intel GPU.
704 * @param image The image that may contain a collection of buffers.
705 * @param plane The plane of the image to be accessed.
706 * @param layout The current layout of the image aspect(s).
708 * @return The primary buffer that should be used for the given layout.
711 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
712 const struct anv_image
* const image
,
713 const VkImageAspectFlagBits aspect
,
714 const VkImageLayout layout
)
716 /* Validate the inputs. */
718 /* The devinfo is needed as the optimal buffer varies across generations. */
719 assert(devinfo
!= NULL
);
721 /* The layout of a NULL image is not properly defined. */
722 assert(image
!= NULL
);
724 /* The aspect must be exactly one of the image aspects. */
725 assert(_mesa_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
727 /* Determine the optimal buffer. */
729 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
731 /* If there is no auxiliary surface allocated, we must use the one and only
734 if (image
->planes
[plane
].aux_surface
.isl
.size
== 0)
735 return ISL_AUX_USAGE_NONE
;
737 /* All images that use an auxiliary surface are required to be tiled. */
738 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
740 /* Stencil has no aux */
741 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
743 /* The following switch currently only handles depth stencil aspects.
744 * TODO: Handle the color aspect.
746 if (image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
)
747 return image
->planes
[plane
].aux_usage
;
751 /* Invalid Layouts */
752 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
753 case VK_IMAGE_LAYOUT_MAX_ENUM
:
754 unreachable("Invalid image layout.");
758 * The pre-initialized layout is equivalent to the undefined layout for
759 * optimally-tiled images. We can only do color compression (CCS or HiZ)
762 case VK_IMAGE_LAYOUT_UNDEFINED
:
763 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
764 return ISL_AUX_USAGE_NONE
;
769 * This buffer could be a depth buffer used in a transfer operation. BLORP
770 * currently doesn't use HiZ for transfer operations so we must use the main
771 * buffer for this layout. TODO: Enable HiZ in BLORP.
773 case VK_IMAGE_LAYOUT_GENERAL
:
774 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
775 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
776 return ISL_AUX_USAGE_NONE
;
779 /* Sampling Layouts */
780 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
781 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
783 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
784 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR
:
785 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
786 if (anv_can_sample_with_hiz(devinfo
, image
))
787 return ISL_AUX_USAGE_HIZ
;
789 return ISL_AUX_USAGE_NONE
;
791 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
792 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
794 /* On SKL+, the render buffer can be decompressed by the presentation
795 * engine. Support for this feature has not yet landed in the wider
796 * ecosystem. TODO: Update this code when support lands.
798 * From the BDW PRM, Vol 7, Render Target Resolve:
800 * If the MCS is enabled on a non-multisampled render target, the
801 * render target must be resolved before being used for other
802 * purposes (display, texture, CPU lock) The clear value from
803 * SURFACE_STATE is written into pixels in the render target
804 * indicated as clear in the MCS.
806 * Pre-SKL, the render buffer must be resolved before being used for
807 * presentation. We can infer that the auxiliary buffer is not used.
809 return ISL_AUX_USAGE_NONE
;
812 /* Rendering Layouts */
813 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
814 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
815 unreachable("Color images are not yet supported.");
817 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
818 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR
:
819 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
820 return ISL_AUX_USAGE_HIZ
;
822 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
823 unreachable("VK_KHR_shared_presentable_image is unsupported");
826 /* If the layout isn't recognized in the exhaustive switch above, the
827 * VkImageLayout value is not defined in vulkan.h.
829 unreachable("layout is not a VkImageLayout enumeration member.");
833 static struct anv_state
834 alloc_surface_state(struct anv_device
*device
)
836 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
839 static enum isl_channel_select
840 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
841 struct isl_swizzle format_swizzle
)
843 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
847 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
848 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
849 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
850 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
851 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
852 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
854 unreachable("Invalid swizzle");
859 anv_image_fill_surface_state(struct anv_device
*device
,
860 const struct anv_image
*image
,
861 VkImageAspectFlagBits aspect
,
862 const struct isl_view
*view_in
,
863 isl_surf_usage_flags_t view_usage
,
864 enum isl_aux_usage aux_usage
,
865 const union isl_color_value
*clear_color
,
866 enum anv_image_view_state_flags flags
,
867 struct anv_surface_state
*state_inout
,
868 struct brw_image_param
*image_param_out
)
870 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
872 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
873 *aux_surface
= &image
->planes
[plane
].aux_surface
;
875 struct isl_view view
= *view_in
;
876 view
.usage
|= view_usage
;
878 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
879 * compressed surface with a shadow surface, we use the shadow instead of
880 * the primary surface. The shadow surface will be tiled, unlike the main
881 * surface, so it should get significantly better performance.
883 if (image
->planes
[plane
].shadow_surface
.isl
.size
> 0 &&
884 isl_format_is_compressed(view
.format
) &&
885 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
886 assert(isl_format_is_compressed(surface
->isl
.format
));
887 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
888 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
889 surface
= &image
->planes
[plane
].shadow_surface
;
892 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
893 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
895 /* If this is a HiZ buffer we can sample from with a programmable clear
896 * value (SKL+), define the clear value to the optimal constant.
898 union isl_color_value default_clear_color
= { .u32
= { 0, } };
899 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
900 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
902 clear_color
= &default_clear_color
;
904 const uint64_t address
= image
->planes
[plane
].bo_offset
+ surface
->offset
;
905 const uint64_t aux_address
= aux_usage
== ISL_AUX_USAGE_NONE
?
906 0 : (image
->planes
[plane
].bo_offset
+ aux_surface
->offset
);
908 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
909 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
910 !isl_has_matching_typed_storage_image_format(&device
->info
,
912 /* In this case, we are a writeable storage buffer which needs to be
913 * lowered to linear. All tiling and offset calculations will be done in
916 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
917 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
919 .size
= surface
->isl
.size
,
920 .format
= ISL_FORMAT_RAW
,
922 .mocs
= device
->default_mocs
);
923 state_inout
->address
= address
,
924 state_inout
->aux_address
= 0;
926 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
927 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
928 /* Typed surface reads support a very limited subset of the shader
929 * image formats. Translate it into the closest format the hardware
932 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
933 view
.format
= isl_lower_storage_image_format(&device
->info
,
937 const struct isl_surf
*isl_surf
= &surface
->isl
;
939 struct isl_surf tmp_surf
;
940 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
941 if (isl_format_is_compressed(surface
->isl
.format
) &&
942 !isl_format_is_compressed(view
.format
)) {
943 /* We're creating an uncompressed view of a compressed surface. This
944 * is allowed but only for a single level/layer.
946 assert(surface
->isl
.samples
== 1);
947 assert(view
.levels
== 1);
948 assert(view
.array_len
== 1);
950 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
952 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
953 0 : view
.base_array_layer
,
954 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
955 view
.base_array_layer
: 0,
957 &offset_B
, &tile_x_sa
, &tile_y_sa
);
959 /* The newly created image represents the one subimage we're
960 * referencing with this view so it only has one array slice and
963 view
.base_array_layer
= 0;
966 /* We're making an uncompressed view here. The image dimensions need
967 * to be scaled down by the block size.
969 const struct isl_format_layout
*fmtl
=
970 isl_format_get_layout(surface
->isl
.format
);
971 tmp_surf
.format
= view
.format
;
972 tmp_surf
.logical_level0_px
.width
=
973 DIV_ROUND_UP(tmp_surf
.logical_level0_px
.width
, fmtl
->bw
);
974 tmp_surf
.logical_level0_px
.height
=
975 DIV_ROUND_UP(tmp_surf
.logical_level0_px
.height
, fmtl
->bh
);
976 tmp_surf
.phys_level0_sa
.width
/= fmtl
->bw
;
977 tmp_surf
.phys_level0_sa
.height
/= fmtl
->bh
;
978 tile_x_sa
/= fmtl
->bw
;
979 tile_y_sa
/= fmtl
->bh
;
981 isl_surf
= &tmp_surf
;
983 if (device
->info
.gen
<= 8) {
984 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
985 assert(tile_x_sa
== 0);
986 assert(tile_y_sa
== 0);
990 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
993 .address
= address
+ offset_B
,
994 .clear_color
= *clear_color
,
995 .aux_surf
= &aux_surface
->isl
,
996 .aux_usage
= aux_usage
,
997 .aux_address
= aux_address
,
998 .mocs
= device
->default_mocs
,
999 .x_offset_sa
= tile_x_sa
,
1000 .y_offset_sa
= tile_y_sa
);
1001 state_inout
->address
= address
+ offset_B
;
1002 if (device
->info
.gen
>= 8) {
1003 state_inout
->aux_address
= aux_address
;
1005 /* On gen7 and prior, the bottom 12 bits of the MCS base address are
1006 * used to store other information. This should be ok, however,
1007 * because surface buffer addresses are always 4K page alinged.
1009 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1010 device
->isl_dev
.ss
.aux_addr_offset
;
1011 assert((aux_address
& 0xfff) == 0);
1012 assert(aux_address
== (*aux_addr_dw
& 0xfffff000));
1013 state_inout
->aux_address
= *aux_addr_dw
;
1017 anv_state_flush(device
, state_inout
->state
);
1019 if (image_param_out
) {
1020 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1021 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1022 &surface
->isl
, &view
);
1026 static VkImageAspectFlags
1027 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1029 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1030 if (_mesa_bitcount(view_aspects
) == 1)
1031 return VK_IMAGE_ASPECT_COLOR_BIT
;
1033 VkImageAspectFlags color_aspects
= 0;
1034 for (uint32_t i
= 0; i
< _mesa_bitcount(view_aspects
); i
++)
1035 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT_KHR
<< i
;
1036 return color_aspects
;
1038 /* No special remapping needed for depth & stencil aspects. */
1039 return view_aspects
;
1043 anv_CreateImageView(VkDevice _device
,
1044 const VkImageViewCreateInfo
*pCreateInfo
,
1045 const VkAllocationCallbacks
*pAllocator
,
1048 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1049 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1050 struct anv_image_view
*iview
;
1052 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1053 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1055 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1057 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1059 assert(range
->layerCount
> 0);
1060 assert(range
->baseMipLevel
< image
->levels
);
1062 const VkImageViewUsageCreateInfoKHR
*usage_info
=
1063 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO_KHR
);
1064 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image
->usage
;
1065 /* View usage should be a subset of image usage */
1066 assert((view_usage
& ~image
->usage
) == 0);
1067 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1068 VK_IMAGE_USAGE_STORAGE_BIT
|
1069 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1070 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1071 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1073 switch (image
->type
) {
1075 unreachable("bad VkImageType");
1076 case VK_IMAGE_TYPE_1D
:
1077 case VK_IMAGE_TYPE_2D
:
1078 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1080 case VK_IMAGE_TYPE_3D
:
1081 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1082 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1086 /* First expand aspects to the image's ones (for example
1087 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1088 * VK_IMAGE_ASPECT_PLANE_0_BIT_KHR | VK_IMAGE_ASPECT_PLANE_1_BIT_KHR |
1089 * VK_IMAGE_ASPECT_PLANE_2_BIT_KHR for an image of format
1090 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM_KHR.
1092 VkImageAspectFlags expanded_aspects
=
1093 anv_image_expand_aspects(image
, range
->aspectMask
);
1095 iview
->image
= image
;
1097 /* Remap the expanded aspects for the image view. For example if only
1098 * VK_IMAGE_ASPECT_PLANE_1_BIT_KHR was given in range->aspectMask, we will
1099 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1100 * the image view, it only has a single plane.
1102 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1103 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1104 iview
->vk_format
= pCreateInfo
->format
;
1106 iview
->extent
= (VkExtent3D
) {
1107 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1108 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1109 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1112 /* Now go through the underlying image selected planes (computed in
1113 * expanded_aspects) and map them to planes in the image view.
1115 uint32_t iaspect_bit
, vplane
= 0;
1116 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1118 anv_image_aspect_to_plane(expanded_aspects
, 1UL << iaspect_bit
);
1119 VkImageAspectFlags vplane_aspect
=
1120 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1121 struct anv_format_plane format
=
1122 anv_get_format_plane(&device
->info
, pCreateInfo
->format
,
1123 vplane_aspect
, image
->tiling
);
1125 iview
->planes
[vplane
].image_plane
= iplane
;
1127 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1128 .format
= format
.isl_format
,
1129 .base_level
= range
->baseMipLevel
,
1130 .levels
= anv_get_levelCount(image
, range
),
1131 .base_array_layer
= range
->baseArrayLayer
,
1132 .array_len
= anv_get_layerCount(image
, range
),
1134 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1135 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1136 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1137 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1138 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1139 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1140 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1141 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
1145 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
1146 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
1147 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
1150 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
1151 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
1152 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
1154 iview
->planes
[vplane
].isl
.usage
= 0;
1157 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
1158 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
1159 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
1160 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
1161 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
1163 enum isl_aux_usage general_aux_usage
=
1164 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1165 VK_IMAGE_LAYOUT_GENERAL
);
1166 enum isl_aux_usage optimal_aux_usage
=
1167 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1168 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
1170 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1171 &iview
->planes
[vplane
].isl
,
1172 ISL_SURF_USAGE_TEXTURE_BIT
,
1173 optimal_aux_usage
, NULL
,
1174 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
1175 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
1178 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1179 &iview
->planes
[vplane
].isl
,
1180 ISL_SURF_USAGE_TEXTURE_BIT
,
1181 general_aux_usage
, NULL
,
1183 &iview
->planes
[vplane
].general_sampler_surface_state
,
1187 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1188 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
1189 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
1190 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
1192 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1193 &iview
->planes
[vplane
].isl
,
1194 ISL_SURF_USAGE_STORAGE_BIT
,
1195 ISL_AUX_USAGE_NONE
, NULL
,
1197 &iview
->planes
[vplane
].storage_surface_state
,
1198 &iview
->planes
[vplane
].storage_image_param
);
1200 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1201 &iview
->planes
[vplane
].isl
,
1202 ISL_SURF_USAGE_STORAGE_BIT
,
1203 ISL_AUX_USAGE_NONE
, NULL
,
1204 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
1205 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
1212 *pView
= anv_image_view_to_handle(iview
);
1218 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
1219 const VkAllocationCallbacks
*pAllocator
)
1221 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1222 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
1227 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
1228 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
1229 anv_state_pool_free(&device
->surface_state_pool
,
1230 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
1233 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
1234 anv_state_pool_free(&device
->surface_state_pool
,
1235 iview
->planes
[plane
].general_sampler_surface_state
.state
);
1238 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
1239 anv_state_pool_free(&device
->surface_state_pool
,
1240 iview
->planes
[plane
].storage_surface_state
.state
);
1243 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
1244 anv_state_pool_free(&device
->surface_state_pool
,
1245 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
1249 vk_free2(&device
->alloc
, pAllocator
, iview
);
1254 anv_CreateBufferView(VkDevice _device
,
1255 const VkBufferViewCreateInfo
*pCreateInfo
,
1256 const VkAllocationCallbacks
*pAllocator
,
1257 VkBufferView
*pView
)
1259 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1260 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
1261 struct anv_buffer_view
*view
;
1263 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
1264 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1266 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1268 /* TODO: Handle the format swizzle? */
1270 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
1271 VK_IMAGE_ASPECT_COLOR_BIT
,
1272 VK_IMAGE_TILING_LINEAR
);
1273 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
1274 view
->bo
= buffer
->bo
;
1275 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
1276 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
1277 pCreateInfo
->range
);
1278 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
1280 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
1281 view
->surface_state
= alloc_surface_state(device
);
1283 anv_fill_buffer_surface_state(device
, view
->surface_state
,
1285 view
->offset
, view
->range
, format_bs
);
1287 view
->surface_state
= (struct anv_state
){ 0 };
1290 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
1291 view
->storage_surface_state
= alloc_surface_state(device
);
1292 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
1294 enum isl_format storage_format
=
1295 isl_has_matching_typed_storage_image_format(&device
->info
,
1297 isl_lower_storage_image_format(&device
->info
, view
->format
) :
1300 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
1302 view
->offset
, view
->range
,
1303 (storage_format
== ISL_FORMAT_RAW
? 1 :
1304 isl_format_get_layout(storage_format
)->bpb
/ 8));
1306 /* Write-only accesses should use the original format. */
1307 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
1309 view
->offset
, view
->range
,
1310 isl_format_get_layout(view
->format
)->bpb
/ 8);
1312 isl_buffer_fill_image_param(&device
->isl_dev
,
1313 &view
->storage_image_param
,
1314 view
->format
, view
->range
);
1316 view
->storage_surface_state
= (struct anv_state
){ 0 };
1317 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
1320 *pView
= anv_buffer_view_to_handle(view
);
1326 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
1327 const VkAllocationCallbacks
*pAllocator
)
1329 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1330 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
1335 if (view
->surface_state
.alloc_size
> 0)
1336 anv_state_pool_free(&device
->surface_state_pool
,
1337 view
->surface_state
);
1339 if (view
->storage_surface_state
.alloc_size
> 0)
1340 anv_state_pool_free(&device
->surface_state_pool
,
1341 view
->storage_surface_state
);
1343 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
1344 anv_state_pool_free(&device
->surface_state_pool
,
1345 view
->writeonly_storage_surface_state
);
1347 vk_free2(&device
->alloc
, pAllocator
, view
);
1350 const struct anv_surface
*
1351 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
1352 VkImageAspectFlags aspect_mask
)
1354 VkImageAspectFlags sanitized_mask
;
1356 switch (aspect_mask
) {
1357 case VK_IMAGE_ASPECT_COLOR_BIT
:
1358 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1359 sanitized_mask
= VK_IMAGE_ASPECT_COLOR_BIT
;
1361 case VK_IMAGE_ASPECT_DEPTH_BIT
:
1362 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1363 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1365 case VK_IMAGE_ASPECT_STENCIL_BIT
:
1366 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1367 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1369 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
1370 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
1371 * combined depth stencil formats. Specifically, it states:
1373 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
1374 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
1376 * Image views with both depth and stencil aspects are only valid for
1377 * render target attachments, in which case
1378 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
1379 * stencil surfaces from the underlying surface.
1381 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
1382 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1384 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
1385 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1388 case VK_IMAGE_ASPECT_PLANE_0_BIT_KHR
:
1389 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1390 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_0_BIT_KHR
;
1392 case VK_IMAGE_ASPECT_PLANE_1_BIT_KHR
:
1393 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1394 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_1_BIT_KHR
;
1396 case VK_IMAGE_ASPECT_PLANE_2_BIT_KHR
:
1397 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1398 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_2_BIT_KHR
;
1401 unreachable("image does not have aspect");
1405 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, sanitized_mask
);
1406 return &image
->planes
[plane
].surface
;