2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
31 #include "util/debug.h"
33 #include "vk_format_info.h"
36 * Exactly one bit must be set in \a aspect.
38 static isl_surf_usage_flags_t
39 choose_isl_surf_usage(VkImageUsageFlags vk_usage
,
40 VkImageAspectFlags aspect
)
42 isl_surf_usage_flags_t isl_usage
= 0;
44 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
45 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
47 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
53 if (vk_usage
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
56 /* Even if we're only using it for transfer operations, clears to depth and
57 * stencil images happen as depth and stencil so they need the right ISL
58 * usage bits or else things will fall apart.
61 case VK_IMAGE_ASPECT_DEPTH_BIT
:
62 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
64 case VK_IMAGE_ASPECT_STENCIL_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
67 case VK_IMAGE_ASPECT_COLOR_BIT
:
70 unreachable("bad VkImageAspect");
73 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
74 /* blorp implements transfers by sampling from the source image. */
75 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
78 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
79 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
80 /* blorp implements transfers by rendering into the destination image.
81 * Only request this with color images, as we deal with depth/stencil
82 * formats differently. */
83 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
90 * Exactly one bit must be set in \a aspect.
92 static struct anv_surface
*
93 get_surface(struct anv_image
*image
, VkImageAspectFlags aspect
)
97 unreachable("bad VkImageAspect");
98 case VK_IMAGE_ASPECT_COLOR_BIT
:
99 return &image
->color_surface
;
100 case VK_IMAGE_ASPECT_DEPTH_BIT
:
101 return &image
->depth_surface
;
102 case VK_IMAGE_ASPECT_STENCIL_BIT
:
103 return &image
->stencil_surface
;
108 add_surface(struct anv_image
*image
, struct anv_surface
*surf
)
110 assert(surf
->isl
.size
> 0); /* isl surface must be initialized */
112 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment
);
113 image
->size
= surf
->offset
+ surf
->isl
.size
;
114 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment
);
118 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
119 * image's memory requirements (that is, the image's size and alignment).
121 * Exactly one bit must be set in \a aspect.
124 make_surface(const struct anv_device
*dev
,
125 struct anv_image
*image
,
126 const struct anv_image_create_info
*anv_info
,
127 VkImageAspectFlags aspect
)
129 const VkImageCreateInfo
*vk_info
= anv_info
->vk_info
;
132 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
133 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
134 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
135 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
138 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
139 * result with an optionally provided ISL tiling argument.
141 isl_tiling_flags_t tiling_flags
=
142 (vk_info
->tiling
== VK_IMAGE_TILING_LINEAR
) ?
143 ISL_TILING_LINEAR_BIT
: ISL_TILING_ANY_MASK
;
145 if (anv_info
->isl_tiling_flags
)
146 tiling_flags
&= anv_info
->isl_tiling_flags
;
148 assert(tiling_flags
);
150 struct anv_surface
*anv_surf
= get_surface(image
, aspect
);
152 image
->extent
= anv_sanitize_image_extent(vk_info
->imageType
,
155 enum isl_format format
= anv_get_isl_format(&dev
->info
, vk_info
->format
,
156 aspect
, vk_info
->tiling
);
157 assert(format
!= ISL_FORMAT_UNSUPPORTED
);
159 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
160 .dim
= vk_to_isl_surf_dim
[vk_info
->imageType
],
162 .width
= image
->extent
.width
,
163 .height
= image
->extent
.height
,
164 .depth
= image
->extent
.depth
,
165 .levels
= vk_info
->mipLevels
,
166 .array_len
= vk_info
->arrayLayers
,
167 .samples
= vk_info
->samples
,
169 .min_pitch
= anv_info
->stride
,
170 .usage
= choose_isl_surf_usage(image
->usage
, aspect
),
171 .tiling_flags
= tiling_flags
);
173 /* isl_surf_init() will fail only if provided invalid input. Invalid input
174 * is illegal in Vulkan.
178 add_surface(image
, anv_surf
);
180 /* Add a HiZ surface to a depth buffer that will be used for rendering.
182 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
183 /* We don't advertise that depth buffers could be used as storage
186 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
188 /* Allow the user to control HiZ enabling. Disable by default on gen7
189 * because resolves are not currently implemented pre-BDW.
191 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
192 /* It will never be used as an attachment, HiZ is pointless. */
193 } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev
->info
.gen
>= 8)) {
194 anv_perf_warn("Implement gen7 HiZ");
195 } else if (vk_info
->mipLevels
> 1) {
196 anv_perf_warn("Enable multi-LOD HiZ");
197 } else if (vk_info
->arrayLayers
> 1) {
198 anv_perf_warn("Implement multi-arrayLayer HiZ clears and resolves");
199 } else if (dev
->info
.gen
== 8 && vk_info
->samples
> 1) {
200 anv_perf_warn("Enable gen8 multisampled HiZ");
202 assert(image
->aux_surface
.isl
.size
== 0);
203 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
, &image
->depth_surface
.isl
,
204 &image
->aux_surface
.isl
);
206 add_surface(image
, &image
->aux_surface
);
207 image
->aux_usage
= ISL_AUX_USAGE_HIZ
;
209 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
== 1) {
210 if (!unlikely(INTEL_DEBUG
& DEBUG_NO_RBC
)) {
211 assert(image
->aux_surface
.isl
.size
== 0);
212 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
213 &image
->aux_surface
.isl
);
215 add_surface(image
, &image
->aux_surface
);
217 /* For images created without MUTABLE_FORMAT_BIT set, we know that
218 * they will always be used with the original format. In
219 * particular, they will always be used with a format that
220 * supports color compression. If it's never used as a storage
221 * image, then it will only be used through the sampler or the as
222 * a render target. This means that it's safe to just leave
223 * compression on at all times for these formats.
225 if (!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
226 !(vk_info
->flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
) &&
227 isl_format_supports_ccs_e(&dev
->info
, format
)) {
228 image
->aux_usage
= ISL_AUX_USAGE_CCS_E
;
232 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
> 1) {
233 assert(image
->aux_surface
.isl
.size
== 0);
234 assert(!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
235 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
236 &image
->aux_surface
.isl
);
238 add_surface(image
, &image
->aux_surface
);
239 image
->aux_usage
= ISL_AUX_USAGE_MCS
;
247 anv_image_create(VkDevice _device
,
248 const struct anv_image_create_info
*create_info
,
249 const VkAllocationCallbacks
* alloc
,
252 ANV_FROM_HANDLE(anv_device
, device
, _device
);
253 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
254 struct anv_image
*image
= NULL
;
257 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
259 anv_assert(pCreateInfo
->mipLevels
> 0);
260 anv_assert(pCreateInfo
->arrayLayers
> 0);
261 anv_assert(pCreateInfo
->samples
> 0);
262 anv_assert(pCreateInfo
->extent
.width
> 0);
263 anv_assert(pCreateInfo
->extent
.height
> 0);
264 anv_assert(pCreateInfo
->extent
.depth
> 0);
266 image
= vk_alloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
267 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
269 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
271 memset(image
, 0, sizeof(*image
));
272 image
->type
= pCreateInfo
->imageType
;
273 image
->extent
= pCreateInfo
->extent
;
274 image
->vk_format
= pCreateInfo
->format
;
275 image
->aspects
= vk_format_aspects(image
->vk_format
);
276 image
->levels
= pCreateInfo
->mipLevels
;
277 image
->array_size
= pCreateInfo
->arrayLayers
;
278 image
->samples
= pCreateInfo
->samples
;
279 image
->usage
= pCreateInfo
->usage
;
280 image
->tiling
= pCreateInfo
->tiling
;
281 image
->aux_usage
= ISL_AUX_USAGE_NONE
;
284 for_each_bit(b
, image
->aspects
) {
285 r
= make_surface(device
, image
, create_info
, (1 << b
));
290 *pImage
= anv_image_to_handle(image
);
296 vk_free2(&device
->alloc
, alloc
, image
);
302 anv_CreateImage(VkDevice device
,
303 const VkImageCreateInfo
*pCreateInfo
,
304 const VkAllocationCallbacks
*pAllocator
,
307 return anv_image_create(device
,
308 &(struct anv_image_create_info
) {
309 .vk_info
= pCreateInfo
,
316 anv_DestroyImage(VkDevice _device
, VkImage _image
,
317 const VkAllocationCallbacks
*pAllocator
)
319 ANV_FROM_HANDLE(anv_device
, device
, _device
);
320 ANV_FROM_HANDLE(anv_image
, image
, _image
);
325 vk_free2(&device
->alloc
, pAllocator
, image
);
328 VkResult
anv_BindImageMemory(
331 VkDeviceMemory _memory
,
332 VkDeviceSize memoryOffset
)
334 ANV_FROM_HANDLE(anv_device
, device
, _device
);
335 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
336 ANV_FROM_HANDLE(anv_image
, image
, _image
);
339 image
->bo
= &mem
->bo
;
340 image
->offset
= memoryOffset
;
346 if (image
->aux_surface
.isl
.size
> 0) {
348 /* The offset and size must be a multiple of 4K or else the
349 * anv_gem_mmap call below will return NULL.
351 assert((image
->offset
+ image
->aux_surface
.offset
) % 4096 == 0);
352 assert(image
->aux_surface
.isl
.size
% 4096 == 0);
354 /* Auxiliary surfaces need to have their memory cleared to 0 before they
355 * can be used. For CCS surfaces, this puts them in the "resolved"
356 * state so they can be used with CCS enabled before we ever touch it
357 * from the GPU. For HiZ, we need something valid or else we may get
358 * GPU hangs on some hardware and 0 works fine.
360 void *map
= anv_gem_mmap(device
, image
->bo
->gem_handle
,
361 image
->offset
+ image
->aux_surface
.offset
,
362 image
->aux_surface
.isl
.size
,
363 device
->info
.has_llc
? 0 : I915_MMAP_WC
);
365 /* If anv_gem_mmap returns NULL, it's likely that the kernel was
366 * not able to find space on the host to create a proper mapping.
369 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
371 memset(map
, 0, image
->aux_surface
.isl
.size
);
373 anv_gem_munmap(map
, image
->aux_surface
.isl
.size
);
380 anv_surface_get_subresource_layout(struct anv_image
*image
,
381 struct anv_surface
*surface
,
382 const VkImageSubresource
*subresource
,
383 VkSubresourceLayout
*layout
)
385 /* If we are on a non-zero mip level or array slice, we need to
386 * calculate a real offset.
388 anv_assert(subresource
->mipLevel
== 0);
389 anv_assert(subresource
->arrayLayer
== 0);
391 layout
->offset
= surface
->offset
;
392 layout
->rowPitch
= surface
->isl
.row_pitch
;
393 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
394 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
395 layout
->size
= surface
->isl
.size
;
398 void anv_GetImageSubresourceLayout(
401 const VkImageSubresource
* pSubresource
,
402 VkSubresourceLayout
* pLayout
)
404 ANV_FROM_HANDLE(anv_image
, image
, _image
);
406 assert(__builtin_popcount(pSubresource
->aspectMask
) == 1);
408 switch (pSubresource
->aspectMask
) {
409 case VK_IMAGE_ASPECT_COLOR_BIT
:
410 anv_surface_get_subresource_layout(image
, &image
->color_surface
,
411 pSubresource
, pLayout
);
413 case VK_IMAGE_ASPECT_DEPTH_BIT
:
414 anv_surface_get_subresource_layout(image
, &image
->depth_surface
,
415 pSubresource
, pLayout
);
417 case VK_IMAGE_ASPECT_STENCIL_BIT
:
418 anv_surface_get_subresource_layout(image
, &image
->stencil_surface
,
419 pSubresource
, pLayout
);
422 assert(!"Invalid image aspect");
427 * This function determines the optimal buffer to use for device
428 * accesses given a VkImageLayout and other pieces of information needed to
429 * make that determination. This does not determine the optimal buffer to
430 * use during a resolve operation.
432 * NOTE: Some layouts do not support device access.
434 * @param devinfo The device information of the Intel GPU.
435 * @param image The image that may contain a collection of buffers.
436 * @param aspects The aspect(s) of the image to be accessed.
437 * @param layout The current layout of the image aspect(s).
439 * @return The primary buffer that should be used for the given layout.
442 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
443 const struct anv_image
* const image
,
444 const VkImageAspectFlags aspects
,
445 const VkImageLayout layout
)
447 /* Validate the inputs. */
449 /* The devinfo is needed as the optimal buffer varies across generations. */
450 assert(devinfo
!= NULL
);
452 /* The layout of a NULL image is not properly defined. */
453 assert(image
!= NULL
);
455 /* The aspects must be a subset of the image aspects. */
456 assert(aspects
& image
->aspects
&& aspects
<= image
->aspects
);
458 /* Determine the optimal buffer. */
460 /* If there is no auxiliary surface allocated, we must use the one and only
463 if (image
->aux_surface
.isl
.size
== 0)
464 return ISL_AUX_USAGE_NONE
;
466 /* All images that use an auxiliary surface are required to be tiled. */
467 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
469 /* On BDW+, when clearing the stencil aspect of a depth stencil image,
470 * the HiZ buffer allows us to record the clear with a relatively small
471 * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
472 * to the stencil aspect.
474 if (devinfo
->gen
< 8 && aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
)
475 return ISL_AUX_USAGE_NONE
;
477 const bool color_aspect
= aspects
== VK_IMAGE_ASPECT_COLOR_BIT
;
479 /* The following switch currently only handles depth stencil aspects.
480 * TODO: Handle the color aspect.
483 return image
->aux_usage
;
487 /* Invalid Layouts */
489 /* According to the Vulkan Spec, the following layouts are valid only as
490 * initial layouts in a layout transition and don't support device access.
492 case VK_IMAGE_LAYOUT_UNDEFINED
:
493 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
494 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
495 case VK_IMAGE_LAYOUT_MAX_ENUM
:
496 unreachable("Invalid image layout for device access.");
501 * This buffer could be a depth buffer used in a transfer operation. BLORP
502 * currently doesn't use HiZ for transfer operations so we must use the main
503 * buffer for this layout. TODO: Enable HiZ in BLORP.
505 case VK_IMAGE_LAYOUT_GENERAL
:
506 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
507 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
508 return ISL_AUX_USAGE_NONE
;
511 /* Sampling Layouts */
512 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
513 assert(!color_aspect
);
515 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
516 if (anv_can_sample_with_hiz(devinfo
, aspects
, image
->samples
))
517 return ISL_AUX_USAGE_HIZ
;
519 return ISL_AUX_USAGE_NONE
;
521 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
522 assert(color_aspect
);
524 /* On SKL+, the render buffer can be decompressed by the presentation
525 * engine. Support for this feature has not yet landed in the wider
526 * ecosystem. TODO: Update this code when support lands.
528 * From the BDW PRM, Vol 7, Render Target Resolve:
530 * If the MCS is enabled on a non-multisampled render target, the
531 * render target must be resolved before being used for other
532 * purposes (display, texture, CPU lock) The clear value from
533 * SURFACE_STATE is written into pixels in the render target
534 * indicated as clear in the MCS.
536 * Pre-SKL, the render buffer must be resolved before being used for
537 * presentation. We can infer that the auxiliary buffer is not used.
539 return ISL_AUX_USAGE_NONE
;
542 /* Rendering Layouts */
543 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
544 assert(color_aspect
);
545 unreachable("Color images are not yet supported.");
547 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
548 assert(!color_aspect
);
549 return ISL_AUX_USAGE_HIZ
;
552 /* If the layout isn't recognized in the exhaustive switch above, the
553 * VkImageLayout value is not defined in vulkan.h.
555 unreachable("layout is not a VkImageLayout enumeration member.");
559 static struct anv_state
560 alloc_surface_state(struct anv_device
*device
)
562 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
565 static enum isl_channel_select
566 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
567 struct isl_swizzle format_swizzle
)
569 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
573 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
574 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
575 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
576 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
577 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
578 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
580 unreachable("Invalid swizzle");
586 anv_CreateImageView(VkDevice _device
,
587 const VkImageViewCreateInfo
*pCreateInfo
,
588 const VkAllocationCallbacks
*pAllocator
,
591 ANV_FROM_HANDLE(anv_device
, device
, _device
);
592 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
593 struct anv_image_view
*iview
;
595 iview
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
596 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
598 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
600 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
602 assert(range
->layerCount
> 0);
603 assert(range
->baseMipLevel
< image
->levels
);
604 assert(image
->usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
605 VK_IMAGE_USAGE_STORAGE_BIT
|
606 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
607 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
609 switch (image
->type
) {
611 unreachable("bad VkImageType");
612 case VK_IMAGE_TYPE_1D
:
613 case VK_IMAGE_TYPE_2D
:
614 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
616 case VK_IMAGE_TYPE_3D
:
617 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
618 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
622 const struct anv_surface
*surface
=
623 anv_image_get_surface_for_aspect_mask(image
, range
->aspectMask
);
625 iview
->image
= image
;
626 iview
->bo
= image
->bo
;
627 iview
->offset
= image
->offset
+ surface
->offset
;
629 iview
->aspect_mask
= pCreateInfo
->subresourceRange
.aspectMask
;
630 iview
->vk_format
= pCreateInfo
->format
;
632 struct anv_format format
= anv_get_format(&device
->info
, pCreateInfo
->format
,
633 range
->aspectMask
, image
->tiling
);
635 iview
->isl
= (struct isl_view
) {
636 .format
= format
.isl_format
,
637 .base_level
= range
->baseMipLevel
,
638 .levels
= anv_get_levelCount(image
, range
),
639 .base_array_layer
= range
->baseArrayLayer
,
640 .array_len
= anv_get_layerCount(image
, range
),
642 .r
= remap_swizzle(pCreateInfo
->components
.r
,
643 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
644 .g
= remap_swizzle(pCreateInfo
->components
.g
,
645 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
646 .b
= remap_swizzle(pCreateInfo
->components
.b
,
647 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
648 .a
= remap_swizzle(pCreateInfo
->components
.a
,
649 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
653 iview
->extent
= (VkExtent3D
) {
654 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
655 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
656 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
659 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
660 iview
->isl
.base_array_layer
= 0;
661 iview
->isl
.array_len
= iview
->extent
.depth
;
664 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
665 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
666 iview
->isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
668 iview
->isl
.usage
= 0;
671 /* Input attachment surfaces for color are allocated and filled
672 * out at BeginRenderPass time because they need compression information.
673 * Compression is not yet enabled for depth textures and stencil doesn't
674 * allow compression so we can just use the texture surface state from the
677 if (image
->usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
678 (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
679 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
680 iview
->sampler_surface_state
= alloc_surface_state(device
);
681 iview
->no_aux_sampler_surface_state
= alloc_surface_state(device
);
683 /* Sampling is performed in one of two buffer configurations in anv: with
684 * an auxiliary buffer or without it. Sampler states aren't always needed
685 * for both configurations, but are currently created unconditionally for
688 * TODO: Consider allocating each surface state only when necessary.
691 /* Create a sampler state with the optimal aux_usage for sampling. This
692 * may use the aux_buffer.
694 const enum isl_aux_usage surf_usage
=
695 anv_layout_to_aux_usage(&device
->info
, image
, iview
->aspect_mask
,
696 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
698 /* If this is a HiZ buffer we can sample from with a programmable clear
699 * value (SKL+), define the clear value to the optimal constant.
701 const float red_clear_color
= surf_usage
== ISL_AUX_USAGE_HIZ
&&
702 device
->info
.gen
>= 9 ?
703 ANV_HZ_FC_VAL
: 0.0f
;
705 struct isl_view view
= iview
->isl
;
706 view
.usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
707 isl_surf_fill_state(&device
->isl_dev
,
708 iview
->sampler_surface_state
.map
,
709 .surf
= &surface
->isl
,
711 .clear_color
.f32
= { red_clear_color
,},
712 .aux_surf
= &image
->aux_surface
.isl
,
713 .aux_usage
= surf_usage
,
714 .mocs
= device
->default_mocs
);
716 /* Create a sampler state that only uses the main buffer. */
717 isl_surf_fill_state(&device
->isl_dev
,
718 iview
->no_aux_sampler_surface_state
.map
,
719 .surf
= &surface
->isl
,
721 .mocs
= device
->default_mocs
);
723 anv_state_flush(device
, iview
->sampler_surface_state
);
724 anv_state_flush(device
, iview
->no_aux_sampler_surface_state
);
726 iview
->sampler_surface_state
.alloc_size
= 0;
727 iview
->no_aux_sampler_surface_state
.alloc_size
= 0;
730 /* NOTE: This one needs to go last since it may stomp isl_view.format */
731 if (image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
732 iview
->storage_surface_state
= alloc_surface_state(device
);
733 iview
->writeonly_storage_surface_state
= alloc_surface_state(device
);
735 struct isl_view view
= iview
->isl
;
736 view
.usage
|= ISL_SURF_USAGE_STORAGE_BIT
;
738 /* Write-only accesses always used a typed write instruction and should
739 * therefore use the real format.
741 isl_surf_fill_state(&device
->isl_dev
,
742 iview
->writeonly_storage_surface_state
.map
,
743 .surf
= &surface
->isl
,
745 .aux_surf
= &image
->aux_surface
.isl
,
746 .aux_usage
= image
->aux_usage
,
747 .mocs
= device
->default_mocs
);
749 if (isl_has_matching_typed_storage_image_format(&device
->info
,
750 format
.isl_format
)) {
751 /* Typed surface reads support a very limited subset of the shader
752 * image formats. Translate it into the closest format the hardware
755 view
.format
= isl_lower_storage_image_format(&device
->info
,
758 isl_surf_fill_state(&device
->isl_dev
,
759 iview
->storage_surface_state
.map
,
760 .surf
= &surface
->isl
,
762 .aux_surf
= &image
->aux_surface
.isl
,
763 .aux_usage
= image
->aux_usage
,
764 .mocs
= device
->default_mocs
);
766 anv_fill_buffer_surface_state(device
, iview
->storage_surface_state
,
769 iview
->bo
->size
- iview
->offset
, 1);
772 isl_surf_fill_image_param(&device
->isl_dev
,
773 &iview
->storage_image_param
,
774 &surface
->isl
, &iview
->isl
);
776 anv_state_flush(device
, iview
->storage_surface_state
);
777 anv_state_flush(device
, iview
->writeonly_storage_surface_state
);
779 iview
->storage_surface_state
.alloc_size
= 0;
780 iview
->writeonly_storage_surface_state
.alloc_size
= 0;
783 *pView
= anv_image_view_to_handle(iview
);
789 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
790 const VkAllocationCallbacks
*pAllocator
)
792 ANV_FROM_HANDLE(anv_device
, device
, _device
);
793 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
798 if (iview
->sampler_surface_state
.alloc_size
> 0) {
799 anv_state_pool_free(&device
->surface_state_pool
,
800 iview
->sampler_surface_state
);
803 if (iview
->storage_surface_state
.alloc_size
> 0) {
804 anv_state_pool_free(&device
->surface_state_pool
,
805 iview
->storage_surface_state
);
808 if (iview
->writeonly_storage_surface_state
.alloc_size
> 0) {
809 anv_state_pool_free(&device
->surface_state_pool
,
810 iview
->writeonly_storage_surface_state
);
813 vk_free2(&device
->alloc
, pAllocator
, iview
);
818 anv_CreateBufferView(VkDevice _device
,
819 const VkBufferViewCreateInfo
*pCreateInfo
,
820 const VkAllocationCallbacks
*pAllocator
,
823 ANV_FROM_HANDLE(anv_device
, device
, _device
);
824 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
825 struct anv_buffer_view
*view
;
827 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
828 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
830 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
832 /* TODO: Handle the format swizzle? */
834 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
835 VK_IMAGE_ASPECT_COLOR_BIT
,
836 VK_IMAGE_TILING_LINEAR
);
837 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
838 view
->bo
= buffer
->bo
;
839 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
840 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
842 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
844 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
845 view
->surface_state
= alloc_surface_state(device
);
847 anv_fill_buffer_surface_state(device
, view
->surface_state
,
849 view
->offset
, view
->range
, format_bs
);
851 view
->surface_state
= (struct anv_state
){ 0 };
854 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
855 view
->storage_surface_state
= alloc_surface_state(device
);
856 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
858 enum isl_format storage_format
=
859 isl_has_matching_typed_storage_image_format(&device
->info
,
861 isl_lower_storage_image_format(&device
->info
, view
->format
) :
864 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
866 view
->offset
, view
->range
,
867 (storage_format
== ISL_FORMAT_RAW
? 1 :
868 isl_format_get_layout(storage_format
)->bpb
/ 8));
870 /* Write-only accesses should use the original format. */
871 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
873 view
->offset
, view
->range
,
874 isl_format_get_layout(view
->format
)->bpb
/ 8);
876 isl_buffer_fill_image_param(&device
->isl_dev
,
877 &view
->storage_image_param
,
878 view
->format
, view
->range
);
880 view
->storage_surface_state
= (struct anv_state
){ 0 };
881 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
884 *pView
= anv_buffer_view_to_handle(view
);
890 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
891 const VkAllocationCallbacks
*pAllocator
)
893 ANV_FROM_HANDLE(anv_device
, device
, _device
);
894 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
899 if (view
->surface_state
.alloc_size
> 0)
900 anv_state_pool_free(&device
->surface_state_pool
,
901 view
->surface_state
);
903 if (view
->storage_surface_state
.alloc_size
> 0)
904 anv_state_pool_free(&device
->surface_state_pool
,
905 view
->storage_surface_state
);
907 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
908 anv_state_pool_free(&device
->surface_state_pool
,
909 view
->writeonly_storage_surface_state
);
911 vk_free2(&device
->alloc
, pAllocator
, view
);
914 const struct anv_surface
*
915 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
916 VkImageAspectFlags aspect_mask
)
918 switch (aspect_mask
) {
919 case VK_IMAGE_ASPECT_COLOR_BIT
:
920 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
921 return &image
->color_surface
;
922 case VK_IMAGE_ASPECT_DEPTH_BIT
:
923 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
924 return &image
->depth_surface
;
925 case VK_IMAGE_ASPECT_STENCIL_BIT
:
926 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
927 return &image
->stencil_surface
;
928 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
929 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
930 * combined depth stencil formats. Specifically, it states:
932 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
933 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
935 * Image views with both depth and stencil aspects are only valid for
936 * render target attachments, in which case
937 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
938 * stencil surfaces from the underlying surface.
940 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
941 return &image
->depth_surface
;
943 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
944 return &image
->stencil_surface
;
947 unreachable("image does not have aspect");