anv,turnip,radv,clover,glspirv: Run nir_copy_prop before nir_opt_deref
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29 #include <sys/mman.h>
30 #include "drm-uapi/drm_fourcc.h"
31
32 #include "anv_private.h"
33 #include "util/debug.h"
34 #include "vk_util.h"
35 #include "util/u_math.h"
36
37 #include "vk_format_info.h"
38
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
41 VkImageUsageFlags vk_usage,
42 isl_surf_usage_flags_t isl_extra_usage,
43 VkImageAspectFlagBits aspect)
44 {
45 isl_surf_usage_flags_t isl_usage = isl_extra_usage;
46
47 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
48 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
49
50 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
51 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
52
53 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
54 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
55
56 if (vk_create_flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
57 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
58
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
62 */
63 switch (aspect) {
64 case VK_IMAGE_ASPECT_DEPTH_BIT:
65 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
66 break;
67 case VK_IMAGE_ASPECT_STENCIL_BIT:
68 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
69 break;
70 case VK_IMAGE_ASPECT_COLOR_BIT:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT:
74 break;
75 default:
76 unreachable("bad VkImageAspect");
77 }
78
79 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
82 }
83
84 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
85 aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
90 }
91
92 return isl_usage;
93 }
94
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct gen_device_info *devinfo,
97 const struct anv_image_create_info *anv_info,
98 const struct isl_drm_modifier_info *isl_mod_info,
99 bool legacy_scanout)
100 {
101 const VkImageCreateInfo *base_info = anv_info->vk_info;
102 isl_tiling_flags_t flags = 0;
103
104 switch (base_info->tiling) {
105 default:
106 unreachable("bad VkImageTiling");
107 case VK_IMAGE_TILING_OPTIMAL:
108 flags = ISL_TILING_ANY_MASK;
109 break;
110 case VK_IMAGE_TILING_LINEAR:
111 flags = ISL_TILING_LINEAR_BIT;
112 break;
113 case VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT:
114 assert(isl_mod_info);
115 flags = 1 << isl_mod_info->tiling;
116 }
117
118 if (anv_info->isl_tiling_flags)
119 flags &= anv_info->isl_tiling_flags;
120
121 if (legacy_scanout) {
122 isl_tiling_flags_t legacy_mask = ISL_TILING_LINEAR_BIT;
123 if (devinfo->has_tiling_uapi)
124 legacy_mask |= ISL_TILING_X_BIT;
125 flags &= legacy_mask;
126 }
127
128 assert(flags);
129
130 return flags;
131 }
132
133 static void
134 add_surface(struct anv_image *image, struct anv_surface *surf, uint32_t plane)
135 {
136 assert(surf->isl.size_B > 0); /* isl surface must be initialized */
137
138 if (image->disjoint) {
139 surf->offset = align_u32(image->planes[plane].size,
140 surf->isl.alignment_B);
141 /* Plane offset is always 0 when it's disjoint. */
142 } else {
143 surf->offset = align_u32(image->size, surf->isl.alignment_B);
144 /* Determine plane's offset only once when the first surface is added. */
145 if (image->planes[plane].size == 0)
146 image->planes[plane].offset = image->size;
147 }
148
149 image->size = surf->offset + surf->isl.size_B;
150 image->planes[plane].size = (surf->offset + surf->isl.size_B) - image->planes[plane].offset;
151
152 image->alignment = MAX2(image->alignment, surf->isl.alignment_B);
153 image->planes[plane].alignment = MAX2(image->planes[plane].alignment,
154 surf->isl.alignment_B);
155 }
156
157 /**
158 * Do hardware limitations require the image plane to use a shadow surface?
159 *
160 * If hardware limitations force us to use a shadow surface, then the same
161 * limitations may also constrain the tiling of the primary surface; therefore
162 * paramater @a inout_primary_tiling_flags.
163 *
164 * If the image plane is a separate stencil plane and if the user provided
165 * VkImageStencilUsageCreateInfoEXT, then @a usage must be stencilUsage.
166 *
167 * @see anv_image::planes[]::shadow_surface
168 */
169 static bool
170 anv_image_plane_needs_shadow_surface(const struct gen_device_info *devinfo,
171 struct anv_format_plane plane_format,
172 VkImageTiling vk_tiling,
173 VkImageUsageFlags vk_plane_usage,
174 VkImageCreateFlags vk_create_flags,
175 isl_tiling_flags_t *inout_primary_tiling_flags)
176 {
177 if (devinfo->gen <= 8 &&
178 (vk_create_flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT) &&
179 vk_tiling == VK_IMAGE_TILING_OPTIMAL) {
180 /* We must fallback to a linear surface because we may not be able to
181 * correctly handle the offsets if tiled. (On gen9,
182 * RENDER_SURFACE_STATE::X/Y Offset are sufficient). To prevent garbage
183 * performance while texturing, we maintain a tiled shadow surface.
184 */
185 assert(isl_format_is_compressed(plane_format.isl_format));
186
187 if (inout_primary_tiling_flags) {
188 *inout_primary_tiling_flags = ISL_TILING_LINEAR_BIT;
189 }
190
191 return true;
192 }
193
194 if (devinfo->gen <= 7 &&
195 plane_format.aspect == VK_IMAGE_ASPECT_STENCIL_BIT &&
196 (vk_plane_usage & VK_IMAGE_USAGE_SAMPLED_BIT)) {
197 /* gen7 can't sample from W-tiled surfaces. */
198 return true;
199 }
200
201 return false;
202 }
203
204 bool
205 anv_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
206 VkImageCreateFlags create_flags,
207 VkFormat vk_format,
208 VkImageTiling vk_tiling,
209 const VkImageFormatListCreateInfoKHR *fmt_list)
210 {
211 enum isl_format format =
212 anv_get_isl_format(devinfo, vk_format,
213 VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
214
215 if (!isl_format_supports_ccs_e(devinfo, format))
216 return false;
217
218 if (!(create_flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
219 return true;
220
221 if (!fmt_list || fmt_list->viewFormatCount == 0)
222 return false;
223
224 for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
225 enum isl_format view_format =
226 anv_get_isl_format(devinfo, fmt_list->pViewFormats[i],
227 VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
228
229 if (!isl_formats_are_ccs_e_compatible(devinfo, format, view_format))
230 return false;
231 }
232
233 return true;
234 }
235
236 /**
237 * For color images that have an auxiliary surface, request allocation for an
238 * additional buffer that mainly stores fast-clear values. Use of this buffer
239 * allows us to access the image's subresources while being aware of their
240 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
241 * which a fast clear has occurred).
242 *
243 * In order to avoid having multiple clear colors for a single plane of an
244 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
245 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
246 * 2018), there were no known applications which would benefit from fast-
247 * clearing more than just the first slice.
248 *
249 * The fast clear portion of the image is laid out in the following order:
250 *
251 * * 1 or 4 dwords (depending on hardware generation) for the clear color
252 * * 1 dword for the anv_fast_clear_type of the clear color
253 * * On gen9+, 1 dword per level and layer of the image (3D levels count
254 * multiple layers) in level-major order for compression state.
255 *
256 * For the purpose of discoverability, the algorithm used to manage
257 * compression and fast-clears is described here:
258 *
259 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
260 * all of the values in the fast clear portion of the image are initialized
261 * to default values.
262 *
263 * * On fast-clear, the clear value is written into surface state and also
264 * into the buffer and the fast clear type is set appropriately. Both
265 * setting the fast-clear value in the buffer and setting the fast-clear
266 * type happen from the GPU using MI commands.
267 *
268 * * Whenever a render or blorp operation is performed with CCS_E, we call
269 * genX(cmd_buffer_mark_image_written) to set the compression state to
270 * true (which is represented by UINT32_MAX).
271 *
272 * * On pipeline barrier transitions, the worst-case transition is computed
273 * from the image layouts. The command streamer inspects the fast clear
274 * type and compression state dwords and constructs a predicate. The
275 * worst-case resolve is performed with the given predicate and the fast
276 * clear and compression state is set accordingly.
277 *
278 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
279 * details on exactly what is allowed in what layouts.
280 *
281 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
282 * In order to deal with this, we have to do some clear color management.
283 *
284 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
285 * value from the buffer into the surface state with MI commands.
286 *
287 * * For any blorp operations, we pass the address to the clear value into
288 * blorp and it knows to copy the clear color.
289 */
290 static void
291 add_aux_state_tracking_buffer(struct anv_image *image,
292 uint32_t plane,
293 const struct anv_device *device)
294 {
295 assert(image && device);
296 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
297 image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
298
299 /* Compressed images must be tiled and therefore everything should be 4K
300 * aligned. The CCS has the same alignment requirements. This is good
301 * because we need at least dword-alignment for MI_LOAD/STORE operations.
302 */
303 assert(image->alignment % 4 == 0);
304 assert((image->planes[plane].offset + image->planes[plane].size) % 4 == 0);
305
306 /* This buffer should be at the very end of the plane. */
307 if (image->disjoint) {
308 assert(image->planes[plane].size ==
309 (image->planes[plane].offset + image->planes[plane].size));
310 } else {
311 assert(image->size ==
312 (image->planes[plane].offset + image->planes[plane].size));
313 }
314
315 const unsigned clear_color_state_size = device->info.gen >= 10 ?
316 device->isl_dev.ss.clear_color_state_size :
317 device->isl_dev.ss.clear_value_size;
318
319 /* Clear color and fast clear type */
320 unsigned state_size = clear_color_state_size + 4;
321
322 /* We only need to track compression on CCS_E surfaces. */
323 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
324 if (image->type == VK_IMAGE_TYPE_3D) {
325 for (uint32_t l = 0; l < image->levels; l++)
326 state_size += anv_minify(image->extent.depth, l) * 4;
327 } else {
328 state_size += image->levels * image->array_size * 4;
329 }
330 }
331
332 /* Add some padding to make sure the fast clear color state buffer starts at
333 * a 4K alignment. We believe that 256B might be enough, but due to lack of
334 * testing we will leave this as 4K for now.
335 */
336 image->planes[plane].size = align_u64(image->planes[plane].size, 4096);
337 image->size = align_u64(image->size, 4096);
338
339 assert(image->planes[plane].offset % 4096 == 0);
340
341 image->planes[plane].fast_clear_state_offset =
342 image->planes[plane].offset + image->planes[plane].size;
343
344 image->planes[plane].size += state_size;
345 image->size += state_size;
346 }
347
348 /**
349 * The return code indicates whether creation of the VkImage should continue
350 * or fail, not whether the creation of the aux surface succeeded. If the aux
351 * surface is not required (for example, by neither hardware nor DRM format
352 * modifier), then this may return VK_SUCCESS when creation of the aux surface
353 * fails.
354 */
355 static VkResult
356 add_aux_surface_if_supported(struct anv_device *device,
357 struct anv_image *image,
358 uint32_t plane,
359 struct anv_format_plane plane_format,
360 const VkImageFormatListCreateInfoKHR *fmt_list,
361 isl_surf_usage_flags_t isl_extra_usage_flags)
362 {
363 VkImageAspectFlags aspect = plane_format.aspect;
364 bool ok;
365
366 /* The aux surface must not be already added. */
367 assert(image->planes[plane].aux_surface.isl.size_B == 0);
368
369 if ((isl_extra_usage_flags & ISL_SURF_USAGE_DISABLE_AUX_BIT))
370 return VK_SUCCESS;
371
372 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
373 /* We don't advertise that depth buffers could be used as storage
374 * images.
375 */
376 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
377
378 /* Allow the user to control HiZ enabling. Disable by default on gen7
379 * because resolves are not currently implemented pre-BDW.
380 */
381 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
382 /* It will never be used as an attachment, HiZ is pointless. */
383 return VK_SUCCESS;
384 }
385
386 if (device->info.gen == 7) {
387 anv_perf_warn(device, image, "Implement gen7 HiZ");
388 return VK_SUCCESS;
389 }
390
391 if (image->levels > 1) {
392 anv_perf_warn(device, image, "Enable multi-LOD HiZ");
393 return VK_SUCCESS;
394 }
395
396 if (device->info.gen == 8 && image->samples > 1) {
397 anv_perf_warn(device, image, "Enable gen8 multisampled HiZ");
398 return VK_SUCCESS;
399 }
400
401 if (unlikely(INTEL_DEBUG & DEBUG_NO_HIZ))
402 return VK_SUCCESS;
403
404 ok = isl_surf_get_hiz_surf(&device->isl_dev,
405 &image->planes[plane].surface.isl,
406 &image->planes[plane].aux_surface.isl);
407 assert(ok);
408 if (!isl_surf_supports_ccs(&device->isl_dev,
409 &image->planes[plane].surface.isl)) {
410 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
411 } else if (image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
412 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) &&
413 image->samples == 1) {
414 /* If it's used as an input attachment or a texture and it's
415 * single-sampled (this is a requirement for HiZ+CCS write-through
416 * mode), use write-through mode so that we don't need to resolve
417 * before texturing. This will make depth testing a bit slower but
418 * texturing faster.
419 *
420 * TODO: This is a heuristic trade-off; we haven't tuned it at all.
421 */
422 assert(device->info.gen >= 12);
423 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS_WT;
424 } else {
425 assert(device->info.gen >= 12);
426 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ_CCS;
427 }
428 add_surface(image, &image->planes[plane].aux_surface, plane);
429 } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples == 1) {
430 if (image->n_planes != 1) {
431 /* Multiplanar images seem to hit a sampler bug with CCS and R16G16
432 * format. (Putting the clear state a page/4096bytes further fixes
433 * the issue).
434 */
435 return VK_SUCCESS;
436 }
437
438 if ((image->create_flags & VK_IMAGE_CREATE_ALIAS_BIT)) {
439 /* The image may alias a plane of a multiplanar image. Above we ban
440 * CCS on multiplanar images.
441 */
442 return VK_SUCCESS;
443 }
444
445 if (!isl_format_supports_rendering(&device->info,
446 plane_format.isl_format)) {
447 /* Disable CCS because it is not useful (we can't render to the image
448 * with CCS enabled). While it may be technically possible to enable
449 * CCS for this case, we currently don't have things hooked up to get
450 * it working.
451 */
452 anv_perf_warn(device, image,
453 "This image format doesn't support rendering. "
454 "Not allocating an CCS buffer.");
455 return VK_SUCCESS;
456 }
457
458 if (unlikely(INTEL_DEBUG & DEBUG_NO_RBC))
459 return VK_SUCCESS;
460
461 ok = isl_surf_get_ccs_surf(&device->isl_dev,
462 &image->planes[plane].surface.isl,
463 &image->planes[plane].aux_surface.isl,
464 NULL, 0);
465 if (!ok)
466 return VK_SUCCESS;
467
468 /* Choose aux usage */
469 if (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
470 anv_formats_ccs_e_compatible(&device->info,
471 image->create_flags,
472 image->vk_format,
473 image->tiling,
474 fmt_list)) {
475 /* For images created without MUTABLE_FORMAT_BIT set, we know that
476 * they will always be used with the original format. In particular,
477 * they will always be used with a format that supports color
478 * compression. If it's never used as a storage image, then it will
479 * only be used through the sampler or the as a render target. This
480 * means that it's safe to just leave compression on at all times for
481 * these formats.
482 */
483 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
484 } else if (device->info.gen >= 12) {
485 anv_perf_warn(device, image,
486 "The CCS_D aux mode is not yet handled on "
487 "Gen12+. Not allocating a CCS buffer.");
488 image->planes[plane].aux_surface.isl.size_B = 0;
489 return VK_SUCCESS;
490 } else {
491 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_D;
492 }
493
494 if (!device->physical->has_implicit_ccs)
495 add_surface(image, &image->planes[plane].aux_surface, plane);
496
497 add_aux_state_tracking_buffer(image, plane, device);
498 } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples > 1) {
499 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
500 ok = isl_surf_get_mcs_surf(&device->isl_dev,
501 &image->planes[plane].surface.isl,
502 &image->planes[plane].aux_surface.isl);
503 if (!ok)
504 return VK_SUCCESS;
505
506 image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
507 add_surface(image, &image->planes[plane].aux_surface, plane);
508 add_aux_state_tracking_buffer(image, plane, device);
509 }
510
511 return VK_SUCCESS;
512 }
513
514 /**
515 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
516 * image's memory requirements (that is, the image's size and alignment).
517 */
518 static VkResult
519 make_surface(struct anv_device *device,
520 struct anv_image *image,
521 const VkImageFormatListCreateInfoKHR *fmt_list,
522 uint32_t stride,
523 isl_tiling_flags_t tiling_flags,
524 isl_surf_usage_flags_t isl_extra_usage_flags,
525 VkImageAspectFlagBits aspect)
526 {
527 VkResult result;
528 bool ok;
529
530 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
531 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
532 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
533 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
534 };
535
536 image->extent = anv_sanitize_image_extent(image->type, image->extent);
537
538 const unsigned plane = anv_image_aspect_to_plane(image->aspects, aspect);
539 const struct anv_format_plane plane_format =
540 anv_get_format_plane(&device->info, image->vk_format, aspect, image->tiling);
541 struct anv_surface *anv_surf = &image->planes[plane].surface;
542
543 const isl_surf_usage_flags_t usage =
544 choose_isl_surf_usage(image->create_flags, image->usage,
545 isl_extra_usage_flags, aspect);
546
547 VkImageUsageFlags plane_vk_usage =
548 aspect == VK_IMAGE_ASPECT_STENCIL_BIT ?
549 image->stencil_usage : image->usage;
550
551 bool needs_shadow =
552 anv_image_plane_needs_shadow_surface(&device->info,
553 plane_format,
554 image->tiling,
555 plane_vk_usage,
556 image->create_flags,
557 &tiling_flags);
558
559 ok = isl_surf_init(&device->isl_dev, &anv_surf->isl,
560 .dim = vk_to_isl_surf_dim[image->type],
561 .format = plane_format.isl_format,
562 .width = image->extent.width / plane_format.denominator_scales[0],
563 .height = image->extent.height / plane_format.denominator_scales[1],
564 .depth = image->extent.depth,
565 .levels = image->levels,
566 .array_len = image->array_size,
567 .samples = image->samples,
568 .min_alignment_B = 0,
569 .row_pitch_B = stride,
570 .usage = usage,
571 .tiling_flags = tiling_flags);
572
573 if (!ok)
574 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
575
576 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
577
578 add_surface(image, anv_surf, plane);
579
580 if (needs_shadow) {
581 ok = isl_surf_init(&device->isl_dev, &image->planes[plane].shadow_surface.isl,
582 .dim = vk_to_isl_surf_dim[image->type],
583 .format = plane_format.isl_format,
584 .width = image->extent.width,
585 .height = image->extent.height,
586 .depth = image->extent.depth,
587 .levels = image->levels,
588 .array_len = image->array_size,
589 .samples = image->samples,
590 .min_alignment_B = 0,
591 .row_pitch_B = stride,
592 .usage = ISL_SURF_USAGE_TEXTURE_BIT |
593 (usage & ISL_SURF_USAGE_CUBE_BIT),
594 .tiling_flags = ISL_TILING_ANY_MASK);
595
596 /* isl_surf_init() will fail only if provided invalid input. Invalid input
597 * is illegal in Vulkan.
598 */
599 assert(ok);
600
601 add_surface(image, &image->planes[plane].shadow_surface, plane);
602 }
603
604 result = add_aux_surface_if_supported(device, image, plane, plane_format,
605 fmt_list, isl_extra_usage_flags);
606 if (result != VK_SUCCESS)
607 return result;
608
609 assert((image->planes[plane].offset + image->planes[plane].size) == image->size);
610
611 /* Upper bound of the last surface should be smaller than the plane's
612 * size.
613 */
614 assert((MAX2(image->planes[plane].surface.offset,
615 image->planes[plane].aux_surface.offset) +
616 (image->planes[plane].aux_surface.isl.size_B > 0 ?
617 image->planes[plane].aux_surface.isl.size_B :
618 image->planes[plane].surface.isl.size_B)) <=
619 (image->planes[plane].offset + image->planes[plane].size));
620
621 if (image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE) {
622 /* assert(image->planes[plane].fast_clear_state_offset == */
623 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
624 assert(image->planes[plane].fast_clear_state_offset <
625 (image->planes[plane].offset + image->planes[plane].size));
626 }
627
628 return VK_SUCCESS;
629 }
630
631 static uint32_t
632 score_drm_format_mod(uint64_t modifier)
633 {
634 switch (modifier) {
635 case DRM_FORMAT_MOD_LINEAR: return 1;
636 case I915_FORMAT_MOD_X_TILED: return 2;
637 case I915_FORMAT_MOD_Y_TILED: return 3;
638 case I915_FORMAT_MOD_Y_TILED_CCS: return 4;
639 default: unreachable("bad DRM format modifier");
640 }
641 }
642
643 static const struct isl_drm_modifier_info *
644 choose_drm_format_mod(const struct anv_physical_device *device,
645 uint32_t modifier_count, const uint64_t *modifiers)
646 {
647 uint64_t best_mod = UINT64_MAX;
648 uint32_t best_score = 0;
649
650 for (uint32_t i = 0; i < modifier_count; ++i) {
651 uint32_t score = score_drm_format_mod(modifiers[i]);
652 if (score > best_score) {
653 best_mod = modifiers[i];
654 best_score = score;
655 }
656 }
657
658 if (best_score > 0)
659 return isl_drm_modifier_get_info(best_mod);
660 else
661 return NULL;
662 }
663
664 VkResult
665 anv_image_create(VkDevice _device,
666 const struct anv_image_create_info *create_info,
667 const VkAllocationCallbacks* alloc,
668 VkImage *pImage)
669 {
670 ANV_FROM_HANDLE(anv_device, device, _device);
671 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
672 const struct isl_drm_modifier_info *isl_mod_info = NULL;
673 struct anv_image *image = NULL;
674 VkResult r;
675
676 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
677
678 const struct wsi_image_create_info *wsi_info =
679 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
680
681 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
682 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
683 vk_find_struct_const(pCreateInfo->pNext,
684 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
685 isl_mod_info = choose_drm_format_mod(device->physical,
686 mod_info->drmFormatModifierCount,
687 mod_info->pDrmFormatModifiers);
688 assert(isl_mod_info);
689 }
690
691 anv_assert(pCreateInfo->mipLevels > 0);
692 anv_assert(pCreateInfo->arrayLayers > 0);
693 anv_assert(pCreateInfo->samples > 0);
694 anv_assert(pCreateInfo->extent.width > 0);
695 anv_assert(pCreateInfo->extent.height > 0);
696 anv_assert(pCreateInfo->extent.depth > 0);
697
698 image = vk_zalloc2(&device->vk.alloc, alloc, sizeof(*image), 8,
699 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
700 if (!image)
701 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
702
703 vk_object_base_init(&device->vk, &image->base, VK_OBJECT_TYPE_IMAGE);
704 image->type = pCreateInfo->imageType;
705 image->extent = pCreateInfo->extent;
706 image->vk_format = pCreateInfo->format;
707 image->format = anv_get_format(pCreateInfo->format);
708 image->aspects = vk_format_aspects(image->vk_format);
709 image->levels = pCreateInfo->mipLevels;
710 image->array_size = pCreateInfo->arrayLayers;
711 image->samples = pCreateInfo->samples;
712 image->usage = pCreateInfo->usage;
713 image->create_flags = pCreateInfo->flags;
714 image->tiling = pCreateInfo->tiling;
715 image->disjoint = pCreateInfo->flags & VK_IMAGE_CREATE_DISJOINT_BIT;
716 image->needs_set_tiling = wsi_info && wsi_info->scanout;
717 image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
718 DRM_FORMAT_MOD_INVALID;
719
720 if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
721 image->stencil_usage = pCreateInfo->usage;
722 const VkImageStencilUsageCreateInfoEXT *stencil_usage_info =
723 vk_find_struct_const(pCreateInfo->pNext,
724 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT);
725 if (stencil_usage_info)
726 image->stencil_usage = stencil_usage_info->stencilUsage;
727 }
728
729 /* In case of external format, We don't know format yet,
730 * so skip the rest for now.
731 */
732 if (create_info->external_format) {
733 image->external_format = true;
734 *pImage = anv_image_to_handle(image);
735 return VK_SUCCESS;
736 }
737
738 const struct anv_format *format = anv_get_format(image->vk_format);
739 assert(format != NULL);
740
741 const isl_tiling_flags_t isl_tiling_flags =
742 choose_isl_tiling_flags(&device->info, create_info, isl_mod_info,
743 image->needs_set_tiling);
744
745 image->n_planes = format->n_planes;
746
747 const VkImageFormatListCreateInfoKHR *fmt_list =
748 vk_find_struct_const(pCreateInfo->pNext,
749 IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
750
751 uint32_t b;
752 for_each_bit(b, image->aspects) {
753 r = make_surface(device, image, fmt_list, create_info->stride,
754 isl_tiling_flags, create_info->isl_extra_usage_flags,
755 (1 << b));
756 if (r != VK_SUCCESS)
757 goto fail;
758 }
759
760 *pImage = anv_image_to_handle(image);
761
762 return VK_SUCCESS;
763
764 fail:
765 if (image)
766 vk_free2(&device->vk.alloc, alloc, image);
767
768 return r;
769 }
770
771 static struct anv_image *
772 anv_swapchain_get_image(VkSwapchainKHR swapchain,
773 uint32_t index)
774 {
775 uint32_t n_images = index + 1;
776 VkImage *images = malloc(sizeof(*images) * n_images);
777 VkResult result = wsi_common_get_images(swapchain, &n_images, images);
778
779 if (result != VK_SUCCESS && result != VK_INCOMPLETE) {
780 free(images);
781 return NULL;
782 }
783
784 ANV_FROM_HANDLE(anv_image, image, images[index]);
785 free(images);
786
787 return image;
788 }
789
790 static VkResult
791 anv_image_from_swapchain(VkDevice device,
792 const VkImageCreateInfo *pCreateInfo,
793 const VkImageSwapchainCreateInfoKHR *swapchain_info,
794 const VkAllocationCallbacks *pAllocator,
795 VkImage *pImage)
796 {
797 struct anv_image *swapchain_image = anv_swapchain_get_image(swapchain_info->swapchain, 0);
798 assert(swapchain_image);
799
800 assert(swapchain_image->type == pCreateInfo->imageType);
801 assert(swapchain_image->vk_format == pCreateInfo->format);
802 assert(swapchain_image->extent.width == pCreateInfo->extent.width);
803 assert(swapchain_image->extent.height == pCreateInfo->extent.height);
804 assert(swapchain_image->extent.depth == pCreateInfo->extent.depth);
805 assert(swapchain_image->array_size == pCreateInfo->arrayLayers);
806 /* Color attachment is added by the wsi code. */
807 assert(swapchain_image->usage == (pCreateInfo->usage | VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT));
808
809 VkImageCreateInfo local_create_info;
810 local_create_info = *pCreateInfo;
811 local_create_info.pNext = NULL;
812 /* The following parameters are implictly selected by the wsi code. */
813 local_create_info.tiling = VK_IMAGE_TILING_OPTIMAL;
814 local_create_info.samples = VK_SAMPLE_COUNT_1_BIT;
815 local_create_info.usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
816
817 /* If the image has a particular modifier, specify that modifier. */
818 VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info = {
819 .sType = VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT,
820 .drmFormatModifierCount = 1,
821 .pDrmFormatModifiers = &swapchain_image->drm_format_mod,
822 };
823 if (swapchain_image->drm_format_mod != DRM_FORMAT_MOD_INVALID)
824 __vk_append_struct(&local_create_info, &local_modifier_info);
825
826 return anv_image_create(device,
827 &(struct anv_image_create_info) {
828 .vk_info = &local_create_info,
829 .external_format = swapchain_image->external_format,
830 },
831 pAllocator,
832 pImage);
833 }
834
835 VkResult
836 anv_CreateImage(VkDevice device,
837 const VkImageCreateInfo *pCreateInfo,
838 const VkAllocationCallbacks *pAllocator,
839 VkImage *pImage)
840 {
841 const VkExternalMemoryImageCreateInfo *create_info =
842 vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
843
844 if (create_info && (create_info->handleTypes &
845 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID))
846 return anv_image_from_external(device, pCreateInfo, create_info,
847 pAllocator, pImage);
848
849 bool use_external_format = false;
850 const VkExternalFormatANDROID *ext_format =
851 vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_FORMAT_ANDROID);
852
853 /* "If externalFormat is zero, the effect is as if the
854 * VkExternalFormatANDROID structure was not present. Otherwise, the image
855 * will have the specified external format."
856 */
857 if (ext_format && ext_format->externalFormat != 0)
858 use_external_format = true;
859
860 const VkNativeBufferANDROID *gralloc_info =
861 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
862 if (gralloc_info)
863 return anv_image_from_gralloc(device, pCreateInfo, gralloc_info,
864 pAllocator, pImage);
865
866 const VkImageSwapchainCreateInfoKHR *swapchain_info =
867 vk_find_struct_const(pCreateInfo->pNext, IMAGE_SWAPCHAIN_CREATE_INFO_KHR);
868 if (swapchain_info && swapchain_info->swapchain != VK_NULL_HANDLE)
869 return anv_image_from_swapchain(device, pCreateInfo, swapchain_info,
870 pAllocator, pImage);
871
872 return anv_image_create(device,
873 &(struct anv_image_create_info) {
874 .vk_info = pCreateInfo,
875 .external_format = use_external_format,
876 },
877 pAllocator,
878 pImage);
879 }
880
881 void
882 anv_DestroyImage(VkDevice _device, VkImage _image,
883 const VkAllocationCallbacks *pAllocator)
884 {
885 ANV_FROM_HANDLE(anv_device, device, _device);
886 ANV_FROM_HANDLE(anv_image, image, _image);
887
888 if (!image)
889 return;
890
891 for (uint32_t p = 0; p < image->n_planes; ++p) {
892 if (image->planes[p].bo_is_owned) {
893 assert(image->planes[p].address.bo != NULL);
894 anv_device_release_bo(device, image->planes[p].address.bo);
895 }
896 }
897
898 vk_object_base_finish(&image->base);
899 vk_free2(&device->vk.alloc, pAllocator, image);
900 }
901
902 static void anv_image_bind_memory_plane(struct anv_device *device,
903 struct anv_image *image,
904 uint32_t plane,
905 struct anv_device_memory *memory,
906 uint32_t memory_offset)
907 {
908 assert(!image->planes[plane].bo_is_owned);
909
910 if (!memory) {
911 image->planes[plane].address = ANV_NULL_ADDRESS;
912 return;
913 }
914
915 image->planes[plane].address = (struct anv_address) {
916 .bo = memory->bo,
917 .offset = memory_offset,
918 };
919
920 /* If we're on a platform that uses implicit CCS and our buffer does not
921 * have any implicit CCS data, disable compression on that image.
922 */
923 if (device->physical->has_implicit_ccs && !memory->bo->has_implicit_ccs)
924 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
925 }
926
927 /* We are binding AHardwareBuffer. Get a description, resolve the
928 * format and prepare anv_image properly.
929 */
930 static void
931 resolve_ahw_image(struct anv_device *device,
932 struct anv_image *image,
933 struct anv_device_memory *mem)
934 {
935 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
936 assert(mem->ahw);
937 AHardwareBuffer_Desc desc;
938 AHardwareBuffer_describe(mem->ahw, &desc);
939
940 /* Check tiling. */
941 int i915_tiling = anv_gem_get_tiling(device, mem->bo->gem_handle);
942 VkImageTiling vk_tiling;
943 isl_tiling_flags_t isl_tiling_flags = 0;
944
945 switch (i915_tiling) {
946 case I915_TILING_NONE:
947 vk_tiling = VK_IMAGE_TILING_LINEAR;
948 isl_tiling_flags = ISL_TILING_LINEAR_BIT;
949 break;
950 case I915_TILING_X:
951 vk_tiling = VK_IMAGE_TILING_OPTIMAL;
952 isl_tiling_flags = ISL_TILING_X_BIT;
953 break;
954 case I915_TILING_Y:
955 vk_tiling = VK_IMAGE_TILING_OPTIMAL;
956 isl_tiling_flags = ISL_TILING_Y0_BIT;
957 break;
958 case -1:
959 default:
960 unreachable("Invalid tiling flags.");
961 }
962
963 assert(vk_tiling == VK_IMAGE_TILING_LINEAR ||
964 vk_tiling == VK_IMAGE_TILING_OPTIMAL);
965
966 /* Check format. */
967 VkFormat vk_format = vk_format_from_android(desc.format, desc.usage);
968 enum isl_format isl_fmt = anv_get_isl_format(&device->info,
969 vk_format,
970 VK_IMAGE_ASPECT_COLOR_BIT,
971 vk_tiling);
972 assert(isl_fmt != ISL_FORMAT_UNSUPPORTED);
973
974 /* Handle RGB(X)->RGBA fallback. */
975 switch (desc.format) {
976 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM:
977 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM:
978 if (isl_format_is_rgb(isl_fmt))
979 isl_fmt = isl_format_rgb_to_rgba(isl_fmt);
980 break;
981 }
982
983 /* Now we are able to fill anv_image fields properly and create
984 * isl_surface for it.
985 */
986 image->vk_format = vk_format;
987 image->format = anv_get_format(vk_format);
988 image->aspects = vk_format_aspects(image->vk_format);
989 image->n_planes = image->format->n_planes;
990
991 uint32_t stride = desc.stride *
992 (isl_format_get_layout(isl_fmt)->bpb / 8);
993
994 uint32_t b;
995 for_each_bit(b, image->aspects) {
996 VkResult r = make_surface(device, image, NULL, stride, isl_tiling_flags,
997 ISL_SURF_USAGE_DISABLE_AUX_BIT, (1 << b));
998 assert(r == VK_SUCCESS);
999 }
1000 #endif
1001 }
1002
1003 VkResult anv_BindImageMemory(
1004 VkDevice _device,
1005 VkImage _image,
1006 VkDeviceMemory _memory,
1007 VkDeviceSize memoryOffset)
1008 {
1009 ANV_FROM_HANDLE(anv_device, device, _device);
1010 ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
1011 ANV_FROM_HANDLE(anv_image, image, _image);
1012
1013 if (mem->ahw)
1014 resolve_ahw_image(device, image, mem);
1015
1016 uint32_t aspect_bit;
1017 anv_foreach_image_aspect_bit(aspect_bit, image, image->aspects) {
1018 uint32_t plane =
1019 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1020 anv_image_bind_memory_plane(device, image, plane, mem, memoryOffset);
1021 }
1022
1023 return VK_SUCCESS;
1024 }
1025
1026 VkResult anv_BindImageMemory2(
1027 VkDevice _device,
1028 uint32_t bindInfoCount,
1029 const VkBindImageMemoryInfo* pBindInfos)
1030 {
1031 ANV_FROM_HANDLE(anv_device, device, _device);
1032
1033 for (uint32_t i = 0; i < bindInfoCount; i++) {
1034 const VkBindImageMemoryInfo *bind_info = &pBindInfos[i];
1035 ANV_FROM_HANDLE(anv_device_memory, mem, bind_info->memory);
1036 ANV_FROM_HANDLE(anv_image, image, bind_info->image);
1037
1038 /* Resolve will alter the image's aspects, do this first. */
1039 if (mem && mem->ahw)
1040 resolve_ahw_image(device, image, mem);
1041
1042 VkImageAspectFlags aspects = image->aspects;
1043 vk_foreach_struct_const(s, bind_info->pNext) {
1044 switch (s->sType) {
1045 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO: {
1046 const VkBindImagePlaneMemoryInfo *plane_info =
1047 (const VkBindImagePlaneMemoryInfo *) s;
1048
1049 aspects = plane_info->planeAspect;
1050 break;
1051 }
1052 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR: {
1053 const VkBindImageMemorySwapchainInfoKHR *swapchain_info =
1054 (const VkBindImageMemorySwapchainInfoKHR *) s;
1055 struct anv_image *swapchain_image =
1056 anv_swapchain_get_image(swapchain_info->swapchain,
1057 swapchain_info->imageIndex);
1058 assert(swapchain_image);
1059 assert(image->aspects == swapchain_image->aspects);
1060 assert(mem == NULL);
1061
1062 uint32_t aspect_bit;
1063 anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
1064 uint32_t plane =
1065 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1066 struct anv_device_memory mem = {
1067 .bo = swapchain_image->planes[plane].address.bo,
1068 };
1069 anv_image_bind_memory_plane(device, image, plane,
1070 &mem, bind_info->memoryOffset);
1071 }
1072 break;
1073 }
1074 default:
1075 anv_debug_ignored_stype(s->sType);
1076 break;
1077 }
1078 }
1079
1080 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
1081 * VK_NULL_HANDLE. In such case, just carry one with the next bind
1082 * item.
1083 */
1084 if (!mem)
1085 continue;
1086
1087 uint32_t aspect_bit;
1088 anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
1089 uint32_t plane =
1090 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1091 anv_image_bind_memory_plane(device, image, plane,
1092 mem, bind_info->memoryOffset);
1093 }
1094 }
1095
1096 return VK_SUCCESS;
1097 }
1098
1099 void anv_GetImageSubresourceLayout(
1100 VkDevice device,
1101 VkImage _image,
1102 const VkImageSubresource* subresource,
1103 VkSubresourceLayout* layout)
1104 {
1105 ANV_FROM_HANDLE(anv_image, image, _image);
1106
1107 const struct anv_surface *surface;
1108 if (subresource->aspectMask == VK_IMAGE_ASPECT_PLANE_1_BIT &&
1109 image->drm_format_mod != DRM_FORMAT_MOD_INVALID &&
1110 isl_drm_modifier_has_aux(image->drm_format_mod)) {
1111 surface = &image->planes[0].aux_surface;
1112 } else {
1113 uint32_t plane = anv_image_aspect_to_plane(image->aspects,
1114 subresource->aspectMask);
1115 surface = &image->planes[plane].surface;
1116 }
1117
1118 assert(__builtin_popcount(subresource->aspectMask) == 1);
1119
1120 layout->offset = surface->offset;
1121 layout->rowPitch = surface->isl.row_pitch_B;
1122 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
1123 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
1124
1125 if (subresource->mipLevel > 0 || subresource->arrayLayer > 0) {
1126 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1127
1128 uint32_t offset_B;
1129 isl_surf_get_image_offset_B_tile_sa(&surface->isl,
1130 subresource->mipLevel,
1131 subresource->arrayLayer,
1132 0 /* logical_z_offset_px */,
1133 &offset_B, NULL, NULL);
1134 layout->offset += offset_B;
1135 layout->size = layout->rowPitch * anv_minify(image->extent.height,
1136 subresource->mipLevel);
1137 } else {
1138 layout->size = surface->isl.size_B;
1139 }
1140 }
1141
1142 VkResult anv_GetImageDrmFormatModifierPropertiesEXT(
1143 VkDevice device,
1144 VkImage _image,
1145 VkImageDrmFormatModifierPropertiesEXT* pProperties)
1146 {
1147 ANV_FROM_HANDLE(anv_image, image, _image);
1148
1149 assert(pProperties->sType ==
1150 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
1151
1152 pProperties->drmFormatModifier = image->drm_format_mod;
1153
1154 return VK_SUCCESS;
1155 }
1156
1157 static VkImageUsageFlags
1158 vk_image_layout_to_usage_flags(VkImageLayout layout,
1159 VkImageAspectFlagBits aspect)
1160 {
1161 assert(util_bitcount(aspect) == 1);
1162
1163 switch (layout) {
1164 case VK_IMAGE_LAYOUT_UNDEFINED:
1165 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1166 return 0u;
1167
1168 case VK_IMAGE_LAYOUT_GENERAL:
1169 return ~0u;
1170
1171 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
1172 assert(aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1173 return VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
1174
1175 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
1176 assert(aspect & (VK_IMAGE_ASPECT_DEPTH_BIT |
1177 VK_IMAGE_ASPECT_STENCIL_BIT));
1178 return VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT;
1179
1180 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL:
1181 assert(aspect & VK_IMAGE_ASPECT_DEPTH_BIT);
1182 return vk_image_layout_to_usage_flags(
1183 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1184
1185 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL:
1186 assert(aspect & VK_IMAGE_ASPECT_STENCIL_BIT);
1187 return vk_image_layout_to_usage_flags(
1188 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1189
1190 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
1191 assert(aspect & (VK_IMAGE_ASPECT_DEPTH_BIT |
1192 VK_IMAGE_ASPECT_STENCIL_BIT));
1193 return VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT |
1194 VK_IMAGE_USAGE_SAMPLED_BIT |
1195 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT;
1196
1197 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL:
1198 assert(aspect & VK_IMAGE_ASPECT_DEPTH_BIT);
1199 return vk_image_layout_to_usage_flags(
1200 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1201
1202 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL:
1203 assert(aspect & VK_IMAGE_ASPECT_STENCIL_BIT);
1204 return vk_image_layout_to_usage_flags(
1205 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1206
1207 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
1208 return VK_IMAGE_USAGE_SAMPLED_BIT |
1209 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT;
1210
1211 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
1212 return VK_IMAGE_USAGE_TRANSFER_SRC_BIT;
1213
1214 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
1215 return VK_IMAGE_USAGE_TRANSFER_DST_BIT;
1216
1217 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
1218 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1219 return vk_image_layout_to_usage_flags(
1220 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1221 } else if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1222 return vk_image_layout_to_usage_flags(
1223 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1224 } else {
1225 assert(!"Must be a depth/stencil aspect");
1226 return 0;
1227 }
1228
1229 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
1230 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1231 return vk_image_layout_to_usage_flags(
1232 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, aspect);
1233 } else if (aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1234 return vk_image_layout_to_usage_flags(
1235 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL, aspect);
1236 } else {
1237 assert(!"Must be a depth/stencil aspect");
1238 return 0;
1239 }
1240
1241 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
1242 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1243 /* This needs to be handled specially by the caller */
1244 return 0;
1245
1246 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
1247 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1248 return vk_image_layout_to_usage_flags(VK_IMAGE_LAYOUT_GENERAL, aspect);
1249
1250 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
1251 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1252 return VK_IMAGE_USAGE_SHADING_RATE_IMAGE_BIT_NV;
1253
1254 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
1255 assert(aspect == VK_IMAGE_ASPECT_COLOR_BIT);
1256 return VK_IMAGE_USAGE_FRAGMENT_DENSITY_MAP_BIT_EXT;
1257
1258 case VK_IMAGE_LAYOUT_MAX_ENUM:
1259 unreachable("Invalid image layout.");
1260 }
1261
1262 unreachable("Invalid image layout.");
1263 }
1264
1265 static bool
1266 vk_image_layout_is_read_only(VkImageLayout layout,
1267 VkImageAspectFlagBits aspect)
1268 {
1269 assert(util_bitcount(aspect) == 1);
1270
1271 switch (layout) {
1272 case VK_IMAGE_LAYOUT_UNDEFINED:
1273 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1274 return true; /* These are only used for layout transitions */
1275
1276 case VK_IMAGE_LAYOUT_GENERAL:
1277 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
1278 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
1279 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
1280 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
1281 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL:
1282 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL:
1283 return false;
1284
1285 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
1286 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
1287 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
1288 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
1289 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
1290 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
1291 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL:
1292 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL:
1293 return true;
1294
1295 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
1296 return aspect == VK_IMAGE_ASPECT_DEPTH_BIT;
1297
1298 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
1299 return aspect == VK_IMAGE_ASPECT_STENCIL_BIT;
1300
1301 case VK_IMAGE_LAYOUT_MAX_ENUM:
1302 unreachable("Invalid image layout.");
1303 }
1304
1305 unreachable("Invalid image layout.");
1306 }
1307
1308 /**
1309 * This function returns the assumed isl_aux_state for a given VkImageLayout.
1310 * Because Vulkan image layouts don't map directly to isl_aux_state enums, the
1311 * returned enum is the assumed worst case.
1312 *
1313 * @param devinfo The device information of the Intel GPU.
1314 * @param image The image that may contain a collection of buffers.
1315 * @param aspect The aspect of the image to be accessed.
1316 * @param layout The current layout of the image aspect(s).
1317 *
1318 * @return The primary buffer that should be used for the given layout.
1319 */
1320 enum isl_aux_state
1321 anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
1322 const struct anv_image * const image,
1323 const VkImageAspectFlagBits aspect,
1324 const VkImageLayout layout)
1325 {
1326 /* Validate the inputs. */
1327
1328 /* The devinfo is needed as the optimal buffer varies across generations. */
1329 assert(devinfo != NULL);
1330
1331 /* The layout of a NULL image is not properly defined. */
1332 assert(image != NULL);
1333
1334 /* The aspect must be exactly one of the image aspects. */
1335 assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
1336
1337 /* Determine the optimal buffer. */
1338
1339 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1340
1341 /* If we don't have an aux buffer then aux state makes no sense */
1342 const enum isl_aux_usage aux_usage = image->planes[plane].aux_usage;
1343 assert(aux_usage != ISL_AUX_USAGE_NONE);
1344
1345 /* All images that use an auxiliary surface are required to be tiled. */
1346 assert(image->planes[plane].surface.isl.tiling != ISL_TILING_LINEAR);
1347
1348 /* Stencil has no aux */
1349 assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
1350
1351 /* Handle a few special cases */
1352 switch (layout) {
1353 /* Invalid layouts */
1354 case VK_IMAGE_LAYOUT_MAX_ENUM:
1355 unreachable("Invalid image layout.");
1356
1357 /* Undefined layouts
1358 *
1359 * The pre-initialized layout is equivalent to the undefined layout for
1360 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1361 * on tiled images.
1362 */
1363 case VK_IMAGE_LAYOUT_UNDEFINED:
1364 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1365 return ISL_AUX_STATE_AUX_INVALID;
1366
1367 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR: {
1368 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
1369
1370 enum isl_aux_state aux_state =
1371 isl_drm_modifier_get_default_aux_state(image->drm_format_mod);
1372
1373 switch (aux_state) {
1374 default:
1375 assert(!"unexpected isl_aux_state");
1376 case ISL_AUX_STATE_AUX_INVALID:
1377 /* The modifier does not support compression. But, if we arrived
1378 * here, then we have enabled compression on it anyway, in which case
1379 * we must resolve the aux surface before we release ownership to the
1380 * presentation engine (because, having no modifier, the presentation
1381 * engine will not be aware of the aux surface). The presentation
1382 * engine will not access the aux surface (because it is unware of
1383 * it), and so the aux surface will still be resolved when we
1384 * re-acquire ownership.
1385 *
1386 * Therefore, at ownership transfers in either direction, there does
1387 * exist an aux surface despite the lack of modifier and its state is
1388 * pass-through.
1389 */
1390 return ISL_AUX_STATE_PASS_THROUGH;
1391 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1392 return ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
1393 }
1394 }
1395
1396 default:
1397 break;
1398 }
1399
1400 const bool read_only = vk_image_layout_is_read_only(layout, aspect);
1401
1402 const VkImageUsageFlags image_aspect_usage =
1403 aspect == VK_IMAGE_ASPECT_STENCIL_BIT ? image->stencil_usage :
1404 image->usage;
1405 const VkImageUsageFlags usage =
1406 vk_image_layout_to_usage_flags(layout, aspect) & image_aspect_usage;
1407
1408 bool aux_supported = true;
1409
1410 if ((usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) && !read_only) {
1411 /* This image could be used as both an input attachment and a render
1412 * target (depth, stencil, or color) at the same time and this can cause
1413 * corruption.
1414 *
1415 * We currently only disable aux in this way for depth even though we
1416 * disable it for color in GL.
1417 *
1418 * TODO: Should we be disabling this in more cases?
1419 */
1420 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT)
1421 aux_supported = false;
1422 }
1423
1424 if (usage & VK_IMAGE_USAGE_STORAGE_BIT)
1425 aux_supported = false;
1426
1427 if (usage & (VK_IMAGE_USAGE_TRANSFER_SRC_BIT |
1428 VK_IMAGE_USAGE_SAMPLED_BIT |
1429 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)) {
1430 switch (aux_usage) {
1431 case ISL_AUX_USAGE_HIZ:
1432 if (!anv_can_sample_with_hiz(devinfo, image))
1433 aux_supported = false;
1434 break;
1435
1436 case ISL_AUX_USAGE_HIZ_CCS:
1437 aux_supported = false;
1438 break;
1439
1440 case ISL_AUX_USAGE_HIZ_CCS_WT:
1441 break;
1442
1443 case ISL_AUX_USAGE_CCS_D:
1444 aux_supported = false;
1445 break;
1446
1447 case ISL_AUX_USAGE_CCS_E:
1448 case ISL_AUX_USAGE_MCS:
1449 break;
1450
1451 default:
1452 unreachable("Unsupported aux usage");
1453 }
1454 }
1455
1456 switch (aux_usage) {
1457 case ISL_AUX_USAGE_HIZ:
1458 case ISL_AUX_USAGE_HIZ_CCS:
1459 case ISL_AUX_USAGE_HIZ_CCS_WT:
1460 if (aux_supported) {
1461 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1462 } else if (read_only) {
1463 return ISL_AUX_STATE_RESOLVED;
1464 } else {
1465 return ISL_AUX_STATE_AUX_INVALID;
1466 }
1467
1468 case ISL_AUX_USAGE_CCS_D:
1469 /* We only support clear in exactly one state */
1470 if (layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL) {
1471 assert(aux_supported);
1472 return ISL_AUX_STATE_PARTIAL_CLEAR;
1473 } else {
1474 return ISL_AUX_STATE_PASS_THROUGH;
1475 }
1476
1477 case ISL_AUX_USAGE_CCS_E:
1478 case ISL_AUX_USAGE_MCS:
1479 if (aux_supported) {
1480 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1481 } else {
1482 return ISL_AUX_STATE_PASS_THROUGH;
1483 }
1484
1485 default:
1486 unreachable("Unsupported aux usage");
1487 }
1488 }
1489
1490 /**
1491 * This function determines the optimal buffer to use for a given
1492 * VkImageLayout and other pieces of information needed to make that
1493 * determination. This does not determine the optimal buffer to use
1494 * during a resolve operation.
1495 *
1496 * @param devinfo The device information of the Intel GPU.
1497 * @param image The image that may contain a collection of buffers.
1498 * @param aspect The aspect of the image to be accessed.
1499 * @param usage The usage which describes how the image will be accessed.
1500 * @param layout The current layout of the image aspect(s).
1501 *
1502 * @return The primary buffer that should be used for the given layout.
1503 */
1504 enum isl_aux_usage
1505 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
1506 const struct anv_image * const image,
1507 const VkImageAspectFlagBits aspect,
1508 const VkImageUsageFlagBits usage,
1509 const VkImageLayout layout)
1510 {
1511 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1512
1513 /* If there is no auxiliary surface allocated, we must use the one and only
1514 * main buffer.
1515 */
1516 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
1517 return ISL_AUX_USAGE_NONE;
1518
1519 enum isl_aux_state aux_state =
1520 anv_layout_to_aux_state(devinfo, image, aspect, layout);
1521
1522 switch (aux_state) {
1523 case ISL_AUX_STATE_CLEAR:
1524 unreachable("We never use this state");
1525
1526 case ISL_AUX_STATE_PARTIAL_CLEAR:
1527 assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1528 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D);
1529 assert(image->samples == 1);
1530 return ISL_AUX_USAGE_CCS_D;
1531
1532 case ISL_AUX_STATE_COMPRESSED_CLEAR:
1533 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1534 return image->planes[plane].aux_usage;
1535
1536 case ISL_AUX_STATE_RESOLVED:
1537 /* We can only use RESOLVED in read-only layouts because any write will
1538 * either land us in AUX_INVALID or COMPRESSED_NO_CLEAR. We can do
1539 * writes in PASS_THROUGH without destroying it so that is allowed.
1540 */
1541 assert(vk_image_layout_is_read_only(layout, aspect));
1542 assert(util_is_power_of_two_or_zero(usage));
1543 if (usage == VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
1544 /* If we have valid HiZ data and are using the image as a read-only
1545 * depth/stencil attachment, we should enable HiZ so that we can get
1546 * faster depth testing.
1547 */
1548 return image->planes[plane].aux_usage;
1549 } else {
1550 return ISL_AUX_USAGE_NONE;
1551 }
1552
1553 case ISL_AUX_STATE_PASS_THROUGH:
1554 case ISL_AUX_STATE_AUX_INVALID:
1555 return ISL_AUX_USAGE_NONE;
1556 }
1557
1558 unreachable("Invalid isl_aux_state");
1559 }
1560
1561 /**
1562 * This function returns the level of unresolved fast-clear support of the
1563 * given image in the given VkImageLayout.
1564 *
1565 * @param devinfo The device information of the Intel GPU.
1566 * @param image The image that may contain a collection of buffers.
1567 * @param aspect The aspect of the image to be accessed.
1568 * @param usage The usage which describes how the image will be accessed.
1569 * @param layout The current layout of the image aspect(s).
1570 */
1571 enum anv_fast_clear_type
1572 anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
1573 const struct anv_image * const image,
1574 const VkImageAspectFlagBits aspect,
1575 const VkImageLayout layout)
1576 {
1577 if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
1578 return ANV_FAST_CLEAR_NONE;
1579
1580 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1581
1582 /* If there is no auxiliary surface allocated, there are no fast-clears */
1583 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
1584 return ANV_FAST_CLEAR_NONE;
1585
1586 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1587 * lack the MI ALU which we need to determine the predicates.
1588 */
1589 if (devinfo->gen == 7 && !devinfo->is_haswell && image->samples > 1)
1590 return ANV_FAST_CLEAR_NONE;
1591
1592 enum isl_aux_state aux_state =
1593 anv_layout_to_aux_state(devinfo, image, aspect, layout);
1594
1595 switch (aux_state) {
1596 case ISL_AUX_STATE_CLEAR:
1597 unreachable("We never use this state");
1598
1599 case ISL_AUX_STATE_PARTIAL_CLEAR:
1600 case ISL_AUX_STATE_COMPRESSED_CLEAR:
1601 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1602 return ANV_FAST_CLEAR_DEFAULT_VALUE;
1603 } else if (layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL) {
1604 /* When we're in a render pass we have the clear color data from the
1605 * VkRenderPassBeginInfo and we can use arbitrary clear colors. They
1606 * must get partially resolved before we leave the render pass.
1607 */
1608 return ANV_FAST_CLEAR_ANY;
1609 } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_MCS ||
1610 image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
1611 if (devinfo->gen >= 11) {
1612 /* On ICL and later, the sampler hardware uses a copy of the clear
1613 * value that is encoded as a pixel value. Therefore, we can use
1614 * any clear color we like for sampling.
1615 */
1616 return ANV_FAST_CLEAR_ANY;
1617 } else {
1618 /* If the image has MCS or CCS_E enabled all the time then we can
1619 * use fast-clear as long as the clear color is the default value
1620 * of zero since this is the default value we program into every
1621 * surface state used for texturing.
1622 */
1623 return ANV_FAST_CLEAR_DEFAULT_VALUE;
1624 }
1625 } else {
1626 return ANV_FAST_CLEAR_NONE;
1627 }
1628
1629 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1630 case ISL_AUX_STATE_RESOLVED:
1631 case ISL_AUX_STATE_PASS_THROUGH:
1632 case ISL_AUX_STATE_AUX_INVALID:
1633 return ANV_FAST_CLEAR_NONE;
1634 }
1635
1636 unreachable("Invalid isl_aux_state");
1637 }
1638
1639
1640 static struct anv_state
1641 alloc_surface_state(struct anv_device *device)
1642 {
1643 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1644 }
1645
1646 static enum isl_channel_select
1647 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
1648 struct isl_swizzle format_swizzle)
1649 {
1650 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
1651 swizzle = component;
1652
1653 switch (swizzle) {
1654 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
1655 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
1656 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
1657 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
1658 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
1659 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
1660 default:
1661 unreachable("Invalid swizzle");
1662 }
1663 }
1664
1665 void
1666 anv_image_fill_surface_state(struct anv_device *device,
1667 const struct anv_image *image,
1668 VkImageAspectFlagBits aspect,
1669 const struct isl_view *view_in,
1670 isl_surf_usage_flags_t view_usage,
1671 enum isl_aux_usage aux_usage,
1672 const union isl_color_value *clear_color,
1673 enum anv_image_view_state_flags flags,
1674 struct anv_surface_state *state_inout,
1675 struct brw_image_param *image_param_out)
1676 {
1677 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1678
1679 const struct anv_surface *surface = &image->planes[plane].surface,
1680 *aux_surface = &image->planes[plane].aux_surface;
1681
1682 struct isl_view view = *view_in;
1683 view.usage |= view_usage;
1684
1685 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1686 * compressed surface with a shadow surface, we use the shadow instead of
1687 * the primary surface. The shadow surface will be tiled, unlike the main
1688 * surface, so it should get significantly better performance.
1689 */
1690 if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
1691 isl_format_is_compressed(view.format) &&
1692 (flags & ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL)) {
1693 assert(isl_format_is_compressed(surface->isl.format));
1694 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1695 assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR);
1696 surface = &image->planes[plane].shadow_surface;
1697 }
1698
1699 /* For texturing from stencil on gen7, we have to sample from a shadow
1700 * surface because we don't support W-tiling in the sampler.
1701 */
1702 if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
1703 aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1704 assert(device->info.gen == 7);
1705 assert(view_usage & ISL_SURF_USAGE_TEXTURE_BIT);
1706 surface = &image->planes[plane].shadow_surface;
1707 }
1708
1709 if (view_usage == ISL_SURF_USAGE_RENDER_TARGET_BIT)
1710 view.swizzle = anv_swizzle_for_render(view.swizzle);
1711
1712 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1713 if (device->info.gen == 7 && !device->info.is_haswell)
1714 view.swizzle = ISL_SWIZZLE_IDENTITY;
1715
1716 /* If this is a HiZ buffer we can sample from with a programmable clear
1717 * value (SKL+), define the clear value to the optimal constant.
1718 */
1719 union isl_color_value default_clear_color = { .u32 = { 0, } };
1720 if (device->info.gen >= 9 && aspect == VK_IMAGE_ASPECT_DEPTH_BIT)
1721 default_clear_color.f32[0] = ANV_HZ_FC_VAL;
1722 if (!clear_color)
1723 clear_color = &default_clear_color;
1724
1725 const struct anv_address address =
1726 anv_address_add(image->planes[plane].address, surface->offset);
1727
1728 if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
1729 !(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY) &&
1730 !isl_has_matching_typed_storage_image_format(&device->info,
1731 view.format)) {
1732 /* In this case, we are a writeable storage buffer which needs to be
1733 * lowered to linear. All tiling and offset calculations will be done in
1734 * the shader.
1735 */
1736 assert(aux_usage == ISL_AUX_USAGE_NONE);
1737 isl_buffer_fill_state(&device->isl_dev, state_inout->state.map,
1738 .address = anv_address_physical(address),
1739 .size_B = surface->isl.size_B,
1740 .format = ISL_FORMAT_RAW,
1741 .swizzle = ISL_SWIZZLE_IDENTITY,
1742 .stride_B = 1,
1743 .mocs = anv_mocs_for_bo(device, address.bo));
1744 state_inout->address = address,
1745 state_inout->aux_address = ANV_NULL_ADDRESS;
1746 state_inout->clear_address = ANV_NULL_ADDRESS;
1747 } else {
1748 if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
1749 !(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY)) {
1750 /* Typed surface reads support a very limited subset of the shader
1751 * image formats. Translate it into the closest format the hardware
1752 * supports.
1753 */
1754 assert(aux_usage == ISL_AUX_USAGE_NONE);
1755 view.format = isl_lower_storage_image_format(&device->info,
1756 view.format);
1757 }
1758
1759 const struct isl_surf *isl_surf = &surface->isl;
1760
1761 struct isl_surf tmp_surf;
1762 uint32_t offset_B = 0, tile_x_sa = 0, tile_y_sa = 0;
1763 if (isl_format_is_compressed(surface->isl.format) &&
1764 !isl_format_is_compressed(view.format)) {
1765 /* We're creating an uncompressed view of a compressed surface. This
1766 * is allowed but only for a single level/layer.
1767 */
1768 assert(surface->isl.samples == 1);
1769 assert(view.levels == 1);
1770 assert(view.array_len == 1);
1771
1772 isl_surf_get_image_surf(&device->isl_dev, isl_surf,
1773 view.base_level,
1774 surface->isl.dim == ISL_SURF_DIM_3D ?
1775 0 : view.base_array_layer,
1776 surface->isl.dim == ISL_SURF_DIM_3D ?
1777 view.base_array_layer : 0,
1778 &tmp_surf,
1779 &offset_B, &tile_x_sa, &tile_y_sa);
1780
1781 /* The newly created image represents the one subimage we're
1782 * referencing with this view so it only has one array slice and
1783 * miplevel.
1784 */
1785 view.base_array_layer = 0;
1786 view.base_level = 0;
1787
1788 /* We're making an uncompressed view here. The image dimensions need
1789 * to be scaled down by the block size.
1790 */
1791 const struct isl_format_layout *fmtl =
1792 isl_format_get_layout(surface->isl.format);
1793 tmp_surf.logical_level0_px =
1794 isl_surf_get_logical_level0_el(&tmp_surf);
1795 tmp_surf.phys_level0_sa = isl_surf_get_phys_level0_el(&tmp_surf);
1796 tmp_surf.format = view.format;
1797 tile_x_sa /= fmtl->bw;
1798 tile_y_sa /= fmtl->bh;
1799
1800 isl_surf = &tmp_surf;
1801
1802 if (device->info.gen <= 8) {
1803 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1804 assert(tile_x_sa == 0);
1805 assert(tile_y_sa == 0);
1806 }
1807 }
1808
1809 state_inout->address = anv_address_add(address, offset_B);
1810
1811 struct anv_address aux_address = ANV_NULL_ADDRESS;
1812 if (aux_usage != ISL_AUX_USAGE_NONE) {
1813 aux_address = anv_address_add(image->planes[plane].address,
1814 aux_surface->offset);
1815 }
1816 state_inout->aux_address = aux_address;
1817
1818 struct anv_address clear_address = ANV_NULL_ADDRESS;
1819 if (device->info.gen >= 10 && aux_usage != ISL_AUX_USAGE_NONE) {
1820 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1821 clear_address = (struct anv_address) {
1822 .bo = device->hiz_clear_bo,
1823 .offset = 0,
1824 };
1825 } else {
1826 clear_address = anv_image_get_clear_color_addr(device, image, aspect);
1827 }
1828 }
1829 state_inout->clear_address = clear_address;
1830
1831 isl_surf_fill_state(&device->isl_dev, state_inout->state.map,
1832 .surf = isl_surf,
1833 .view = &view,
1834 .address = anv_address_physical(state_inout->address),
1835 .clear_color = *clear_color,
1836 .aux_surf = &aux_surface->isl,
1837 .aux_usage = aux_usage,
1838 .aux_address = anv_address_physical(aux_address),
1839 .clear_address = anv_address_physical(clear_address),
1840 .use_clear_address = !anv_address_is_null(clear_address),
1841 .mocs = anv_mocs_for_bo(device,
1842 state_inout->address.bo),
1843 .x_offset_sa = tile_x_sa,
1844 .y_offset_sa = tile_y_sa);
1845
1846 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1847 * are used to store other information. This should be ok, however,
1848 * because the surface buffer addresses are always 4K page aligned.
1849 */
1850 uint32_t *aux_addr_dw = state_inout->state.map +
1851 device->isl_dev.ss.aux_addr_offset;
1852 assert((aux_address.offset & 0xfff) == 0);
1853 state_inout->aux_address.offset |= *aux_addr_dw & 0xfff;
1854
1855 if (device->info.gen >= 10 && clear_address.bo) {
1856 uint32_t *clear_addr_dw = state_inout->state.map +
1857 device->isl_dev.ss.clear_color_state_offset;
1858 assert((clear_address.offset & 0x3f) == 0);
1859 state_inout->clear_address.offset |= *clear_addr_dw & 0x3f;
1860 }
1861 }
1862
1863 if (image_param_out) {
1864 assert(view_usage == ISL_SURF_USAGE_STORAGE_BIT);
1865 isl_surf_fill_image_param(&device->isl_dev, image_param_out,
1866 &surface->isl, &view);
1867 }
1868 }
1869
1870 static VkImageAspectFlags
1871 remap_aspect_flags(VkImageAspectFlags view_aspects)
1872 {
1873 if (view_aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
1874 if (util_bitcount(view_aspects) == 1)
1875 return VK_IMAGE_ASPECT_COLOR_BIT;
1876
1877 VkImageAspectFlags color_aspects = 0;
1878 for (uint32_t i = 0; i < util_bitcount(view_aspects); i++)
1879 color_aspects |= VK_IMAGE_ASPECT_PLANE_0_BIT << i;
1880 return color_aspects;
1881 }
1882 /* No special remapping needed for depth & stencil aspects. */
1883 return view_aspects;
1884 }
1885
1886 static uint32_t
1887 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask)
1888 {
1889 uint32_t planes = 0;
1890
1891 if (aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT |
1892 VK_IMAGE_ASPECT_DEPTH_BIT |
1893 VK_IMAGE_ASPECT_STENCIL_BIT |
1894 VK_IMAGE_ASPECT_PLANE_0_BIT))
1895 planes++;
1896 if (aspect_mask & VK_IMAGE_ASPECT_PLANE_1_BIT)
1897 planes++;
1898 if (aspect_mask & VK_IMAGE_ASPECT_PLANE_2_BIT)
1899 planes++;
1900
1901 if ((aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT) != 0 &&
1902 (aspect_mask & VK_IMAGE_ASPECT_STENCIL_BIT) != 0)
1903 planes++;
1904
1905 return planes;
1906 }
1907
1908 VkResult
1909 anv_CreateImageView(VkDevice _device,
1910 const VkImageViewCreateInfo *pCreateInfo,
1911 const VkAllocationCallbacks *pAllocator,
1912 VkImageView *pView)
1913 {
1914 ANV_FROM_HANDLE(anv_device, device, _device);
1915 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
1916 struct anv_image_view *iview;
1917
1918 iview = vk_zalloc2(&device->vk.alloc, pAllocator, sizeof(*iview), 8,
1919 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1920 if (iview == NULL)
1921 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1922
1923 vk_object_base_init(&device->vk, &iview->base, VK_OBJECT_TYPE_IMAGE_VIEW);
1924
1925 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
1926
1927 assert(range->layerCount > 0);
1928 assert(range->baseMipLevel < image->levels);
1929
1930 /* Check if a conversion info was passed. */
1931 const struct anv_format *conv_format = NULL;
1932 const VkSamplerYcbcrConversionInfo *conv_info =
1933 vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
1934
1935 /* If image has an external format, the pNext chain must contain an instance of
1936 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1937 * external format as image."
1938 */
1939 assert(!image->external_format || conv_info);
1940
1941 if (conv_info) {
1942 ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion, conv_info->conversion);
1943 conv_format = conversion->format;
1944 }
1945
1946 VkImageUsageFlags image_usage = image->usage;
1947 if (range->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
1948 VK_IMAGE_ASPECT_STENCIL_BIT)) {
1949 assert(!(range->aspectMask & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV));
1950 /* From the Vulkan 1.2.131 spec:
1951 *
1952 * "If the image was has a depth-stencil format and was created with
1953 * a VkImageStencilUsageCreateInfo structure included in the pNext
1954 * chain of VkImageCreateInfo, the usage is calculated based on the
1955 * subresource.aspectMask provided:
1956 *
1957 * - If aspectMask includes only VK_IMAGE_ASPECT_STENCIL_BIT, the
1958 * implicit usage is equal to
1959 * VkImageStencilUsageCreateInfo::stencilUsage.
1960 *
1961 * - If aspectMask includes only VK_IMAGE_ASPECT_DEPTH_BIT, the
1962 * implicit usage is equal to VkImageCreateInfo::usage.
1963 *
1964 * - If both aspects are included in aspectMask, the implicit usage
1965 * is equal to the intersection of VkImageCreateInfo::usage and
1966 * VkImageStencilUsageCreateInfo::stencilUsage.
1967 */
1968 if (range->aspectMask == VK_IMAGE_ASPECT_STENCIL_BIT) {
1969 image_usage = image->stencil_usage;
1970 } else if (range->aspectMask == VK_IMAGE_ASPECT_DEPTH_BIT) {
1971 image_usage = image->usage;
1972 } else {
1973 assert(range->aspectMask == (VK_IMAGE_ASPECT_DEPTH_BIT |
1974 VK_IMAGE_ASPECT_STENCIL_BIT));
1975 image_usage = image->usage & image->stencil_usage;
1976 }
1977 }
1978
1979 const VkImageViewUsageCreateInfo *usage_info =
1980 vk_find_struct_const(pCreateInfo, IMAGE_VIEW_USAGE_CREATE_INFO);
1981 VkImageUsageFlags view_usage = usage_info ? usage_info->usage : image_usage;
1982
1983 /* View usage should be a subset of image usage */
1984 assert((view_usage & ~image_usage) == 0);
1985 assert(view_usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
1986 VK_IMAGE_USAGE_STORAGE_BIT |
1987 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
1988 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
1989 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
1990
1991 switch (image->type) {
1992 default:
1993 unreachable("bad VkImageType");
1994 case VK_IMAGE_TYPE_1D:
1995 case VK_IMAGE_TYPE_2D:
1996 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
1997 break;
1998 case VK_IMAGE_TYPE_3D:
1999 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
2000 <= anv_minify(image->extent.depth, range->baseMipLevel));
2001 break;
2002 }
2003
2004 /* First expand aspects to the image's ones (for example
2005 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
2006 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
2007 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
2008 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
2009 */
2010 VkImageAspectFlags expanded_aspects =
2011 anv_image_expand_aspects(image, range->aspectMask);
2012
2013 iview->image = image;
2014
2015 /* Remap the expanded aspects for the image view. For example if only
2016 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
2017 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
2018 * the image view, it only has a single plane.
2019 */
2020 iview->aspect_mask = remap_aspect_flags(expanded_aspects);
2021 iview->n_planes = anv_image_aspect_get_planes(iview->aspect_mask);
2022 iview->vk_format = pCreateInfo->format;
2023
2024 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
2025 assert(!image->external_format || pCreateInfo->format == VK_FORMAT_UNDEFINED);
2026
2027 /* Format is undefined, this can happen when using external formats. Set
2028 * view format from the passed conversion info.
2029 */
2030 if (iview->vk_format == VK_FORMAT_UNDEFINED && conv_format)
2031 iview->vk_format = conv_format->vk_format;
2032
2033 iview->extent = (VkExtent3D) {
2034 .width = anv_minify(image->extent.width , range->baseMipLevel),
2035 .height = anv_minify(image->extent.height, range->baseMipLevel),
2036 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
2037 };
2038
2039 /* Now go through the underlying image selected planes (computed in
2040 * expanded_aspects) and map them to planes in the image view.
2041 */
2042 uint32_t iaspect_bit, vplane = 0;
2043 anv_foreach_image_aspect_bit(iaspect_bit, image, expanded_aspects) {
2044 uint32_t iplane =
2045 anv_image_aspect_to_plane(image->aspects, 1UL << iaspect_bit);
2046 VkImageAspectFlags vplane_aspect =
2047 anv_plane_to_aspect(iview->aspect_mask, vplane);
2048 struct anv_format_plane format =
2049 anv_get_format_plane(&device->info, iview->vk_format,
2050 vplane_aspect, image->tiling);
2051
2052 iview->planes[vplane].image_plane = iplane;
2053
2054 iview->planes[vplane].isl = (struct isl_view) {
2055 .format = format.isl_format,
2056 .base_level = range->baseMipLevel,
2057 .levels = anv_get_levelCount(image, range),
2058 .base_array_layer = range->baseArrayLayer,
2059 .array_len = anv_get_layerCount(image, range),
2060 .swizzle = {
2061 .r = remap_swizzle(pCreateInfo->components.r,
2062 VK_COMPONENT_SWIZZLE_R, format.swizzle),
2063 .g = remap_swizzle(pCreateInfo->components.g,
2064 VK_COMPONENT_SWIZZLE_G, format.swizzle),
2065 .b = remap_swizzle(pCreateInfo->components.b,
2066 VK_COMPONENT_SWIZZLE_B, format.swizzle),
2067 .a = remap_swizzle(pCreateInfo->components.a,
2068 VK_COMPONENT_SWIZZLE_A, format.swizzle),
2069 },
2070 };
2071
2072 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
2073 iview->planes[vplane].isl.base_array_layer = 0;
2074 iview->planes[vplane].isl.array_len = iview->extent.depth;
2075 }
2076
2077 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
2078 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
2079 iview->planes[vplane].isl.usage = ISL_SURF_USAGE_CUBE_BIT;
2080 } else {
2081 iview->planes[vplane].isl.usage = 0;
2082 }
2083
2084 if (view_usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
2085 (view_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
2086 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
2087 iview->planes[vplane].optimal_sampler_surface_state.state = alloc_surface_state(device);
2088 iview->planes[vplane].general_sampler_surface_state.state = alloc_surface_state(device);
2089
2090 enum isl_aux_usage general_aux_usage =
2091 anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
2092 VK_IMAGE_USAGE_SAMPLED_BIT,
2093 VK_IMAGE_LAYOUT_GENERAL);
2094 enum isl_aux_usage optimal_aux_usage =
2095 anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
2096 VK_IMAGE_USAGE_SAMPLED_BIT,
2097 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
2098
2099 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2100 &iview->planes[vplane].isl,
2101 ISL_SURF_USAGE_TEXTURE_BIT,
2102 optimal_aux_usage, NULL,
2103 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL,
2104 &iview->planes[vplane].optimal_sampler_surface_state,
2105 NULL);
2106
2107 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2108 &iview->planes[vplane].isl,
2109 ISL_SURF_USAGE_TEXTURE_BIT,
2110 general_aux_usage, NULL,
2111 0,
2112 &iview->planes[vplane].general_sampler_surface_state,
2113 NULL);
2114 }
2115
2116 /* NOTE: This one needs to go last since it may stomp isl_view.format */
2117 if (view_usage & VK_IMAGE_USAGE_STORAGE_BIT) {
2118 iview->planes[vplane].storage_surface_state.state = alloc_surface_state(device);
2119 iview->planes[vplane].writeonly_storage_surface_state.state = alloc_surface_state(device);
2120
2121 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2122 &iview->planes[vplane].isl,
2123 ISL_SURF_USAGE_STORAGE_BIT,
2124 ISL_AUX_USAGE_NONE, NULL,
2125 0,
2126 &iview->planes[vplane].storage_surface_state,
2127 &iview->planes[vplane].storage_image_param);
2128
2129 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
2130 &iview->planes[vplane].isl,
2131 ISL_SURF_USAGE_STORAGE_BIT,
2132 ISL_AUX_USAGE_NONE, NULL,
2133 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY,
2134 &iview->planes[vplane].writeonly_storage_surface_state,
2135 NULL);
2136 }
2137
2138 vplane++;
2139 }
2140
2141 *pView = anv_image_view_to_handle(iview);
2142
2143 return VK_SUCCESS;
2144 }
2145
2146 void
2147 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
2148 const VkAllocationCallbacks *pAllocator)
2149 {
2150 ANV_FROM_HANDLE(anv_device, device, _device);
2151 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
2152
2153 if (!iview)
2154 return;
2155
2156 for (uint32_t plane = 0; plane < iview->n_planes; plane++) {
2157 if (iview->planes[plane].optimal_sampler_surface_state.state.alloc_size > 0) {
2158 anv_state_pool_free(&device->surface_state_pool,
2159 iview->planes[plane].optimal_sampler_surface_state.state);
2160 }
2161
2162 if (iview->planes[plane].general_sampler_surface_state.state.alloc_size > 0) {
2163 anv_state_pool_free(&device->surface_state_pool,
2164 iview->planes[plane].general_sampler_surface_state.state);
2165 }
2166
2167 if (iview->planes[plane].storage_surface_state.state.alloc_size > 0) {
2168 anv_state_pool_free(&device->surface_state_pool,
2169 iview->planes[plane].storage_surface_state.state);
2170 }
2171
2172 if (iview->planes[plane].writeonly_storage_surface_state.state.alloc_size > 0) {
2173 anv_state_pool_free(&device->surface_state_pool,
2174 iview->planes[plane].writeonly_storage_surface_state.state);
2175 }
2176 }
2177
2178 vk_object_base_finish(&iview->base);
2179 vk_free2(&device->vk.alloc, pAllocator, iview);
2180 }
2181
2182
2183 VkResult
2184 anv_CreateBufferView(VkDevice _device,
2185 const VkBufferViewCreateInfo *pCreateInfo,
2186 const VkAllocationCallbacks *pAllocator,
2187 VkBufferView *pView)
2188 {
2189 ANV_FROM_HANDLE(anv_device, device, _device);
2190 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
2191 struct anv_buffer_view *view;
2192
2193 view = vk_alloc2(&device->vk.alloc, pAllocator, sizeof(*view), 8,
2194 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
2195 if (!view)
2196 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
2197
2198 /* TODO: Handle the format swizzle? */
2199
2200 vk_object_base_init(&device->vk, &view->base, VK_OBJECT_TYPE_BUFFER_VIEW);
2201 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
2202 VK_IMAGE_ASPECT_COLOR_BIT,
2203 VK_IMAGE_TILING_LINEAR);
2204 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
2205 view->range = anv_buffer_get_range(buffer, pCreateInfo->offset,
2206 pCreateInfo->range);
2207 view->range = align_down_npot_u32(view->range, format_bs);
2208
2209 view->address = anv_address_add(buffer->address, pCreateInfo->offset);
2210
2211 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
2212 view->surface_state = alloc_surface_state(device);
2213
2214 anv_fill_buffer_surface_state(device, view->surface_state,
2215 view->format,
2216 view->address, view->range, format_bs);
2217 } else {
2218 view->surface_state = (struct anv_state){ 0 };
2219 }
2220
2221 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
2222 view->storage_surface_state = alloc_surface_state(device);
2223 view->writeonly_storage_surface_state = alloc_surface_state(device);
2224
2225 enum isl_format storage_format =
2226 isl_has_matching_typed_storage_image_format(&device->info,
2227 view->format) ?
2228 isl_lower_storage_image_format(&device->info, view->format) :
2229 ISL_FORMAT_RAW;
2230
2231 anv_fill_buffer_surface_state(device, view->storage_surface_state,
2232 storage_format,
2233 view->address, view->range,
2234 (storage_format == ISL_FORMAT_RAW ? 1 :
2235 isl_format_get_layout(storage_format)->bpb / 8));
2236
2237 /* Write-only accesses should use the original format. */
2238 anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
2239 view->format,
2240 view->address, view->range,
2241 isl_format_get_layout(view->format)->bpb / 8);
2242
2243 isl_buffer_fill_image_param(&device->isl_dev,
2244 &view->storage_image_param,
2245 view->format, view->range);
2246 } else {
2247 view->storage_surface_state = (struct anv_state){ 0 };
2248 view->writeonly_storage_surface_state = (struct anv_state){ 0 };
2249 }
2250
2251 *pView = anv_buffer_view_to_handle(view);
2252
2253 return VK_SUCCESS;
2254 }
2255
2256 void
2257 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
2258 const VkAllocationCallbacks *pAllocator)
2259 {
2260 ANV_FROM_HANDLE(anv_device, device, _device);
2261 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
2262
2263 if (!view)
2264 return;
2265
2266 if (view->surface_state.alloc_size > 0)
2267 anv_state_pool_free(&device->surface_state_pool,
2268 view->surface_state);
2269
2270 if (view->storage_surface_state.alloc_size > 0)
2271 anv_state_pool_free(&device->surface_state_pool,
2272 view->storage_surface_state);
2273
2274 if (view->writeonly_storage_surface_state.alloc_size > 0)
2275 anv_state_pool_free(&device->surface_state_pool,
2276 view->writeonly_storage_surface_state);
2277
2278 vk_object_base_finish(&view->base);
2279 vk_free2(&device->vk.alloc, pAllocator, view);
2280 }