2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm-uapi/drm_fourcc.h"
32 #include "anv_private.h"
33 #include "util/debug.h"
35 #include "util/u_math.h"
37 #include "common/gen_aux_map.h"
39 #include "vk_format_info.h"
41 static isl_surf_usage_flags_t
42 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
43 VkImageUsageFlags vk_usage
,
44 isl_surf_usage_flags_t isl_extra_usage
,
45 VkImageAspectFlagBits aspect
)
47 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
49 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
50 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
52 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
53 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
55 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
56 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
58 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
59 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
61 /* Even if we're only using it for transfer operations, clears to depth and
62 * stencil images happen as depth and stencil so they need the right ISL
63 * usage bits or else things will fall apart.
66 case VK_IMAGE_ASPECT_DEPTH_BIT
:
67 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
69 case VK_IMAGE_ASPECT_STENCIL_BIT
:
70 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
72 case VK_IMAGE_ASPECT_COLOR_BIT
:
73 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
74 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
75 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
78 unreachable("bad VkImageAspect");
81 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
82 /* blorp implements transfers by sampling from the source image. */
83 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
86 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
87 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
88 /* blorp implements transfers by rendering into the destination image.
89 * Only request this with color images, as we deal with depth/stencil
90 * formats differently. */
91 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
97 static isl_tiling_flags_t
98 choose_isl_tiling_flags(const struct anv_image_create_info
*anv_info
,
99 const struct isl_drm_modifier_info
*isl_mod_info
,
102 const VkImageCreateInfo
*base_info
= anv_info
->vk_info
;
103 isl_tiling_flags_t flags
= 0;
105 switch (base_info
->tiling
) {
107 unreachable("bad VkImageTiling");
108 case VK_IMAGE_TILING_OPTIMAL
:
109 flags
= ISL_TILING_ANY_MASK
;
111 case VK_IMAGE_TILING_LINEAR
:
112 flags
= ISL_TILING_LINEAR_BIT
;
116 if (anv_info
->isl_tiling_flags
)
117 flags
&= anv_info
->isl_tiling_flags
;
120 flags
&= ISL_TILING_LINEAR_BIT
| ISL_TILING_X_BIT
;
123 flags
&= 1 << isl_mod_info
->tiling
;
130 static struct anv_surface
*
131 get_surface(struct anv_image
*image
, VkImageAspectFlagBits aspect
)
133 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
134 return &image
->planes
[plane
].surface
;
138 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
140 assert(surf
->isl
.size_B
> 0); /* isl surface must be initialized */
142 if (image
->disjoint
) {
143 surf
->offset
= align_u32(image
->planes
[plane
].size
,
144 surf
->isl
.alignment_B
);
145 /* Plane offset is always 0 when it's disjoint. */
147 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment_B
);
148 /* Determine plane's offset only once when the first surface is added. */
149 if (image
->planes
[plane
].size
== 0)
150 image
->planes
[plane
].offset
= image
->size
;
153 image
->size
= surf
->offset
+ surf
->isl
.size_B
;
154 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size_B
) - image
->planes
[plane
].offset
;
156 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment_B
);
157 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
158 surf
->isl
.alignment_B
);
163 all_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
164 const VkImageFormatListCreateInfoKHR
*fmt_list
,
165 struct anv_image
*image
)
167 enum isl_format format
=
168 anv_get_isl_format(devinfo
, image
->vk_format
,
169 VK_IMAGE_ASPECT_COLOR_BIT
, image
->tiling
);
171 if (!isl_format_supports_ccs_e(devinfo
, format
))
174 if (!(image
->create_flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
177 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
180 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
181 enum isl_format view_format
=
182 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
183 VK_IMAGE_ASPECT_COLOR_BIT
, image
->tiling
);
185 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
193 * For color images that have an auxiliary surface, request allocation for an
194 * additional buffer that mainly stores fast-clear values. Use of this buffer
195 * allows us to access the image's subresources while being aware of their
196 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
197 * which a fast clear has occurred).
199 * In order to avoid having multiple clear colors for a single plane of an
200 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
201 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
202 * 2018), there were no known applications which would benefit from fast-
203 * clearing more than just the first slice.
205 * The fast clear portion of the image is laid out in the following order:
207 * * 1 or 4 dwords (depending on hardware generation) for the clear color
208 * * 1 dword for the anv_fast_clear_type of the clear color
209 * * On gen9+, 1 dword per level and layer of the image (3D levels count
210 * multiple layers) in level-major order for compression state.
212 * For the purpose of discoverability, the algorithm used to manage
213 * compression and fast-clears is described here:
215 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
216 * all of the values in the fast clear portion of the image are initialized
219 * * On fast-clear, the clear value is written into surface state and also
220 * into the buffer and the fast clear type is set appropriately. Both
221 * setting the fast-clear value in the buffer and setting the fast-clear
222 * type happen from the GPU using MI commands.
224 * * Whenever a render or blorp operation is performed with CCS_E, we call
225 * genX(cmd_buffer_mark_image_written) to set the compression state to
226 * true (which is represented by UINT32_MAX).
228 * * On pipeline barrier transitions, the worst-case transition is computed
229 * from the image layouts. The command streamer inspects the fast clear
230 * type and compression state dwords and constructs a predicate. The
231 * worst-case resolve is performed with the given predicate and the fast
232 * clear and compression state is set accordingly.
234 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
235 * details on exactly what is allowed in what layouts.
237 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
238 * In order to deal with this, we have to do some clear color management.
240 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
241 * value from the buffer into the surface state with MI commands.
243 * * For any blorp operations, we pass the address to the clear value into
244 * blorp and it knows to copy the clear color.
247 add_aux_state_tracking_buffer(struct anv_image
*image
,
249 const struct anv_device
*device
)
251 assert(image
&& device
);
252 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 &&
253 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
255 /* Compressed images must be tiled and therefore everything should be 4K
256 * aligned. The CCS has the same alignment requirements. This is good
257 * because we need at least dword-alignment for MI_LOAD/STORE operations.
259 assert(image
->alignment
% 4 == 0);
260 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
262 /* This buffer should be at the very end of the plane. */
263 if (image
->disjoint
) {
264 assert(image
->planes
[plane
].size
==
265 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
267 assert(image
->size
==
268 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
271 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
272 device
->isl_dev
.ss
.clear_color_state_size
:
273 device
->isl_dev
.ss
.clear_value_size
;
275 /* Clear color and fast clear type */
276 unsigned state_size
= clear_color_state_size
+ 4;
278 /* We only need to track compression on CCS_E surfaces. */
279 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
280 if (image
->type
== VK_IMAGE_TYPE_3D
) {
281 for (uint32_t l
= 0; l
< image
->levels
; l
++)
282 state_size
+= anv_minify(image
->extent
.depth
, l
) * 4;
284 state_size
+= image
->levels
* image
->array_size
* 4;
288 /* Add some padding to make sure the fast clear color state buffer starts at
289 * a 4K alignment. We believe that 256B might be enough, but due to lack of
290 * testing we will leave this as 4K for now.
292 image
->planes
[plane
].size
= ALIGN(image
->planes
[plane
].size
, 4096);
293 image
->size
= ALIGN(image
->size
, 4096);
295 assert(image
->planes
[plane
].offset
% 4096 == 0);
297 image
->planes
[plane
].fast_clear_state_offset
=
298 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
300 image
->planes
[plane
].size
+= state_size
;
301 image
->size
+= state_size
;
305 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
306 * image's memory requirements (that is, the image's size and alignment).
309 make_surface(const struct anv_device
*dev
,
310 struct anv_image
*image
,
312 isl_tiling_flags_t tiling_flags
,
313 isl_surf_usage_flags_t isl_extra_usage_flags
,
314 VkImageAspectFlagBits aspect
)
318 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
319 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
320 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
321 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
324 image
->extent
= anv_sanitize_image_extent(image
->type
, image
->extent
);
326 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
327 const struct anv_format_plane plane_format
=
328 anv_get_format_plane(&dev
->info
, image
->vk_format
, aspect
, image
->tiling
);
329 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
331 const isl_surf_usage_flags_t usage
=
332 choose_isl_surf_usage(image
->create_flags
, image
->usage
,
333 isl_extra_usage_flags
, aspect
);
335 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
336 * fall back to linear on Broadwell and earlier because we aren't
337 * guaranteed that we can handle offsets correctly. On Sky Lake, the
338 * horizontal and vertical alignments are sufficiently high that we can
339 * just use RENDER_SURFACE_STATE::X/Y Offset.
341 bool needs_shadow
= false;
342 isl_surf_usage_flags_t shadow_usage
= 0;
343 if (dev
->info
.gen
<= 8 &&
344 (image
->create_flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
) &&
345 image
->tiling
== VK_IMAGE_TILING_OPTIMAL
) {
346 assert(isl_format_is_compressed(plane_format
.isl_format
));
347 tiling_flags
= ISL_TILING_LINEAR_BIT
;
349 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
350 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
353 if (dev
->info
.gen
<= 7 &&
354 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
355 (image
->stencil_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)) {
357 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
358 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
361 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
362 .dim
= vk_to_isl_surf_dim
[image
->type
],
363 .format
= plane_format
.isl_format
,
364 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
365 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
366 .depth
= image
->extent
.depth
,
367 .levels
= image
->levels
,
368 .array_len
= image
->array_size
,
369 .samples
= image
->samples
,
370 .min_alignment_B
= 0,
371 .row_pitch_B
= stride
,
373 .tiling_flags
= tiling_flags
);
376 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
378 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
380 add_surface(image
, anv_surf
, plane
);
382 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
383 * create an identical tiled shadow surface for use while texturing so we
384 * don't get garbage performance. If we're on gen7 and the image contains
385 * stencil, then we need to maintain a shadow because we can't texture from
389 ok
= isl_surf_init(&dev
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
390 .dim
= vk_to_isl_surf_dim
[image
->type
],
391 .format
= plane_format
.isl_format
,
392 .width
= image
->extent
.width
,
393 .height
= image
->extent
.height
,
394 .depth
= image
->extent
.depth
,
395 .levels
= image
->levels
,
396 .array_len
= image
->array_size
,
397 .samples
= image
->samples
,
398 .min_alignment_B
= 0,
399 .row_pitch_B
= stride
,
400 .usage
= shadow_usage
,
401 .tiling_flags
= ISL_TILING_ANY_MASK
);
403 /* isl_surf_init() will fail only if provided invalid input. Invalid input
404 * is illegal in Vulkan.
408 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
411 /* Add a HiZ surface to a depth buffer that will be used for rendering.
413 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
414 /* We don't advertise that depth buffers could be used as storage
417 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
419 /* Allow the user to control HiZ enabling. Disable by default on gen7
420 * because resolves are not currently implemented pre-BDW.
422 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
423 /* It will never be used as an attachment, HiZ is pointless. */
424 } else if (dev
->info
.gen
== 7) {
425 anv_perf_warn(dev
->instance
, image
, "Implement gen7 HiZ");
426 } else if (image
->levels
> 1) {
427 anv_perf_warn(dev
->instance
, image
, "Enable multi-LOD HiZ");
428 } else if (image
->array_size
> 1) {
429 anv_perf_warn(dev
->instance
, image
,
430 "Implement multi-arrayLayer HiZ clears and resolves");
431 } else if (dev
->info
.gen
== 8 && image
->samples
> 1) {
432 anv_perf_warn(dev
->instance
, image
, "Enable gen8 multisampled HiZ");
433 } else if (!unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
)) {
434 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
435 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
,
436 &image
->planes
[plane
].surface
.isl
,
437 &image
->planes
[plane
].aux_surface
.isl
);
439 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
440 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
442 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
== 1) {
443 /* TODO: Disallow compression with :
445 * 1) non multiplanar images (We appear to hit a sampler bug with
446 * CCS & R16G16 format. Putting the clear state a page/4096bytes
447 * further fixes the issue).
449 * 2) alias images, because they might be aliases of images
452 * 3) compression disabled by debug
454 const bool allow_compression
=
455 image
->n_planes
== 1 &&
456 (image
->create_flags
& VK_IMAGE_CREATE_ALIAS_BIT
) == 0 &&
457 likely((INTEL_DEBUG
& DEBUG_NO_RBC
) == 0);
459 if (allow_compression
) {
460 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
461 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
,
462 &image
->planes
[plane
].surface
.isl
,
463 &image
->planes
[plane
].aux_surface
.isl
,
467 /* Disable CCS when it is not useful (i.e., when you can't render
468 * to the image with CCS enabled).
470 if (!isl_format_supports_rendering(&dev
->info
,
471 plane_format
.isl_format
)) {
472 /* While it may be technically possible to enable CCS for this
473 * image, we currently don't have things hooked up to get it
476 anv_perf_warn(dev
->instance
, image
,
477 "This image format doesn't support rendering. "
478 "Not allocating an CCS buffer.");
479 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
483 /* For images created without MUTABLE_FORMAT_BIT set, we know that
484 * they will always be used with the original format. In
485 * particular, they will always be used with a format that
486 * supports color compression. If it's never used as a storage
487 * image, then it will only be used through the sampler or the as
488 * a render target. This means that it's safe to just leave
489 * compression on at all times for these formats.
491 if (!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
492 image
->ccs_e_compatible
) {
493 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
494 } else if (dev
->info
.gen
>= 12) {
495 anv_perf_warn(dev
->instance
, image
,
496 "The CCS_D aux mode is not yet handled on "
497 "Gen12+. Not allocating a CCS buffer.");
498 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
502 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
503 add_aux_state_tracking_buffer(image
, plane
, dev
);
506 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
> 1) {
507 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
508 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
509 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
,
510 &image
->planes
[plane
].surface
.isl
,
511 &image
->planes
[plane
].aux_surface
.isl
);
513 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
514 add_aux_state_tracking_buffer(image
, plane
, dev
);
515 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
519 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
521 /* Upper bound of the last surface should be smaller than the plane's
524 assert((MAX2(image
->planes
[plane
].surface
.offset
,
525 image
->planes
[plane
].aux_surface
.offset
) +
526 (image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
527 image
->planes
[plane
].aux_surface
.isl
.size_B
:
528 image
->planes
[plane
].surface
.isl
.size_B
)) <=
529 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
531 if (image
->planes
[plane
].aux_surface
.isl
.size_B
) {
532 /* assert(image->planes[plane].fast_clear_state_offset == */
533 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
534 assert(image
->planes
[plane
].fast_clear_state_offset
<
535 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
542 score_drm_format_mod(uint64_t modifier
)
545 case DRM_FORMAT_MOD_LINEAR
: return 1;
546 case I915_FORMAT_MOD_X_TILED
: return 2;
547 case I915_FORMAT_MOD_Y_TILED
: return 3;
548 case I915_FORMAT_MOD_Y_TILED_CCS
: return 4;
549 default: unreachable("bad DRM format modifier");
553 static const struct isl_drm_modifier_info
*
554 choose_drm_format_mod(const struct anv_physical_device
*device
,
555 uint32_t modifier_count
, const uint64_t *modifiers
)
557 uint64_t best_mod
= UINT64_MAX
;
558 uint32_t best_score
= 0;
560 for (uint32_t i
= 0; i
< modifier_count
; ++i
) {
561 uint32_t score
= score_drm_format_mod(modifiers
[i
]);
562 if (score
> best_score
) {
563 best_mod
= modifiers
[i
];
569 return isl_drm_modifier_get_info(best_mod
);
575 anv_image_create(VkDevice _device
,
576 const struct anv_image_create_info
*create_info
,
577 const VkAllocationCallbacks
* alloc
,
580 ANV_FROM_HANDLE(anv_device
, device
, _device
);
581 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
582 const struct isl_drm_modifier_info
*isl_mod_info
= NULL
;
583 struct anv_image
*image
= NULL
;
586 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
588 const struct wsi_image_create_info
*wsi_info
=
589 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
590 if (wsi_info
&& wsi_info
->modifier_count
> 0) {
591 isl_mod_info
= choose_drm_format_mod(&device
->instance
->physicalDevice
,
592 wsi_info
->modifier_count
,
593 wsi_info
->modifiers
);
594 assert(isl_mod_info
);
597 anv_assert(pCreateInfo
->mipLevels
> 0);
598 anv_assert(pCreateInfo
->arrayLayers
> 0);
599 anv_assert(pCreateInfo
->samples
> 0);
600 anv_assert(pCreateInfo
->extent
.width
> 0);
601 anv_assert(pCreateInfo
->extent
.height
> 0);
602 anv_assert(pCreateInfo
->extent
.depth
> 0);
604 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
605 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
607 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
609 image
->type
= pCreateInfo
->imageType
;
610 image
->extent
= pCreateInfo
->extent
;
611 image
->vk_format
= pCreateInfo
->format
;
612 image
->format
= anv_get_format(pCreateInfo
->format
);
613 image
->aspects
= vk_format_aspects(image
->vk_format
);
614 image
->levels
= pCreateInfo
->mipLevels
;
615 image
->array_size
= pCreateInfo
->arrayLayers
;
616 image
->samples
= pCreateInfo
->samples
;
617 image
->usage
= pCreateInfo
->usage
;
618 image
->create_flags
= pCreateInfo
->flags
;
619 image
->tiling
= pCreateInfo
->tiling
;
620 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT
;
621 image
->needs_set_tiling
= wsi_info
&& wsi_info
->scanout
;
622 image
->drm_format_mod
= isl_mod_info
? isl_mod_info
->modifier
:
623 DRM_FORMAT_MOD_INVALID
;
625 if (image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
) {
626 image
->stencil_usage
= pCreateInfo
->usage
;
627 const VkImageStencilUsageCreateInfoEXT
*stencil_usage_info
=
628 vk_find_struct_const(pCreateInfo
->pNext
,
629 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT
);
630 if (stencil_usage_info
)
631 image
->stencil_usage
= stencil_usage_info
->stencilUsage
;
634 /* In case of external format, We don't know format yet,
635 * so skip the rest for now.
637 if (create_info
->external_format
) {
638 image
->external_format
= true;
639 *pImage
= anv_image_to_handle(image
);
643 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
644 assert(format
!= NULL
);
646 const isl_tiling_flags_t isl_tiling_flags
=
647 choose_isl_tiling_flags(create_info
, isl_mod_info
,
648 image
->needs_set_tiling
);
650 image
->n_planes
= format
->n_planes
;
652 const VkImageFormatListCreateInfoKHR
*fmt_list
=
653 vk_find_struct_const(pCreateInfo
->pNext
,
654 IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
656 image
->ccs_e_compatible
=
657 all_formats_ccs_e_compatible(&device
->info
, fmt_list
, image
);
660 for_each_bit(b
, image
->aspects
) {
661 r
= make_surface(device
, image
, create_info
->stride
, isl_tiling_flags
,
662 create_info
->isl_extra_usage_flags
, (1 << b
));
667 *pImage
= anv_image_to_handle(image
);
673 vk_free2(&device
->alloc
, alloc
, image
);
678 static struct anv_image
*
679 anv_swapchain_get_image(VkSwapchainKHR swapchain
,
682 uint32_t n_images
= index
+ 1;
683 VkImage
*images
= malloc(sizeof(*images
) * n_images
);
684 VkResult result
= wsi_common_get_images(swapchain
, &n_images
, images
);
686 if (result
!= VK_SUCCESS
&& result
!= VK_INCOMPLETE
) {
691 ANV_FROM_HANDLE(anv_image
, image
, images
[index
]);
698 anv_image_from_swapchain(VkDevice device
,
699 const VkImageCreateInfo
*pCreateInfo
,
700 const VkImageSwapchainCreateInfoKHR
*swapchain_info
,
701 const VkAllocationCallbacks
*pAllocator
,
704 struct anv_image
*swapchain_image
= anv_swapchain_get_image(swapchain_info
->swapchain
, 0);
705 assert(swapchain_image
);
707 assert(swapchain_image
->type
== pCreateInfo
->imageType
);
708 assert(swapchain_image
->vk_format
== pCreateInfo
->format
);
709 assert(swapchain_image
->extent
.width
== pCreateInfo
->extent
.width
);
710 assert(swapchain_image
->extent
.height
== pCreateInfo
->extent
.height
);
711 assert(swapchain_image
->extent
.depth
== pCreateInfo
->extent
.depth
);
712 assert(swapchain_image
->array_size
== pCreateInfo
->arrayLayers
);
713 /* Color attachment is added by the wsi code. */
714 assert(swapchain_image
->usage
== (pCreateInfo
->usage
| VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
));
716 VkImageCreateInfo local_create_info
;
717 local_create_info
= *pCreateInfo
;
718 local_create_info
.pNext
= NULL
;
719 /* The following parameters are implictly selected by the wsi code. */
720 local_create_info
.tiling
= VK_IMAGE_TILING_OPTIMAL
;
721 local_create_info
.samples
= VK_SAMPLE_COUNT_1_BIT
;
722 local_create_info
.usage
|= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
724 /* If the image has a particular modifier, specify that modifier. */
725 struct wsi_image_create_info local_wsi_info
= {
726 .sType
= VK_STRUCTURE_TYPE_WSI_IMAGE_CREATE_INFO_MESA
,
728 .modifiers
= &swapchain_image
->drm_format_mod
,
730 if (swapchain_image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
)
731 __vk_append_struct(&local_create_info
, &local_wsi_info
);
733 return anv_image_create(device
,
734 &(struct anv_image_create_info
) {
735 .vk_info
= &local_create_info
,
736 .external_format
= swapchain_image
->external_format
,
743 anv_CreateImage(VkDevice device
,
744 const VkImageCreateInfo
*pCreateInfo
,
745 const VkAllocationCallbacks
*pAllocator
,
748 const struct VkExternalMemoryImageCreateInfo
*create_info
=
749 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_MEMORY_IMAGE_CREATE_INFO
);
751 if (create_info
&& (create_info
->handleTypes
&
752 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID
))
753 return anv_image_from_external(device
, pCreateInfo
, create_info
,
756 bool use_external_format
= false;
757 const struct VkExternalFormatANDROID
*ext_format
=
758 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_FORMAT_ANDROID
);
760 /* "If externalFormat is zero, the effect is as if the
761 * VkExternalFormatANDROID structure was not present. Otherwise, the image
762 * will have the specified external format."
764 if (ext_format
&& ext_format
->externalFormat
!= 0)
765 use_external_format
= true;
767 const VkNativeBufferANDROID
*gralloc_info
=
768 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
770 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
773 const VkImageSwapchainCreateInfoKHR
*swapchain_info
=
774 vk_find_struct_const(pCreateInfo
->pNext
, IMAGE_SWAPCHAIN_CREATE_INFO_KHR
);
775 if (swapchain_info
&& swapchain_info
->swapchain
!= VK_NULL_HANDLE
)
776 return anv_image_from_swapchain(device
, pCreateInfo
, swapchain_info
,
779 return anv_image_create(device
,
780 &(struct anv_image_create_info
) {
781 .vk_info
= pCreateInfo
,
782 .external_format
= use_external_format
,
789 anv_DestroyImage(VkDevice _device
, VkImage _image
,
790 const VkAllocationCallbacks
*pAllocator
)
792 ANV_FROM_HANDLE(anv_device
, device
, _device
);
793 ANV_FROM_HANDLE(anv_image
, image
, _image
);
798 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
799 if (anv_image_plane_uses_aux_map(device
, image
, p
) &&
800 image
->planes
[p
].address
.bo
) {
801 gen_aux_map_unmap_range(device
->aux_map_ctx
,
802 image
->planes
[p
].aux_map_surface_address
,
803 image
->planes
[p
].surface
.isl
.size_B
);
805 if (image
->planes
[p
].bo_is_owned
) {
806 assert(image
->planes
[p
].address
.bo
!= NULL
);
807 anv_bo_cache_release(device
, &device
->bo_cache
,
808 image
->planes
[p
].address
.bo
);
812 vk_free2(&device
->alloc
, pAllocator
, image
);
815 static void anv_image_bind_memory_plane(struct anv_device
*device
,
816 struct anv_image
*image
,
818 struct anv_device_memory
*memory
,
819 uint32_t memory_offset
)
821 assert(!image
->planes
[plane
].bo_is_owned
);
824 if (anv_image_plane_uses_aux_map(device
, image
, plane
) &&
825 image
->planes
[plane
].address
.bo
) {
826 gen_aux_map_unmap_range(device
->aux_map_ctx
,
827 image
->planes
[plane
].aux_map_surface_address
,
828 image
->planes
[plane
].surface
.isl
.size_B
);
830 image
->planes
[plane
].address
= ANV_NULL_ADDRESS
;
834 image
->planes
[plane
].address
= (struct anv_address
) {
836 .offset
= memory_offset
,
839 if (anv_image_plane_uses_aux_map(device
, image
, plane
)) {
840 image
->planes
[plane
].aux_map_surface_address
=
841 anv_address_physical(
842 anv_address_add(image
->planes
[plane
].address
,
843 image
->planes
[plane
].surface
.offset
));
845 gen_aux_map_add_image(device
->aux_map_ctx
,
846 &image
->planes
[plane
].surface
.isl
,
847 image
->planes
[plane
].aux_map_surface_address
,
848 anv_address_physical(
849 anv_address_add(image
->planes
[plane
].address
,
850 image
->planes
[plane
].aux_surface
.offset
)));
854 /* We are binding AHardwareBuffer. Get a description, resolve the
855 * format and prepare anv_image properly.
858 resolve_ahw_image(struct anv_device
*device
,
859 struct anv_image
*image
,
860 struct anv_device_memory
*mem
)
862 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
864 AHardwareBuffer_Desc desc
;
865 AHardwareBuffer_describe(mem
->ahw
, &desc
);
868 int i915_tiling
= anv_gem_get_tiling(device
, mem
->bo
->gem_handle
);
869 VkImageTiling vk_tiling
;
870 isl_tiling_flags_t isl_tiling_flags
= 0;
872 switch (i915_tiling
) {
873 case I915_TILING_NONE
:
874 vk_tiling
= VK_IMAGE_TILING_LINEAR
;
875 isl_tiling_flags
= ISL_TILING_LINEAR_BIT
;
878 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
879 isl_tiling_flags
= ISL_TILING_X_BIT
;
882 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
883 isl_tiling_flags
= ISL_TILING_Y0_BIT
;
887 unreachable("Invalid tiling flags.");
890 assert(vk_tiling
== VK_IMAGE_TILING_LINEAR
||
891 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
);
894 VkFormat vk_format
= vk_format_from_android(desc
.format
, desc
.usage
);
895 enum isl_format isl_fmt
= anv_get_isl_format(&device
->info
,
897 VK_IMAGE_ASPECT_COLOR_BIT
,
899 assert(isl_fmt
!= ISL_FORMAT_UNSUPPORTED
);
901 /* Handle RGB(X)->RGBA fallback. */
902 switch (desc
.format
) {
903 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM
:
904 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM
:
905 if (isl_format_is_rgb(isl_fmt
))
906 isl_fmt
= isl_format_rgb_to_rgba(isl_fmt
);
910 /* Now we are able to fill anv_image fields properly and create
911 * isl_surface for it.
913 image
->vk_format
= vk_format
;
914 image
->format
= anv_get_format(vk_format
);
915 image
->aspects
= vk_format_aspects(image
->vk_format
);
916 image
->n_planes
= image
->format
->n_planes
;
917 image
->ccs_e_compatible
= false;
919 uint32_t stride
= desc
.stride
*
920 (isl_format_get_layout(isl_fmt
)->bpb
/ 8);
923 for_each_bit(b
, image
->aspects
) {
924 VkResult r
= make_surface(device
, image
, stride
, isl_tiling_flags
,
925 ISL_SURF_USAGE_DISABLE_AUX_BIT
, (1 << b
));
926 assert(r
== VK_SUCCESS
);
931 VkResult
anv_BindImageMemory(
934 VkDeviceMemory _memory
,
935 VkDeviceSize memoryOffset
)
937 ANV_FROM_HANDLE(anv_device
, device
, _device
);
938 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
939 ANV_FROM_HANDLE(anv_image
, image
, _image
);
942 resolve_ahw_image(device
, image
, mem
);
945 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
947 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
948 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
954 VkResult
anv_BindImageMemory2(
956 uint32_t bindInfoCount
,
957 const VkBindImageMemoryInfo
* pBindInfos
)
959 ANV_FROM_HANDLE(anv_device
, device
, _device
);
961 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
962 const VkBindImageMemoryInfo
*bind_info
= &pBindInfos
[i
];
963 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
964 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
966 /* Resolve will alter the image's aspects, do this first. */
968 resolve_ahw_image(device
, image
, mem
);
970 VkImageAspectFlags aspects
= image
->aspects
;
971 vk_foreach_struct_const(s
, bind_info
->pNext
) {
973 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO
: {
974 const VkBindImagePlaneMemoryInfo
*plane_info
=
975 (const VkBindImagePlaneMemoryInfo
*) s
;
977 aspects
= plane_info
->planeAspect
;
980 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR
: {
981 const VkBindImageMemorySwapchainInfoKHR
*swapchain_info
=
982 (const VkBindImageMemorySwapchainInfoKHR
*) s
;
983 struct anv_image
*swapchain_image
=
984 anv_swapchain_get_image(swapchain_info
->swapchain
,
985 swapchain_info
->imageIndex
);
986 assert(swapchain_image
);
987 assert(image
->aspects
== swapchain_image
->aspects
);
991 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
993 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
994 struct anv_device_memory mem
= {
995 .bo
= swapchain_image
->planes
[plane
].address
.bo
,
997 anv_image_bind_memory_plane(device
, image
, plane
,
998 &mem
, bind_info
->memoryOffset
);
1003 anv_debug_ignored_stype(s
->sType
);
1008 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
1009 * VK_NULL_HANDLE. In such case, just carry one with the next bind
1015 uint32_t aspect_bit
;
1016 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
1018 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
1019 anv_image_bind_memory_plane(device
, image
, plane
,
1020 mem
, bind_info
->memoryOffset
);
1027 void anv_GetImageSubresourceLayout(
1030 const VkImageSubresource
* subresource
,
1031 VkSubresourceLayout
* layout
)
1033 ANV_FROM_HANDLE(anv_image
, image
, _image
);
1035 const struct anv_surface
*surface
;
1036 if (subresource
->aspectMask
== VK_IMAGE_ASPECT_PLANE_1_BIT
&&
1037 image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
&&
1038 isl_drm_modifier_has_aux(image
->drm_format_mod
))
1039 surface
= &image
->planes
[0].aux_surface
;
1041 surface
= get_surface(image
, subresource
->aspectMask
);
1043 assert(__builtin_popcount(subresource
->aspectMask
) == 1);
1045 layout
->offset
= surface
->offset
;
1046 layout
->rowPitch
= surface
->isl
.row_pitch_B
;
1047 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1048 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1050 if (subresource
->mipLevel
> 0 || subresource
->arrayLayer
> 0) {
1051 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1054 isl_surf_get_image_offset_B_tile_sa(&surface
->isl
,
1055 subresource
->mipLevel
,
1056 subresource
->arrayLayer
,
1057 0 /* logical_z_offset_px */,
1058 &offset_B
, NULL
, NULL
);
1059 layout
->offset
+= offset_B
;
1060 layout
->size
= layout
->rowPitch
* anv_minify(image
->extent
.height
,
1061 subresource
->mipLevel
);
1063 layout
->size
= surface
->isl
.size_B
;
1068 * This function determines the optimal buffer to use for a given
1069 * VkImageLayout and other pieces of information needed to make that
1070 * determination. This does not determine the optimal buffer to use
1071 * during a resolve operation.
1073 * @param devinfo The device information of the Intel GPU.
1074 * @param image The image that may contain a collection of buffers.
1075 * @param aspect The aspect of the image to be accessed.
1076 * @param layout The current layout of the image aspect(s).
1078 * @return The primary buffer that should be used for the given layout.
1081 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
1082 const struct anv_image
* const image
,
1083 const VkImageAspectFlagBits aspect
,
1084 const VkImageLayout layout
)
1086 /* Validate the inputs. */
1088 /* The devinfo is needed as the optimal buffer varies across generations. */
1089 assert(devinfo
!= NULL
);
1091 /* The layout of a NULL image is not properly defined. */
1092 assert(image
!= NULL
);
1094 /* The aspect must be exactly one of the image aspects. */
1095 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1097 /* Determine the optimal buffer. */
1099 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1101 /* If there is no auxiliary surface allocated, we must use the one and only
1104 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1105 return ISL_AUX_USAGE_NONE
;
1107 /* All images that use an auxiliary surface are required to be tiled. */
1108 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
1110 /* Stencil has no aux */
1111 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1115 /* Invalid Layouts */
1116 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1117 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1118 unreachable("Invalid image layout.");
1120 /* Undefined layouts
1122 * The pre-initialized layout is equivalent to the undefined layout for
1123 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1126 case VK_IMAGE_LAYOUT_UNDEFINED
:
1127 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1128 return ISL_AUX_USAGE_NONE
;
1133 case VK_IMAGE_LAYOUT_GENERAL
:
1134 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1135 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1136 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1137 /* This buffer could be a depth buffer used in a transfer operation.
1138 * BLORP currently doesn't use HiZ for transfer operations so we must
1139 * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
1141 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_HIZ
);
1142 return ISL_AUX_USAGE_NONE
;
1144 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1145 return image
->planes
[plane
].aux_usage
;
1149 /* Sampling Layouts */
1150 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1151 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1152 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1154 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1155 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1156 if (anv_can_sample_with_hiz(devinfo
, image
))
1157 return ISL_AUX_USAGE_HIZ
;
1159 return ISL_AUX_USAGE_NONE
;
1161 return image
->planes
[plane
].aux_usage
;
1165 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1166 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1168 /* When handing the image off to the presentation engine, we need to
1169 * ensure that things are properly resolved. For images with no
1170 * modifier, we assume that they follow the old rules and always need
1171 * a full resolve because the PE doesn't understand any form of
1172 * compression. For images with modifiers, we use the aux usage from
1175 const struct isl_drm_modifier_info
*mod_info
=
1176 isl_drm_modifier_get_info(image
->drm_format_mod
);
1177 return mod_info
? mod_info
->aux_usage
: ISL_AUX_USAGE_NONE
;
1181 /* Rendering Layouts */
1182 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1183 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1184 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
) {
1185 assert(image
->samples
== 1);
1186 return ISL_AUX_USAGE_CCS_D
;
1188 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_CCS_D
);
1189 return image
->planes
[plane
].aux_usage
;
1192 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1193 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1194 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
1195 return ISL_AUX_USAGE_HIZ
;
1197 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1198 unreachable("VK_KHR_shared_presentable_image is unsupported");
1200 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1201 unreachable("VK_EXT_fragment_density_map is unsupported");
1203 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1204 unreachable("VK_NV_shading_rate_image is unsupported");
1207 /* If the layout isn't recognized in the exhaustive switch above, the
1208 * VkImageLayout value is not defined in vulkan.h.
1210 unreachable("layout is not a VkImageLayout enumeration member.");
1214 * This function returns the level of unresolved fast-clear support of the
1215 * given image in the given VkImageLayout.
1217 * @param devinfo The device information of the Intel GPU.
1218 * @param image The image that may contain a collection of buffers.
1219 * @param aspect The aspect of the image to be accessed.
1220 * @param layout The current layout of the image aspect(s).
1222 enum anv_fast_clear_type
1223 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
1224 const struct anv_image
* const image
,
1225 const VkImageAspectFlagBits aspect
,
1226 const VkImageLayout layout
)
1228 if (INTEL_DEBUG
& DEBUG_NO_FAST_CLEAR
)
1229 return ANV_FAST_CLEAR_NONE
;
1231 /* The aspect must be exactly one of the image aspects. */
1232 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1234 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1236 /* If there is no auxiliary surface allocated, there are no fast-clears */
1237 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1238 return ANV_FAST_CLEAR_NONE
;
1240 /* All images that use an auxiliary surface are required to be tiled. */
1241 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
1243 /* Stencil has no aux */
1244 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1246 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1247 /* For depth images (with HiZ), the layout supports fast-clears if and
1248 * only if it supports HiZ. However, we only support fast-clears to the
1249 * default depth value.
1251 enum isl_aux_usage aux_usage
=
1252 anv_layout_to_aux_usage(devinfo
, image
, aspect
, layout
);
1253 return aux_usage
== ISL_AUX_USAGE_HIZ
?
1254 ANV_FAST_CLEAR_DEFAULT_VALUE
: ANV_FAST_CLEAR_NONE
;
1257 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1259 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1260 * lack the MI ALU which we need to determine the predicates.
1262 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
&& image
->samples
> 1)
1263 return ANV_FAST_CLEAR_NONE
;
1266 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1267 return ANV_FAST_CLEAR_ANY
;
1269 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1270 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1272 /* We do not yet support any modifiers which support clear color so we
1273 * just always return NONE. One day, this will change.
1275 const struct isl_drm_modifier_info
*mod_info
=
1276 isl_drm_modifier_get_info(image
->drm_format_mod
);
1277 assert(!mod_info
|| !mod_info
->supports_clear_color
);
1279 return ANV_FAST_CLEAR_NONE
;
1283 /* If the image has MCS or CCS_E enabled all the time then we can use
1284 * fast-clear as long as the clear color is the default value of zero
1285 * since this is the default value we program into every surface state
1286 * used for texturing.
1288 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_MCS
||
1289 image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
)
1290 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1292 return ANV_FAST_CLEAR_NONE
;
1297 static struct anv_state
1298 alloc_surface_state(struct anv_device
*device
)
1300 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1303 static enum isl_channel_select
1304 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
1305 struct isl_swizzle format_swizzle
)
1307 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
1308 swizzle
= component
;
1311 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
1312 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
1313 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
1314 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
1315 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
1316 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
1318 unreachable("Invalid swizzle");
1323 anv_image_fill_surface_state(struct anv_device
*device
,
1324 const struct anv_image
*image
,
1325 VkImageAspectFlagBits aspect
,
1326 const struct isl_view
*view_in
,
1327 isl_surf_usage_flags_t view_usage
,
1328 enum isl_aux_usage aux_usage
,
1329 const union isl_color_value
*clear_color
,
1330 enum anv_image_view_state_flags flags
,
1331 struct anv_surface_state
*state_inout
,
1332 struct brw_image_param
*image_param_out
)
1334 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1336 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
1337 *aux_surface
= &image
->planes
[plane
].aux_surface
;
1339 struct isl_view view
= *view_in
;
1340 view
.usage
|= view_usage
;
1342 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1343 * compressed surface with a shadow surface, we use the shadow instead of
1344 * the primary surface. The shadow surface will be tiled, unlike the main
1345 * surface, so it should get significantly better performance.
1347 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1348 isl_format_is_compressed(view
.format
) &&
1349 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
1350 assert(isl_format_is_compressed(surface
->isl
.format
));
1351 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1352 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1353 surface
= &image
->planes
[plane
].shadow_surface
;
1356 /* For texturing from stencil on gen7, we have to sample from a shadow
1357 * surface because we don't support W-tiling in the sampler.
1359 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1360 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1361 assert(device
->info
.gen
== 7);
1362 assert(view_usage
& ISL_SURF_USAGE_TEXTURE_BIT
);
1363 surface
= &image
->planes
[plane
].shadow_surface
;
1366 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
1367 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
1369 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1370 if (device
->info
.gen
== 7 && !device
->info
.is_haswell
)
1371 view
.swizzle
= ISL_SWIZZLE_IDENTITY
;
1373 /* If this is a HiZ buffer we can sample from with a programmable clear
1374 * value (SKL+), define the clear value to the optimal constant.
1376 union isl_color_value default_clear_color
= { .u32
= { 0, } };
1377 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
1378 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
1380 clear_color
= &default_clear_color
;
1382 const struct anv_address address
=
1383 anv_address_add(image
->planes
[plane
].address
, surface
->offset
);
1385 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1386 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
1387 !isl_has_matching_typed_storage_image_format(&device
->info
,
1389 /* In this case, we are a writeable storage buffer which needs to be
1390 * lowered to linear. All tiling and offset calculations will be done in
1393 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1394 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1395 .address
= anv_address_physical(address
),
1396 .size_B
= surface
->isl
.size_B
,
1397 .format
= ISL_FORMAT_RAW
,
1398 .swizzle
= ISL_SWIZZLE_IDENTITY
,
1400 .mocs
= anv_mocs_for_bo(device
, address
.bo
));
1401 state_inout
->address
= address
,
1402 state_inout
->aux_address
= ANV_NULL_ADDRESS
;
1403 state_inout
->clear_address
= ANV_NULL_ADDRESS
;
1405 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1406 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
1407 /* Typed surface reads support a very limited subset of the shader
1408 * image formats. Translate it into the closest format the hardware
1411 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1412 view
.format
= isl_lower_storage_image_format(&device
->info
,
1416 const struct isl_surf
*isl_surf
= &surface
->isl
;
1418 struct isl_surf tmp_surf
;
1419 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
1420 if (isl_format_is_compressed(surface
->isl
.format
) &&
1421 !isl_format_is_compressed(view
.format
)) {
1422 /* We're creating an uncompressed view of a compressed surface. This
1423 * is allowed but only for a single level/layer.
1425 assert(surface
->isl
.samples
== 1);
1426 assert(view
.levels
== 1);
1427 assert(view
.array_len
== 1);
1429 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
1431 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1432 0 : view
.base_array_layer
,
1433 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1434 view
.base_array_layer
: 0,
1436 &offset_B
, &tile_x_sa
, &tile_y_sa
);
1438 /* The newly created image represents the one subimage we're
1439 * referencing with this view so it only has one array slice and
1442 view
.base_array_layer
= 0;
1443 view
.base_level
= 0;
1445 /* We're making an uncompressed view here. The image dimensions need
1446 * to be scaled down by the block size.
1448 const struct isl_format_layout
*fmtl
=
1449 isl_format_get_layout(surface
->isl
.format
);
1450 tmp_surf
.logical_level0_px
=
1451 isl_surf_get_logical_level0_el(&tmp_surf
);
1452 tmp_surf
.phys_level0_sa
= isl_surf_get_phys_level0_el(&tmp_surf
);
1453 tmp_surf
.format
= view
.format
;
1454 tile_x_sa
/= fmtl
->bw
;
1455 tile_y_sa
/= fmtl
->bh
;
1457 isl_surf
= &tmp_surf
;
1459 if (device
->info
.gen
<= 8) {
1460 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1461 assert(tile_x_sa
== 0);
1462 assert(tile_y_sa
== 0);
1466 state_inout
->address
= anv_address_add(address
, offset_B
);
1468 struct anv_address aux_address
= ANV_NULL_ADDRESS
;
1469 if (aux_usage
!= ISL_AUX_USAGE_NONE
) {
1470 aux_address
= anv_address_add(image
->planes
[plane
].address
,
1471 aux_surface
->offset
);
1473 state_inout
->aux_address
= aux_address
;
1475 struct anv_address clear_address
= ANV_NULL_ADDRESS
;
1476 if (device
->info
.gen
>= 10 && aux_usage
!= ISL_AUX_USAGE_NONE
) {
1477 if (aux_usage
== ISL_AUX_USAGE_HIZ
) {
1478 clear_address
= (struct anv_address
) {
1479 .bo
= &device
->hiz_clear_bo
,
1483 clear_address
= anv_image_get_clear_color_addr(device
, image
, aspect
);
1486 state_inout
->clear_address
= clear_address
;
1488 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1491 .address
= anv_address_physical(state_inout
->address
),
1492 .clear_color
= *clear_color
,
1493 .aux_surf
= &aux_surface
->isl
,
1494 .aux_usage
= aux_usage
,
1495 .aux_address
= anv_address_physical(aux_address
),
1496 .clear_address
= anv_address_physical(clear_address
),
1497 .use_clear_address
= !anv_address_is_null(clear_address
),
1498 .mocs
= anv_mocs_for_bo(device
,
1499 state_inout
->address
.bo
),
1500 .x_offset_sa
= tile_x_sa
,
1501 .y_offset_sa
= tile_y_sa
);
1503 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1504 * are used to store other information. This should be ok, however,
1505 * because the surface buffer addresses are always 4K page aligned.
1507 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1508 device
->isl_dev
.ss
.aux_addr_offset
;
1509 assert((aux_address
.offset
& 0xfff) == 0);
1510 state_inout
->aux_address
.offset
|= *aux_addr_dw
& 0xfff;
1512 if (device
->info
.gen
>= 10 && clear_address
.bo
) {
1513 uint32_t *clear_addr_dw
= state_inout
->state
.map
+
1514 device
->isl_dev
.ss
.clear_color_state_offset
;
1515 assert((clear_address
.offset
& 0x3f) == 0);
1516 state_inout
->clear_address
.offset
|= *clear_addr_dw
& 0x3f;
1520 if (image_param_out
) {
1521 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1522 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1523 &surface
->isl
, &view
);
1527 static VkImageAspectFlags
1528 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1530 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1531 if (util_bitcount(view_aspects
) == 1)
1532 return VK_IMAGE_ASPECT_COLOR_BIT
;
1534 VkImageAspectFlags color_aspects
= 0;
1535 for (uint32_t i
= 0; i
< util_bitcount(view_aspects
); i
++)
1536 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT
<< i
;
1537 return color_aspects
;
1539 /* No special remapping needed for depth & stencil aspects. */
1540 return view_aspects
;
1544 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
1546 uint32_t planes
= 0;
1548 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
1549 VK_IMAGE_ASPECT_DEPTH_BIT
|
1550 VK_IMAGE_ASPECT_STENCIL_BIT
|
1551 VK_IMAGE_ASPECT_PLANE_0_BIT
))
1553 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
1555 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
1558 if ((aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
) != 0 &&
1559 (aspect_mask
& VK_IMAGE_ASPECT_STENCIL_BIT
) != 0)
1566 anv_CreateImageView(VkDevice _device
,
1567 const VkImageViewCreateInfo
*pCreateInfo
,
1568 const VkAllocationCallbacks
*pAllocator
,
1571 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1572 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1573 struct anv_image_view
*iview
;
1575 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1576 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1578 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1580 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1582 assert(range
->layerCount
> 0);
1583 assert(range
->baseMipLevel
< image
->levels
);
1585 /* Check if a conversion info was passed. */
1586 const struct anv_format
*conv_format
= NULL
;
1587 const struct VkSamplerYcbcrConversionInfo
*conv_info
=
1588 vk_find_struct_const(pCreateInfo
->pNext
, SAMPLER_YCBCR_CONVERSION_INFO
);
1590 /* If image has an external format, the pNext chain must contain an instance of
1591 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1592 * external format as image."
1594 assert(!image
->external_format
|| conv_info
);
1597 ANV_FROM_HANDLE(anv_ycbcr_conversion
, conversion
, conv_info
->conversion
);
1598 conv_format
= conversion
->format
;
1601 VkImageUsageFlags image_usage
= 0;
1602 if (range
->aspectMask
& ~VK_IMAGE_ASPECT_STENCIL_BIT
)
1603 image_usage
|= image
->usage
;
1604 if (range
->aspectMask
& VK_IMAGE_ASPECT_STENCIL_BIT
)
1605 image_usage
|= image
->stencil_usage
;
1607 const VkImageViewUsageCreateInfo
*usage_info
=
1608 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO
);
1609 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image_usage
;
1611 /* View usage should be a subset of image usage */
1612 assert((view_usage
& ~image_usage
) == 0);
1613 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1614 VK_IMAGE_USAGE_STORAGE_BIT
|
1615 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1616 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1617 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1619 switch (image
->type
) {
1621 unreachable("bad VkImageType");
1622 case VK_IMAGE_TYPE_1D
:
1623 case VK_IMAGE_TYPE_2D
:
1624 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1626 case VK_IMAGE_TYPE_3D
:
1627 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1628 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1632 /* First expand aspects to the image's ones (for example
1633 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1634 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1635 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1636 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1638 VkImageAspectFlags expanded_aspects
=
1639 anv_image_expand_aspects(image
, range
->aspectMask
);
1641 iview
->image
= image
;
1643 /* Remap the expanded aspects for the image view. For example if only
1644 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1645 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1646 * the image view, it only has a single plane.
1648 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1649 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1650 iview
->vk_format
= pCreateInfo
->format
;
1652 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1653 assert(!image
->external_format
|| pCreateInfo
->format
== VK_FORMAT_UNDEFINED
);
1655 /* Format is undefined, this can happen when using external formats. Set
1656 * view format from the passed conversion info.
1658 if (iview
->vk_format
== VK_FORMAT_UNDEFINED
&& conv_format
)
1659 iview
->vk_format
= conv_format
->vk_format
;
1661 iview
->extent
= (VkExtent3D
) {
1662 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1663 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1664 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1667 /* Now go through the underlying image selected planes (computed in
1668 * expanded_aspects) and map them to planes in the image view.
1670 uint32_t iaspect_bit
, vplane
= 0;
1671 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1673 anv_image_aspect_to_plane(image
->aspects
, 1UL << iaspect_bit
);
1674 VkImageAspectFlags vplane_aspect
=
1675 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1676 struct anv_format_plane format
=
1677 anv_get_format_plane(&device
->info
, iview
->vk_format
,
1678 vplane_aspect
, image
->tiling
);
1680 iview
->planes
[vplane
].image_plane
= iplane
;
1682 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1683 .format
= format
.isl_format
,
1684 .base_level
= range
->baseMipLevel
,
1685 .levels
= anv_get_levelCount(image
, range
),
1686 .base_array_layer
= range
->baseArrayLayer
,
1687 .array_len
= anv_get_layerCount(image
, range
),
1689 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1690 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1691 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1692 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1693 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1694 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1695 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1696 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
1700 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
1701 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
1702 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
1705 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
1706 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
1707 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
1709 iview
->planes
[vplane
].isl
.usage
= 0;
1712 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
1713 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
1714 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
1715 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
1716 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
1718 enum isl_aux_usage general_aux_usage
=
1719 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1720 VK_IMAGE_LAYOUT_GENERAL
);
1721 enum isl_aux_usage optimal_aux_usage
=
1722 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1723 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
1725 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1726 &iview
->planes
[vplane
].isl
,
1727 ISL_SURF_USAGE_TEXTURE_BIT
,
1728 optimal_aux_usage
, NULL
,
1729 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
1730 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
1733 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1734 &iview
->planes
[vplane
].isl
,
1735 ISL_SURF_USAGE_TEXTURE_BIT
,
1736 general_aux_usage
, NULL
,
1738 &iview
->planes
[vplane
].general_sampler_surface_state
,
1742 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1743 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
1744 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
1745 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
1747 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1748 &iview
->planes
[vplane
].isl
,
1749 ISL_SURF_USAGE_STORAGE_BIT
,
1750 ISL_AUX_USAGE_NONE
, NULL
,
1752 &iview
->planes
[vplane
].storage_surface_state
,
1753 &iview
->planes
[vplane
].storage_image_param
);
1755 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1756 &iview
->planes
[vplane
].isl
,
1757 ISL_SURF_USAGE_STORAGE_BIT
,
1758 ISL_AUX_USAGE_NONE
, NULL
,
1759 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
1760 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
1767 *pView
= anv_image_view_to_handle(iview
);
1773 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
1774 const VkAllocationCallbacks
*pAllocator
)
1776 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1777 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
1782 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
1783 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
1784 anv_state_pool_free(&device
->surface_state_pool
,
1785 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
1788 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
1789 anv_state_pool_free(&device
->surface_state_pool
,
1790 iview
->planes
[plane
].general_sampler_surface_state
.state
);
1793 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
1794 anv_state_pool_free(&device
->surface_state_pool
,
1795 iview
->planes
[plane
].storage_surface_state
.state
);
1798 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
1799 anv_state_pool_free(&device
->surface_state_pool
,
1800 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
1804 vk_free2(&device
->alloc
, pAllocator
, iview
);
1809 anv_CreateBufferView(VkDevice _device
,
1810 const VkBufferViewCreateInfo
*pCreateInfo
,
1811 const VkAllocationCallbacks
*pAllocator
,
1812 VkBufferView
*pView
)
1814 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1815 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
1816 struct anv_buffer_view
*view
;
1818 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
1819 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1821 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1823 /* TODO: Handle the format swizzle? */
1825 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
1826 VK_IMAGE_ASPECT_COLOR_BIT
,
1827 VK_IMAGE_TILING_LINEAR
);
1828 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
1829 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
1830 pCreateInfo
->range
);
1831 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
1833 view
->address
= anv_address_add(buffer
->address
, pCreateInfo
->offset
);
1835 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
1836 view
->surface_state
= alloc_surface_state(device
);
1838 anv_fill_buffer_surface_state(device
, view
->surface_state
,
1840 view
->address
, view
->range
, format_bs
);
1842 view
->surface_state
= (struct anv_state
){ 0 };
1845 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
1846 view
->storage_surface_state
= alloc_surface_state(device
);
1847 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
1849 enum isl_format storage_format
=
1850 isl_has_matching_typed_storage_image_format(&device
->info
,
1852 isl_lower_storage_image_format(&device
->info
, view
->format
) :
1855 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
1857 view
->address
, view
->range
,
1858 (storage_format
== ISL_FORMAT_RAW
? 1 :
1859 isl_format_get_layout(storage_format
)->bpb
/ 8));
1861 /* Write-only accesses should use the original format. */
1862 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
1864 view
->address
, view
->range
,
1865 isl_format_get_layout(view
->format
)->bpb
/ 8);
1867 isl_buffer_fill_image_param(&device
->isl_dev
,
1868 &view
->storage_image_param
,
1869 view
->format
, view
->range
);
1871 view
->storage_surface_state
= (struct anv_state
){ 0 };
1872 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
1875 *pView
= anv_buffer_view_to_handle(view
);
1881 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
1882 const VkAllocationCallbacks
*pAllocator
)
1884 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1885 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
1890 if (view
->surface_state
.alloc_size
> 0)
1891 anv_state_pool_free(&device
->surface_state_pool
,
1892 view
->surface_state
);
1894 if (view
->storage_surface_state
.alloc_size
> 0)
1895 anv_state_pool_free(&device
->surface_state_pool
,
1896 view
->storage_surface_state
);
1898 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
1899 anv_state_pool_free(&device
->surface_state_pool
,
1900 view
->writeonly_storage_surface_state
);
1902 vk_free2(&device
->alloc
, pAllocator
, view
);
1905 const struct anv_surface
*
1906 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
1907 VkImageAspectFlags aspect_mask
)
1909 VkImageAspectFlags sanitized_mask
;
1911 switch (aspect_mask
) {
1912 case VK_IMAGE_ASPECT_COLOR_BIT
:
1913 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1914 sanitized_mask
= VK_IMAGE_ASPECT_COLOR_BIT
;
1916 case VK_IMAGE_ASPECT_DEPTH_BIT
:
1917 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1918 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1920 case VK_IMAGE_ASPECT_STENCIL_BIT
:
1921 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1922 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1924 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
1925 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
1926 * combined depth stencil formats. Specifically, it states:
1928 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
1929 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
1931 * Image views with both depth and stencil aspects are only valid for
1932 * render target attachments, in which case
1933 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
1934 * stencil surfaces from the underlying surface.
1936 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
1937 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1939 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
1940 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1943 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
1944 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1945 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_0_BIT
;
1947 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
1948 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1949 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_1_BIT
;
1951 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
1952 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1953 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_2_BIT
;
1956 unreachable("image does not have aspect");
1960 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, sanitized_mask
);
1961 return &image
->planes
[plane
].surface
;