2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
31 #include "util/debug.h"
33 #include "vk_format_info.h"
36 * Exactly one bit must be set in \a aspect.
38 static isl_surf_usage_flags_t
39 choose_isl_surf_usage(VkImageUsageFlags vk_usage
,
40 VkImageAspectFlags aspect
)
42 isl_surf_usage_flags_t isl_usage
= 0;
44 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
45 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
47 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
53 if (vk_usage
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
56 /* Even if we're only using it for transfer operations, clears to depth and
57 * stencil images happen as depth and stencil so they need the right ISL
58 * usage bits or else things will fall apart.
61 case VK_IMAGE_ASPECT_DEPTH_BIT
:
62 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
64 case VK_IMAGE_ASPECT_STENCIL_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
67 case VK_IMAGE_ASPECT_COLOR_BIT
:
70 unreachable("bad VkImageAspect");
73 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
74 /* blorp implements transfers by sampling from the source image. */
75 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
78 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
79 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
80 /* blorp implements transfers by rendering into the destination image.
81 * Only request this with color images, as we deal with depth/stencil
82 * formats differently. */
83 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
90 * Exactly one bit must be set in \a aspect.
92 static struct anv_surface
*
93 get_surface(struct anv_image
*image
, VkImageAspectFlags aspect
)
97 unreachable("bad VkImageAspect");
98 case VK_IMAGE_ASPECT_COLOR_BIT
:
99 return &image
->color_surface
;
100 case VK_IMAGE_ASPECT_DEPTH_BIT
:
101 return &image
->depth_surface
;
102 case VK_IMAGE_ASPECT_STENCIL_BIT
:
103 return &image
->stencil_surface
;
108 add_surface(struct anv_image
*image
, struct anv_surface
*surf
)
110 assert(surf
->isl
.size
> 0); /* isl surface must be initialized */
112 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment
);
113 image
->size
= surf
->offset
+ surf
->isl
.size
;
114 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment
);
118 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
119 * image's memory requirements (that is, the image's size and alignment).
121 * Exactly one bit must be set in \a aspect.
124 make_surface(const struct anv_device
*dev
,
125 struct anv_image
*image
,
126 const struct anv_image_create_info
*anv_info
,
127 VkImageAspectFlags aspect
)
129 const VkImageCreateInfo
*vk_info
= anv_info
->vk_info
;
132 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
133 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
134 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
135 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
138 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
139 * result with an optionally provided ISL tiling argument.
141 isl_tiling_flags_t tiling_flags
=
142 (vk_info
->tiling
== VK_IMAGE_TILING_LINEAR
) ?
143 ISL_TILING_LINEAR_BIT
: ISL_TILING_ANY_MASK
;
145 if (anv_info
->isl_tiling_flags
)
146 tiling_flags
&= anv_info
->isl_tiling_flags
;
148 assert(tiling_flags
);
150 struct anv_surface
*anv_surf
= get_surface(image
, aspect
);
152 image
->extent
= anv_sanitize_image_extent(vk_info
->imageType
,
155 enum isl_format format
= anv_get_isl_format(&dev
->info
, vk_info
->format
,
156 aspect
, vk_info
->tiling
);
157 assert(format
!= ISL_FORMAT_UNSUPPORTED
);
159 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
160 .dim
= vk_to_isl_surf_dim
[vk_info
->imageType
],
162 .width
= image
->extent
.width
,
163 .height
= image
->extent
.height
,
164 .depth
= image
->extent
.depth
,
165 .levels
= vk_info
->mipLevels
,
166 .array_len
= vk_info
->arrayLayers
,
167 .samples
= vk_info
->samples
,
169 .min_pitch
= anv_info
->stride
,
170 .usage
= choose_isl_surf_usage(image
->usage
, aspect
),
171 .tiling_flags
= tiling_flags
);
173 /* isl_surf_init() will fail only if provided invalid input. Invalid input
174 * is illegal in Vulkan.
178 add_surface(image
, anv_surf
);
180 /* Add a HiZ surface to a depth buffer that will be used for rendering.
182 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
183 /* Allow the user to control HiZ enabling. Disable by default on gen7
184 * because resolves are not currently implemented pre-BDW.
186 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
187 /* It will never be used as an attachment, HiZ is pointless. */
188 } else if (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
) {
189 /* From the 1.0.37 spec:
191 * "An attachment used as an input attachment and depth/stencil
192 * attachment must be in either VK_IMAGE_LAYOUT_GENERAL or
193 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL."
195 * It will never have a layout of
196 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, so HiZ is
197 * currently pointless. If transfer operations learn to use the HiZ
198 * buffer, we can enable HiZ for VK_IMAGE_LAYOUT_GENERAL and support
201 anv_finishme("Implement HiZ for input attachments");
202 } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev
->info
.gen
>= 8)) {
203 anv_finishme("Implement gen7 HiZ");
204 } else if (vk_info
->mipLevels
> 1) {
205 anv_finishme("Test multi-LOD HiZ");
206 } else if (vk_info
->arrayLayers
> 1) {
207 anv_finishme("Implement multi-arrayLayer HiZ clears and resolves");
208 } else if (dev
->info
.gen
== 8 && vk_info
->samples
> 1) {
209 anv_finishme("Test gen8 multisampled HiZ");
211 assert(image
->aux_surface
.isl
.size
== 0);
212 isl_surf_get_hiz_surf(&dev
->isl_dev
, &image
->depth_surface
.isl
,
213 &image
->aux_surface
.isl
);
214 add_surface(image
, &image
->aux_surface
);
215 image
->aux_usage
= ISL_AUX_USAGE_HIZ
;
217 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
== 1) {
218 if (!unlikely(INTEL_DEBUG
& DEBUG_NO_RBC
)) {
219 assert(image
->aux_surface
.isl
.size
== 0);
220 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
221 &image
->aux_surface
.isl
);
223 add_surface(image
, &image
->aux_surface
);
225 /* For images created without MUTABLE_FORMAT_BIT set, we know that
226 * they will always be used with the original format. In
227 * particular, they will always be used with a format that
228 * supports color compression. If it's never used as a storage
229 * image, then it will only be used through the sampler or the as
230 * a render target. This means that it's safe to just leave
231 * compression on at all times for these formats.
233 if (!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
234 !(vk_info
->flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
) &&
235 isl_format_supports_ccs_e(&dev
->info
, format
)) {
236 image
->aux_usage
= ISL_AUX_USAGE_CCS_E
;
246 anv_image_create(VkDevice _device
,
247 const struct anv_image_create_info
*create_info
,
248 const VkAllocationCallbacks
* alloc
,
251 ANV_FROM_HANDLE(anv_device
, device
, _device
);
252 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
253 struct anv_image
*image
= NULL
;
256 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
258 anv_assert(pCreateInfo
->mipLevels
> 0);
259 anv_assert(pCreateInfo
->arrayLayers
> 0);
260 anv_assert(pCreateInfo
->samples
> 0);
261 anv_assert(pCreateInfo
->extent
.width
> 0);
262 anv_assert(pCreateInfo
->extent
.height
> 0);
263 anv_assert(pCreateInfo
->extent
.depth
> 0);
265 image
= vk_alloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
266 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
268 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
270 memset(image
, 0, sizeof(*image
));
271 image
->type
= pCreateInfo
->imageType
;
272 image
->extent
= pCreateInfo
->extent
;
273 image
->vk_format
= pCreateInfo
->format
;
274 image
->aspects
= vk_format_aspects(image
->vk_format
);
275 image
->levels
= pCreateInfo
->mipLevels
;
276 image
->array_size
= pCreateInfo
->arrayLayers
;
277 image
->samples
= pCreateInfo
->samples
;
278 image
->usage
= pCreateInfo
->usage
;
279 image
->tiling
= pCreateInfo
->tiling
;
280 image
->aux_usage
= ISL_AUX_USAGE_NONE
;
283 for_each_bit(b
, image
->aspects
) {
284 r
= make_surface(device
, image
, create_info
, (1 << b
));
289 *pImage
= anv_image_to_handle(image
);
295 vk_free2(&device
->alloc
, alloc
, image
);
301 anv_CreateImage(VkDevice device
,
302 const VkImageCreateInfo
*pCreateInfo
,
303 const VkAllocationCallbacks
*pAllocator
,
306 return anv_image_create(device
,
307 &(struct anv_image_create_info
) {
308 .vk_info
= pCreateInfo
,
315 anv_DestroyImage(VkDevice _device
, VkImage _image
,
316 const VkAllocationCallbacks
*pAllocator
)
318 ANV_FROM_HANDLE(anv_device
, device
, _device
);
319 ANV_FROM_HANDLE(anv_image
, image
, _image
);
324 vk_free2(&device
->alloc
, pAllocator
, image
);
327 VkResult
anv_BindImageMemory(
330 VkDeviceMemory _memory
,
331 VkDeviceSize memoryOffset
)
333 ANV_FROM_HANDLE(anv_device
, device
, _device
);
334 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
335 ANV_FROM_HANDLE(anv_image
, image
, _image
);
338 image
->bo
= &mem
->bo
;
339 image
->offset
= memoryOffset
;
345 if (image
->aux_surface
.isl
.size
> 0) {
347 /* The offset and size must be a multiple of 4K or else the
348 * anv_gem_mmap call below will return NULL.
350 assert((image
->offset
+ image
->aux_surface
.offset
) % 4096 == 0);
351 assert(image
->aux_surface
.isl
.size
% 4096 == 0);
353 /* Auxiliary surfaces need to have their memory cleared to 0 before they
354 * can be used. For CCS surfaces, this puts them in the "resolved"
355 * state so they can be used with CCS enabled before we ever touch it
356 * from the GPU. For HiZ, we need something valid or else we may get
357 * GPU hangs on some hardware and 0 works fine.
359 void *map
= anv_gem_mmap(device
, image
->bo
->gem_handle
,
360 image
->offset
+ image
->aux_surface
.offset
,
361 image
->aux_surface
.isl
.size
,
362 device
->info
.has_llc
? 0 : I915_MMAP_WC
);
364 /* If anv_gem_mmap returns NULL, it's likely that the kernel was
365 * not able to find space on the host to create a proper mapping.
368 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
370 memset(map
, 0, image
->aux_surface
.isl
.size
);
372 anv_gem_munmap(map
, image
->aux_surface
.isl
.size
);
379 anv_surface_get_subresource_layout(struct anv_image
*image
,
380 struct anv_surface
*surface
,
381 const VkImageSubresource
*subresource
,
382 VkSubresourceLayout
*layout
)
384 /* If we are on a non-zero mip level or array slice, we need to
385 * calculate a real offset.
387 anv_assert(subresource
->mipLevel
== 0);
388 anv_assert(subresource
->arrayLayer
== 0);
390 layout
->offset
= surface
->offset
;
391 layout
->rowPitch
= surface
->isl
.row_pitch
;
392 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
393 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
394 layout
->size
= surface
->isl
.size
;
397 void anv_GetImageSubresourceLayout(
400 const VkImageSubresource
* pSubresource
,
401 VkSubresourceLayout
* pLayout
)
403 ANV_FROM_HANDLE(anv_image
, image
, _image
);
405 assert(__builtin_popcount(pSubresource
->aspectMask
) == 1);
407 switch (pSubresource
->aspectMask
) {
408 case VK_IMAGE_ASPECT_COLOR_BIT
:
409 anv_surface_get_subresource_layout(image
, &image
->color_surface
,
410 pSubresource
, pLayout
);
412 case VK_IMAGE_ASPECT_DEPTH_BIT
:
413 anv_surface_get_subresource_layout(image
, &image
->depth_surface
,
414 pSubresource
, pLayout
);
416 case VK_IMAGE_ASPECT_STENCIL_BIT
:
417 anv_surface_get_subresource_layout(image
, &image
->stencil_surface
,
418 pSubresource
, pLayout
);
421 assert(!"Invalid image aspect");
425 static struct anv_state
426 alloc_surface_state(struct anv_device
*device
)
428 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
431 static enum isl_channel_select
432 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
433 struct isl_swizzle format_swizzle
)
435 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
439 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
440 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
441 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
442 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
443 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
444 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
446 unreachable("Invalid swizzle");
452 anv_CreateImageView(VkDevice _device
,
453 const VkImageViewCreateInfo
*pCreateInfo
,
454 const VkAllocationCallbacks
*pAllocator
,
457 ANV_FROM_HANDLE(anv_device
, device
, _device
);
458 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
459 struct anv_image_view
*iview
;
461 iview
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
462 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
464 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
466 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
468 assert(range
->layerCount
> 0);
469 assert(range
->baseMipLevel
< image
->levels
);
470 assert(image
->usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
471 VK_IMAGE_USAGE_STORAGE_BIT
|
472 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
473 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
475 switch (image
->type
) {
477 unreachable("bad VkImageType");
478 case VK_IMAGE_TYPE_1D
:
479 case VK_IMAGE_TYPE_2D
:
480 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
482 case VK_IMAGE_TYPE_3D
:
483 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
484 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
488 const struct anv_surface
*surface
=
489 anv_image_get_surface_for_aspect_mask(image
, range
->aspectMask
);
491 iview
->image
= image
;
492 iview
->bo
= image
->bo
;
493 iview
->offset
= image
->offset
+ surface
->offset
;
495 iview
->aspect_mask
= pCreateInfo
->subresourceRange
.aspectMask
;
496 iview
->vk_format
= pCreateInfo
->format
;
498 struct anv_format format
= anv_get_format(&device
->info
, pCreateInfo
->format
,
499 range
->aspectMask
, image
->tiling
);
501 iview
->isl
= (struct isl_view
) {
502 .format
= format
.isl_format
,
503 .base_level
= range
->baseMipLevel
,
504 .levels
= anv_get_levelCount(image
, range
),
505 .base_array_layer
= range
->baseArrayLayer
,
506 .array_len
= anv_get_layerCount(image
, range
),
508 .r
= remap_swizzle(pCreateInfo
->components
.r
,
509 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
510 .g
= remap_swizzle(pCreateInfo
->components
.g
,
511 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
512 .b
= remap_swizzle(pCreateInfo
->components
.b
,
513 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
514 .a
= remap_swizzle(pCreateInfo
->components
.a
,
515 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
519 iview
->extent
= (VkExtent3D
) {
520 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
521 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
522 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
525 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
526 iview
->isl
.base_array_layer
= 0;
527 iview
->isl
.array_len
= iview
->extent
.depth
;
530 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
531 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
532 iview
->isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
534 iview
->isl
.usage
= 0;
537 /* If the HiZ buffer can be sampled from, set the constant clear color.
538 * If it cannot, disable the isl aux usage flag.
540 float red_clear_color
= 0.0f
;
541 enum isl_aux_usage surf_usage
= image
->aux_usage
;
542 if (image
->aux_usage
== ISL_AUX_USAGE_HIZ
) {
543 if (iview
->aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
&&
544 anv_can_sample_with_hiz(device
->info
.gen
, image
->samples
)) {
545 /* When a HiZ buffer is sampled on gen9+, ensure that
546 * the constant fast clear value is set in the surface state.
548 if (device
->info
.gen
>= 9)
549 red_clear_color
= ANV_HZ_FC_VAL
;
551 surf_usage
= ISL_AUX_USAGE_NONE
;
555 /* Input attachment surfaces for color are allocated and filled
556 * out at BeginRenderPass time because they need compression information.
557 * Compression is not yet enabled for depth textures and stencil doesn't
558 * allow compression so we can just use the texture surface state from the
561 if (image
->usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
562 (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
563 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
564 iview
->sampler_surface_state
= alloc_surface_state(device
);
566 struct isl_view view
= iview
->isl
;
567 view
.usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
568 isl_surf_fill_state(&device
->isl_dev
,
569 iview
->sampler_surface_state
.map
,
570 .surf
= &surface
->isl
,
572 .clear_color
.f32
= { red_clear_color
,},
573 .aux_surf
= &image
->aux_surface
.isl
,
574 .aux_usage
= surf_usage
,
575 .mocs
= device
->default_mocs
);
577 if (!device
->info
.has_llc
)
578 anv_state_flush(iview
->sampler_surface_state
);
580 iview
->sampler_surface_state
.alloc_size
= 0;
583 /* NOTE: This one needs to go last since it may stomp isl_view.format */
584 if (image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
585 iview
->storage_surface_state
= alloc_surface_state(device
);
586 iview
->writeonly_storage_surface_state
= alloc_surface_state(device
);
588 struct isl_view view
= iview
->isl
;
589 view
.usage
|= ISL_SURF_USAGE_STORAGE_BIT
;
591 /* Write-only accesses always used a typed write instruction and should
592 * therefore use the real format.
594 isl_surf_fill_state(&device
->isl_dev
,
595 iview
->writeonly_storage_surface_state
.map
,
596 .surf
= &surface
->isl
,
598 .aux_surf
= &image
->aux_surface
.isl
,
599 .aux_usage
= surf_usage
,
600 .mocs
= device
->default_mocs
);
602 if (isl_has_matching_typed_storage_image_format(&device
->info
,
603 format
.isl_format
)) {
604 /* Typed surface reads support a very limited subset of the shader
605 * image formats. Translate it into the closest format the hardware
608 view
.format
= isl_lower_storage_image_format(&device
->info
,
611 isl_surf_fill_state(&device
->isl_dev
,
612 iview
->storage_surface_state
.map
,
613 .surf
= &surface
->isl
,
615 .aux_surf
= &image
->aux_surface
.isl
,
616 .aux_usage
= surf_usage
,
617 .mocs
= device
->default_mocs
);
619 anv_fill_buffer_surface_state(device
, iview
->storage_surface_state
,
622 iview
->bo
->size
- iview
->offset
, 1);
625 isl_surf_fill_image_param(&device
->isl_dev
,
626 &iview
->storage_image_param
,
627 &surface
->isl
, &iview
->isl
);
629 if (!device
->info
.has_llc
) {
630 anv_state_flush(iview
->storage_surface_state
);
631 anv_state_flush(iview
->writeonly_storage_surface_state
);
634 iview
->storage_surface_state
.alloc_size
= 0;
635 iview
->writeonly_storage_surface_state
.alloc_size
= 0;
638 *pView
= anv_image_view_to_handle(iview
);
644 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
645 const VkAllocationCallbacks
*pAllocator
)
647 ANV_FROM_HANDLE(anv_device
, device
, _device
);
648 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
653 if (iview
->sampler_surface_state
.alloc_size
> 0) {
654 anv_state_pool_free(&device
->surface_state_pool
,
655 iview
->sampler_surface_state
);
658 if (iview
->storage_surface_state
.alloc_size
> 0) {
659 anv_state_pool_free(&device
->surface_state_pool
,
660 iview
->storage_surface_state
);
663 if (iview
->writeonly_storage_surface_state
.alloc_size
> 0) {
664 anv_state_pool_free(&device
->surface_state_pool
,
665 iview
->writeonly_storage_surface_state
);
668 vk_free2(&device
->alloc
, pAllocator
, iview
);
673 anv_CreateBufferView(VkDevice _device
,
674 const VkBufferViewCreateInfo
*pCreateInfo
,
675 const VkAllocationCallbacks
*pAllocator
,
678 ANV_FROM_HANDLE(anv_device
, device
, _device
);
679 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
680 struct anv_buffer_view
*view
;
682 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
683 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
685 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
687 /* TODO: Handle the format swizzle? */
689 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
690 VK_IMAGE_ASPECT_COLOR_BIT
,
691 VK_IMAGE_TILING_LINEAR
);
692 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
693 view
->bo
= buffer
->bo
;
694 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
695 view
->range
= pCreateInfo
->range
== VK_WHOLE_SIZE
?
696 buffer
->size
- pCreateInfo
->offset
: pCreateInfo
->range
;
697 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
699 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
700 view
->surface_state
= alloc_surface_state(device
);
702 anv_fill_buffer_surface_state(device
, view
->surface_state
,
704 view
->offset
, view
->range
, format_bs
);
706 view
->surface_state
= (struct anv_state
){ 0 };
709 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
710 view
->storage_surface_state
= alloc_surface_state(device
);
711 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
713 enum isl_format storage_format
=
714 isl_has_matching_typed_storage_image_format(&device
->info
,
716 isl_lower_storage_image_format(&device
->info
, view
->format
) :
719 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
721 view
->offset
, view
->range
,
722 (storage_format
== ISL_FORMAT_RAW
? 1 :
723 isl_format_get_layout(storage_format
)->bpb
/ 8));
725 /* Write-only accesses should use the original format. */
726 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
728 view
->offset
, view
->range
,
729 isl_format_get_layout(view
->format
)->bpb
/ 8);
731 isl_buffer_fill_image_param(&device
->isl_dev
,
732 &view
->storage_image_param
,
733 view
->format
, view
->range
);
735 view
->storage_surface_state
= (struct anv_state
){ 0 };
736 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
739 *pView
= anv_buffer_view_to_handle(view
);
745 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
746 const VkAllocationCallbacks
*pAllocator
)
748 ANV_FROM_HANDLE(anv_device
, device
, _device
);
749 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
754 if (view
->surface_state
.alloc_size
> 0)
755 anv_state_pool_free(&device
->surface_state_pool
,
756 view
->surface_state
);
758 if (view
->storage_surface_state
.alloc_size
> 0)
759 anv_state_pool_free(&device
->surface_state_pool
,
760 view
->storage_surface_state
);
762 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
763 anv_state_pool_free(&device
->surface_state_pool
,
764 view
->writeonly_storage_surface_state
);
766 vk_free2(&device
->alloc
, pAllocator
, view
);
769 const struct anv_surface
*
770 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
771 VkImageAspectFlags aspect_mask
)
773 switch (aspect_mask
) {
774 case VK_IMAGE_ASPECT_COLOR_BIT
:
775 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
776 return &image
->color_surface
;
777 case VK_IMAGE_ASPECT_DEPTH_BIT
:
778 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
779 return &image
->depth_surface
;
780 case VK_IMAGE_ASPECT_STENCIL_BIT
:
781 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
782 return &image
->stencil_surface
;
783 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
784 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
785 * combined depth stencil formats. Specifically, it states:
787 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
788 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
790 * Image views with both depth and stencil aspects are only valid for
791 * render target attachments, in which case
792 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
793 * stencil surfaces from the underlying surface.
795 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
796 return &image
->depth_surface
;
798 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
799 return &image
->stencil_surface
;
802 unreachable("image does not have aspect");