anv: Delete anv_image::ccs_e_compatible
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29 #include <sys/mman.h>
30 #include "drm-uapi/drm_fourcc.h"
31
32 #include "anv_private.h"
33 #include "util/debug.h"
34 #include "vk_util.h"
35 #include "util/u_math.h"
36
37 #include "vk_format_info.h"
38
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
41 VkImageUsageFlags vk_usage,
42 isl_surf_usage_flags_t isl_extra_usage,
43 VkImageAspectFlagBits aspect)
44 {
45 isl_surf_usage_flags_t isl_usage = isl_extra_usage;
46
47 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
48 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
49
50 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
51 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
52
53 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
54 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
55
56 if (vk_create_flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
57 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
58
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
62 */
63 switch (aspect) {
64 case VK_IMAGE_ASPECT_DEPTH_BIT:
65 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
66 break;
67 case VK_IMAGE_ASPECT_STENCIL_BIT:
68 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
69 break;
70 case VK_IMAGE_ASPECT_COLOR_BIT:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT:
74 break;
75 default:
76 unreachable("bad VkImageAspect");
77 }
78
79 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
82 }
83
84 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
85 aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
90 }
91
92 return isl_usage;
93 }
94
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct anv_image_create_info *anv_info,
97 const struct isl_drm_modifier_info *isl_mod_info,
98 bool legacy_scanout)
99 {
100 const VkImageCreateInfo *base_info = anv_info->vk_info;
101 isl_tiling_flags_t flags = 0;
102
103 switch (base_info->tiling) {
104 default:
105 unreachable("bad VkImageTiling");
106 case VK_IMAGE_TILING_OPTIMAL:
107 flags = ISL_TILING_ANY_MASK;
108 break;
109 case VK_IMAGE_TILING_LINEAR:
110 flags = ISL_TILING_LINEAR_BIT;
111 break;
112 case VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT:
113 assert(isl_mod_info);
114 flags = 1 << isl_mod_info->tiling;
115 }
116
117 if (anv_info->isl_tiling_flags)
118 flags &= anv_info->isl_tiling_flags;
119
120 if (legacy_scanout)
121 flags &= ISL_TILING_LINEAR_BIT | ISL_TILING_X_BIT;
122
123 assert(flags);
124
125 return flags;
126 }
127
128 static struct anv_surface *
129 get_surface(struct anv_image *image, VkImageAspectFlagBits aspect)
130 {
131 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
132 return &image->planes[plane].surface;
133 }
134
135 static void
136 add_surface(struct anv_image *image, struct anv_surface *surf, uint32_t plane)
137 {
138 assert(surf->isl.size_B > 0); /* isl surface must be initialized */
139
140 if (image->disjoint) {
141 surf->offset = align_u32(image->planes[plane].size,
142 surf->isl.alignment_B);
143 /* Plane offset is always 0 when it's disjoint. */
144 } else {
145 surf->offset = align_u32(image->size, surf->isl.alignment_B);
146 /* Determine plane's offset only once when the first surface is added. */
147 if (image->planes[plane].size == 0)
148 image->planes[plane].offset = image->size;
149 }
150
151 image->size = surf->offset + surf->isl.size_B;
152 image->planes[plane].size = (surf->offset + surf->isl.size_B) - image->planes[plane].offset;
153
154 image->alignment = MAX2(image->alignment, surf->isl.alignment_B);
155 image->planes[plane].alignment = MAX2(image->planes[plane].alignment,
156 surf->isl.alignment_B);
157 }
158
159
160 bool
161 anv_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
162 VkImageCreateFlags create_flags,
163 VkFormat vk_format,
164 VkImageTiling vk_tiling,
165 const VkImageFormatListCreateInfoKHR *fmt_list)
166 {
167 enum isl_format format =
168 anv_get_isl_format(devinfo, vk_format,
169 VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
170
171 if (!isl_format_supports_ccs_e(devinfo, format))
172 return false;
173
174 if (!(create_flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
175 return true;
176
177 if (!fmt_list || fmt_list->viewFormatCount == 0)
178 return false;
179
180 for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
181 enum isl_format view_format =
182 anv_get_isl_format(devinfo, fmt_list->pViewFormats[i],
183 VK_IMAGE_ASPECT_COLOR_BIT, vk_tiling);
184
185 if (!isl_formats_are_ccs_e_compatible(devinfo, format, view_format))
186 return false;
187 }
188
189 return true;
190 }
191
192 /**
193 * For color images that have an auxiliary surface, request allocation for an
194 * additional buffer that mainly stores fast-clear values. Use of this buffer
195 * allows us to access the image's subresources while being aware of their
196 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
197 * which a fast clear has occurred).
198 *
199 * In order to avoid having multiple clear colors for a single plane of an
200 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
201 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
202 * 2018), there were no known applications which would benefit from fast-
203 * clearing more than just the first slice.
204 *
205 * The fast clear portion of the image is laid out in the following order:
206 *
207 * * 1 or 4 dwords (depending on hardware generation) for the clear color
208 * * 1 dword for the anv_fast_clear_type of the clear color
209 * * On gen9+, 1 dword per level and layer of the image (3D levels count
210 * multiple layers) in level-major order for compression state.
211 *
212 * For the purpose of discoverability, the algorithm used to manage
213 * compression and fast-clears is described here:
214 *
215 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
216 * all of the values in the fast clear portion of the image are initialized
217 * to default values.
218 *
219 * * On fast-clear, the clear value is written into surface state and also
220 * into the buffer and the fast clear type is set appropriately. Both
221 * setting the fast-clear value in the buffer and setting the fast-clear
222 * type happen from the GPU using MI commands.
223 *
224 * * Whenever a render or blorp operation is performed with CCS_E, we call
225 * genX(cmd_buffer_mark_image_written) to set the compression state to
226 * true (which is represented by UINT32_MAX).
227 *
228 * * On pipeline barrier transitions, the worst-case transition is computed
229 * from the image layouts. The command streamer inspects the fast clear
230 * type and compression state dwords and constructs a predicate. The
231 * worst-case resolve is performed with the given predicate and the fast
232 * clear and compression state is set accordingly.
233 *
234 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
235 * details on exactly what is allowed in what layouts.
236 *
237 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
238 * In order to deal with this, we have to do some clear color management.
239 *
240 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
241 * value from the buffer into the surface state with MI commands.
242 *
243 * * For any blorp operations, we pass the address to the clear value into
244 * blorp and it knows to copy the clear color.
245 */
246 static void
247 add_aux_state_tracking_buffer(struct anv_image *image,
248 uint32_t plane,
249 const struct anv_device *device)
250 {
251 assert(image && device);
252 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE &&
253 image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
254
255 /* Compressed images must be tiled and therefore everything should be 4K
256 * aligned. The CCS has the same alignment requirements. This is good
257 * because we need at least dword-alignment for MI_LOAD/STORE operations.
258 */
259 assert(image->alignment % 4 == 0);
260 assert((image->planes[plane].offset + image->planes[plane].size) % 4 == 0);
261
262 /* This buffer should be at the very end of the plane. */
263 if (image->disjoint) {
264 assert(image->planes[plane].size ==
265 (image->planes[plane].offset + image->planes[plane].size));
266 } else {
267 assert(image->size ==
268 (image->planes[plane].offset + image->planes[plane].size));
269 }
270
271 const unsigned clear_color_state_size = device->info.gen >= 10 ?
272 device->isl_dev.ss.clear_color_state_size :
273 device->isl_dev.ss.clear_value_size;
274
275 /* Clear color and fast clear type */
276 unsigned state_size = clear_color_state_size + 4;
277
278 /* We only need to track compression on CCS_E surfaces. */
279 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
280 if (image->type == VK_IMAGE_TYPE_3D) {
281 for (uint32_t l = 0; l < image->levels; l++)
282 state_size += anv_minify(image->extent.depth, l) * 4;
283 } else {
284 state_size += image->levels * image->array_size * 4;
285 }
286 }
287
288 /* Add some padding to make sure the fast clear color state buffer starts at
289 * a 4K alignment. We believe that 256B might be enough, but due to lack of
290 * testing we will leave this as 4K for now.
291 */
292 image->planes[plane].size = ALIGN(image->planes[plane].size, 4096);
293 image->size = ALIGN(image->size, 4096);
294
295 assert(image->planes[plane].offset % 4096 == 0);
296
297 image->planes[plane].fast_clear_state_offset =
298 image->planes[plane].offset + image->planes[plane].size;
299
300 image->planes[plane].size += state_size;
301 image->size += state_size;
302 }
303
304 /**
305 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
306 * image's memory requirements (that is, the image's size and alignment).
307 */
308 static VkResult
309 make_surface(struct anv_device *device,
310 struct anv_image *image,
311 const VkImageFormatListCreateInfoKHR *fmt_list,
312 uint32_t stride,
313 isl_tiling_flags_t tiling_flags,
314 isl_surf_usage_flags_t isl_extra_usage_flags,
315 VkImageAspectFlagBits aspect)
316 {
317 bool ok;
318
319 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
320 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
321 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
322 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
323 };
324
325 image->extent = anv_sanitize_image_extent(image->type, image->extent);
326
327 const unsigned plane = anv_image_aspect_to_plane(image->aspects, aspect);
328 const struct anv_format_plane plane_format =
329 anv_get_format_plane(&device->info, image->vk_format, aspect, image->tiling);
330 struct anv_surface *anv_surf = &image->planes[plane].surface;
331
332 const isl_surf_usage_flags_t usage =
333 choose_isl_surf_usage(image->create_flags, image->usage,
334 isl_extra_usage_flags, aspect);
335
336 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
337 * fall back to linear on Broadwell and earlier because we aren't
338 * guaranteed that we can handle offsets correctly. On Sky Lake, the
339 * horizontal and vertical alignments are sufficiently high that we can
340 * just use RENDER_SURFACE_STATE::X/Y Offset.
341 */
342 bool needs_shadow = false;
343 isl_surf_usage_flags_t shadow_usage = 0;
344 if (device->info.gen <= 8 &&
345 (image->create_flags & VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT) &&
346 image->tiling == VK_IMAGE_TILING_OPTIMAL) {
347 assert(isl_format_is_compressed(plane_format.isl_format));
348 tiling_flags = ISL_TILING_LINEAR_BIT;
349 needs_shadow = true;
350 shadow_usage = ISL_SURF_USAGE_TEXTURE_BIT |
351 (usage & ISL_SURF_USAGE_CUBE_BIT);
352 }
353
354 if (device->info.gen <= 7 &&
355 aspect == VK_IMAGE_ASPECT_STENCIL_BIT &&
356 (image->stencil_usage & VK_IMAGE_USAGE_SAMPLED_BIT)) {
357 needs_shadow = true;
358 shadow_usage = ISL_SURF_USAGE_TEXTURE_BIT |
359 (usage & ISL_SURF_USAGE_CUBE_BIT);
360 }
361
362 ok = isl_surf_init(&device->isl_dev, &anv_surf->isl,
363 .dim = vk_to_isl_surf_dim[image->type],
364 .format = plane_format.isl_format,
365 .width = image->extent.width / plane_format.denominator_scales[0],
366 .height = image->extent.height / plane_format.denominator_scales[1],
367 .depth = image->extent.depth,
368 .levels = image->levels,
369 .array_len = image->array_size,
370 .samples = image->samples,
371 .min_alignment_B = 0,
372 .row_pitch_B = stride,
373 .usage = usage,
374 .tiling_flags = tiling_flags);
375
376 if (!ok)
377 return VK_ERROR_OUT_OF_DEVICE_MEMORY;
378
379 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
380
381 add_surface(image, anv_surf, plane);
382
383 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
384 * create an identical tiled shadow surface for use while texturing so we
385 * don't get garbage performance. If we're on gen7 and the image contains
386 * stencil, then we need to maintain a shadow because we can't texture from
387 * W-tiled images.
388 */
389 if (needs_shadow) {
390 ok = isl_surf_init(&device->isl_dev, &image->planes[plane].shadow_surface.isl,
391 .dim = vk_to_isl_surf_dim[image->type],
392 .format = plane_format.isl_format,
393 .width = image->extent.width,
394 .height = image->extent.height,
395 .depth = image->extent.depth,
396 .levels = image->levels,
397 .array_len = image->array_size,
398 .samples = image->samples,
399 .min_alignment_B = 0,
400 .row_pitch_B = stride,
401 .usage = shadow_usage,
402 .tiling_flags = ISL_TILING_ANY_MASK);
403
404 /* isl_surf_init() will fail only if provided invalid input. Invalid input
405 * is illegal in Vulkan.
406 */
407 assert(ok);
408
409 add_surface(image, &image->planes[plane].shadow_surface, plane);
410 }
411
412 /* Add a HiZ surface to a depth buffer that will be used for rendering.
413 */
414 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
415 /* We don't advertise that depth buffers could be used as storage
416 * images.
417 */
418 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
419
420 /* Allow the user to control HiZ enabling. Disable by default on gen7
421 * because resolves are not currently implemented pre-BDW.
422 */
423 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
424 /* It will never be used as an attachment, HiZ is pointless. */
425 } else if (device->info.gen == 7) {
426 anv_perf_warn(device, image, "Implement gen7 HiZ");
427 } else if (image->levels > 1) {
428 anv_perf_warn(device, image, "Enable multi-LOD HiZ");
429 } else if (image->array_size > 1) {
430 anv_perf_warn(device, image,
431 "Implement multi-arrayLayer HiZ clears and resolves");
432 } else if (device->info.gen == 8 && image->samples > 1) {
433 anv_perf_warn(device, image, "Enable gen8 multisampled HiZ");
434 } else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
435 assert(image->planes[plane].aux_surface.isl.size_B == 0);
436 ok = isl_surf_get_hiz_surf(&device->isl_dev,
437 &image->planes[plane].surface.isl,
438 &image->planes[plane].aux_surface.isl);
439 assert(ok);
440 image->planes[plane].aux_usage = ISL_AUX_USAGE_HIZ;
441 add_surface(image, &image->planes[plane].aux_surface, plane);
442 }
443 } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples == 1) {
444 /* TODO: Disallow compression with :
445 *
446 * 1) non multiplanar images (We appear to hit a sampler bug with
447 * CCS & R16G16 format. Putting the clear state a page/4096bytes
448 * further fixes the issue).
449 *
450 * 2) alias images, because they might be aliases of images
451 * described in 1)
452 *
453 * 3) compression disabled by debug
454 */
455 const bool allow_compression =
456 image->n_planes == 1 &&
457 (image->create_flags & VK_IMAGE_CREATE_ALIAS_BIT) == 0 &&
458 likely((INTEL_DEBUG & DEBUG_NO_RBC) == 0);
459
460 if (allow_compression) {
461 assert(image->planes[plane].aux_surface.isl.size_B == 0);
462 ok = isl_surf_get_ccs_surf(&device->isl_dev,
463 &image->planes[plane].surface.isl,
464 &image->planes[plane].aux_surface.isl,
465 NULL, 0);
466 if (ok) {
467
468 /* Disable CCS when it is not useful (i.e., when you can't render
469 * to the image with CCS enabled).
470 */
471 if (!isl_format_supports_rendering(&device->info,
472 plane_format.isl_format)) {
473 /* While it may be technically possible to enable CCS for this
474 * image, we currently don't have things hooked up to get it
475 * working.
476 */
477 anv_perf_warn(device, image,
478 "This image format doesn't support rendering. "
479 "Not allocating an CCS buffer.");
480 image->planes[plane].aux_surface.isl.size_B = 0;
481 return VK_SUCCESS;
482 }
483
484 /* For images created without MUTABLE_FORMAT_BIT set, we know that
485 * they will always be used with the original format. In
486 * particular, they will always be used with a format that
487 * supports color compression. If it's never used as a storage
488 * image, then it will only be used through the sampler or the as
489 * a render target. This means that it's safe to just leave
490 * compression on at all times for these formats.
491 */
492 if (!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
493 anv_formats_ccs_e_compatible(&device->info,
494 image->create_flags,
495 image->vk_format,
496 image->tiling,
497 fmt_list)) {
498 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_E;
499 } else if (device->info.gen >= 12) {
500 anv_perf_warn(device, image,
501 "The CCS_D aux mode is not yet handled on "
502 "Gen12+. Not allocating a CCS buffer.");
503 image->planes[plane].aux_surface.isl.size_B = 0;
504 return VK_SUCCESS;
505 } else {
506 image->planes[plane].aux_usage = ISL_AUX_USAGE_CCS_D;
507 }
508
509 if (!device->physical->has_implicit_ccs)
510 add_surface(image, &image->planes[plane].aux_surface, plane);
511
512 add_aux_state_tracking_buffer(image, plane, device);
513 }
514 }
515 } else if ((aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) && image->samples > 1) {
516 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
517 assert(image->planes[plane].aux_surface.isl.size_B == 0);
518 ok = isl_surf_get_mcs_surf(&device->isl_dev,
519 &image->planes[plane].surface.isl,
520 &image->planes[plane].aux_surface.isl);
521 if (ok) {
522 image->planes[plane].aux_usage = ISL_AUX_USAGE_MCS;
523 add_surface(image, &image->planes[plane].aux_surface, plane);
524 add_aux_state_tracking_buffer(image, plane, device);
525 }
526 }
527
528 assert((image->planes[plane].offset + image->planes[plane].size) == image->size);
529
530 /* Upper bound of the last surface should be smaller than the plane's
531 * size.
532 */
533 assert((MAX2(image->planes[plane].surface.offset,
534 image->planes[plane].aux_surface.offset) +
535 (image->planes[plane].aux_surface.isl.size_B > 0 ?
536 image->planes[plane].aux_surface.isl.size_B :
537 image->planes[plane].surface.isl.size_B)) <=
538 (image->planes[plane].offset + image->planes[plane].size));
539
540 if (image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE) {
541 /* assert(image->planes[plane].fast_clear_state_offset == */
542 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
543 assert(image->planes[plane].fast_clear_state_offset <
544 (image->planes[plane].offset + image->planes[plane].size));
545 }
546
547 return VK_SUCCESS;
548 }
549
550 static uint32_t
551 score_drm_format_mod(uint64_t modifier)
552 {
553 switch (modifier) {
554 case DRM_FORMAT_MOD_LINEAR: return 1;
555 case I915_FORMAT_MOD_X_TILED: return 2;
556 case I915_FORMAT_MOD_Y_TILED: return 3;
557 case I915_FORMAT_MOD_Y_TILED_CCS: return 4;
558 default: unreachable("bad DRM format modifier");
559 }
560 }
561
562 static const struct isl_drm_modifier_info *
563 choose_drm_format_mod(const struct anv_physical_device *device,
564 uint32_t modifier_count, const uint64_t *modifiers)
565 {
566 uint64_t best_mod = UINT64_MAX;
567 uint32_t best_score = 0;
568
569 for (uint32_t i = 0; i < modifier_count; ++i) {
570 uint32_t score = score_drm_format_mod(modifiers[i]);
571 if (score > best_score) {
572 best_mod = modifiers[i];
573 best_score = score;
574 }
575 }
576
577 if (best_score > 0)
578 return isl_drm_modifier_get_info(best_mod);
579 else
580 return NULL;
581 }
582
583 VkResult
584 anv_image_create(VkDevice _device,
585 const struct anv_image_create_info *create_info,
586 const VkAllocationCallbacks* alloc,
587 VkImage *pImage)
588 {
589 ANV_FROM_HANDLE(anv_device, device, _device);
590 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
591 const struct isl_drm_modifier_info *isl_mod_info = NULL;
592 struct anv_image *image = NULL;
593 VkResult r;
594
595 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
596
597 const struct wsi_image_create_info *wsi_info =
598 vk_find_struct_const(pCreateInfo->pNext, WSI_IMAGE_CREATE_INFO_MESA);
599
600 if (pCreateInfo->tiling == VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT) {
601 const VkImageDrmFormatModifierListCreateInfoEXT *mod_info =
602 vk_find_struct_const(pCreateInfo->pNext,
603 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT);
604 isl_mod_info = choose_drm_format_mod(device->physical,
605 mod_info->drmFormatModifierCount,
606 mod_info->pDrmFormatModifiers);
607 assert(isl_mod_info);
608 }
609
610 anv_assert(pCreateInfo->mipLevels > 0);
611 anv_assert(pCreateInfo->arrayLayers > 0);
612 anv_assert(pCreateInfo->samples > 0);
613 anv_assert(pCreateInfo->extent.width > 0);
614 anv_assert(pCreateInfo->extent.height > 0);
615 anv_assert(pCreateInfo->extent.depth > 0);
616
617 image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
618 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
619 if (!image)
620 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
621
622 image->type = pCreateInfo->imageType;
623 image->extent = pCreateInfo->extent;
624 image->vk_format = pCreateInfo->format;
625 image->format = anv_get_format(pCreateInfo->format);
626 image->aspects = vk_format_aspects(image->vk_format);
627 image->levels = pCreateInfo->mipLevels;
628 image->array_size = pCreateInfo->arrayLayers;
629 image->samples = pCreateInfo->samples;
630 image->usage = pCreateInfo->usage;
631 image->create_flags = pCreateInfo->flags;
632 image->tiling = pCreateInfo->tiling;
633 image->disjoint = pCreateInfo->flags & VK_IMAGE_CREATE_DISJOINT_BIT;
634 image->needs_set_tiling = wsi_info && wsi_info->scanout;
635 image->drm_format_mod = isl_mod_info ? isl_mod_info->modifier :
636 DRM_FORMAT_MOD_INVALID;
637
638 if (image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
639 image->stencil_usage = pCreateInfo->usage;
640 const VkImageStencilUsageCreateInfoEXT *stencil_usage_info =
641 vk_find_struct_const(pCreateInfo->pNext,
642 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT);
643 if (stencil_usage_info)
644 image->stencil_usage = stencil_usage_info->stencilUsage;
645 }
646
647 /* In case of external format, We don't know format yet,
648 * so skip the rest for now.
649 */
650 if (create_info->external_format) {
651 image->external_format = true;
652 *pImage = anv_image_to_handle(image);
653 return VK_SUCCESS;
654 }
655
656 const struct anv_format *format = anv_get_format(image->vk_format);
657 assert(format != NULL);
658
659 const isl_tiling_flags_t isl_tiling_flags =
660 choose_isl_tiling_flags(create_info, isl_mod_info,
661 image->needs_set_tiling);
662
663 image->n_planes = format->n_planes;
664
665 const VkImageFormatListCreateInfoKHR *fmt_list =
666 vk_find_struct_const(pCreateInfo->pNext,
667 IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
668
669 uint32_t b;
670 for_each_bit(b, image->aspects) {
671 r = make_surface(device, image, fmt_list, create_info->stride,
672 isl_tiling_flags, create_info->isl_extra_usage_flags,
673 (1 << b));
674 if (r != VK_SUCCESS)
675 goto fail;
676 }
677
678 *pImage = anv_image_to_handle(image);
679
680 return VK_SUCCESS;
681
682 fail:
683 if (image)
684 vk_free2(&device->alloc, alloc, image);
685
686 return r;
687 }
688
689 static struct anv_image *
690 anv_swapchain_get_image(VkSwapchainKHR swapchain,
691 uint32_t index)
692 {
693 uint32_t n_images = index + 1;
694 VkImage *images = malloc(sizeof(*images) * n_images);
695 VkResult result = wsi_common_get_images(swapchain, &n_images, images);
696
697 if (result != VK_SUCCESS && result != VK_INCOMPLETE) {
698 free(images);
699 return NULL;
700 }
701
702 ANV_FROM_HANDLE(anv_image, image, images[index]);
703 free(images);
704
705 return image;
706 }
707
708 static VkResult
709 anv_image_from_swapchain(VkDevice device,
710 const VkImageCreateInfo *pCreateInfo,
711 const VkImageSwapchainCreateInfoKHR *swapchain_info,
712 const VkAllocationCallbacks *pAllocator,
713 VkImage *pImage)
714 {
715 struct anv_image *swapchain_image = anv_swapchain_get_image(swapchain_info->swapchain, 0);
716 assert(swapchain_image);
717
718 assert(swapchain_image->type == pCreateInfo->imageType);
719 assert(swapchain_image->vk_format == pCreateInfo->format);
720 assert(swapchain_image->extent.width == pCreateInfo->extent.width);
721 assert(swapchain_image->extent.height == pCreateInfo->extent.height);
722 assert(swapchain_image->extent.depth == pCreateInfo->extent.depth);
723 assert(swapchain_image->array_size == pCreateInfo->arrayLayers);
724 /* Color attachment is added by the wsi code. */
725 assert(swapchain_image->usage == (pCreateInfo->usage | VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT));
726
727 VkImageCreateInfo local_create_info;
728 local_create_info = *pCreateInfo;
729 local_create_info.pNext = NULL;
730 /* The following parameters are implictly selected by the wsi code. */
731 local_create_info.tiling = VK_IMAGE_TILING_OPTIMAL;
732 local_create_info.samples = VK_SAMPLE_COUNT_1_BIT;
733 local_create_info.usage |= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
734
735 /* If the image has a particular modifier, specify that modifier. */
736 VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info = {
737 .sType = VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT,
738 .drmFormatModifierCount = 1,
739 .pDrmFormatModifiers = &swapchain_image->drm_format_mod,
740 };
741 if (swapchain_image->drm_format_mod != DRM_FORMAT_MOD_INVALID)
742 __vk_append_struct(&local_create_info, &local_modifier_info);
743
744 return anv_image_create(device,
745 &(struct anv_image_create_info) {
746 .vk_info = &local_create_info,
747 .external_format = swapchain_image->external_format,
748 },
749 pAllocator,
750 pImage);
751 }
752
753 VkResult
754 anv_CreateImage(VkDevice device,
755 const VkImageCreateInfo *pCreateInfo,
756 const VkAllocationCallbacks *pAllocator,
757 VkImage *pImage)
758 {
759 const VkExternalMemoryImageCreateInfo *create_info =
760 vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_MEMORY_IMAGE_CREATE_INFO);
761
762 if (create_info && (create_info->handleTypes &
763 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID))
764 return anv_image_from_external(device, pCreateInfo, create_info,
765 pAllocator, pImage);
766
767 bool use_external_format = false;
768 const VkExternalFormatANDROID *ext_format =
769 vk_find_struct_const(pCreateInfo->pNext, EXTERNAL_FORMAT_ANDROID);
770
771 /* "If externalFormat is zero, the effect is as if the
772 * VkExternalFormatANDROID structure was not present. Otherwise, the image
773 * will have the specified external format."
774 */
775 if (ext_format && ext_format->externalFormat != 0)
776 use_external_format = true;
777
778 const VkNativeBufferANDROID *gralloc_info =
779 vk_find_struct_const(pCreateInfo->pNext, NATIVE_BUFFER_ANDROID);
780 if (gralloc_info)
781 return anv_image_from_gralloc(device, pCreateInfo, gralloc_info,
782 pAllocator, pImage);
783
784 const VkImageSwapchainCreateInfoKHR *swapchain_info =
785 vk_find_struct_const(pCreateInfo->pNext, IMAGE_SWAPCHAIN_CREATE_INFO_KHR);
786 if (swapchain_info && swapchain_info->swapchain != VK_NULL_HANDLE)
787 return anv_image_from_swapchain(device, pCreateInfo, swapchain_info,
788 pAllocator, pImage);
789
790 return anv_image_create(device,
791 &(struct anv_image_create_info) {
792 .vk_info = pCreateInfo,
793 .external_format = use_external_format,
794 },
795 pAllocator,
796 pImage);
797 }
798
799 void
800 anv_DestroyImage(VkDevice _device, VkImage _image,
801 const VkAllocationCallbacks *pAllocator)
802 {
803 ANV_FROM_HANDLE(anv_device, device, _device);
804 ANV_FROM_HANDLE(anv_image, image, _image);
805
806 if (!image)
807 return;
808
809 for (uint32_t p = 0; p < image->n_planes; ++p) {
810 if (image->planes[p].bo_is_owned) {
811 assert(image->planes[p].address.bo != NULL);
812 anv_device_release_bo(device, image->planes[p].address.bo);
813 }
814 }
815
816 vk_free2(&device->alloc, pAllocator, image);
817 }
818
819 static void anv_image_bind_memory_plane(struct anv_device *device,
820 struct anv_image *image,
821 uint32_t plane,
822 struct anv_device_memory *memory,
823 uint32_t memory_offset)
824 {
825 assert(!image->planes[plane].bo_is_owned);
826
827 if (!memory) {
828 image->planes[plane].address = ANV_NULL_ADDRESS;
829 return;
830 }
831
832 image->planes[plane].address = (struct anv_address) {
833 .bo = memory->bo,
834 .offset = memory_offset,
835 };
836
837 /* If we're on a platform that uses implicit CCS and our buffer does not
838 * have any implicit CCS data, disable compression on that image.
839 */
840 if (device->physical->has_implicit_ccs && !memory->bo->has_implicit_ccs)
841 image->planes[plane].aux_usage = ISL_AUX_USAGE_NONE;
842 }
843
844 /* We are binding AHardwareBuffer. Get a description, resolve the
845 * format and prepare anv_image properly.
846 */
847 static void
848 resolve_ahw_image(struct anv_device *device,
849 struct anv_image *image,
850 struct anv_device_memory *mem)
851 {
852 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
853 assert(mem->ahw);
854 AHardwareBuffer_Desc desc;
855 AHardwareBuffer_describe(mem->ahw, &desc);
856
857 /* Check tiling. */
858 int i915_tiling = anv_gem_get_tiling(device, mem->bo->gem_handle);
859 VkImageTiling vk_tiling;
860 isl_tiling_flags_t isl_tiling_flags = 0;
861
862 switch (i915_tiling) {
863 case I915_TILING_NONE:
864 vk_tiling = VK_IMAGE_TILING_LINEAR;
865 isl_tiling_flags = ISL_TILING_LINEAR_BIT;
866 break;
867 case I915_TILING_X:
868 vk_tiling = VK_IMAGE_TILING_OPTIMAL;
869 isl_tiling_flags = ISL_TILING_X_BIT;
870 break;
871 case I915_TILING_Y:
872 vk_tiling = VK_IMAGE_TILING_OPTIMAL;
873 isl_tiling_flags = ISL_TILING_Y0_BIT;
874 break;
875 case -1:
876 default:
877 unreachable("Invalid tiling flags.");
878 }
879
880 assert(vk_tiling == VK_IMAGE_TILING_LINEAR ||
881 vk_tiling == VK_IMAGE_TILING_OPTIMAL);
882
883 /* Check format. */
884 VkFormat vk_format = vk_format_from_android(desc.format, desc.usage);
885 enum isl_format isl_fmt = anv_get_isl_format(&device->info,
886 vk_format,
887 VK_IMAGE_ASPECT_COLOR_BIT,
888 vk_tiling);
889 assert(isl_fmt != ISL_FORMAT_UNSUPPORTED);
890
891 /* Handle RGB(X)->RGBA fallback. */
892 switch (desc.format) {
893 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM:
894 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM:
895 if (isl_format_is_rgb(isl_fmt))
896 isl_fmt = isl_format_rgb_to_rgba(isl_fmt);
897 break;
898 }
899
900 /* Now we are able to fill anv_image fields properly and create
901 * isl_surface for it.
902 */
903 image->vk_format = vk_format;
904 image->format = anv_get_format(vk_format);
905 image->aspects = vk_format_aspects(image->vk_format);
906 image->n_planes = image->format->n_planes;
907
908 uint32_t stride = desc.stride *
909 (isl_format_get_layout(isl_fmt)->bpb / 8);
910
911 uint32_t b;
912 for_each_bit(b, image->aspects) {
913 VkResult r = make_surface(device, image, NULL, stride, isl_tiling_flags,
914 ISL_SURF_USAGE_DISABLE_AUX_BIT, (1 << b));
915 assert(r == VK_SUCCESS);
916 }
917 #endif
918 }
919
920 VkResult anv_BindImageMemory(
921 VkDevice _device,
922 VkImage _image,
923 VkDeviceMemory _memory,
924 VkDeviceSize memoryOffset)
925 {
926 ANV_FROM_HANDLE(anv_device, device, _device);
927 ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
928 ANV_FROM_HANDLE(anv_image, image, _image);
929
930 if (mem->ahw)
931 resolve_ahw_image(device, image, mem);
932
933 uint32_t aspect_bit;
934 anv_foreach_image_aspect_bit(aspect_bit, image, image->aspects) {
935 uint32_t plane =
936 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
937 anv_image_bind_memory_plane(device, image, plane, mem, memoryOffset);
938 }
939
940 return VK_SUCCESS;
941 }
942
943 VkResult anv_BindImageMemory2(
944 VkDevice _device,
945 uint32_t bindInfoCount,
946 const VkBindImageMemoryInfo* pBindInfos)
947 {
948 ANV_FROM_HANDLE(anv_device, device, _device);
949
950 for (uint32_t i = 0; i < bindInfoCount; i++) {
951 const VkBindImageMemoryInfo *bind_info = &pBindInfos[i];
952 ANV_FROM_HANDLE(anv_device_memory, mem, bind_info->memory);
953 ANV_FROM_HANDLE(anv_image, image, bind_info->image);
954
955 /* Resolve will alter the image's aspects, do this first. */
956 if (mem && mem->ahw)
957 resolve_ahw_image(device, image, mem);
958
959 VkImageAspectFlags aspects = image->aspects;
960 vk_foreach_struct_const(s, bind_info->pNext) {
961 switch (s->sType) {
962 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO: {
963 const VkBindImagePlaneMemoryInfo *plane_info =
964 (const VkBindImagePlaneMemoryInfo *) s;
965
966 aspects = plane_info->planeAspect;
967 break;
968 }
969 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR: {
970 const VkBindImageMemorySwapchainInfoKHR *swapchain_info =
971 (const VkBindImageMemorySwapchainInfoKHR *) s;
972 struct anv_image *swapchain_image =
973 anv_swapchain_get_image(swapchain_info->swapchain,
974 swapchain_info->imageIndex);
975 assert(swapchain_image);
976 assert(image->aspects == swapchain_image->aspects);
977 assert(mem == NULL);
978
979 uint32_t aspect_bit;
980 anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
981 uint32_t plane =
982 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
983 struct anv_device_memory mem = {
984 .bo = swapchain_image->planes[plane].address.bo,
985 };
986 anv_image_bind_memory_plane(device, image, plane,
987 &mem, bind_info->memoryOffset);
988 }
989 break;
990 }
991 default:
992 anv_debug_ignored_stype(s->sType);
993 break;
994 }
995 }
996
997 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
998 * VK_NULL_HANDLE. In such case, just carry one with the next bind
999 * item.
1000 */
1001 if (!mem)
1002 continue;
1003
1004 uint32_t aspect_bit;
1005 anv_foreach_image_aspect_bit(aspect_bit, image, aspects) {
1006 uint32_t plane =
1007 anv_image_aspect_to_plane(image->aspects, 1UL << aspect_bit);
1008 anv_image_bind_memory_plane(device, image, plane,
1009 mem, bind_info->memoryOffset);
1010 }
1011 }
1012
1013 return VK_SUCCESS;
1014 }
1015
1016 void anv_GetImageSubresourceLayout(
1017 VkDevice device,
1018 VkImage _image,
1019 const VkImageSubresource* subresource,
1020 VkSubresourceLayout* layout)
1021 {
1022 ANV_FROM_HANDLE(anv_image, image, _image);
1023
1024 const struct anv_surface *surface;
1025 if (subresource->aspectMask == VK_IMAGE_ASPECT_PLANE_1_BIT &&
1026 image->drm_format_mod != DRM_FORMAT_MOD_INVALID &&
1027 isl_drm_modifier_has_aux(image->drm_format_mod))
1028 surface = &image->planes[0].aux_surface;
1029 else
1030 surface = get_surface(image, subresource->aspectMask);
1031
1032 assert(__builtin_popcount(subresource->aspectMask) == 1);
1033
1034 layout->offset = surface->offset;
1035 layout->rowPitch = surface->isl.row_pitch_B;
1036 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
1037 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
1038
1039 if (subresource->mipLevel > 0 || subresource->arrayLayer > 0) {
1040 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1041
1042 uint32_t offset_B;
1043 isl_surf_get_image_offset_B_tile_sa(&surface->isl,
1044 subresource->mipLevel,
1045 subresource->arrayLayer,
1046 0 /* logical_z_offset_px */,
1047 &offset_B, NULL, NULL);
1048 layout->offset += offset_B;
1049 layout->size = layout->rowPitch * anv_minify(image->extent.height,
1050 subresource->mipLevel);
1051 } else {
1052 layout->size = surface->isl.size_B;
1053 }
1054 }
1055
1056 VkResult anv_GetImageDrmFormatModifierPropertiesEXT(
1057 VkDevice device,
1058 VkImage _image,
1059 VkImageDrmFormatModifierPropertiesEXT* pProperties)
1060 {
1061 ANV_FROM_HANDLE(anv_image, image, _image);
1062
1063 assert(pProperties->sType ==
1064 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT);
1065
1066 pProperties->drmFormatModifier = image->drm_format_mod;
1067
1068 return VK_SUCCESS;
1069 }
1070
1071 /**
1072 * This function returns the assumed isl_aux_state for a given VkImageLayout.
1073 * Because Vulkan image layouts don't map directly to isl_aux_state enums, the
1074 * returned enum is the assumed worst case.
1075 *
1076 * @param devinfo The device information of the Intel GPU.
1077 * @param image The image that may contain a collection of buffers.
1078 * @param aspect The aspect of the image to be accessed.
1079 * @param layout The current layout of the image aspect(s).
1080 *
1081 * @return The primary buffer that should be used for the given layout.
1082 */
1083 enum isl_aux_state
1084 anv_layout_to_aux_state(const struct gen_device_info * const devinfo,
1085 const struct anv_image * const image,
1086 const VkImageAspectFlagBits aspect,
1087 const VkImageLayout layout)
1088 {
1089 /* Validate the inputs. */
1090
1091 /* The devinfo is needed as the optimal buffer varies across generations. */
1092 assert(devinfo != NULL);
1093
1094 /* The layout of a NULL image is not properly defined. */
1095 assert(image != NULL);
1096
1097 /* The aspect must be exactly one of the image aspects. */
1098 assert(util_bitcount(aspect) == 1 && (aspect & image->aspects));
1099
1100 /* Determine the optimal buffer. */
1101
1102 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1103
1104 /* If we don't have an aux buffer then aux state makes no sense */
1105 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE);
1106
1107 /* All images that use an auxiliary surface are required to be tiled. */
1108 assert(image->planes[plane].surface.isl.tiling != ISL_TILING_LINEAR);
1109
1110 /* Stencil has no aux */
1111 assert(aspect != VK_IMAGE_ASPECT_STENCIL_BIT);
1112
1113 switch (layout) {
1114 /* Invalid layouts */
1115 case VK_IMAGE_LAYOUT_RANGE_SIZE:
1116 case VK_IMAGE_LAYOUT_MAX_ENUM:
1117 unreachable("Invalid image layout.");
1118
1119 /* Undefined layouts
1120 *
1121 * The pre-initialized layout is equivalent to the undefined layout for
1122 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1123 * on tiled images.
1124 */
1125 case VK_IMAGE_LAYOUT_UNDEFINED:
1126 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1127 return ISL_AUX_STATE_AUX_INVALID;
1128
1129 /* Transfer layouts */
1130 case VK_IMAGE_LAYOUT_GENERAL:
1131 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
1132 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1133 /* This buffer could be a depth buffer used in a transfer operation.
1134 * BLORP currently doesn't use HiZ for transfer operations so we must
1135 * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
1136 */
1137 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_HIZ);
1138 return ISL_AUX_STATE_AUX_INVALID;
1139 } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
1140 return ISL_AUX_STATE_PASS_THROUGH;
1141 } else {
1142 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1143 }
1144
1145 /* Sampling layouts */
1146 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR:
1147 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
1148 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
1149 assert((image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) == 0);
1150 /* Fall-through */
1151 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
1152 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
1153 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1154 if (anv_can_sample_with_hiz(devinfo, image))
1155 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1156 else
1157 return ISL_AUX_STATE_RESOLVED;
1158 } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
1159 return ISL_AUX_STATE_PASS_THROUGH;
1160 } else {
1161 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1162 }
1163
1164 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR:
1165 return ISL_AUX_STATE_RESOLVED;
1166
1167 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR: {
1168 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
1169
1170 /* When handing the image off to the presentation engine, we need to
1171 * ensure that things are properly resolved. For images with no
1172 * modifier, we assume that they follow the old rules and always need
1173 * a full resolve because the PE doesn't understand any form of
1174 * compression. For images with modifiers, we use the aux usage from
1175 * the modifier.
1176 */
1177 const struct isl_drm_modifier_info *mod_info =
1178 isl_drm_modifier_get_info(image->drm_format_mod);
1179 if (mod_info && mod_info->aux_usage != ISL_AUX_USAGE_NONE) {
1180 assert(mod_info->aux_usage == ISL_AUX_USAGE_CCS_E);
1181 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E);
1182 /* We do not yet support any modifiers which support clear color so
1183 * we just always return COMPRESSED_NO_CLEAR. One day, this will
1184 * change.
1185 */
1186 assert(!mod_info->supports_clear_color);
1187 return ISL_AUX_STATE_COMPRESSED_NO_CLEAR;
1188 } else {
1189 return ISL_AUX_STATE_PASS_THROUGH;
1190 }
1191 }
1192
1193 /* Rendering layouts */
1194 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
1195 assert(aspect & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1196 /* fall-through */
1197 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR:
1198 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D) {
1199 return ISL_AUX_STATE_PARTIAL_CLEAR;
1200 } else {
1201 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1202 }
1203
1204 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR:
1205 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
1206 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
1207 assert(aspect == VK_IMAGE_ASPECT_DEPTH_BIT);
1208 return ISL_AUX_STATE_COMPRESSED_CLEAR;
1209
1210 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
1211 unreachable("VK_KHR_shared_presentable_image is unsupported");
1212
1213 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
1214 unreachable("VK_EXT_fragment_density_map is unsupported");
1215
1216 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
1217 unreachable("VK_NV_shading_rate_image is unsupported");
1218 }
1219
1220 unreachable("layout is not a VkImageLayout enumeration member.");
1221 }
1222
1223 ASSERTED static bool
1224 vk_image_layout_is_read_only(VkImageLayout layout,
1225 VkImageAspectFlagBits aspect)
1226 {
1227 assert(util_bitcount(aspect) == 1);
1228
1229 switch (layout) {
1230 case VK_IMAGE_LAYOUT_UNDEFINED:
1231 case VK_IMAGE_LAYOUT_PREINITIALIZED:
1232 return true; /* These are only used for layout transitions */
1233
1234 case VK_IMAGE_LAYOUT_GENERAL:
1235 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
1236 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
1237 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
1238 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
1239 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR:
1240 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR:
1241 return false;
1242
1243 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
1244 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
1245 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
1246 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
1247 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV:
1248 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT:
1249 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR:
1250 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR:
1251 return true;
1252
1253 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL:
1254 return aspect == VK_IMAGE_ASPECT_DEPTH_BIT;
1255
1256 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL:
1257 return aspect == VK_IMAGE_ASPECT_STENCIL_BIT;
1258
1259 case VK_IMAGE_LAYOUT_RANGE_SIZE:
1260 case VK_IMAGE_LAYOUT_MAX_ENUM:
1261 unreachable("Invalid image layout.");
1262 }
1263
1264 unreachable("Invalid image layout.");
1265 }
1266
1267 /**
1268 * This function determines the optimal buffer to use for a given
1269 * VkImageLayout and other pieces of information needed to make that
1270 * determination. This does not determine the optimal buffer to use
1271 * during a resolve operation.
1272 *
1273 * @param devinfo The device information of the Intel GPU.
1274 * @param image The image that may contain a collection of buffers.
1275 * @param aspect The aspect of the image to be accessed.
1276 * @param usage The usage which describes how the image will be accessed.
1277 * @param layout The current layout of the image aspect(s).
1278 *
1279 * @return The primary buffer that should be used for the given layout.
1280 */
1281 enum isl_aux_usage
1282 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
1283 const struct anv_image * const image,
1284 const VkImageAspectFlagBits aspect,
1285 const VkImageUsageFlagBits usage,
1286 const VkImageLayout layout)
1287 {
1288 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1289
1290 /* If there is no auxiliary surface allocated, we must use the one and only
1291 * main buffer.
1292 */
1293 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
1294 return ISL_AUX_USAGE_NONE;
1295
1296 enum isl_aux_state aux_state =
1297 anv_layout_to_aux_state(devinfo, image, aspect, layout);
1298
1299 switch (aux_state) {
1300 case ISL_AUX_STATE_CLEAR:
1301 unreachable("We never use this state");
1302
1303 case ISL_AUX_STATE_PARTIAL_CLEAR:
1304 assert(image->aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV);
1305 assert(image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_D);
1306 assert(image->samples == 1);
1307 return ISL_AUX_USAGE_CCS_D;
1308
1309 case ISL_AUX_STATE_COMPRESSED_CLEAR:
1310 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1311 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1312 return ISL_AUX_USAGE_HIZ;
1313 } else {
1314 assert(image->planes[plane].aux_usage != ISL_AUX_USAGE_NONE);
1315 return image->planes[plane].aux_usage;
1316 }
1317
1318 case ISL_AUX_STATE_RESOLVED:
1319 /* We can only use RESOLVED in read-only layouts because any write will
1320 * either land us in AUX_INVALID or COMPRESSED_NO_CLEAR. We can do
1321 * writes in PASS_THROUGH without destroying it so that is allowed.
1322 */
1323 assert(vk_image_layout_is_read_only(layout, aspect));
1324 assert(util_is_power_of_two_or_zero(usage));
1325 if (usage == VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT) {
1326 /* If we have valid HiZ data and are using the image as a read-only
1327 * depth/stencil attachment, we should enable HiZ so that we can get
1328 * faster depth testing.
1329 */
1330 return ISL_AUX_USAGE_HIZ;
1331 } else {
1332 return ISL_AUX_USAGE_NONE;
1333 }
1334
1335 case ISL_AUX_STATE_PASS_THROUGH:
1336 case ISL_AUX_STATE_AUX_INVALID:
1337 return ISL_AUX_USAGE_NONE;
1338 }
1339
1340 unreachable("Invalid isl_aux_state");
1341 }
1342
1343 /**
1344 * This function returns the level of unresolved fast-clear support of the
1345 * given image in the given VkImageLayout.
1346 *
1347 * @param devinfo The device information of the Intel GPU.
1348 * @param image The image that may contain a collection of buffers.
1349 * @param aspect The aspect of the image to be accessed.
1350 * @param usage The usage which describes how the image will be accessed.
1351 * @param layout The current layout of the image aspect(s).
1352 */
1353 enum anv_fast_clear_type
1354 anv_layout_to_fast_clear_type(const struct gen_device_info * const devinfo,
1355 const struct anv_image * const image,
1356 const VkImageAspectFlagBits aspect,
1357 const VkImageLayout layout)
1358 {
1359 if (INTEL_DEBUG & DEBUG_NO_FAST_CLEAR)
1360 return ANV_FAST_CLEAR_NONE;
1361
1362 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1363
1364 /* If there is no auxiliary surface allocated, there are no fast-clears */
1365 if (image->planes[plane].aux_usage == ISL_AUX_USAGE_NONE)
1366 return ANV_FAST_CLEAR_NONE;
1367
1368 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1369 * lack the MI ALU which we need to determine the predicates.
1370 */
1371 if (devinfo->gen == 7 && !devinfo->is_haswell && image->samples > 1)
1372 return ANV_FAST_CLEAR_NONE;
1373
1374 enum isl_aux_state aux_state =
1375 anv_layout_to_aux_state(devinfo, image, aspect, layout);
1376
1377 switch (aux_state) {
1378 case ISL_AUX_STATE_CLEAR:
1379 unreachable("We never use this state");
1380
1381 case ISL_AUX_STATE_PARTIAL_CLEAR:
1382 case ISL_AUX_STATE_COMPRESSED_CLEAR:
1383 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
1384 return ANV_FAST_CLEAR_DEFAULT_VALUE;
1385 } else if (layout == VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL) {
1386 /* When we're in a render pass we have the clear color data from the
1387 * VkRenderPassBeginInfo and we can use arbitrary clear colors. They
1388 * must get partially resolved before we leave the render pass.
1389 */
1390 return ANV_FAST_CLEAR_ANY;
1391 } else if (image->planes[plane].aux_usage == ISL_AUX_USAGE_MCS ||
1392 image->planes[plane].aux_usage == ISL_AUX_USAGE_CCS_E) {
1393 /* If the image has MCS or CCS_E enabled all the time then we can use
1394 * fast-clear as long as the clear color is the default value of zero
1395 * since this is the default value we program into every surface
1396 * state used for texturing.
1397 */
1398 return ANV_FAST_CLEAR_DEFAULT_VALUE;
1399 } else {
1400 return ANV_FAST_CLEAR_NONE;
1401 }
1402
1403 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR:
1404 case ISL_AUX_STATE_RESOLVED:
1405 case ISL_AUX_STATE_PASS_THROUGH:
1406 case ISL_AUX_STATE_AUX_INVALID:
1407 return ANV_FAST_CLEAR_NONE;
1408 }
1409
1410 unreachable("Invalid isl_aux_state");
1411 }
1412
1413
1414 static struct anv_state
1415 alloc_surface_state(struct anv_device *device)
1416 {
1417 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
1418 }
1419
1420 static enum isl_channel_select
1421 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
1422 struct isl_swizzle format_swizzle)
1423 {
1424 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
1425 swizzle = component;
1426
1427 switch (swizzle) {
1428 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
1429 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
1430 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
1431 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
1432 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
1433 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
1434 default:
1435 unreachable("Invalid swizzle");
1436 }
1437 }
1438
1439 void
1440 anv_image_fill_surface_state(struct anv_device *device,
1441 const struct anv_image *image,
1442 VkImageAspectFlagBits aspect,
1443 const struct isl_view *view_in,
1444 isl_surf_usage_flags_t view_usage,
1445 enum isl_aux_usage aux_usage,
1446 const union isl_color_value *clear_color,
1447 enum anv_image_view_state_flags flags,
1448 struct anv_surface_state *state_inout,
1449 struct brw_image_param *image_param_out)
1450 {
1451 uint32_t plane = anv_image_aspect_to_plane(image->aspects, aspect);
1452
1453 const struct anv_surface *surface = &image->planes[plane].surface,
1454 *aux_surface = &image->planes[plane].aux_surface;
1455
1456 struct isl_view view = *view_in;
1457 view.usage |= view_usage;
1458
1459 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1460 * compressed surface with a shadow surface, we use the shadow instead of
1461 * the primary surface. The shadow surface will be tiled, unlike the main
1462 * surface, so it should get significantly better performance.
1463 */
1464 if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
1465 isl_format_is_compressed(view.format) &&
1466 (flags & ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL)) {
1467 assert(isl_format_is_compressed(surface->isl.format));
1468 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1469 assert(image->planes[plane].shadow_surface.isl.tiling != ISL_TILING_LINEAR);
1470 surface = &image->planes[plane].shadow_surface;
1471 }
1472
1473 /* For texturing from stencil on gen7, we have to sample from a shadow
1474 * surface because we don't support W-tiling in the sampler.
1475 */
1476 if (image->planes[plane].shadow_surface.isl.size_B > 0 &&
1477 aspect == VK_IMAGE_ASPECT_STENCIL_BIT) {
1478 assert(device->info.gen == 7);
1479 assert(view_usage & ISL_SURF_USAGE_TEXTURE_BIT);
1480 surface = &image->planes[plane].shadow_surface;
1481 }
1482
1483 if (view_usage == ISL_SURF_USAGE_RENDER_TARGET_BIT)
1484 view.swizzle = anv_swizzle_for_render(view.swizzle);
1485
1486 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1487 if (device->info.gen == 7 && !device->info.is_haswell)
1488 view.swizzle = ISL_SWIZZLE_IDENTITY;
1489
1490 /* If this is a HiZ buffer we can sample from with a programmable clear
1491 * value (SKL+), define the clear value to the optimal constant.
1492 */
1493 union isl_color_value default_clear_color = { .u32 = { 0, } };
1494 if (device->info.gen >= 9 && aux_usage == ISL_AUX_USAGE_HIZ)
1495 default_clear_color.f32[0] = ANV_HZ_FC_VAL;
1496 if (!clear_color)
1497 clear_color = &default_clear_color;
1498
1499 const struct anv_address address =
1500 anv_address_add(image->planes[plane].address, surface->offset);
1501
1502 if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
1503 !(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY) &&
1504 !isl_has_matching_typed_storage_image_format(&device->info,
1505 view.format)) {
1506 /* In this case, we are a writeable storage buffer which needs to be
1507 * lowered to linear. All tiling and offset calculations will be done in
1508 * the shader.
1509 */
1510 assert(aux_usage == ISL_AUX_USAGE_NONE);
1511 isl_buffer_fill_state(&device->isl_dev, state_inout->state.map,
1512 .address = anv_address_physical(address),
1513 .size_B = surface->isl.size_B,
1514 .format = ISL_FORMAT_RAW,
1515 .swizzle = ISL_SWIZZLE_IDENTITY,
1516 .stride_B = 1,
1517 .mocs = anv_mocs_for_bo(device, address.bo));
1518 state_inout->address = address,
1519 state_inout->aux_address = ANV_NULL_ADDRESS;
1520 state_inout->clear_address = ANV_NULL_ADDRESS;
1521 } else {
1522 if (view_usage == ISL_SURF_USAGE_STORAGE_BIT &&
1523 !(flags & ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY)) {
1524 /* Typed surface reads support a very limited subset of the shader
1525 * image formats. Translate it into the closest format the hardware
1526 * supports.
1527 */
1528 assert(aux_usage == ISL_AUX_USAGE_NONE);
1529 view.format = isl_lower_storage_image_format(&device->info,
1530 view.format);
1531 }
1532
1533 const struct isl_surf *isl_surf = &surface->isl;
1534
1535 struct isl_surf tmp_surf;
1536 uint32_t offset_B = 0, tile_x_sa = 0, tile_y_sa = 0;
1537 if (isl_format_is_compressed(surface->isl.format) &&
1538 !isl_format_is_compressed(view.format)) {
1539 /* We're creating an uncompressed view of a compressed surface. This
1540 * is allowed but only for a single level/layer.
1541 */
1542 assert(surface->isl.samples == 1);
1543 assert(view.levels == 1);
1544 assert(view.array_len == 1);
1545
1546 isl_surf_get_image_surf(&device->isl_dev, isl_surf,
1547 view.base_level,
1548 surface->isl.dim == ISL_SURF_DIM_3D ?
1549 0 : view.base_array_layer,
1550 surface->isl.dim == ISL_SURF_DIM_3D ?
1551 view.base_array_layer : 0,
1552 &tmp_surf,
1553 &offset_B, &tile_x_sa, &tile_y_sa);
1554
1555 /* The newly created image represents the one subimage we're
1556 * referencing with this view so it only has one array slice and
1557 * miplevel.
1558 */
1559 view.base_array_layer = 0;
1560 view.base_level = 0;
1561
1562 /* We're making an uncompressed view here. The image dimensions need
1563 * to be scaled down by the block size.
1564 */
1565 const struct isl_format_layout *fmtl =
1566 isl_format_get_layout(surface->isl.format);
1567 tmp_surf.logical_level0_px =
1568 isl_surf_get_logical_level0_el(&tmp_surf);
1569 tmp_surf.phys_level0_sa = isl_surf_get_phys_level0_el(&tmp_surf);
1570 tmp_surf.format = view.format;
1571 tile_x_sa /= fmtl->bw;
1572 tile_y_sa /= fmtl->bh;
1573
1574 isl_surf = &tmp_surf;
1575
1576 if (device->info.gen <= 8) {
1577 assert(surface->isl.tiling == ISL_TILING_LINEAR);
1578 assert(tile_x_sa == 0);
1579 assert(tile_y_sa == 0);
1580 }
1581 }
1582
1583 state_inout->address = anv_address_add(address, offset_B);
1584
1585 struct anv_address aux_address = ANV_NULL_ADDRESS;
1586 if (aux_usage != ISL_AUX_USAGE_NONE) {
1587 aux_address = anv_address_add(image->planes[plane].address,
1588 aux_surface->offset);
1589 }
1590 state_inout->aux_address = aux_address;
1591
1592 struct anv_address clear_address = ANV_NULL_ADDRESS;
1593 if (device->info.gen >= 10 && aux_usage != ISL_AUX_USAGE_NONE) {
1594 if (aux_usage == ISL_AUX_USAGE_HIZ) {
1595 clear_address = (struct anv_address) {
1596 .bo = device->hiz_clear_bo,
1597 .offset = 0,
1598 };
1599 } else {
1600 clear_address = anv_image_get_clear_color_addr(device, image, aspect);
1601 }
1602 }
1603 state_inout->clear_address = clear_address;
1604
1605 isl_surf_fill_state(&device->isl_dev, state_inout->state.map,
1606 .surf = isl_surf,
1607 .view = &view,
1608 .address = anv_address_physical(state_inout->address),
1609 .clear_color = *clear_color,
1610 .aux_surf = &aux_surface->isl,
1611 .aux_usage = aux_usage,
1612 .aux_address = anv_address_physical(aux_address),
1613 .clear_address = anv_address_physical(clear_address),
1614 .use_clear_address = !anv_address_is_null(clear_address),
1615 .mocs = anv_mocs_for_bo(device,
1616 state_inout->address.bo),
1617 .x_offset_sa = tile_x_sa,
1618 .y_offset_sa = tile_y_sa);
1619
1620 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1621 * are used to store other information. This should be ok, however,
1622 * because the surface buffer addresses are always 4K page aligned.
1623 */
1624 uint32_t *aux_addr_dw = state_inout->state.map +
1625 device->isl_dev.ss.aux_addr_offset;
1626 assert((aux_address.offset & 0xfff) == 0);
1627 state_inout->aux_address.offset |= *aux_addr_dw & 0xfff;
1628
1629 if (device->info.gen >= 10 && clear_address.bo) {
1630 uint32_t *clear_addr_dw = state_inout->state.map +
1631 device->isl_dev.ss.clear_color_state_offset;
1632 assert((clear_address.offset & 0x3f) == 0);
1633 state_inout->clear_address.offset |= *clear_addr_dw & 0x3f;
1634 }
1635 }
1636
1637 if (image_param_out) {
1638 assert(view_usage == ISL_SURF_USAGE_STORAGE_BIT);
1639 isl_surf_fill_image_param(&device->isl_dev, image_param_out,
1640 &surface->isl, &view);
1641 }
1642 }
1643
1644 static VkImageAspectFlags
1645 remap_aspect_flags(VkImageAspectFlags view_aspects)
1646 {
1647 if (view_aspects & VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV) {
1648 if (util_bitcount(view_aspects) == 1)
1649 return VK_IMAGE_ASPECT_COLOR_BIT;
1650
1651 VkImageAspectFlags color_aspects = 0;
1652 for (uint32_t i = 0; i < util_bitcount(view_aspects); i++)
1653 color_aspects |= VK_IMAGE_ASPECT_PLANE_0_BIT << i;
1654 return color_aspects;
1655 }
1656 /* No special remapping needed for depth & stencil aspects. */
1657 return view_aspects;
1658 }
1659
1660 static uint32_t
1661 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask)
1662 {
1663 uint32_t planes = 0;
1664
1665 if (aspect_mask & (VK_IMAGE_ASPECT_COLOR_BIT |
1666 VK_IMAGE_ASPECT_DEPTH_BIT |
1667 VK_IMAGE_ASPECT_STENCIL_BIT |
1668 VK_IMAGE_ASPECT_PLANE_0_BIT))
1669 planes++;
1670 if (aspect_mask & VK_IMAGE_ASPECT_PLANE_1_BIT)
1671 planes++;
1672 if (aspect_mask & VK_IMAGE_ASPECT_PLANE_2_BIT)
1673 planes++;
1674
1675 if ((aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT) != 0 &&
1676 (aspect_mask & VK_IMAGE_ASPECT_STENCIL_BIT) != 0)
1677 planes++;
1678
1679 return planes;
1680 }
1681
1682 VkResult
1683 anv_CreateImageView(VkDevice _device,
1684 const VkImageViewCreateInfo *pCreateInfo,
1685 const VkAllocationCallbacks *pAllocator,
1686 VkImageView *pView)
1687 {
1688 ANV_FROM_HANDLE(anv_device, device, _device);
1689 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
1690 struct anv_image_view *iview;
1691
1692 iview = vk_zalloc2(&device->alloc, pAllocator, sizeof(*iview), 8,
1693 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1694 if (iview == NULL)
1695 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1696
1697 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
1698
1699 assert(range->layerCount > 0);
1700 assert(range->baseMipLevel < image->levels);
1701
1702 /* Check if a conversion info was passed. */
1703 const struct anv_format *conv_format = NULL;
1704 const VkSamplerYcbcrConversionInfo *conv_info =
1705 vk_find_struct_const(pCreateInfo->pNext, SAMPLER_YCBCR_CONVERSION_INFO);
1706
1707 /* If image has an external format, the pNext chain must contain an instance of
1708 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1709 * external format as image."
1710 */
1711 assert(!image->external_format || conv_info);
1712
1713 if (conv_info) {
1714 ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion, conv_info->conversion);
1715 conv_format = conversion->format;
1716 }
1717
1718 VkImageUsageFlags image_usage = 0;
1719 if (range->aspectMask & ~VK_IMAGE_ASPECT_STENCIL_BIT)
1720 image_usage |= image->usage;
1721 if (range->aspectMask & VK_IMAGE_ASPECT_STENCIL_BIT)
1722 image_usage |= image->stencil_usage;
1723
1724 const VkImageViewUsageCreateInfo *usage_info =
1725 vk_find_struct_const(pCreateInfo, IMAGE_VIEW_USAGE_CREATE_INFO);
1726 VkImageUsageFlags view_usage = usage_info ? usage_info->usage : image_usage;
1727
1728 /* View usage should be a subset of image usage */
1729 assert((view_usage & ~image_usage) == 0);
1730 assert(view_usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
1731 VK_IMAGE_USAGE_STORAGE_BIT |
1732 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
1733 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
1734 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
1735
1736 switch (image->type) {
1737 default:
1738 unreachable("bad VkImageType");
1739 case VK_IMAGE_TYPE_1D:
1740 case VK_IMAGE_TYPE_2D:
1741 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
1742 break;
1743 case VK_IMAGE_TYPE_3D:
1744 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
1745 <= anv_minify(image->extent.depth, range->baseMipLevel));
1746 break;
1747 }
1748
1749 /* First expand aspects to the image's ones (for example
1750 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1751 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1752 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1753 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1754 */
1755 VkImageAspectFlags expanded_aspects =
1756 anv_image_expand_aspects(image, range->aspectMask);
1757
1758 iview->image = image;
1759
1760 /* Remap the expanded aspects for the image view. For example if only
1761 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1762 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1763 * the image view, it only has a single plane.
1764 */
1765 iview->aspect_mask = remap_aspect_flags(expanded_aspects);
1766 iview->n_planes = anv_image_aspect_get_planes(iview->aspect_mask);
1767 iview->vk_format = pCreateInfo->format;
1768
1769 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1770 assert(!image->external_format || pCreateInfo->format == VK_FORMAT_UNDEFINED);
1771
1772 /* Format is undefined, this can happen when using external formats. Set
1773 * view format from the passed conversion info.
1774 */
1775 if (iview->vk_format == VK_FORMAT_UNDEFINED && conv_format)
1776 iview->vk_format = conv_format->vk_format;
1777
1778 iview->extent = (VkExtent3D) {
1779 .width = anv_minify(image->extent.width , range->baseMipLevel),
1780 .height = anv_minify(image->extent.height, range->baseMipLevel),
1781 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
1782 };
1783
1784 /* Now go through the underlying image selected planes (computed in
1785 * expanded_aspects) and map them to planes in the image view.
1786 */
1787 uint32_t iaspect_bit, vplane = 0;
1788 anv_foreach_image_aspect_bit(iaspect_bit, image, expanded_aspects) {
1789 uint32_t iplane =
1790 anv_image_aspect_to_plane(image->aspects, 1UL << iaspect_bit);
1791 VkImageAspectFlags vplane_aspect =
1792 anv_plane_to_aspect(iview->aspect_mask, vplane);
1793 struct anv_format_plane format =
1794 anv_get_format_plane(&device->info, iview->vk_format,
1795 vplane_aspect, image->tiling);
1796
1797 iview->planes[vplane].image_plane = iplane;
1798
1799 iview->planes[vplane].isl = (struct isl_view) {
1800 .format = format.isl_format,
1801 .base_level = range->baseMipLevel,
1802 .levels = anv_get_levelCount(image, range),
1803 .base_array_layer = range->baseArrayLayer,
1804 .array_len = anv_get_layerCount(image, range),
1805 .swizzle = {
1806 .r = remap_swizzle(pCreateInfo->components.r,
1807 VK_COMPONENT_SWIZZLE_R, format.swizzle),
1808 .g = remap_swizzle(pCreateInfo->components.g,
1809 VK_COMPONENT_SWIZZLE_G, format.swizzle),
1810 .b = remap_swizzle(pCreateInfo->components.b,
1811 VK_COMPONENT_SWIZZLE_B, format.swizzle),
1812 .a = remap_swizzle(pCreateInfo->components.a,
1813 VK_COMPONENT_SWIZZLE_A, format.swizzle),
1814 },
1815 };
1816
1817 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
1818 iview->planes[vplane].isl.base_array_layer = 0;
1819 iview->planes[vplane].isl.array_len = iview->extent.depth;
1820 }
1821
1822 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
1823 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
1824 iview->planes[vplane].isl.usage = ISL_SURF_USAGE_CUBE_BIT;
1825 } else {
1826 iview->planes[vplane].isl.usage = 0;
1827 }
1828
1829 if (view_usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
1830 (view_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
1831 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
1832 iview->planes[vplane].optimal_sampler_surface_state.state = alloc_surface_state(device);
1833 iview->planes[vplane].general_sampler_surface_state.state = alloc_surface_state(device);
1834
1835 enum isl_aux_usage general_aux_usage =
1836 anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
1837 VK_IMAGE_USAGE_SAMPLED_BIT,
1838 VK_IMAGE_LAYOUT_GENERAL);
1839 enum isl_aux_usage optimal_aux_usage =
1840 anv_layout_to_aux_usage(&device->info, image, 1UL << iaspect_bit,
1841 VK_IMAGE_USAGE_SAMPLED_BIT,
1842 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
1843
1844 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
1845 &iview->planes[vplane].isl,
1846 ISL_SURF_USAGE_TEXTURE_BIT,
1847 optimal_aux_usage, NULL,
1848 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL,
1849 &iview->planes[vplane].optimal_sampler_surface_state,
1850 NULL);
1851
1852 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
1853 &iview->planes[vplane].isl,
1854 ISL_SURF_USAGE_TEXTURE_BIT,
1855 general_aux_usage, NULL,
1856 0,
1857 &iview->planes[vplane].general_sampler_surface_state,
1858 NULL);
1859 }
1860
1861 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1862 if (view_usage & VK_IMAGE_USAGE_STORAGE_BIT) {
1863 iview->planes[vplane].storage_surface_state.state = alloc_surface_state(device);
1864 iview->planes[vplane].writeonly_storage_surface_state.state = alloc_surface_state(device);
1865
1866 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
1867 &iview->planes[vplane].isl,
1868 ISL_SURF_USAGE_STORAGE_BIT,
1869 ISL_AUX_USAGE_NONE, NULL,
1870 0,
1871 &iview->planes[vplane].storage_surface_state,
1872 &iview->planes[vplane].storage_image_param);
1873
1874 anv_image_fill_surface_state(device, image, 1ULL << iaspect_bit,
1875 &iview->planes[vplane].isl,
1876 ISL_SURF_USAGE_STORAGE_BIT,
1877 ISL_AUX_USAGE_NONE, NULL,
1878 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY,
1879 &iview->planes[vplane].writeonly_storage_surface_state,
1880 NULL);
1881 }
1882
1883 vplane++;
1884 }
1885
1886 *pView = anv_image_view_to_handle(iview);
1887
1888 return VK_SUCCESS;
1889 }
1890
1891 void
1892 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
1893 const VkAllocationCallbacks *pAllocator)
1894 {
1895 ANV_FROM_HANDLE(anv_device, device, _device);
1896 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
1897
1898 if (!iview)
1899 return;
1900
1901 for (uint32_t plane = 0; plane < iview->n_planes; plane++) {
1902 if (iview->planes[plane].optimal_sampler_surface_state.state.alloc_size > 0) {
1903 anv_state_pool_free(&device->surface_state_pool,
1904 iview->planes[plane].optimal_sampler_surface_state.state);
1905 }
1906
1907 if (iview->planes[plane].general_sampler_surface_state.state.alloc_size > 0) {
1908 anv_state_pool_free(&device->surface_state_pool,
1909 iview->planes[plane].general_sampler_surface_state.state);
1910 }
1911
1912 if (iview->planes[plane].storage_surface_state.state.alloc_size > 0) {
1913 anv_state_pool_free(&device->surface_state_pool,
1914 iview->planes[plane].storage_surface_state.state);
1915 }
1916
1917 if (iview->planes[plane].writeonly_storage_surface_state.state.alloc_size > 0) {
1918 anv_state_pool_free(&device->surface_state_pool,
1919 iview->planes[plane].writeonly_storage_surface_state.state);
1920 }
1921 }
1922
1923 vk_free2(&device->alloc, pAllocator, iview);
1924 }
1925
1926
1927 VkResult
1928 anv_CreateBufferView(VkDevice _device,
1929 const VkBufferViewCreateInfo *pCreateInfo,
1930 const VkAllocationCallbacks *pAllocator,
1931 VkBufferView *pView)
1932 {
1933 ANV_FROM_HANDLE(anv_device, device, _device);
1934 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
1935 struct anv_buffer_view *view;
1936
1937 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
1938 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
1939 if (!view)
1940 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
1941
1942 /* TODO: Handle the format swizzle? */
1943
1944 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
1945 VK_IMAGE_ASPECT_COLOR_BIT,
1946 VK_IMAGE_TILING_LINEAR);
1947 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
1948 view->range = anv_buffer_get_range(buffer, pCreateInfo->offset,
1949 pCreateInfo->range);
1950 view->range = align_down_npot_u32(view->range, format_bs);
1951
1952 view->address = anv_address_add(buffer->address, pCreateInfo->offset);
1953
1954 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
1955 view->surface_state = alloc_surface_state(device);
1956
1957 anv_fill_buffer_surface_state(device, view->surface_state,
1958 view->format,
1959 view->address, view->range, format_bs);
1960 } else {
1961 view->surface_state = (struct anv_state){ 0 };
1962 }
1963
1964 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
1965 view->storage_surface_state = alloc_surface_state(device);
1966 view->writeonly_storage_surface_state = alloc_surface_state(device);
1967
1968 enum isl_format storage_format =
1969 isl_has_matching_typed_storage_image_format(&device->info,
1970 view->format) ?
1971 isl_lower_storage_image_format(&device->info, view->format) :
1972 ISL_FORMAT_RAW;
1973
1974 anv_fill_buffer_surface_state(device, view->storage_surface_state,
1975 storage_format,
1976 view->address, view->range,
1977 (storage_format == ISL_FORMAT_RAW ? 1 :
1978 isl_format_get_layout(storage_format)->bpb / 8));
1979
1980 /* Write-only accesses should use the original format. */
1981 anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
1982 view->format,
1983 view->address, view->range,
1984 isl_format_get_layout(view->format)->bpb / 8);
1985
1986 isl_buffer_fill_image_param(&device->isl_dev,
1987 &view->storage_image_param,
1988 view->format, view->range);
1989 } else {
1990 view->storage_surface_state = (struct anv_state){ 0 };
1991 view->writeonly_storage_surface_state = (struct anv_state){ 0 };
1992 }
1993
1994 *pView = anv_buffer_view_to_handle(view);
1995
1996 return VK_SUCCESS;
1997 }
1998
1999 void
2000 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
2001 const VkAllocationCallbacks *pAllocator)
2002 {
2003 ANV_FROM_HANDLE(anv_device, device, _device);
2004 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
2005
2006 if (!view)
2007 return;
2008
2009 if (view->surface_state.alloc_size > 0)
2010 anv_state_pool_free(&device->surface_state_pool,
2011 view->surface_state);
2012
2013 if (view->storage_surface_state.alloc_size > 0)
2014 anv_state_pool_free(&device->surface_state_pool,
2015 view->storage_surface_state);
2016
2017 if (view->writeonly_storage_surface_state.alloc_size > 0)
2018 anv_state_pool_free(&device->surface_state_pool,
2019 view->writeonly_storage_surface_state);
2020
2021 vk_free2(&device->alloc, pAllocator, view);
2022 }