2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm-uapi/drm_fourcc.h"
32 #include "anv_private.h"
33 #include "util/debug.h"
35 #include "util/u_math.h"
37 #include "vk_format_info.h"
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
41 VkImageUsageFlags vk_usage
,
42 isl_surf_usage_flags_t isl_extra_usage
,
43 VkImageAspectFlagBits aspect
)
45 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
47 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
53 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
56 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
57 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
64 case VK_IMAGE_ASPECT_DEPTH_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
67 case VK_IMAGE_ASPECT_STENCIL_BIT
:
68 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
70 case VK_IMAGE_ASPECT_COLOR_BIT
:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
76 unreachable("bad VkImageAspect");
79 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
84 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
85 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct anv_image_create_info
*anv_info
,
97 const struct isl_drm_modifier_info
*isl_mod_info
,
100 const VkImageCreateInfo
*base_info
= anv_info
->vk_info
;
101 isl_tiling_flags_t flags
= 0;
103 switch (base_info
->tiling
) {
105 unreachable("bad VkImageTiling");
106 case VK_IMAGE_TILING_OPTIMAL
:
107 flags
= ISL_TILING_ANY_MASK
;
109 case VK_IMAGE_TILING_LINEAR
:
110 flags
= ISL_TILING_LINEAR_BIT
;
112 case VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
:
113 assert(isl_mod_info
);
114 flags
= 1 << isl_mod_info
->tiling
;
117 if (anv_info
->isl_tiling_flags
)
118 flags
&= anv_info
->isl_tiling_flags
;
121 flags
&= ISL_TILING_LINEAR_BIT
| ISL_TILING_X_BIT
;
129 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
131 assert(surf
->isl
.size_B
> 0); /* isl surface must be initialized */
133 if (image
->disjoint
) {
134 surf
->offset
= align_u32(image
->planes
[plane
].size
,
135 surf
->isl
.alignment_B
);
136 /* Plane offset is always 0 when it's disjoint. */
138 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment_B
);
139 /* Determine plane's offset only once when the first surface is added. */
140 if (image
->planes
[plane
].size
== 0)
141 image
->planes
[plane
].offset
= image
->size
;
144 image
->size
= surf
->offset
+ surf
->isl
.size_B
;
145 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size_B
) - image
->planes
[plane
].offset
;
147 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment_B
);
148 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
149 surf
->isl
.alignment_B
);
154 anv_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
155 VkImageCreateFlags create_flags
,
157 VkImageTiling vk_tiling
,
158 const VkImageFormatListCreateInfoKHR
*fmt_list
)
160 enum isl_format format
=
161 anv_get_isl_format(devinfo
, vk_format
,
162 VK_IMAGE_ASPECT_COLOR_BIT
, vk_tiling
);
164 if (!isl_format_supports_ccs_e(devinfo
, format
))
167 if (!(create_flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
170 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
173 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
174 enum isl_format view_format
=
175 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
176 VK_IMAGE_ASPECT_COLOR_BIT
, vk_tiling
);
178 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
186 * For color images that have an auxiliary surface, request allocation for an
187 * additional buffer that mainly stores fast-clear values. Use of this buffer
188 * allows us to access the image's subresources while being aware of their
189 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
190 * which a fast clear has occurred).
192 * In order to avoid having multiple clear colors for a single plane of an
193 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
194 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
195 * 2018), there were no known applications which would benefit from fast-
196 * clearing more than just the first slice.
198 * The fast clear portion of the image is laid out in the following order:
200 * * 1 or 4 dwords (depending on hardware generation) for the clear color
201 * * 1 dword for the anv_fast_clear_type of the clear color
202 * * On gen9+, 1 dword per level and layer of the image (3D levels count
203 * multiple layers) in level-major order for compression state.
205 * For the purpose of discoverability, the algorithm used to manage
206 * compression and fast-clears is described here:
208 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
209 * all of the values in the fast clear portion of the image are initialized
212 * * On fast-clear, the clear value is written into surface state and also
213 * into the buffer and the fast clear type is set appropriately. Both
214 * setting the fast-clear value in the buffer and setting the fast-clear
215 * type happen from the GPU using MI commands.
217 * * Whenever a render or blorp operation is performed with CCS_E, we call
218 * genX(cmd_buffer_mark_image_written) to set the compression state to
219 * true (which is represented by UINT32_MAX).
221 * * On pipeline barrier transitions, the worst-case transition is computed
222 * from the image layouts. The command streamer inspects the fast clear
223 * type and compression state dwords and constructs a predicate. The
224 * worst-case resolve is performed with the given predicate and the fast
225 * clear and compression state is set accordingly.
227 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
228 * details on exactly what is allowed in what layouts.
230 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
231 * In order to deal with this, we have to do some clear color management.
233 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
234 * value from the buffer into the surface state with MI commands.
236 * * For any blorp operations, we pass the address to the clear value into
237 * blorp and it knows to copy the clear color.
240 add_aux_state_tracking_buffer(struct anv_image
*image
,
242 const struct anv_device
*device
)
244 assert(image
&& device
);
245 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
&&
246 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
248 /* Compressed images must be tiled and therefore everything should be 4K
249 * aligned. The CCS has the same alignment requirements. This is good
250 * because we need at least dword-alignment for MI_LOAD/STORE operations.
252 assert(image
->alignment
% 4 == 0);
253 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
255 /* This buffer should be at the very end of the plane. */
256 if (image
->disjoint
) {
257 assert(image
->planes
[plane
].size
==
258 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
260 assert(image
->size
==
261 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
264 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
265 device
->isl_dev
.ss
.clear_color_state_size
:
266 device
->isl_dev
.ss
.clear_value_size
;
268 /* Clear color and fast clear type */
269 unsigned state_size
= clear_color_state_size
+ 4;
271 /* We only need to track compression on CCS_E surfaces. */
272 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
273 if (image
->type
== VK_IMAGE_TYPE_3D
) {
274 for (uint32_t l
= 0; l
< image
->levels
; l
++)
275 state_size
+= anv_minify(image
->extent
.depth
, l
) * 4;
277 state_size
+= image
->levels
* image
->array_size
* 4;
281 /* Add some padding to make sure the fast clear color state buffer starts at
282 * a 4K alignment. We believe that 256B might be enough, but due to lack of
283 * testing we will leave this as 4K for now.
285 image
->planes
[plane
].size
= ALIGN(image
->planes
[plane
].size
, 4096);
286 image
->size
= ALIGN(image
->size
, 4096);
288 assert(image
->planes
[plane
].offset
% 4096 == 0);
290 image
->planes
[plane
].fast_clear_state_offset
=
291 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
293 image
->planes
[plane
].size
+= state_size
;
294 image
->size
+= state_size
;
298 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
299 * image's memory requirements (that is, the image's size and alignment).
302 make_surface(struct anv_device
*device
,
303 struct anv_image
*image
,
304 const VkImageFormatListCreateInfoKHR
*fmt_list
,
306 isl_tiling_flags_t tiling_flags
,
307 isl_surf_usage_flags_t isl_extra_usage_flags
,
308 VkImageAspectFlagBits aspect
)
312 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
313 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
314 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
315 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
318 image
->extent
= anv_sanitize_image_extent(image
->type
, image
->extent
);
320 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
321 const struct anv_format_plane plane_format
=
322 anv_get_format_plane(&device
->info
, image
->vk_format
, aspect
, image
->tiling
);
323 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
325 const isl_surf_usage_flags_t usage
=
326 choose_isl_surf_usage(image
->create_flags
, image
->usage
,
327 isl_extra_usage_flags
, aspect
);
329 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
330 * fall back to linear on Broadwell and earlier because we aren't
331 * guaranteed that we can handle offsets correctly. On Sky Lake, the
332 * horizontal and vertical alignments are sufficiently high that we can
333 * just use RENDER_SURFACE_STATE::X/Y Offset.
335 bool needs_shadow
= false;
336 isl_surf_usage_flags_t shadow_usage
= 0;
337 if (device
->info
.gen
<= 8 &&
338 (image
->create_flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
) &&
339 image
->tiling
== VK_IMAGE_TILING_OPTIMAL
) {
340 assert(isl_format_is_compressed(plane_format
.isl_format
));
341 tiling_flags
= ISL_TILING_LINEAR_BIT
;
343 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
344 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
347 if (device
->info
.gen
<= 7 &&
348 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
349 (image
->stencil_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)) {
351 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
352 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
355 ok
= isl_surf_init(&device
->isl_dev
, &anv_surf
->isl
,
356 .dim
= vk_to_isl_surf_dim
[image
->type
],
357 .format
= plane_format
.isl_format
,
358 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
359 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
360 .depth
= image
->extent
.depth
,
361 .levels
= image
->levels
,
362 .array_len
= image
->array_size
,
363 .samples
= image
->samples
,
364 .min_alignment_B
= 0,
365 .row_pitch_B
= stride
,
367 .tiling_flags
= tiling_flags
);
370 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
372 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
374 add_surface(image
, anv_surf
, plane
);
376 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
377 * create an identical tiled shadow surface for use while texturing so we
378 * don't get garbage performance. If we're on gen7 and the image contains
379 * stencil, then we need to maintain a shadow because we can't texture from
383 ok
= isl_surf_init(&device
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
384 .dim
= vk_to_isl_surf_dim
[image
->type
],
385 .format
= plane_format
.isl_format
,
386 .width
= image
->extent
.width
,
387 .height
= image
->extent
.height
,
388 .depth
= image
->extent
.depth
,
389 .levels
= image
->levels
,
390 .array_len
= image
->array_size
,
391 .samples
= image
->samples
,
392 .min_alignment_B
= 0,
393 .row_pitch_B
= stride
,
394 .usage
= shadow_usage
,
395 .tiling_flags
= ISL_TILING_ANY_MASK
);
397 /* isl_surf_init() will fail only if provided invalid input. Invalid input
398 * is illegal in Vulkan.
402 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
405 /* Add aux surface. */
406 if ((isl_extra_usage_flags
& ISL_SURF_USAGE_DISABLE_AUX_BIT
)) {
407 /* Nevermind. No aux surface. */
408 } else if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
409 /* We don't advertise that depth buffers could be used as storage
412 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
414 /* Allow the user to control HiZ enabling. Disable by default on gen7
415 * because resolves are not currently implemented pre-BDW.
417 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
418 /* It will never be used as an attachment, HiZ is pointless. */
419 } else if (device
->info
.gen
== 7) {
420 anv_perf_warn(device
, image
, "Implement gen7 HiZ");
421 } else if (image
->levels
> 1) {
422 anv_perf_warn(device
, image
, "Enable multi-LOD HiZ");
423 } else if (image
->array_size
> 1) {
424 anv_perf_warn(device
, image
,
425 "Implement multi-arrayLayer HiZ clears and resolves");
426 } else if (device
->info
.gen
== 8 && image
->samples
> 1) {
427 anv_perf_warn(device
, image
, "Enable gen8 multisampled HiZ");
428 } else if (!unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
)) {
429 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
430 ok
= isl_surf_get_hiz_surf(&device
->isl_dev
,
431 &image
->planes
[plane
].surface
.isl
,
432 &image
->planes
[plane
].aux_surface
.isl
);
434 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
435 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
437 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
== 1) {
438 /* TODO: Disallow compression with :
440 * 1) non multiplanar images (We appear to hit a sampler bug with
441 * CCS & R16G16 format. Putting the clear state a page/4096bytes
442 * further fixes the issue).
444 * 2) alias images, because they might be aliases of images
447 * 3) compression disabled by debug
449 const bool allow_compression
=
450 image
->n_planes
== 1 &&
451 (image
->create_flags
& VK_IMAGE_CREATE_ALIAS_BIT
) == 0 &&
452 likely((INTEL_DEBUG
& DEBUG_NO_RBC
) == 0);
454 if (allow_compression
) {
455 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
456 ok
= isl_surf_get_ccs_surf(&device
->isl_dev
,
457 &image
->planes
[plane
].surface
.isl
,
458 &image
->planes
[plane
].aux_surface
.isl
,
462 /* Disable CCS when it is not useful (i.e., when you can't render
463 * to the image with CCS enabled).
465 if (!isl_format_supports_rendering(&device
->info
,
466 plane_format
.isl_format
)) {
467 /* While it may be technically possible to enable CCS for this
468 * image, we currently don't have things hooked up to get it
471 anv_perf_warn(device
, image
,
472 "This image format doesn't support rendering. "
473 "Not allocating an CCS buffer.");
474 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
478 /* For images created without MUTABLE_FORMAT_BIT set, we know that
479 * they will always be used with the original format. In
480 * particular, they will always be used with a format that
481 * supports color compression. If it's never used as a storage
482 * image, then it will only be used through the sampler or the as
483 * a render target. This means that it's safe to just leave
484 * compression on at all times for these formats.
486 if (!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
487 anv_formats_ccs_e_compatible(&device
->info
,
492 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
493 } else if (device
->info
.gen
>= 12) {
494 anv_perf_warn(device
, image
,
495 "The CCS_D aux mode is not yet handled on "
496 "Gen12+. Not allocating a CCS buffer.");
497 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
500 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_D
;
503 if (!device
->physical
->has_implicit_ccs
)
504 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
506 add_aux_state_tracking_buffer(image
, plane
, device
);
509 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
> 1) {
510 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
511 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
512 ok
= isl_surf_get_mcs_surf(&device
->isl_dev
,
513 &image
->planes
[plane
].surface
.isl
,
514 &image
->planes
[plane
].aux_surface
.isl
);
516 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
517 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
518 add_aux_state_tracking_buffer(image
, plane
, device
);
522 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
524 /* Upper bound of the last surface should be smaller than the plane's
527 assert((MAX2(image
->planes
[plane
].surface
.offset
,
528 image
->planes
[plane
].aux_surface
.offset
) +
529 (image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
530 image
->planes
[plane
].aux_surface
.isl
.size_B
:
531 image
->planes
[plane
].surface
.isl
.size_B
)) <=
532 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
534 if (image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
) {
535 /* assert(image->planes[plane].fast_clear_state_offset == */
536 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
537 assert(image
->planes
[plane
].fast_clear_state_offset
<
538 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
545 score_drm_format_mod(uint64_t modifier
)
548 case DRM_FORMAT_MOD_LINEAR
: return 1;
549 case I915_FORMAT_MOD_X_TILED
: return 2;
550 case I915_FORMAT_MOD_Y_TILED
: return 3;
551 case I915_FORMAT_MOD_Y_TILED_CCS
: return 4;
552 default: unreachable("bad DRM format modifier");
556 static const struct isl_drm_modifier_info
*
557 choose_drm_format_mod(const struct anv_physical_device
*device
,
558 uint32_t modifier_count
, const uint64_t *modifiers
)
560 uint64_t best_mod
= UINT64_MAX
;
561 uint32_t best_score
= 0;
563 for (uint32_t i
= 0; i
< modifier_count
; ++i
) {
564 uint32_t score
= score_drm_format_mod(modifiers
[i
]);
565 if (score
> best_score
) {
566 best_mod
= modifiers
[i
];
572 return isl_drm_modifier_get_info(best_mod
);
578 anv_image_create(VkDevice _device
,
579 const struct anv_image_create_info
*create_info
,
580 const VkAllocationCallbacks
* alloc
,
583 ANV_FROM_HANDLE(anv_device
, device
, _device
);
584 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
585 const struct isl_drm_modifier_info
*isl_mod_info
= NULL
;
586 struct anv_image
*image
= NULL
;
589 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
591 const struct wsi_image_create_info
*wsi_info
=
592 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
594 if (pCreateInfo
->tiling
== VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
) {
595 const VkImageDrmFormatModifierListCreateInfoEXT
*mod_info
=
596 vk_find_struct_const(pCreateInfo
->pNext
,
597 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT
);
598 isl_mod_info
= choose_drm_format_mod(device
->physical
,
599 mod_info
->drmFormatModifierCount
,
600 mod_info
->pDrmFormatModifiers
);
601 assert(isl_mod_info
);
604 anv_assert(pCreateInfo
->mipLevels
> 0);
605 anv_assert(pCreateInfo
->arrayLayers
> 0);
606 anv_assert(pCreateInfo
->samples
> 0);
607 anv_assert(pCreateInfo
->extent
.width
> 0);
608 anv_assert(pCreateInfo
->extent
.height
> 0);
609 anv_assert(pCreateInfo
->extent
.depth
> 0);
611 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
612 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
614 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
616 image
->type
= pCreateInfo
->imageType
;
617 image
->extent
= pCreateInfo
->extent
;
618 image
->vk_format
= pCreateInfo
->format
;
619 image
->format
= anv_get_format(pCreateInfo
->format
);
620 image
->aspects
= vk_format_aspects(image
->vk_format
);
621 image
->levels
= pCreateInfo
->mipLevels
;
622 image
->array_size
= pCreateInfo
->arrayLayers
;
623 image
->samples
= pCreateInfo
->samples
;
624 image
->usage
= pCreateInfo
->usage
;
625 image
->create_flags
= pCreateInfo
->flags
;
626 image
->tiling
= pCreateInfo
->tiling
;
627 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT
;
628 image
->needs_set_tiling
= wsi_info
&& wsi_info
->scanout
;
629 image
->drm_format_mod
= isl_mod_info
? isl_mod_info
->modifier
:
630 DRM_FORMAT_MOD_INVALID
;
632 if (image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
) {
633 image
->stencil_usage
= pCreateInfo
->usage
;
634 const VkImageStencilUsageCreateInfoEXT
*stencil_usage_info
=
635 vk_find_struct_const(pCreateInfo
->pNext
,
636 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT
);
637 if (stencil_usage_info
)
638 image
->stencil_usage
= stencil_usage_info
->stencilUsage
;
641 /* In case of external format, We don't know format yet,
642 * so skip the rest for now.
644 if (create_info
->external_format
) {
645 image
->external_format
= true;
646 *pImage
= anv_image_to_handle(image
);
650 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
651 assert(format
!= NULL
);
653 const isl_tiling_flags_t isl_tiling_flags
=
654 choose_isl_tiling_flags(create_info
, isl_mod_info
,
655 image
->needs_set_tiling
);
657 image
->n_planes
= format
->n_planes
;
659 const VkImageFormatListCreateInfoKHR
*fmt_list
=
660 vk_find_struct_const(pCreateInfo
->pNext
,
661 IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
664 for_each_bit(b
, image
->aspects
) {
665 r
= make_surface(device
, image
, fmt_list
, create_info
->stride
,
666 isl_tiling_flags
, create_info
->isl_extra_usage_flags
,
672 *pImage
= anv_image_to_handle(image
);
678 vk_free2(&device
->alloc
, alloc
, image
);
683 static struct anv_image
*
684 anv_swapchain_get_image(VkSwapchainKHR swapchain
,
687 uint32_t n_images
= index
+ 1;
688 VkImage
*images
= malloc(sizeof(*images
) * n_images
);
689 VkResult result
= wsi_common_get_images(swapchain
, &n_images
, images
);
691 if (result
!= VK_SUCCESS
&& result
!= VK_INCOMPLETE
) {
696 ANV_FROM_HANDLE(anv_image
, image
, images
[index
]);
703 anv_image_from_swapchain(VkDevice device
,
704 const VkImageCreateInfo
*pCreateInfo
,
705 const VkImageSwapchainCreateInfoKHR
*swapchain_info
,
706 const VkAllocationCallbacks
*pAllocator
,
709 struct anv_image
*swapchain_image
= anv_swapchain_get_image(swapchain_info
->swapchain
, 0);
710 assert(swapchain_image
);
712 assert(swapchain_image
->type
== pCreateInfo
->imageType
);
713 assert(swapchain_image
->vk_format
== pCreateInfo
->format
);
714 assert(swapchain_image
->extent
.width
== pCreateInfo
->extent
.width
);
715 assert(swapchain_image
->extent
.height
== pCreateInfo
->extent
.height
);
716 assert(swapchain_image
->extent
.depth
== pCreateInfo
->extent
.depth
);
717 assert(swapchain_image
->array_size
== pCreateInfo
->arrayLayers
);
718 /* Color attachment is added by the wsi code. */
719 assert(swapchain_image
->usage
== (pCreateInfo
->usage
| VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
));
721 VkImageCreateInfo local_create_info
;
722 local_create_info
= *pCreateInfo
;
723 local_create_info
.pNext
= NULL
;
724 /* The following parameters are implictly selected by the wsi code. */
725 local_create_info
.tiling
= VK_IMAGE_TILING_OPTIMAL
;
726 local_create_info
.samples
= VK_SAMPLE_COUNT_1_BIT
;
727 local_create_info
.usage
|= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
729 /* If the image has a particular modifier, specify that modifier. */
730 VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info
= {
731 .sType
= VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT
,
732 .drmFormatModifierCount
= 1,
733 .pDrmFormatModifiers
= &swapchain_image
->drm_format_mod
,
735 if (swapchain_image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
)
736 __vk_append_struct(&local_create_info
, &local_modifier_info
);
738 return anv_image_create(device
,
739 &(struct anv_image_create_info
) {
740 .vk_info
= &local_create_info
,
741 .external_format
= swapchain_image
->external_format
,
748 anv_CreateImage(VkDevice device
,
749 const VkImageCreateInfo
*pCreateInfo
,
750 const VkAllocationCallbacks
*pAllocator
,
753 const VkExternalMemoryImageCreateInfo
*create_info
=
754 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_MEMORY_IMAGE_CREATE_INFO
);
756 if (create_info
&& (create_info
->handleTypes
&
757 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID
))
758 return anv_image_from_external(device
, pCreateInfo
, create_info
,
761 bool use_external_format
= false;
762 const VkExternalFormatANDROID
*ext_format
=
763 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_FORMAT_ANDROID
);
765 /* "If externalFormat is zero, the effect is as if the
766 * VkExternalFormatANDROID structure was not present. Otherwise, the image
767 * will have the specified external format."
769 if (ext_format
&& ext_format
->externalFormat
!= 0)
770 use_external_format
= true;
772 const VkNativeBufferANDROID
*gralloc_info
=
773 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
775 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
778 const VkImageSwapchainCreateInfoKHR
*swapchain_info
=
779 vk_find_struct_const(pCreateInfo
->pNext
, IMAGE_SWAPCHAIN_CREATE_INFO_KHR
);
780 if (swapchain_info
&& swapchain_info
->swapchain
!= VK_NULL_HANDLE
)
781 return anv_image_from_swapchain(device
, pCreateInfo
, swapchain_info
,
784 return anv_image_create(device
,
785 &(struct anv_image_create_info
) {
786 .vk_info
= pCreateInfo
,
787 .external_format
= use_external_format
,
794 anv_DestroyImage(VkDevice _device
, VkImage _image
,
795 const VkAllocationCallbacks
*pAllocator
)
797 ANV_FROM_HANDLE(anv_device
, device
, _device
);
798 ANV_FROM_HANDLE(anv_image
, image
, _image
);
803 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
804 if (image
->planes
[p
].bo_is_owned
) {
805 assert(image
->planes
[p
].address
.bo
!= NULL
);
806 anv_device_release_bo(device
, image
->planes
[p
].address
.bo
);
810 vk_free2(&device
->alloc
, pAllocator
, image
);
813 static void anv_image_bind_memory_plane(struct anv_device
*device
,
814 struct anv_image
*image
,
816 struct anv_device_memory
*memory
,
817 uint32_t memory_offset
)
819 assert(!image
->planes
[plane
].bo_is_owned
);
822 image
->planes
[plane
].address
= ANV_NULL_ADDRESS
;
826 image
->planes
[plane
].address
= (struct anv_address
) {
828 .offset
= memory_offset
,
831 /* If we're on a platform that uses implicit CCS and our buffer does not
832 * have any implicit CCS data, disable compression on that image.
834 if (device
->physical
->has_implicit_ccs
&& !memory
->bo
->has_implicit_ccs
)
835 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
838 /* We are binding AHardwareBuffer. Get a description, resolve the
839 * format and prepare anv_image properly.
842 resolve_ahw_image(struct anv_device
*device
,
843 struct anv_image
*image
,
844 struct anv_device_memory
*mem
)
846 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
848 AHardwareBuffer_Desc desc
;
849 AHardwareBuffer_describe(mem
->ahw
, &desc
);
852 int i915_tiling
= anv_gem_get_tiling(device
, mem
->bo
->gem_handle
);
853 VkImageTiling vk_tiling
;
854 isl_tiling_flags_t isl_tiling_flags
= 0;
856 switch (i915_tiling
) {
857 case I915_TILING_NONE
:
858 vk_tiling
= VK_IMAGE_TILING_LINEAR
;
859 isl_tiling_flags
= ISL_TILING_LINEAR_BIT
;
862 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
863 isl_tiling_flags
= ISL_TILING_X_BIT
;
866 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
867 isl_tiling_flags
= ISL_TILING_Y0_BIT
;
871 unreachable("Invalid tiling flags.");
874 assert(vk_tiling
== VK_IMAGE_TILING_LINEAR
||
875 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
);
878 VkFormat vk_format
= vk_format_from_android(desc
.format
, desc
.usage
);
879 enum isl_format isl_fmt
= anv_get_isl_format(&device
->info
,
881 VK_IMAGE_ASPECT_COLOR_BIT
,
883 assert(isl_fmt
!= ISL_FORMAT_UNSUPPORTED
);
885 /* Handle RGB(X)->RGBA fallback. */
886 switch (desc
.format
) {
887 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM
:
888 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM
:
889 if (isl_format_is_rgb(isl_fmt
))
890 isl_fmt
= isl_format_rgb_to_rgba(isl_fmt
);
894 /* Now we are able to fill anv_image fields properly and create
895 * isl_surface for it.
897 image
->vk_format
= vk_format
;
898 image
->format
= anv_get_format(vk_format
);
899 image
->aspects
= vk_format_aspects(image
->vk_format
);
900 image
->n_planes
= image
->format
->n_planes
;
902 uint32_t stride
= desc
.stride
*
903 (isl_format_get_layout(isl_fmt
)->bpb
/ 8);
906 for_each_bit(b
, image
->aspects
) {
907 VkResult r
= make_surface(device
, image
, NULL
, stride
, isl_tiling_flags
,
908 ISL_SURF_USAGE_DISABLE_AUX_BIT
, (1 << b
));
909 assert(r
== VK_SUCCESS
);
914 VkResult
anv_BindImageMemory(
917 VkDeviceMemory _memory
,
918 VkDeviceSize memoryOffset
)
920 ANV_FROM_HANDLE(anv_device
, device
, _device
);
921 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
922 ANV_FROM_HANDLE(anv_image
, image
, _image
);
925 resolve_ahw_image(device
, image
, mem
);
928 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
930 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
931 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
937 VkResult
anv_BindImageMemory2(
939 uint32_t bindInfoCount
,
940 const VkBindImageMemoryInfo
* pBindInfos
)
942 ANV_FROM_HANDLE(anv_device
, device
, _device
);
944 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
945 const VkBindImageMemoryInfo
*bind_info
= &pBindInfos
[i
];
946 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
947 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
949 /* Resolve will alter the image's aspects, do this first. */
951 resolve_ahw_image(device
, image
, mem
);
953 VkImageAspectFlags aspects
= image
->aspects
;
954 vk_foreach_struct_const(s
, bind_info
->pNext
) {
956 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO
: {
957 const VkBindImagePlaneMemoryInfo
*plane_info
=
958 (const VkBindImagePlaneMemoryInfo
*) s
;
960 aspects
= plane_info
->planeAspect
;
963 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR
: {
964 const VkBindImageMemorySwapchainInfoKHR
*swapchain_info
=
965 (const VkBindImageMemorySwapchainInfoKHR
*) s
;
966 struct anv_image
*swapchain_image
=
967 anv_swapchain_get_image(swapchain_info
->swapchain
,
968 swapchain_info
->imageIndex
);
969 assert(swapchain_image
);
970 assert(image
->aspects
== swapchain_image
->aspects
);
974 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
976 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
977 struct anv_device_memory mem
= {
978 .bo
= swapchain_image
->planes
[plane
].address
.bo
,
980 anv_image_bind_memory_plane(device
, image
, plane
,
981 &mem
, bind_info
->memoryOffset
);
986 anv_debug_ignored_stype(s
->sType
);
991 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
992 * VK_NULL_HANDLE. In such case, just carry one with the next bind
999 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
1001 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
1002 anv_image_bind_memory_plane(device
, image
, plane
,
1003 mem
, bind_info
->memoryOffset
);
1010 void anv_GetImageSubresourceLayout(
1013 const VkImageSubresource
* subresource
,
1014 VkSubresourceLayout
* layout
)
1016 ANV_FROM_HANDLE(anv_image
, image
, _image
);
1018 const struct anv_surface
*surface
;
1019 if (subresource
->aspectMask
== VK_IMAGE_ASPECT_PLANE_1_BIT
&&
1020 image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
&&
1021 isl_drm_modifier_has_aux(image
->drm_format_mod
)) {
1022 surface
= &image
->planes
[0].aux_surface
;
1024 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
,
1025 subresource
->aspectMask
);
1026 surface
= &image
->planes
[plane
].surface
;
1029 assert(__builtin_popcount(subresource
->aspectMask
) == 1);
1031 layout
->offset
= surface
->offset
;
1032 layout
->rowPitch
= surface
->isl
.row_pitch_B
;
1033 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1034 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1036 if (subresource
->mipLevel
> 0 || subresource
->arrayLayer
> 0) {
1037 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1040 isl_surf_get_image_offset_B_tile_sa(&surface
->isl
,
1041 subresource
->mipLevel
,
1042 subresource
->arrayLayer
,
1043 0 /* logical_z_offset_px */,
1044 &offset_B
, NULL
, NULL
);
1045 layout
->offset
+= offset_B
;
1046 layout
->size
= layout
->rowPitch
* anv_minify(image
->extent
.height
,
1047 subresource
->mipLevel
);
1049 layout
->size
= surface
->isl
.size_B
;
1053 VkResult
anv_GetImageDrmFormatModifierPropertiesEXT(
1056 VkImageDrmFormatModifierPropertiesEXT
* pProperties
)
1058 ANV_FROM_HANDLE(anv_image
, image
, _image
);
1060 assert(pProperties
->sType
==
1061 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT
);
1063 pProperties
->drmFormatModifier
= image
->drm_format_mod
;
1069 * This function returns the assumed isl_aux_state for a given VkImageLayout.
1070 * Because Vulkan image layouts don't map directly to isl_aux_state enums, the
1071 * returned enum is the assumed worst case.
1073 * @param devinfo The device information of the Intel GPU.
1074 * @param image The image that may contain a collection of buffers.
1075 * @param aspect The aspect of the image to be accessed.
1076 * @param layout The current layout of the image aspect(s).
1078 * @return The primary buffer that should be used for the given layout.
1081 anv_layout_to_aux_state(const struct gen_device_info
* const devinfo
,
1082 const struct anv_image
* const image
,
1083 const VkImageAspectFlagBits aspect
,
1084 const VkImageLayout layout
)
1086 /* Validate the inputs. */
1088 /* The devinfo is needed as the optimal buffer varies across generations. */
1089 assert(devinfo
!= NULL
);
1091 /* The layout of a NULL image is not properly defined. */
1092 assert(image
!= NULL
);
1094 /* The aspect must be exactly one of the image aspects. */
1095 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1097 /* Determine the optimal buffer. */
1099 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1101 /* If we don't have an aux buffer then aux state makes no sense */
1102 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
);
1104 /* All images that use an auxiliary surface are required to be tiled. */
1105 assert(image
->planes
[plane
].surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1107 /* Stencil has no aux */
1108 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1111 /* Invalid layouts */
1112 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1113 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1114 unreachable("Invalid image layout.");
1116 /* Undefined layouts
1118 * The pre-initialized layout is equivalent to the undefined layout for
1119 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1122 case VK_IMAGE_LAYOUT_UNDEFINED
:
1123 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1124 return ISL_AUX_STATE_AUX_INVALID
;
1126 /* Transfer layouts */
1127 case VK_IMAGE_LAYOUT_GENERAL
:
1128 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1129 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1130 /* This buffer could be a depth buffer used in a transfer operation.
1131 * BLORP currently doesn't use HiZ for transfer operations so we must
1132 * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
1134 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_HIZ
);
1135 return ISL_AUX_STATE_AUX_INVALID
;
1136 } else if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1137 return ISL_AUX_STATE_PASS_THROUGH
;
1139 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1142 /* Sampling layouts */
1143 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR
:
1144 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1145 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1146 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1148 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1149 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1150 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1151 if (anv_can_sample_with_hiz(devinfo
, image
))
1152 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1154 return ISL_AUX_STATE_RESOLVED
;
1155 } else if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1156 return ISL_AUX_STATE_PASS_THROUGH
;
1158 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1161 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR
:
1162 return ISL_AUX_STATE_RESOLVED
;
1164 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1165 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1167 /* When handing the image off to the presentation engine, we need to
1168 * ensure that things are properly resolved. For images with no
1169 * modifier, we assume that they follow the old rules and always need
1170 * a full resolve because the PE doesn't understand any form of
1171 * compression. For images with modifiers, we use the aux usage from
1174 const struct isl_drm_modifier_info
*mod_info
=
1175 isl_drm_modifier_get_info(image
->drm_format_mod
);
1176 if (mod_info
&& mod_info
->aux_usage
!= ISL_AUX_USAGE_NONE
) {
1177 assert(mod_info
->aux_usage
== ISL_AUX_USAGE_CCS_E
);
1178 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
);
1179 /* We do not yet support any modifiers which support clear color so
1180 * we just always return COMPRESSED_NO_CLEAR. One day, this will
1183 assert(!mod_info
->supports_clear_color
);
1184 return ISL_AUX_STATE_COMPRESSED_NO_CLEAR
;
1186 return ISL_AUX_STATE_PASS_THROUGH
;
1190 /* Rendering layouts */
1191 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1192 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1194 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR
:
1195 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1196 return ISL_AUX_STATE_PARTIAL_CLEAR
;
1198 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1201 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR
:
1202 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1203 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1204 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
1205 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1207 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1208 unreachable("VK_KHR_shared_presentable_image is unsupported");
1210 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1211 unreachable("VK_EXT_fragment_density_map is unsupported");
1213 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1214 unreachable("VK_NV_shading_rate_image is unsupported");
1217 unreachable("layout is not a VkImageLayout enumeration member.");
1220 ASSERTED
static bool
1221 vk_image_layout_is_read_only(VkImageLayout layout
,
1222 VkImageAspectFlagBits aspect
)
1224 assert(util_bitcount(aspect
) == 1);
1227 case VK_IMAGE_LAYOUT_UNDEFINED
:
1228 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1229 return true; /* These are only used for layout transitions */
1231 case VK_IMAGE_LAYOUT_GENERAL
:
1232 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1233 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1234 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1235 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1236 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR
:
1237 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR
:
1240 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1241 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1242 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1243 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
1244 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1245 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1246 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR
:
1247 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR
:
1250 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1251 return aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
;
1253 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1254 return aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
;
1256 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1257 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1258 unreachable("Invalid image layout.");
1261 unreachable("Invalid image layout.");
1265 * This function determines the optimal buffer to use for a given
1266 * VkImageLayout and other pieces of information needed to make that
1267 * determination. This does not determine the optimal buffer to use
1268 * during a resolve operation.
1270 * @param devinfo The device information of the Intel GPU.
1271 * @param image The image that may contain a collection of buffers.
1272 * @param aspect The aspect of the image to be accessed.
1273 * @param usage The usage which describes how the image will be accessed.
1274 * @param layout The current layout of the image aspect(s).
1276 * @return The primary buffer that should be used for the given layout.
1279 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
1280 const struct anv_image
* const image
,
1281 const VkImageAspectFlagBits aspect
,
1282 const VkImageUsageFlagBits usage
,
1283 const VkImageLayout layout
)
1285 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1287 /* If there is no auxiliary surface allocated, we must use the one and only
1290 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
)
1291 return ISL_AUX_USAGE_NONE
;
1293 enum isl_aux_state aux_state
=
1294 anv_layout_to_aux_state(devinfo
, image
, aspect
, layout
);
1296 switch (aux_state
) {
1297 case ISL_AUX_STATE_CLEAR
:
1298 unreachable("We never use this state");
1300 case ISL_AUX_STATE_PARTIAL_CLEAR
:
1301 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1302 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
);
1303 assert(image
->samples
== 1);
1304 return ISL_AUX_USAGE_CCS_D
;
1306 case ISL_AUX_STATE_COMPRESSED_CLEAR
:
1307 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR
:
1308 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1309 return ISL_AUX_USAGE_HIZ
;
1311 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
);
1312 return image
->planes
[plane
].aux_usage
;
1315 case ISL_AUX_STATE_RESOLVED
:
1316 /* We can only use RESOLVED in read-only layouts because any write will
1317 * either land us in AUX_INVALID or COMPRESSED_NO_CLEAR. We can do
1318 * writes in PASS_THROUGH without destroying it so that is allowed.
1320 assert(vk_image_layout_is_read_only(layout
, aspect
));
1321 assert(util_is_power_of_two_or_zero(usage
));
1322 if (usage
== VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
) {
1323 /* If we have valid HiZ data and are using the image as a read-only
1324 * depth/stencil attachment, we should enable HiZ so that we can get
1325 * faster depth testing.
1327 return ISL_AUX_USAGE_HIZ
;
1329 return ISL_AUX_USAGE_NONE
;
1332 case ISL_AUX_STATE_PASS_THROUGH
:
1333 case ISL_AUX_STATE_AUX_INVALID
:
1334 return ISL_AUX_USAGE_NONE
;
1337 unreachable("Invalid isl_aux_state");
1341 * This function returns the level of unresolved fast-clear support of the
1342 * given image in the given VkImageLayout.
1344 * @param devinfo The device information of the Intel GPU.
1345 * @param image The image that may contain a collection of buffers.
1346 * @param aspect The aspect of the image to be accessed.
1347 * @param usage The usage which describes how the image will be accessed.
1348 * @param layout The current layout of the image aspect(s).
1350 enum anv_fast_clear_type
1351 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
1352 const struct anv_image
* const image
,
1353 const VkImageAspectFlagBits aspect
,
1354 const VkImageLayout layout
)
1356 if (INTEL_DEBUG
& DEBUG_NO_FAST_CLEAR
)
1357 return ANV_FAST_CLEAR_NONE
;
1359 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1361 /* If there is no auxiliary surface allocated, there are no fast-clears */
1362 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
)
1363 return ANV_FAST_CLEAR_NONE
;
1365 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1366 * lack the MI ALU which we need to determine the predicates.
1368 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
&& image
->samples
> 1)
1369 return ANV_FAST_CLEAR_NONE
;
1371 enum isl_aux_state aux_state
=
1372 anv_layout_to_aux_state(devinfo
, image
, aspect
, layout
);
1374 switch (aux_state
) {
1375 case ISL_AUX_STATE_CLEAR
:
1376 unreachable("We never use this state");
1378 case ISL_AUX_STATE_PARTIAL_CLEAR
:
1379 case ISL_AUX_STATE_COMPRESSED_CLEAR
:
1380 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1381 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1382 } else if (layout
== VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
) {
1383 /* When we're in a render pass we have the clear color data from the
1384 * VkRenderPassBeginInfo and we can use arbitrary clear colors. They
1385 * must get partially resolved before we leave the render pass.
1387 return ANV_FAST_CLEAR_ANY
;
1388 } else if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_MCS
||
1389 image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
1390 /* If the image has MCS or CCS_E enabled all the time then we can use
1391 * fast-clear as long as the clear color is the default value of zero
1392 * since this is the default value we program into every surface
1393 * state used for texturing.
1395 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1397 return ANV_FAST_CLEAR_NONE
;
1400 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR
:
1401 case ISL_AUX_STATE_RESOLVED
:
1402 case ISL_AUX_STATE_PASS_THROUGH
:
1403 case ISL_AUX_STATE_AUX_INVALID
:
1404 return ANV_FAST_CLEAR_NONE
;
1407 unreachable("Invalid isl_aux_state");
1411 static struct anv_state
1412 alloc_surface_state(struct anv_device
*device
)
1414 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1417 static enum isl_channel_select
1418 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
1419 struct isl_swizzle format_swizzle
)
1421 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
1422 swizzle
= component
;
1425 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
1426 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
1427 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
1428 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
1429 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
1430 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
1432 unreachable("Invalid swizzle");
1437 anv_image_fill_surface_state(struct anv_device
*device
,
1438 const struct anv_image
*image
,
1439 VkImageAspectFlagBits aspect
,
1440 const struct isl_view
*view_in
,
1441 isl_surf_usage_flags_t view_usage
,
1442 enum isl_aux_usage aux_usage
,
1443 const union isl_color_value
*clear_color
,
1444 enum anv_image_view_state_flags flags
,
1445 struct anv_surface_state
*state_inout
,
1446 struct brw_image_param
*image_param_out
)
1448 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1450 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
1451 *aux_surface
= &image
->planes
[plane
].aux_surface
;
1453 struct isl_view view
= *view_in
;
1454 view
.usage
|= view_usage
;
1456 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1457 * compressed surface with a shadow surface, we use the shadow instead of
1458 * the primary surface. The shadow surface will be tiled, unlike the main
1459 * surface, so it should get significantly better performance.
1461 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1462 isl_format_is_compressed(view
.format
) &&
1463 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
1464 assert(isl_format_is_compressed(surface
->isl
.format
));
1465 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1466 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1467 surface
= &image
->planes
[plane
].shadow_surface
;
1470 /* For texturing from stencil on gen7, we have to sample from a shadow
1471 * surface because we don't support W-tiling in the sampler.
1473 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1474 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1475 assert(device
->info
.gen
== 7);
1476 assert(view_usage
& ISL_SURF_USAGE_TEXTURE_BIT
);
1477 surface
= &image
->planes
[plane
].shadow_surface
;
1480 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
1481 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
1483 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1484 if (device
->info
.gen
== 7 && !device
->info
.is_haswell
)
1485 view
.swizzle
= ISL_SWIZZLE_IDENTITY
;
1487 /* If this is a HiZ buffer we can sample from with a programmable clear
1488 * value (SKL+), define the clear value to the optimal constant.
1490 union isl_color_value default_clear_color
= { .u32
= { 0, } };
1491 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
1492 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
1494 clear_color
= &default_clear_color
;
1496 const struct anv_address address
=
1497 anv_address_add(image
->planes
[plane
].address
, surface
->offset
);
1499 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1500 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
1501 !isl_has_matching_typed_storage_image_format(&device
->info
,
1503 /* In this case, we are a writeable storage buffer which needs to be
1504 * lowered to linear. All tiling and offset calculations will be done in
1507 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1508 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1509 .address
= anv_address_physical(address
),
1510 .size_B
= surface
->isl
.size_B
,
1511 .format
= ISL_FORMAT_RAW
,
1512 .swizzle
= ISL_SWIZZLE_IDENTITY
,
1514 .mocs
= anv_mocs_for_bo(device
, address
.bo
));
1515 state_inout
->address
= address
,
1516 state_inout
->aux_address
= ANV_NULL_ADDRESS
;
1517 state_inout
->clear_address
= ANV_NULL_ADDRESS
;
1519 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1520 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
1521 /* Typed surface reads support a very limited subset of the shader
1522 * image formats. Translate it into the closest format the hardware
1525 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1526 view
.format
= isl_lower_storage_image_format(&device
->info
,
1530 const struct isl_surf
*isl_surf
= &surface
->isl
;
1532 struct isl_surf tmp_surf
;
1533 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
1534 if (isl_format_is_compressed(surface
->isl
.format
) &&
1535 !isl_format_is_compressed(view
.format
)) {
1536 /* We're creating an uncompressed view of a compressed surface. This
1537 * is allowed but only for a single level/layer.
1539 assert(surface
->isl
.samples
== 1);
1540 assert(view
.levels
== 1);
1541 assert(view
.array_len
== 1);
1543 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
1545 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1546 0 : view
.base_array_layer
,
1547 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1548 view
.base_array_layer
: 0,
1550 &offset_B
, &tile_x_sa
, &tile_y_sa
);
1552 /* The newly created image represents the one subimage we're
1553 * referencing with this view so it only has one array slice and
1556 view
.base_array_layer
= 0;
1557 view
.base_level
= 0;
1559 /* We're making an uncompressed view here. The image dimensions need
1560 * to be scaled down by the block size.
1562 const struct isl_format_layout
*fmtl
=
1563 isl_format_get_layout(surface
->isl
.format
);
1564 tmp_surf
.logical_level0_px
=
1565 isl_surf_get_logical_level0_el(&tmp_surf
);
1566 tmp_surf
.phys_level0_sa
= isl_surf_get_phys_level0_el(&tmp_surf
);
1567 tmp_surf
.format
= view
.format
;
1568 tile_x_sa
/= fmtl
->bw
;
1569 tile_y_sa
/= fmtl
->bh
;
1571 isl_surf
= &tmp_surf
;
1573 if (device
->info
.gen
<= 8) {
1574 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1575 assert(tile_x_sa
== 0);
1576 assert(tile_y_sa
== 0);
1580 state_inout
->address
= anv_address_add(address
, offset_B
);
1582 struct anv_address aux_address
= ANV_NULL_ADDRESS
;
1583 if (aux_usage
!= ISL_AUX_USAGE_NONE
) {
1584 aux_address
= anv_address_add(image
->planes
[plane
].address
,
1585 aux_surface
->offset
);
1587 state_inout
->aux_address
= aux_address
;
1589 struct anv_address clear_address
= ANV_NULL_ADDRESS
;
1590 if (device
->info
.gen
>= 10 && aux_usage
!= ISL_AUX_USAGE_NONE
) {
1591 if (aux_usage
== ISL_AUX_USAGE_HIZ
) {
1592 clear_address
= (struct anv_address
) {
1593 .bo
= device
->hiz_clear_bo
,
1597 clear_address
= anv_image_get_clear_color_addr(device
, image
, aspect
);
1600 state_inout
->clear_address
= clear_address
;
1602 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1605 .address
= anv_address_physical(state_inout
->address
),
1606 .clear_color
= *clear_color
,
1607 .aux_surf
= &aux_surface
->isl
,
1608 .aux_usage
= aux_usage
,
1609 .aux_address
= anv_address_physical(aux_address
),
1610 .clear_address
= anv_address_physical(clear_address
),
1611 .use_clear_address
= !anv_address_is_null(clear_address
),
1612 .mocs
= anv_mocs_for_bo(device
,
1613 state_inout
->address
.bo
),
1614 .x_offset_sa
= tile_x_sa
,
1615 .y_offset_sa
= tile_y_sa
);
1617 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1618 * are used to store other information. This should be ok, however,
1619 * because the surface buffer addresses are always 4K page aligned.
1621 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1622 device
->isl_dev
.ss
.aux_addr_offset
;
1623 assert((aux_address
.offset
& 0xfff) == 0);
1624 state_inout
->aux_address
.offset
|= *aux_addr_dw
& 0xfff;
1626 if (device
->info
.gen
>= 10 && clear_address
.bo
) {
1627 uint32_t *clear_addr_dw
= state_inout
->state
.map
+
1628 device
->isl_dev
.ss
.clear_color_state_offset
;
1629 assert((clear_address
.offset
& 0x3f) == 0);
1630 state_inout
->clear_address
.offset
|= *clear_addr_dw
& 0x3f;
1634 if (image_param_out
) {
1635 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1636 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1637 &surface
->isl
, &view
);
1641 static VkImageAspectFlags
1642 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1644 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1645 if (util_bitcount(view_aspects
) == 1)
1646 return VK_IMAGE_ASPECT_COLOR_BIT
;
1648 VkImageAspectFlags color_aspects
= 0;
1649 for (uint32_t i
= 0; i
< util_bitcount(view_aspects
); i
++)
1650 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT
<< i
;
1651 return color_aspects
;
1653 /* No special remapping needed for depth & stencil aspects. */
1654 return view_aspects
;
1658 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
1660 uint32_t planes
= 0;
1662 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
1663 VK_IMAGE_ASPECT_DEPTH_BIT
|
1664 VK_IMAGE_ASPECT_STENCIL_BIT
|
1665 VK_IMAGE_ASPECT_PLANE_0_BIT
))
1667 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
1669 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
1672 if ((aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
) != 0 &&
1673 (aspect_mask
& VK_IMAGE_ASPECT_STENCIL_BIT
) != 0)
1680 anv_CreateImageView(VkDevice _device
,
1681 const VkImageViewCreateInfo
*pCreateInfo
,
1682 const VkAllocationCallbacks
*pAllocator
,
1685 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1686 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1687 struct anv_image_view
*iview
;
1689 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1690 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1692 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1694 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1696 assert(range
->layerCount
> 0);
1697 assert(range
->baseMipLevel
< image
->levels
);
1699 /* Check if a conversion info was passed. */
1700 const struct anv_format
*conv_format
= NULL
;
1701 const VkSamplerYcbcrConversionInfo
*conv_info
=
1702 vk_find_struct_const(pCreateInfo
->pNext
, SAMPLER_YCBCR_CONVERSION_INFO
);
1704 /* If image has an external format, the pNext chain must contain an instance of
1705 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1706 * external format as image."
1708 assert(!image
->external_format
|| conv_info
);
1711 ANV_FROM_HANDLE(anv_ycbcr_conversion
, conversion
, conv_info
->conversion
);
1712 conv_format
= conversion
->format
;
1715 VkImageUsageFlags image_usage
= 0;
1716 if (range
->aspectMask
& ~VK_IMAGE_ASPECT_STENCIL_BIT
)
1717 image_usage
|= image
->usage
;
1718 if (range
->aspectMask
& VK_IMAGE_ASPECT_STENCIL_BIT
)
1719 image_usage
|= image
->stencil_usage
;
1721 const VkImageViewUsageCreateInfo
*usage_info
=
1722 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO
);
1723 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image_usage
;
1725 /* View usage should be a subset of image usage */
1726 assert((view_usage
& ~image_usage
) == 0);
1727 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1728 VK_IMAGE_USAGE_STORAGE_BIT
|
1729 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1730 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1731 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1733 switch (image
->type
) {
1735 unreachable("bad VkImageType");
1736 case VK_IMAGE_TYPE_1D
:
1737 case VK_IMAGE_TYPE_2D
:
1738 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1740 case VK_IMAGE_TYPE_3D
:
1741 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1742 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1746 /* First expand aspects to the image's ones (for example
1747 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1748 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1749 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1750 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1752 VkImageAspectFlags expanded_aspects
=
1753 anv_image_expand_aspects(image
, range
->aspectMask
);
1755 iview
->image
= image
;
1757 /* Remap the expanded aspects for the image view. For example if only
1758 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1759 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1760 * the image view, it only has a single plane.
1762 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1763 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1764 iview
->vk_format
= pCreateInfo
->format
;
1766 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1767 assert(!image
->external_format
|| pCreateInfo
->format
== VK_FORMAT_UNDEFINED
);
1769 /* Format is undefined, this can happen when using external formats. Set
1770 * view format from the passed conversion info.
1772 if (iview
->vk_format
== VK_FORMAT_UNDEFINED
&& conv_format
)
1773 iview
->vk_format
= conv_format
->vk_format
;
1775 iview
->extent
= (VkExtent3D
) {
1776 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1777 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1778 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1781 /* Now go through the underlying image selected planes (computed in
1782 * expanded_aspects) and map them to planes in the image view.
1784 uint32_t iaspect_bit
, vplane
= 0;
1785 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1787 anv_image_aspect_to_plane(image
->aspects
, 1UL << iaspect_bit
);
1788 VkImageAspectFlags vplane_aspect
=
1789 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1790 struct anv_format_plane format
=
1791 anv_get_format_plane(&device
->info
, iview
->vk_format
,
1792 vplane_aspect
, image
->tiling
);
1794 iview
->planes
[vplane
].image_plane
= iplane
;
1796 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1797 .format
= format
.isl_format
,
1798 .base_level
= range
->baseMipLevel
,
1799 .levels
= anv_get_levelCount(image
, range
),
1800 .base_array_layer
= range
->baseArrayLayer
,
1801 .array_len
= anv_get_layerCount(image
, range
),
1803 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1804 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1805 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1806 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1807 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1808 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1809 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1810 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
1814 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
1815 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
1816 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
1819 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
1820 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
1821 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
1823 iview
->planes
[vplane
].isl
.usage
= 0;
1826 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
1827 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
1828 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
1829 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
1830 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
1832 enum isl_aux_usage general_aux_usage
=
1833 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1834 VK_IMAGE_USAGE_SAMPLED_BIT
,
1835 VK_IMAGE_LAYOUT_GENERAL
);
1836 enum isl_aux_usage optimal_aux_usage
=
1837 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1838 VK_IMAGE_USAGE_SAMPLED_BIT
,
1839 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
1841 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1842 &iview
->planes
[vplane
].isl
,
1843 ISL_SURF_USAGE_TEXTURE_BIT
,
1844 optimal_aux_usage
, NULL
,
1845 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
1846 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
1849 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1850 &iview
->planes
[vplane
].isl
,
1851 ISL_SURF_USAGE_TEXTURE_BIT
,
1852 general_aux_usage
, NULL
,
1854 &iview
->planes
[vplane
].general_sampler_surface_state
,
1858 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1859 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
1860 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
1861 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
1863 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1864 &iview
->planes
[vplane
].isl
,
1865 ISL_SURF_USAGE_STORAGE_BIT
,
1866 ISL_AUX_USAGE_NONE
, NULL
,
1868 &iview
->planes
[vplane
].storage_surface_state
,
1869 &iview
->planes
[vplane
].storage_image_param
);
1871 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1872 &iview
->planes
[vplane
].isl
,
1873 ISL_SURF_USAGE_STORAGE_BIT
,
1874 ISL_AUX_USAGE_NONE
, NULL
,
1875 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
1876 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
1883 *pView
= anv_image_view_to_handle(iview
);
1889 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
1890 const VkAllocationCallbacks
*pAllocator
)
1892 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1893 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
1898 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
1899 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
1900 anv_state_pool_free(&device
->surface_state_pool
,
1901 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
1904 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
1905 anv_state_pool_free(&device
->surface_state_pool
,
1906 iview
->planes
[plane
].general_sampler_surface_state
.state
);
1909 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
1910 anv_state_pool_free(&device
->surface_state_pool
,
1911 iview
->planes
[plane
].storage_surface_state
.state
);
1914 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
1915 anv_state_pool_free(&device
->surface_state_pool
,
1916 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
1920 vk_free2(&device
->alloc
, pAllocator
, iview
);
1925 anv_CreateBufferView(VkDevice _device
,
1926 const VkBufferViewCreateInfo
*pCreateInfo
,
1927 const VkAllocationCallbacks
*pAllocator
,
1928 VkBufferView
*pView
)
1930 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1931 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
1932 struct anv_buffer_view
*view
;
1934 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
1935 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1937 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1939 /* TODO: Handle the format swizzle? */
1941 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
1942 VK_IMAGE_ASPECT_COLOR_BIT
,
1943 VK_IMAGE_TILING_LINEAR
);
1944 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
1945 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
1946 pCreateInfo
->range
);
1947 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
1949 view
->address
= anv_address_add(buffer
->address
, pCreateInfo
->offset
);
1951 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
1952 view
->surface_state
= alloc_surface_state(device
);
1954 anv_fill_buffer_surface_state(device
, view
->surface_state
,
1956 view
->address
, view
->range
, format_bs
);
1958 view
->surface_state
= (struct anv_state
){ 0 };
1961 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
1962 view
->storage_surface_state
= alloc_surface_state(device
);
1963 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
1965 enum isl_format storage_format
=
1966 isl_has_matching_typed_storage_image_format(&device
->info
,
1968 isl_lower_storage_image_format(&device
->info
, view
->format
) :
1971 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
1973 view
->address
, view
->range
,
1974 (storage_format
== ISL_FORMAT_RAW
? 1 :
1975 isl_format_get_layout(storage_format
)->bpb
/ 8));
1977 /* Write-only accesses should use the original format. */
1978 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
1980 view
->address
, view
->range
,
1981 isl_format_get_layout(view
->format
)->bpb
/ 8);
1983 isl_buffer_fill_image_param(&device
->isl_dev
,
1984 &view
->storage_image_param
,
1985 view
->format
, view
->range
);
1987 view
->storage_surface_state
= (struct anv_state
){ 0 };
1988 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
1991 *pView
= anv_buffer_view_to_handle(view
);
1997 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
1998 const VkAllocationCallbacks
*pAllocator
)
2000 ANV_FROM_HANDLE(anv_device
, device
, _device
);
2001 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
2006 if (view
->surface_state
.alloc_size
> 0)
2007 anv_state_pool_free(&device
->surface_state_pool
,
2008 view
->surface_state
);
2010 if (view
->storage_surface_state
.alloc_size
> 0)
2011 anv_state_pool_free(&device
->surface_state_pool
,
2012 view
->storage_surface_state
);
2014 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
2015 anv_state_pool_free(&device
->surface_state_pool
,
2016 view
->writeonly_storage_surface_state
);
2018 vk_free2(&device
->alloc
, pAllocator
, view
);