2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm-uapi/drm_fourcc.h"
32 #include "anv_private.h"
33 #include "util/debug.h"
35 #include "util/u_math.h"
37 #include "vk_format_info.h"
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
41 VkImageUsageFlags vk_usage
,
42 isl_surf_usage_flags_t isl_extra_usage
,
43 VkImageAspectFlagBits aspect
)
45 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
47 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
53 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
56 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
57 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
64 case VK_IMAGE_ASPECT_DEPTH_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
67 case VK_IMAGE_ASPECT_STENCIL_BIT
:
68 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
70 case VK_IMAGE_ASPECT_COLOR_BIT
:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
76 unreachable("bad VkImageAspect");
79 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
84 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
85 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct anv_image_create_info
*anv_info
,
97 const struct isl_drm_modifier_info
*isl_mod_info
,
100 const VkImageCreateInfo
*base_info
= anv_info
->vk_info
;
101 isl_tiling_flags_t flags
= 0;
103 switch (base_info
->tiling
) {
105 unreachable("bad VkImageTiling");
106 case VK_IMAGE_TILING_OPTIMAL
:
107 flags
= ISL_TILING_ANY_MASK
;
109 case VK_IMAGE_TILING_LINEAR
:
110 flags
= ISL_TILING_LINEAR_BIT
;
112 case VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
:
113 assert(isl_mod_info
);
114 flags
= 1 << isl_mod_info
->tiling
;
117 if (anv_info
->isl_tiling_flags
)
118 flags
&= anv_info
->isl_tiling_flags
;
121 flags
&= ISL_TILING_LINEAR_BIT
| ISL_TILING_X_BIT
;
129 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
131 assert(surf
->isl
.size_B
> 0); /* isl surface must be initialized */
133 if (image
->disjoint
) {
134 surf
->offset
= align_u32(image
->planes
[plane
].size
,
135 surf
->isl
.alignment_B
);
136 /* Plane offset is always 0 when it's disjoint. */
138 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment_B
);
139 /* Determine plane's offset only once when the first surface is added. */
140 if (image
->planes
[plane
].size
== 0)
141 image
->planes
[plane
].offset
= image
->size
;
144 image
->size
= surf
->offset
+ surf
->isl
.size_B
;
145 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size_B
) - image
->planes
[plane
].offset
;
147 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment_B
);
148 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
149 surf
->isl
.alignment_B
);
153 * Do hardware limitations require the image plane to use a shadow surface?
155 * If hardware limitations force us to use a shadow surface, then the same
156 * limitations may also constrain the tiling of the primary surface; therefore
157 * paramater @a inout_primary_tiling_flags.
159 * If the image plane is a separate stencil plane and if the user provided
160 * VkImageStencilUsageCreateInfoEXT, then @a usage must be stencilUsage.
162 * @see anv_image::planes[]::shadow_surface
165 anv_image_plane_needs_shadow_surface(const struct gen_device_info
*devinfo
,
166 struct anv_format_plane plane_format
,
167 VkImageTiling vk_tiling
,
168 VkImageUsageFlags vk_plane_usage
,
169 VkImageCreateFlags vk_create_flags
,
170 isl_tiling_flags_t
*inout_primary_tiling_flags
)
172 if (devinfo
->gen
<= 8 &&
173 (vk_create_flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
) &&
174 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
) {
175 /* We must fallback to a linear surface because we may not be able to
176 * correctly handle the offsets if tiled. (On gen9,
177 * RENDER_SURFACE_STATE::X/Y Offset are sufficient). To prevent garbage
178 * performance while texturing, we maintain a tiled shadow surface.
180 assert(isl_format_is_compressed(plane_format
.isl_format
));
182 if (inout_primary_tiling_flags
) {
183 *inout_primary_tiling_flags
= ISL_TILING_LINEAR_BIT
;
189 if (devinfo
->gen
<= 7 &&
190 plane_format
.aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
191 (vk_plane_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)) {
192 /* gen7 can't sample from W-tiled surfaces. */
200 anv_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
201 VkImageCreateFlags create_flags
,
203 VkImageTiling vk_tiling
,
204 const VkImageFormatListCreateInfoKHR
*fmt_list
)
206 enum isl_format format
=
207 anv_get_isl_format(devinfo
, vk_format
,
208 VK_IMAGE_ASPECT_COLOR_BIT
, vk_tiling
);
210 if (!isl_format_supports_ccs_e(devinfo
, format
))
213 if (!(create_flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
216 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
219 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
220 enum isl_format view_format
=
221 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
222 VK_IMAGE_ASPECT_COLOR_BIT
, vk_tiling
);
224 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
232 * For color images that have an auxiliary surface, request allocation for an
233 * additional buffer that mainly stores fast-clear values. Use of this buffer
234 * allows us to access the image's subresources while being aware of their
235 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
236 * which a fast clear has occurred).
238 * In order to avoid having multiple clear colors for a single plane of an
239 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
240 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
241 * 2018), there were no known applications which would benefit from fast-
242 * clearing more than just the first slice.
244 * The fast clear portion of the image is laid out in the following order:
246 * * 1 or 4 dwords (depending on hardware generation) for the clear color
247 * * 1 dword for the anv_fast_clear_type of the clear color
248 * * On gen9+, 1 dword per level and layer of the image (3D levels count
249 * multiple layers) in level-major order for compression state.
251 * For the purpose of discoverability, the algorithm used to manage
252 * compression and fast-clears is described here:
254 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
255 * all of the values in the fast clear portion of the image are initialized
258 * * On fast-clear, the clear value is written into surface state and also
259 * into the buffer and the fast clear type is set appropriately. Both
260 * setting the fast-clear value in the buffer and setting the fast-clear
261 * type happen from the GPU using MI commands.
263 * * Whenever a render or blorp operation is performed with CCS_E, we call
264 * genX(cmd_buffer_mark_image_written) to set the compression state to
265 * true (which is represented by UINT32_MAX).
267 * * On pipeline barrier transitions, the worst-case transition is computed
268 * from the image layouts. The command streamer inspects the fast clear
269 * type and compression state dwords and constructs a predicate. The
270 * worst-case resolve is performed with the given predicate and the fast
271 * clear and compression state is set accordingly.
273 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
274 * details on exactly what is allowed in what layouts.
276 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
277 * In order to deal with this, we have to do some clear color management.
279 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
280 * value from the buffer into the surface state with MI commands.
282 * * For any blorp operations, we pass the address to the clear value into
283 * blorp and it knows to copy the clear color.
286 add_aux_state_tracking_buffer(struct anv_image
*image
,
288 const struct anv_device
*device
)
290 assert(image
&& device
);
291 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
&&
292 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
294 /* Compressed images must be tiled and therefore everything should be 4K
295 * aligned. The CCS has the same alignment requirements. This is good
296 * because we need at least dword-alignment for MI_LOAD/STORE operations.
298 assert(image
->alignment
% 4 == 0);
299 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
301 /* This buffer should be at the very end of the plane. */
302 if (image
->disjoint
) {
303 assert(image
->planes
[plane
].size
==
304 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
306 assert(image
->size
==
307 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
310 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
311 device
->isl_dev
.ss
.clear_color_state_size
:
312 device
->isl_dev
.ss
.clear_value_size
;
314 /* Clear color and fast clear type */
315 unsigned state_size
= clear_color_state_size
+ 4;
317 /* We only need to track compression on CCS_E surfaces. */
318 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
319 if (image
->type
== VK_IMAGE_TYPE_3D
) {
320 for (uint32_t l
= 0; l
< image
->levels
; l
++)
321 state_size
+= anv_minify(image
->extent
.depth
, l
) * 4;
323 state_size
+= image
->levels
* image
->array_size
* 4;
327 /* Add some padding to make sure the fast clear color state buffer starts at
328 * a 4K alignment. We believe that 256B might be enough, but due to lack of
329 * testing we will leave this as 4K for now.
331 image
->planes
[plane
].size
= align_u64(image
->planes
[plane
].size
, 4096);
332 image
->size
= align_u64(image
->size
, 4096);
334 assert(image
->planes
[plane
].offset
% 4096 == 0);
336 image
->planes
[plane
].fast_clear_state_offset
=
337 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
339 image
->planes
[plane
].size
+= state_size
;
340 image
->size
+= state_size
;
344 * The return code indicates whether creation of the VkImage should continue
345 * or fail, not whether the creation of the aux surface succeeded. If the aux
346 * surface is not required (for example, by neither hardware nor DRM format
347 * modifier), then this may return VK_SUCCESS when creation of the aux surface
351 add_aux_surface_if_supported(struct anv_device
*device
,
352 struct anv_image
*image
,
354 struct anv_format_plane plane_format
,
355 const VkImageFormatListCreateInfoKHR
*fmt_list
,
356 isl_surf_usage_flags_t isl_extra_usage_flags
)
358 VkImageAspectFlags aspect
= plane_format
.aspect
;
361 /* The aux surface must not be already added. */
362 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
364 if ((isl_extra_usage_flags
& ISL_SURF_USAGE_DISABLE_AUX_BIT
))
367 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
368 /* We don't advertise that depth buffers could be used as storage
371 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
373 /* Allow the user to control HiZ enabling. Disable by default on gen7
374 * because resolves are not currently implemented pre-BDW.
376 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
377 /* It will never be used as an attachment, HiZ is pointless. */
381 if (device
->info
.gen
== 7) {
382 anv_perf_warn(device
, image
, "Implement gen7 HiZ");
386 if (image
->levels
> 1) {
387 anv_perf_warn(device
, image
, "Enable multi-LOD HiZ");
391 if (device
->info
.gen
== 8 && image
->samples
> 1) {
392 anv_perf_warn(device
, image
, "Enable gen8 multisampled HiZ");
396 if (unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
))
399 ok
= isl_surf_get_hiz_surf(&device
->isl_dev
,
400 &image
->planes
[plane
].surface
.isl
,
401 &image
->planes
[plane
].aux_surface
.isl
);
403 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
404 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
405 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
== 1) {
406 if (image
->n_planes
!= 1) {
407 /* Multiplanar images seem to hit a sampler bug with CCS and R16G16
408 * format. (Putting the clear state a page/4096bytes further fixes
414 if ((image
->create_flags
& VK_IMAGE_CREATE_ALIAS_BIT
)) {
415 /* The image may alias a plane of a multiplanar image. Above we ban
416 * CCS on multiplanar images.
421 if (!isl_format_supports_rendering(&device
->info
,
422 plane_format
.isl_format
)) {
423 /* Disable CCS because it is not useful (we can't render to the image
424 * with CCS enabled). While it may be technically possible to enable
425 * CCS for this case, we currently don't have things hooked up to get
428 anv_perf_warn(device
, image
,
429 "This image format doesn't support rendering. "
430 "Not allocating an CCS buffer.");
434 if (unlikely(INTEL_DEBUG
& DEBUG_NO_RBC
))
437 ok
= isl_surf_get_ccs_surf(&device
->isl_dev
,
438 &image
->planes
[plane
].surface
.isl
,
439 &image
->planes
[plane
].aux_surface
.isl
,
444 /* Choose aux usage */
445 if (!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
446 anv_formats_ccs_e_compatible(&device
->info
,
451 /* For images created without MUTABLE_FORMAT_BIT set, we know that
452 * they will always be used with the original format. In particular,
453 * they will always be used with a format that supports color
454 * compression. If it's never used as a storage image, then it will
455 * only be used through the sampler or the as a render target. This
456 * means that it's safe to just leave compression on at all times for
459 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
460 } else if (device
->info
.gen
>= 12) {
461 anv_perf_warn(device
, image
,
462 "The CCS_D aux mode is not yet handled on "
463 "Gen12+. Not allocating a CCS buffer.");
464 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
467 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_D
;
470 if (!device
->physical
->has_implicit_ccs
)
471 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
473 add_aux_state_tracking_buffer(image
, plane
, device
);
474 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
> 1) {
475 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
476 ok
= isl_surf_get_mcs_surf(&device
->isl_dev
,
477 &image
->planes
[plane
].surface
.isl
,
478 &image
->planes
[plane
].aux_surface
.isl
);
482 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
483 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
484 add_aux_state_tracking_buffer(image
, plane
, device
);
491 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
492 * image's memory requirements (that is, the image's size and alignment).
495 make_surface(struct anv_device
*device
,
496 struct anv_image
*image
,
497 const VkImageFormatListCreateInfoKHR
*fmt_list
,
499 isl_tiling_flags_t tiling_flags
,
500 isl_surf_usage_flags_t isl_extra_usage_flags
,
501 VkImageAspectFlagBits aspect
)
506 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
507 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
508 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
509 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
512 image
->extent
= anv_sanitize_image_extent(image
->type
, image
->extent
);
514 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
515 const struct anv_format_plane plane_format
=
516 anv_get_format_plane(&device
->info
, image
->vk_format
, aspect
, image
->tiling
);
517 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
519 const isl_surf_usage_flags_t usage
=
520 choose_isl_surf_usage(image
->create_flags
, image
->usage
,
521 isl_extra_usage_flags
, aspect
);
523 VkImageUsageFlags plane_vk_usage
=
524 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
?
525 image
->stencil_usage
: image
->usage
;
528 anv_image_plane_needs_shadow_surface(&device
->info
,
535 ok
= isl_surf_init(&device
->isl_dev
, &anv_surf
->isl
,
536 .dim
= vk_to_isl_surf_dim
[image
->type
],
537 .format
= plane_format
.isl_format
,
538 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
539 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
540 .depth
= image
->extent
.depth
,
541 .levels
= image
->levels
,
542 .array_len
= image
->array_size
,
543 .samples
= image
->samples
,
544 .min_alignment_B
= 0,
545 .row_pitch_B
= stride
,
547 .tiling_flags
= tiling_flags
);
550 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
552 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
554 add_surface(image
, anv_surf
, plane
);
557 ok
= isl_surf_init(&device
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
558 .dim
= vk_to_isl_surf_dim
[image
->type
],
559 .format
= plane_format
.isl_format
,
560 .width
= image
->extent
.width
,
561 .height
= image
->extent
.height
,
562 .depth
= image
->extent
.depth
,
563 .levels
= image
->levels
,
564 .array_len
= image
->array_size
,
565 .samples
= image
->samples
,
566 .min_alignment_B
= 0,
567 .row_pitch_B
= stride
,
568 .usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
569 (usage
& ISL_SURF_USAGE_CUBE_BIT
),
570 .tiling_flags
= ISL_TILING_ANY_MASK
);
572 /* isl_surf_init() will fail only if provided invalid input. Invalid input
573 * is illegal in Vulkan.
577 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
580 result
= add_aux_surface_if_supported(device
, image
, plane
, plane_format
,
581 fmt_list
, isl_extra_usage_flags
);
582 if (result
!= VK_SUCCESS
)
585 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
587 /* Upper bound of the last surface should be smaller than the plane's
590 assert((MAX2(image
->planes
[plane
].surface
.offset
,
591 image
->planes
[plane
].aux_surface
.offset
) +
592 (image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
593 image
->planes
[plane
].aux_surface
.isl
.size_B
:
594 image
->planes
[plane
].surface
.isl
.size_B
)) <=
595 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
597 if (image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
) {
598 /* assert(image->planes[plane].fast_clear_state_offset == */
599 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
600 assert(image
->planes
[plane
].fast_clear_state_offset
<
601 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
608 score_drm_format_mod(uint64_t modifier
)
611 case DRM_FORMAT_MOD_LINEAR
: return 1;
612 case I915_FORMAT_MOD_X_TILED
: return 2;
613 case I915_FORMAT_MOD_Y_TILED
: return 3;
614 case I915_FORMAT_MOD_Y_TILED_CCS
: return 4;
615 default: unreachable("bad DRM format modifier");
619 static const struct isl_drm_modifier_info
*
620 choose_drm_format_mod(const struct anv_physical_device
*device
,
621 uint32_t modifier_count
, const uint64_t *modifiers
)
623 uint64_t best_mod
= UINT64_MAX
;
624 uint32_t best_score
= 0;
626 for (uint32_t i
= 0; i
< modifier_count
; ++i
) {
627 uint32_t score
= score_drm_format_mod(modifiers
[i
]);
628 if (score
> best_score
) {
629 best_mod
= modifiers
[i
];
635 return isl_drm_modifier_get_info(best_mod
);
641 anv_image_create(VkDevice _device
,
642 const struct anv_image_create_info
*create_info
,
643 const VkAllocationCallbacks
* alloc
,
646 ANV_FROM_HANDLE(anv_device
, device
, _device
);
647 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
648 const struct isl_drm_modifier_info
*isl_mod_info
= NULL
;
649 struct anv_image
*image
= NULL
;
652 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
654 const struct wsi_image_create_info
*wsi_info
=
655 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
657 if (pCreateInfo
->tiling
== VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT
) {
658 const VkImageDrmFormatModifierListCreateInfoEXT
*mod_info
=
659 vk_find_struct_const(pCreateInfo
->pNext
,
660 IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT
);
661 isl_mod_info
= choose_drm_format_mod(device
->physical
,
662 mod_info
->drmFormatModifierCount
,
663 mod_info
->pDrmFormatModifiers
);
664 assert(isl_mod_info
);
667 anv_assert(pCreateInfo
->mipLevels
> 0);
668 anv_assert(pCreateInfo
->arrayLayers
> 0);
669 anv_assert(pCreateInfo
->samples
> 0);
670 anv_assert(pCreateInfo
->extent
.width
> 0);
671 anv_assert(pCreateInfo
->extent
.height
> 0);
672 anv_assert(pCreateInfo
->extent
.depth
> 0);
674 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
675 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
677 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
679 image
->type
= pCreateInfo
->imageType
;
680 image
->extent
= pCreateInfo
->extent
;
681 image
->vk_format
= pCreateInfo
->format
;
682 image
->format
= anv_get_format(pCreateInfo
->format
);
683 image
->aspects
= vk_format_aspects(image
->vk_format
);
684 image
->levels
= pCreateInfo
->mipLevels
;
685 image
->array_size
= pCreateInfo
->arrayLayers
;
686 image
->samples
= pCreateInfo
->samples
;
687 image
->usage
= pCreateInfo
->usage
;
688 image
->create_flags
= pCreateInfo
->flags
;
689 image
->tiling
= pCreateInfo
->tiling
;
690 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT
;
691 image
->needs_set_tiling
= wsi_info
&& wsi_info
->scanout
;
692 image
->drm_format_mod
= isl_mod_info
? isl_mod_info
->modifier
:
693 DRM_FORMAT_MOD_INVALID
;
695 if (image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
) {
696 image
->stencil_usage
= pCreateInfo
->usage
;
697 const VkImageStencilUsageCreateInfoEXT
*stencil_usage_info
=
698 vk_find_struct_const(pCreateInfo
->pNext
,
699 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT
);
700 if (stencil_usage_info
)
701 image
->stencil_usage
= stencil_usage_info
->stencilUsage
;
704 /* In case of external format, We don't know format yet,
705 * so skip the rest for now.
707 if (create_info
->external_format
) {
708 image
->external_format
= true;
709 *pImage
= anv_image_to_handle(image
);
713 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
714 assert(format
!= NULL
);
716 const isl_tiling_flags_t isl_tiling_flags
=
717 choose_isl_tiling_flags(create_info
, isl_mod_info
,
718 image
->needs_set_tiling
);
720 image
->n_planes
= format
->n_planes
;
722 const VkImageFormatListCreateInfoKHR
*fmt_list
=
723 vk_find_struct_const(pCreateInfo
->pNext
,
724 IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
727 for_each_bit(b
, image
->aspects
) {
728 r
= make_surface(device
, image
, fmt_list
, create_info
->stride
,
729 isl_tiling_flags
, create_info
->isl_extra_usage_flags
,
735 *pImage
= anv_image_to_handle(image
);
741 vk_free2(&device
->alloc
, alloc
, image
);
746 static struct anv_image
*
747 anv_swapchain_get_image(VkSwapchainKHR swapchain
,
750 uint32_t n_images
= index
+ 1;
751 VkImage
*images
= malloc(sizeof(*images
) * n_images
);
752 VkResult result
= wsi_common_get_images(swapchain
, &n_images
, images
);
754 if (result
!= VK_SUCCESS
&& result
!= VK_INCOMPLETE
) {
759 ANV_FROM_HANDLE(anv_image
, image
, images
[index
]);
766 anv_image_from_swapchain(VkDevice device
,
767 const VkImageCreateInfo
*pCreateInfo
,
768 const VkImageSwapchainCreateInfoKHR
*swapchain_info
,
769 const VkAllocationCallbacks
*pAllocator
,
772 struct anv_image
*swapchain_image
= anv_swapchain_get_image(swapchain_info
->swapchain
, 0);
773 assert(swapchain_image
);
775 assert(swapchain_image
->type
== pCreateInfo
->imageType
);
776 assert(swapchain_image
->vk_format
== pCreateInfo
->format
);
777 assert(swapchain_image
->extent
.width
== pCreateInfo
->extent
.width
);
778 assert(swapchain_image
->extent
.height
== pCreateInfo
->extent
.height
);
779 assert(swapchain_image
->extent
.depth
== pCreateInfo
->extent
.depth
);
780 assert(swapchain_image
->array_size
== pCreateInfo
->arrayLayers
);
781 /* Color attachment is added by the wsi code. */
782 assert(swapchain_image
->usage
== (pCreateInfo
->usage
| VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
));
784 VkImageCreateInfo local_create_info
;
785 local_create_info
= *pCreateInfo
;
786 local_create_info
.pNext
= NULL
;
787 /* The following parameters are implictly selected by the wsi code. */
788 local_create_info
.tiling
= VK_IMAGE_TILING_OPTIMAL
;
789 local_create_info
.samples
= VK_SAMPLE_COUNT_1_BIT
;
790 local_create_info
.usage
|= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
792 /* If the image has a particular modifier, specify that modifier. */
793 VkImageDrmFormatModifierListCreateInfoEXT local_modifier_info
= {
794 .sType
= VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_LIST_CREATE_INFO_EXT
,
795 .drmFormatModifierCount
= 1,
796 .pDrmFormatModifiers
= &swapchain_image
->drm_format_mod
,
798 if (swapchain_image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
)
799 __vk_append_struct(&local_create_info
, &local_modifier_info
);
801 return anv_image_create(device
,
802 &(struct anv_image_create_info
) {
803 .vk_info
= &local_create_info
,
804 .external_format
= swapchain_image
->external_format
,
811 anv_CreateImage(VkDevice device
,
812 const VkImageCreateInfo
*pCreateInfo
,
813 const VkAllocationCallbacks
*pAllocator
,
816 const VkExternalMemoryImageCreateInfo
*create_info
=
817 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_MEMORY_IMAGE_CREATE_INFO
);
819 if (create_info
&& (create_info
->handleTypes
&
820 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID
))
821 return anv_image_from_external(device
, pCreateInfo
, create_info
,
824 bool use_external_format
= false;
825 const VkExternalFormatANDROID
*ext_format
=
826 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_FORMAT_ANDROID
);
828 /* "If externalFormat is zero, the effect is as if the
829 * VkExternalFormatANDROID structure was not present. Otherwise, the image
830 * will have the specified external format."
832 if (ext_format
&& ext_format
->externalFormat
!= 0)
833 use_external_format
= true;
835 const VkNativeBufferANDROID
*gralloc_info
=
836 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
838 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
841 const VkImageSwapchainCreateInfoKHR
*swapchain_info
=
842 vk_find_struct_const(pCreateInfo
->pNext
, IMAGE_SWAPCHAIN_CREATE_INFO_KHR
);
843 if (swapchain_info
&& swapchain_info
->swapchain
!= VK_NULL_HANDLE
)
844 return anv_image_from_swapchain(device
, pCreateInfo
, swapchain_info
,
847 return anv_image_create(device
,
848 &(struct anv_image_create_info
) {
849 .vk_info
= pCreateInfo
,
850 .external_format
= use_external_format
,
857 anv_DestroyImage(VkDevice _device
, VkImage _image
,
858 const VkAllocationCallbacks
*pAllocator
)
860 ANV_FROM_HANDLE(anv_device
, device
, _device
);
861 ANV_FROM_HANDLE(anv_image
, image
, _image
);
866 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
867 if (image
->planes
[p
].bo_is_owned
) {
868 assert(image
->planes
[p
].address
.bo
!= NULL
);
869 anv_device_release_bo(device
, image
->planes
[p
].address
.bo
);
873 vk_free2(&device
->alloc
, pAllocator
, image
);
876 static void anv_image_bind_memory_plane(struct anv_device
*device
,
877 struct anv_image
*image
,
879 struct anv_device_memory
*memory
,
880 uint32_t memory_offset
)
882 assert(!image
->planes
[plane
].bo_is_owned
);
885 image
->planes
[plane
].address
= ANV_NULL_ADDRESS
;
889 image
->planes
[plane
].address
= (struct anv_address
) {
891 .offset
= memory_offset
,
894 /* If we're on a platform that uses implicit CCS and our buffer does not
895 * have any implicit CCS data, disable compression on that image.
897 if (device
->physical
->has_implicit_ccs
&& !memory
->bo
->has_implicit_ccs
)
898 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
901 /* We are binding AHardwareBuffer. Get a description, resolve the
902 * format and prepare anv_image properly.
905 resolve_ahw_image(struct anv_device
*device
,
906 struct anv_image
*image
,
907 struct anv_device_memory
*mem
)
909 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
911 AHardwareBuffer_Desc desc
;
912 AHardwareBuffer_describe(mem
->ahw
, &desc
);
915 int i915_tiling
= anv_gem_get_tiling(device
, mem
->bo
->gem_handle
);
916 VkImageTiling vk_tiling
;
917 isl_tiling_flags_t isl_tiling_flags
= 0;
919 switch (i915_tiling
) {
920 case I915_TILING_NONE
:
921 vk_tiling
= VK_IMAGE_TILING_LINEAR
;
922 isl_tiling_flags
= ISL_TILING_LINEAR_BIT
;
925 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
926 isl_tiling_flags
= ISL_TILING_X_BIT
;
929 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
930 isl_tiling_flags
= ISL_TILING_Y0_BIT
;
934 unreachable("Invalid tiling flags.");
937 assert(vk_tiling
== VK_IMAGE_TILING_LINEAR
||
938 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
);
941 VkFormat vk_format
= vk_format_from_android(desc
.format
, desc
.usage
);
942 enum isl_format isl_fmt
= anv_get_isl_format(&device
->info
,
944 VK_IMAGE_ASPECT_COLOR_BIT
,
946 assert(isl_fmt
!= ISL_FORMAT_UNSUPPORTED
);
948 /* Handle RGB(X)->RGBA fallback. */
949 switch (desc
.format
) {
950 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM
:
951 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM
:
952 if (isl_format_is_rgb(isl_fmt
))
953 isl_fmt
= isl_format_rgb_to_rgba(isl_fmt
);
957 /* Now we are able to fill anv_image fields properly and create
958 * isl_surface for it.
960 image
->vk_format
= vk_format
;
961 image
->format
= anv_get_format(vk_format
);
962 image
->aspects
= vk_format_aspects(image
->vk_format
);
963 image
->n_planes
= image
->format
->n_planes
;
965 uint32_t stride
= desc
.stride
*
966 (isl_format_get_layout(isl_fmt
)->bpb
/ 8);
969 for_each_bit(b
, image
->aspects
) {
970 VkResult r
= make_surface(device
, image
, NULL
, stride
, isl_tiling_flags
,
971 ISL_SURF_USAGE_DISABLE_AUX_BIT
, (1 << b
));
972 assert(r
== VK_SUCCESS
);
977 VkResult
anv_BindImageMemory(
980 VkDeviceMemory _memory
,
981 VkDeviceSize memoryOffset
)
983 ANV_FROM_HANDLE(anv_device
, device
, _device
);
984 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
985 ANV_FROM_HANDLE(anv_image
, image
, _image
);
988 resolve_ahw_image(device
, image
, mem
);
991 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
993 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
994 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
1000 VkResult
anv_BindImageMemory2(
1002 uint32_t bindInfoCount
,
1003 const VkBindImageMemoryInfo
* pBindInfos
)
1005 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1007 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
1008 const VkBindImageMemoryInfo
*bind_info
= &pBindInfos
[i
];
1009 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
1010 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
1012 /* Resolve will alter the image's aspects, do this first. */
1013 if (mem
&& mem
->ahw
)
1014 resolve_ahw_image(device
, image
, mem
);
1016 VkImageAspectFlags aspects
= image
->aspects
;
1017 vk_foreach_struct_const(s
, bind_info
->pNext
) {
1019 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO
: {
1020 const VkBindImagePlaneMemoryInfo
*plane_info
=
1021 (const VkBindImagePlaneMemoryInfo
*) s
;
1023 aspects
= plane_info
->planeAspect
;
1026 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR
: {
1027 const VkBindImageMemorySwapchainInfoKHR
*swapchain_info
=
1028 (const VkBindImageMemorySwapchainInfoKHR
*) s
;
1029 struct anv_image
*swapchain_image
=
1030 anv_swapchain_get_image(swapchain_info
->swapchain
,
1031 swapchain_info
->imageIndex
);
1032 assert(swapchain_image
);
1033 assert(image
->aspects
== swapchain_image
->aspects
);
1034 assert(mem
== NULL
);
1036 uint32_t aspect_bit
;
1037 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
1039 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
1040 struct anv_device_memory mem
= {
1041 .bo
= swapchain_image
->planes
[plane
].address
.bo
,
1043 anv_image_bind_memory_plane(device
, image
, plane
,
1044 &mem
, bind_info
->memoryOffset
);
1049 anv_debug_ignored_stype(s
->sType
);
1054 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
1055 * VK_NULL_HANDLE. In such case, just carry one with the next bind
1061 uint32_t aspect_bit
;
1062 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
1064 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
1065 anv_image_bind_memory_plane(device
, image
, plane
,
1066 mem
, bind_info
->memoryOffset
);
1073 void anv_GetImageSubresourceLayout(
1076 const VkImageSubresource
* subresource
,
1077 VkSubresourceLayout
* layout
)
1079 ANV_FROM_HANDLE(anv_image
, image
, _image
);
1081 const struct anv_surface
*surface
;
1082 if (subresource
->aspectMask
== VK_IMAGE_ASPECT_PLANE_1_BIT
&&
1083 image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
&&
1084 isl_drm_modifier_has_aux(image
->drm_format_mod
)) {
1085 surface
= &image
->planes
[0].aux_surface
;
1087 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
,
1088 subresource
->aspectMask
);
1089 surface
= &image
->planes
[plane
].surface
;
1092 assert(__builtin_popcount(subresource
->aspectMask
) == 1);
1094 layout
->offset
= surface
->offset
;
1095 layout
->rowPitch
= surface
->isl
.row_pitch_B
;
1096 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1097 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1099 if (subresource
->mipLevel
> 0 || subresource
->arrayLayer
> 0) {
1100 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1103 isl_surf_get_image_offset_B_tile_sa(&surface
->isl
,
1104 subresource
->mipLevel
,
1105 subresource
->arrayLayer
,
1106 0 /* logical_z_offset_px */,
1107 &offset_B
, NULL
, NULL
);
1108 layout
->offset
+= offset_B
;
1109 layout
->size
= layout
->rowPitch
* anv_minify(image
->extent
.height
,
1110 subresource
->mipLevel
);
1112 layout
->size
= surface
->isl
.size_B
;
1116 VkResult
anv_GetImageDrmFormatModifierPropertiesEXT(
1119 VkImageDrmFormatModifierPropertiesEXT
* pProperties
)
1121 ANV_FROM_HANDLE(anv_image
, image
, _image
);
1123 assert(pProperties
->sType
==
1124 VK_STRUCTURE_TYPE_IMAGE_DRM_FORMAT_MODIFIER_PROPERTIES_EXT
);
1126 pProperties
->drmFormatModifier
= image
->drm_format_mod
;
1131 static VkImageUsageFlags
1132 vk_image_layout_to_usage_flags(VkImageLayout layout
,
1133 VkImageAspectFlagBits aspect
)
1135 assert(util_bitcount(aspect
) == 1);
1138 case VK_IMAGE_LAYOUT_UNDEFINED
:
1139 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1142 case VK_IMAGE_LAYOUT_GENERAL
:
1145 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1146 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1147 return VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
1149 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1150 assert(aspect
& (VK_IMAGE_ASPECT_DEPTH_BIT
|
1151 VK_IMAGE_ASPECT_STENCIL_BIT
));
1152 return VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
;
1154 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL
:
1155 assert(aspect
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1156 return vk_image_layout_to_usage_flags(
1157 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
, aspect
);
1159 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL
:
1160 assert(aspect
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1161 return vk_image_layout_to_usage_flags(
1162 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
, aspect
);
1164 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1165 assert(aspect
& (VK_IMAGE_ASPECT_DEPTH_BIT
|
1166 VK_IMAGE_ASPECT_STENCIL_BIT
));
1167 return VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
|
1168 VK_IMAGE_USAGE_SAMPLED_BIT
|
1169 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
;
1171 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL
:
1172 assert(aspect
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1173 return vk_image_layout_to_usage_flags(
1174 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
, aspect
);
1176 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL
:
1177 assert(aspect
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1178 return vk_image_layout_to_usage_flags(
1179 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
, aspect
);
1181 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1182 return VK_IMAGE_USAGE_SAMPLED_BIT
|
1183 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
;
1185 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1186 return VK_IMAGE_USAGE_TRANSFER_SRC_BIT
;
1188 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1189 return VK_IMAGE_USAGE_TRANSFER_DST_BIT
;
1191 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1192 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1193 return vk_image_layout_to_usage_flags(
1194 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
, aspect
);
1195 } else if (aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1196 return vk_image_layout_to_usage_flags(
1197 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
, aspect
);
1199 assert(!"Must be a depth/stencil aspect");
1203 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1204 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1205 return vk_image_layout_to_usage_flags(
1206 VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
, aspect
);
1207 } else if (aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1208 return vk_image_layout_to_usage_flags(
1209 VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
, aspect
);
1211 assert(!"Must be a depth/stencil aspect");
1215 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
1216 assert(aspect
== VK_IMAGE_ASPECT_COLOR_BIT
);
1217 /* This needs to be handled specially by the caller */
1220 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1221 assert(aspect
== VK_IMAGE_ASPECT_COLOR_BIT
);
1222 return vk_image_layout_to_usage_flags(VK_IMAGE_LAYOUT_GENERAL
, aspect
);
1224 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1225 assert(aspect
== VK_IMAGE_ASPECT_COLOR_BIT
);
1226 return VK_IMAGE_USAGE_SHADING_RATE_IMAGE_BIT_NV
;
1228 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1229 assert(aspect
== VK_IMAGE_ASPECT_COLOR_BIT
);
1230 return VK_IMAGE_USAGE_FRAGMENT_DENSITY_MAP_BIT_EXT
;
1232 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1233 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1234 unreachable("Invalid image layout.");
1237 unreachable("Invalid image layout.");
1241 * This function returns the assumed isl_aux_state for a given VkImageLayout.
1242 * Because Vulkan image layouts don't map directly to isl_aux_state enums, the
1243 * returned enum is the assumed worst case.
1245 * @param devinfo The device information of the Intel GPU.
1246 * @param image The image that may contain a collection of buffers.
1247 * @param aspect The aspect of the image to be accessed.
1248 * @param layout The current layout of the image aspect(s).
1250 * @return The primary buffer that should be used for the given layout.
1253 anv_layout_to_aux_state(const struct gen_device_info
* const devinfo
,
1254 const struct anv_image
* const image
,
1255 const VkImageAspectFlagBits aspect
,
1256 const VkImageLayout layout
)
1258 /* Validate the inputs. */
1260 /* The devinfo is needed as the optimal buffer varies across generations. */
1261 assert(devinfo
!= NULL
);
1263 /* The layout of a NULL image is not properly defined. */
1264 assert(image
!= NULL
);
1266 /* The aspect must be exactly one of the image aspects. */
1267 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1269 /* Determine the optimal buffer. */
1271 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1273 /* If we don't have an aux buffer then aux state makes no sense */
1274 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
);
1276 /* All images that use an auxiliary surface are required to be tiled. */
1277 assert(image
->planes
[plane
].surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1279 /* Stencil has no aux */
1280 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1283 /* Invalid layouts */
1284 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1285 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1286 unreachable("Invalid image layout.");
1288 /* Undefined layouts
1290 * The pre-initialized layout is equivalent to the undefined layout for
1291 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1294 case VK_IMAGE_LAYOUT_UNDEFINED
:
1295 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1296 return ISL_AUX_STATE_AUX_INVALID
;
1298 /* General layout */
1299 case VK_IMAGE_LAYOUT_GENERAL
:
1300 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1301 if (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
) {
1302 /* This buffer could be used as both a depth and input attachment
1303 * at the same time in which case compression could cause issues.
1305 return ISL_AUX_STATE_AUX_INVALID
;
1306 } else if (anv_can_sample_with_hiz(devinfo
, image
)) {
1307 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1309 return ISL_AUX_STATE_AUX_INVALID
;
1311 } else if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1312 return ISL_AUX_STATE_PASS_THROUGH
;
1314 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1317 /* Transfer layouts */
1318 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1319 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1320 return ISL_AUX_STATE_PASS_THROUGH
;
1322 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1325 /* Sampling layouts */
1326 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR
:
1327 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1328 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1329 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1331 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1332 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1333 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1334 if (anv_can_sample_with_hiz(devinfo
, image
))
1335 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1337 return ISL_AUX_STATE_RESOLVED
;
1338 } else if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1339 return ISL_AUX_STATE_PASS_THROUGH
;
1341 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1344 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR
:
1345 return ISL_AUX_STATE_RESOLVED
;
1347 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1348 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1350 enum isl_aux_state aux_state
=
1351 isl_drm_modifier_get_default_aux_state(image
->drm_format_mod
);
1353 switch (aux_state
) {
1355 assert(!"unexpected isl_aux_state");
1356 case ISL_AUX_STATE_AUX_INVALID
:
1357 /* The modifier does not support compression. But, if we arrived
1358 * here, then we have enabled compression on it anyway, in which case
1359 * we must resolve the aux surface before we release ownership to the
1360 * presentation engine (because, having no modifier, the presentation
1361 * engine will not be aware of the aux surface). The presentation
1362 * engine will not access the aux surface (because it is unware of
1363 * it), and so the aux surface will still be resolved when we
1364 * re-acquire ownership.
1366 * Therefore, at ownership transfers in either direction, there does
1367 * exist an aux surface despite the lack of modifier and its state is
1370 return ISL_AUX_STATE_PASS_THROUGH
;
1371 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR
:
1372 return ISL_AUX_STATE_COMPRESSED_NO_CLEAR
;
1376 /* Rendering layouts */
1377 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1378 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1380 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR
:
1381 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
) {
1382 return ISL_AUX_STATE_PARTIAL_CLEAR
;
1384 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1387 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR
:
1388 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1389 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1390 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
1391 return ISL_AUX_STATE_COMPRESSED_CLEAR
;
1393 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1394 unreachable("VK_KHR_shared_presentable_image is unsupported");
1396 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1397 unreachable("VK_EXT_fragment_density_map is unsupported");
1399 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1400 unreachable("VK_NV_shading_rate_image is unsupported");
1403 unreachable("layout is not a VkImageLayout enumeration member.");
1406 ASSERTED
static bool
1407 vk_image_layout_is_read_only(VkImageLayout layout
,
1408 VkImageAspectFlagBits aspect
)
1410 assert(util_bitcount(aspect
) == 1);
1413 case VK_IMAGE_LAYOUT_UNDEFINED
:
1414 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1415 return true; /* These are only used for layout transitions */
1417 case VK_IMAGE_LAYOUT_GENERAL
:
1418 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1419 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1420 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1421 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1422 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR
:
1423 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR
:
1426 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1427 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1428 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1429 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
1430 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1431 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1432 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR
:
1433 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR
:
1436 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1437 return aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
;
1439 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1440 return aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
;
1442 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1443 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1444 unreachable("Invalid image layout.");
1447 unreachable("Invalid image layout.");
1451 * This function determines the optimal buffer to use for a given
1452 * VkImageLayout and other pieces of information needed to make that
1453 * determination. This does not determine the optimal buffer to use
1454 * during a resolve operation.
1456 * @param devinfo The device information of the Intel GPU.
1457 * @param image The image that may contain a collection of buffers.
1458 * @param aspect The aspect of the image to be accessed.
1459 * @param usage The usage which describes how the image will be accessed.
1460 * @param layout The current layout of the image aspect(s).
1462 * @return The primary buffer that should be used for the given layout.
1465 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
1466 const struct anv_image
* const image
,
1467 const VkImageAspectFlagBits aspect
,
1468 const VkImageUsageFlagBits usage
,
1469 const VkImageLayout layout
)
1471 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1473 /* If there is no auxiliary surface allocated, we must use the one and only
1476 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
)
1477 return ISL_AUX_USAGE_NONE
;
1479 enum isl_aux_state aux_state
=
1480 anv_layout_to_aux_state(devinfo
, image
, aspect
, layout
);
1482 switch (aux_state
) {
1483 case ISL_AUX_STATE_CLEAR
:
1484 unreachable("We never use this state");
1486 case ISL_AUX_STATE_PARTIAL_CLEAR
:
1487 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1488 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_D
);
1489 assert(image
->samples
== 1);
1490 return ISL_AUX_USAGE_CCS_D
;
1492 case ISL_AUX_STATE_COMPRESSED_CLEAR
:
1493 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR
:
1494 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1495 return ISL_AUX_USAGE_HIZ
;
1497 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_NONE
);
1498 return image
->planes
[plane
].aux_usage
;
1501 case ISL_AUX_STATE_RESOLVED
:
1502 /* We can only use RESOLVED in read-only layouts because any write will
1503 * either land us in AUX_INVALID or COMPRESSED_NO_CLEAR. We can do
1504 * writes in PASS_THROUGH without destroying it so that is allowed.
1506 assert(vk_image_layout_is_read_only(layout
, aspect
));
1507 assert(util_is_power_of_two_or_zero(usage
));
1508 if (usage
== VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
) {
1509 /* If we have valid HiZ data and are using the image as a read-only
1510 * depth/stencil attachment, we should enable HiZ so that we can get
1511 * faster depth testing.
1513 return ISL_AUX_USAGE_HIZ
;
1515 return ISL_AUX_USAGE_NONE
;
1518 case ISL_AUX_STATE_PASS_THROUGH
:
1519 case ISL_AUX_STATE_AUX_INVALID
:
1520 return ISL_AUX_USAGE_NONE
;
1523 unreachable("Invalid isl_aux_state");
1527 * This function returns the level of unresolved fast-clear support of the
1528 * given image in the given VkImageLayout.
1530 * @param devinfo The device information of the Intel GPU.
1531 * @param image The image that may contain a collection of buffers.
1532 * @param aspect The aspect of the image to be accessed.
1533 * @param usage The usage which describes how the image will be accessed.
1534 * @param layout The current layout of the image aspect(s).
1536 enum anv_fast_clear_type
1537 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
1538 const struct anv_image
* const image
,
1539 const VkImageAspectFlagBits aspect
,
1540 const VkImageLayout layout
)
1542 if (INTEL_DEBUG
& DEBUG_NO_FAST_CLEAR
)
1543 return ANV_FAST_CLEAR_NONE
;
1545 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1547 /* If there is no auxiliary surface allocated, there are no fast-clears */
1548 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
)
1549 return ANV_FAST_CLEAR_NONE
;
1551 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1552 * lack the MI ALU which we need to determine the predicates.
1554 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
&& image
->samples
> 1)
1555 return ANV_FAST_CLEAR_NONE
;
1557 enum isl_aux_state aux_state
=
1558 anv_layout_to_aux_state(devinfo
, image
, aspect
, layout
);
1560 switch (aux_state
) {
1561 case ISL_AUX_STATE_CLEAR
:
1562 unreachable("We never use this state");
1564 case ISL_AUX_STATE_PARTIAL_CLEAR
:
1565 case ISL_AUX_STATE_COMPRESSED_CLEAR
:
1566 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1567 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1568 } else if (layout
== VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
) {
1569 /* When we're in a render pass we have the clear color data from the
1570 * VkRenderPassBeginInfo and we can use arbitrary clear colors. They
1571 * must get partially resolved before we leave the render pass.
1573 return ANV_FAST_CLEAR_ANY
;
1574 } else if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_MCS
||
1575 image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
1576 /* If the image has MCS or CCS_E enabled all the time then we can use
1577 * fast-clear as long as the clear color is the default value of zero
1578 * since this is the default value we program into every surface
1579 * state used for texturing.
1581 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1583 return ANV_FAST_CLEAR_NONE
;
1586 case ISL_AUX_STATE_COMPRESSED_NO_CLEAR
:
1587 case ISL_AUX_STATE_RESOLVED
:
1588 case ISL_AUX_STATE_PASS_THROUGH
:
1589 case ISL_AUX_STATE_AUX_INVALID
:
1590 return ANV_FAST_CLEAR_NONE
;
1593 unreachable("Invalid isl_aux_state");
1597 static struct anv_state
1598 alloc_surface_state(struct anv_device
*device
)
1600 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1603 static enum isl_channel_select
1604 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
1605 struct isl_swizzle format_swizzle
)
1607 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
1608 swizzle
= component
;
1611 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
1612 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
1613 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
1614 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
1615 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
1616 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
1618 unreachable("Invalid swizzle");
1623 anv_image_fill_surface_state(struct anv_device
*device
,
1624 const struct anv_image
*image
,
1625 VkImageAspectFlagBits aspect
,
1626 const struct isl_view
*view_in
,
1627 isl_surf_usage_flags_t view_usage
,
1628 enum isl_aux_usage aux_usage
,
1629 const union isl_color_value
*clear_color
,
1630 enum anv_image_view_state_flags flags
,
1631 struct anv_surface_state
*state_inout
,
1632 struct brw_image_param
*image_param_out
)
1634 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1636 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
1637 *aux_surface
= &image
->planes
[plane
].aux_surface
;
1639 struct isl_view view
= *view_in
;
1640 view
.usage
|= view_usage
;
1642 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1643 * compressed surface with a shadow surface, we use the shadow instead of
1644 * the primary surface. The shadow surface will be tiled, unlike the main
1645 * surface, so it should get significantly better performance.
1647 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1648 isl_format_is_compressed(view
.format
) &&
1649 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
1650 assert(isl_format_is_compressed(surface
->isl
.format
));
1651 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1652 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1653 surface
= &image
->planes
[plane
].shadow_surface
;
1656 /* For texturing from stencil on gen7, we have to sample from a shadow
1657 * surface because we don't support W-tiling in the sampler.
1659 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1660 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1661 assert(device
->info
.gen
== 7);
1662 assert(view_usage
& ISL_SURF_USAGE_TEXTURE_BIT
);
1663 surface
= &image
->planes
[plane
].shadow_surface
;
1666 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
1667 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
1669 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1670 if (device
->info
.gen
== 7 && !device
->info
.is_haswell
)
1671 view
.swizzle
= ISL_SWIZZLE_IDENTITY
;
1673 /* If this is a HiZ buffer we can sample from with a programmable clear
1674 * value (SKL+), define the clear value to the optimal constant.
1676 union isl_color_value default_clear_color
= { .u32
= { 0, } };
1677 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
1678 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
1680 clear_color
= &default_clear_color
;
1682 const struct anv_address address
=
1683 anv_address_add(image
->planes
[plane
].address
, surface
->offset
);
1685 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1686 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
1687 !isl_has_matching_typed_storage_image_format(&device
->info
,
1689 /* In this case, we are a writeable storage buffer which needs to be
1690 * lowered to linear. All tiling and offset calculations will be done in
1693 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1694 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1695 .address
= anv_address_physical(address
),
1696 .size_B
= surface
->isl
.size_B
,
1697 .format
= ISL_FORMAT_RAW
,
1698 .swizzle
= ISL_SWIZZLE_IDENTITY
,
1700 .mocs
= anv_mocs_for_bo(device
, address
.bo
));
1701 state_inout
->address
= address
,
1702 state_inout
->aux_address
= ANV_NULL_ADDRESS
;
1703 state_inout
->clear_address
= ANV_NULL_ADDRESS
;
1705 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1706 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
1707 /* Typed surface reads support a very limited subset of the shader
1708 * image formats. Translate it into the closest format the hardware
1711 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1712 view
.format
= isl_lower_storage_image_format(&device
->info
,
1716 const struct isl_surf
*isl_surf
= &surface
->isl
;
1718 struct isl_surf tmp_surf
;
1719 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
1720 if (isl_format_is_compressed(surface
->isl
.format
) &&
1721 !isl_format_is_compressed(view
.format
)) {
1722 /* We're creating an uncompressed view of a compressed surface. This
1723 * is allowed but only for a single level/layer.
1725 assert(surface
->isl
.samples
== 1);
1726 assert(view
.levels
== 1);
1727 assert(view
.array_len
== 1);
1729 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
1731 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1732 0 : view
.base_array_layer
,
1733 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1734 view
.base_array_layer
: 0,
1736 &offset_B
, &tile_x_sa
, &tile_y_sa
);
1738 /* The newly created image represents the one subimage we're
1739 * referencing with this view so it only has one array slice and
1742 view
.base_array_layer
= 0;
1743 view
.base_level
= 0;
1745 /* We're making an uncompressed view here. The image dimensions need
1746 * to be scaled down by the block size.
1748 const struct isl_format_layout
*fmtl
=
1749 isl_format_get_layout(surface
->isl
.format
);
1750 tmp_surf
.logical_level0_px
=
1751 isl_surf_get_logical_level0_el(&tmp_surf
);
1752 tmp_surf
.phys_level0_sa
= isl_surf_get_phys_level0_el(&tmp_surf
);
1753 tmp_surf
.format
= view
.format
;
1754 tile_x_sa
/= fmtl
->bw
;
1755 tile_y_sa
/= fmtl
->bh
;
1757 isl_surf
= &tmp_surf
;
1759 if (device
->info
.gen
<= 8) {
1760 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1761 assert(tile_x_sa
== 0);
1762 assert(tile_y_sa
== 0);
1766 state_inout
->address
= anv_address_add(address
, offset_B
);
1768 struct anv_address aux_address
= ANV_NULL_ADDRESS
;
1769 if (aux_usage
!= ISL_AUX_USAGE_NONE
) {
1770 aux_address
= anv_address_add(image
->planes
[plane
].address
,
1771 aux_surface
->offset
);
1773 state_inout
->aux_address
= aux_address
;
1775 struct anv_address clear_address
= ANV_NULL_ADDRESS
;
1776 if (device
->info
.gen
>= 10 && aux_usage
!= ISL_AUX_USAGE_NONE
) {
1777 if (aux_usage
== ISL_AUX_USAGE_HIZ
) {
1778 clear_address
= (struct anv_address
) {
1779 .bo
= device
->hiz_clear_bo
,
1783 clear_address
= anv_image_get_clear_color_addr(device
, image
, aspect
);
1786 state_inout
->clear_address
= clear_address
;
1788 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1791 .address
= anv_address_physical(state_inout
->address
),
1792 .clear_color
= *clear_color
,
1793 .aux_surf
= &aux_surface
->isl
,
1794 .aux_usage
= aux_usage
,
1795 .aux_address
= anv_address_physical(aux_address
),
1796 .clear_address
= anv_address_physical(clear_address
),
1797 .use_clear_address
= !anv_address_is_null(clear_address
),
1798 .mocs
= anv_mocs_for_bo(device
,
1799 state_inout
->address
.bo
),
1800 .x_offset_sa
= tile_x_sa
,
1801 .y_offset_sa
= tile_y_sa
);
1803 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1804 * are used to store other information. This should be ok, however,
1805 * because the surface buffer addresses are always 4K page aligned.
1807 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1808 device
->isl_dev
.ss
.aux_addr_offset
;
1809 assert((aux_address
.offset
& 0xfff) == 0);
1810 state_inout
->aux_address
.offset
|= *aux_addr_dw
& 0xfff;
1812 if (device
->info
.gen
>= 10 && clear_address
.bo
) {
1813 uint32_t *clear_addr_dw
= state_inout
->state
.map
+
1814 device
->isl_dev
.ss
.clear_color_state_offset
;
1815 assert((clear_address
.offset
& 0x3f) == 0);
1816 state_inout
->clear_address
.offset
|= *clear_addr_dw
& 0x3f;
1820 if (image_param_out
) {
1821 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1822 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1823 &surface
->isl
, &view
);
1827 static VkImageAspectFlags
1828 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1830 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1831 if (util_bitcount(view_aspects
) == 1)
1832 return VK_IMAGE_ASPECT_COLOR_BIT
;
1834 VkImageAspectFlags color_aspects
= 0;
1835 for (uint32_t i
= 0; i
< util_bitcount(view_aspects
); i
++)
1836 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT
<< i
;
1837 return color_aspects
;
1839 /* No special remapping needed for depth & stencil aspects. */
1840 return view_aspects
;
1844 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
1846 uint32_t planes
= 0;
1848 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
1849 VK_IMAGE_ASPECT_DEPTH_BIT
|
1850 VK_IMAGE_ASPECT_STENCIL_BIT
|
1851 VK_IMAGE_ASPECT_PLANE_0_BIT
))
1853 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
1855 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
1858 if ((aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
) != 0 &&
1859 (aspect_mask
& VK_IMAGE_ASPECT_STENCIL_BIT
) != 0)
1866 anv_CreateImageView(VkDevice _device
,
1867 const VkImageViewCreateInfo
*pCreateInfo
,
1868 const VkAllocationCallbacks
*pAllocator
,
1871 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1872 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1873 struct anv_image_view
*iview
;
1875 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1876 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1878 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1880 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1882 assert(range
->layerCount
> 0);
1883 assert(range
->baseMipLevel
< image
->levels
);
1885 /* Check if a conversion info was passed. */
1886 const struct anv_format
*conv_format
= NULL
;
1887 const VkSamplerYcbcrConversionInfo
*conv_info
=
1888 vk_find_struct_const(pCreateInfo
->pNext
, SAMPLER_YCBCR_CONVERSION_INFO
);
1890 /* If image has an external format, the pNext chain must contain an instance of
1891 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1892 * external format as image."
1894 assert(!image
->external_format
|| conv_info
);
1897 ANV_FROM_HANDLE(anv_ycbcr_conversion
, conversion
, conv_info
->conversion
);
1898 conv_format
= conversion
->format
;
1901 VkImageUsageFlags image_usage
= 0;
1902 if (range
->aspectMask
& ~VK_IMAGE_ASPECT_STENCIL_BIT
)
1903 image_usage
|= image
->usage
;
1904 if (range
->aspectMask
& VK_IMAGE_ASPECT_STENCIL_BIT
)
1905 image_usage
|= image
->stencil_usage
;
1907 const VkImageViewUsageCreateInfo
*usage_info
=
1908 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO
);
1909 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image_usage
;
1911 /* View usage should be a subset of image usage */
1912 assert((view_usage
& ~image_usage
) == 0);
1913 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1914 VK_IMAGE_USAGE_STORAGE_BIT
|
1915 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1916 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1917 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1919 switch (image
->type
) {
1921 unreachable("bad VkImageType");
1922 case VK_IMAGE_TYPE_1D
:
1923 case VK_IMAGE_TYPE_2D
:
1924 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1926 case VK_IMAGE_TYPE_3D
:
1927 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1928 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1932 /* First expand aspects to the image's ones (for example
1933 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1934 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1935 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1936 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1938 VkImageAspectFlags expanded_aspects
=
1939 anv_image_expand_aspects(image
, range
->aspectMask
);
1941 iview
->image
= image
;
1943 /* Remap the expanded aspects for the image view. For example if only
1944 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1945 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1946 * the image view, it only has a single plane.
1948 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1949 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1950 iview
->vk_format
= pCreateInfo
->format
;
1952 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1953 assert(!image
->external_format
|| pCreateInfo
->format
== VK_FORMAT_UNDEFINED
);
1955 /* Format is undefined, this can happen when using external formats. Set
1956 * view format from the passed conversion info.
1958 if (iview
->vk_format
== VK_FORMAT_UNDEFINED
&& conv_format
)
1959 iview
->vk_format
= conv_format
->vk_format
;
1961 iview
->extent
= (VkExtent3D
) {
1962 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1963 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1964 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1967 /* Now go through the underlying image selected planes (computed in
1968 * expanded_aspects) and map them to planes in the image view.
1970 uint32_t iaspect_bit
, vplane
= 0;
1971 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1973 anv_image_aspect_to_plane(image
->aspects
, 1UL << iaspect_bit
);
1974 VkImageAspectFlags vplane_aspect
=
1975 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1976 struct anv_format_plane format
=
1977 anv_get_format_plane(&device
->info
, iview
->vk_format
,
1978 vplane_aspect
, image
->tiling
);
1980 iview
->planes
[vplane
].image_plane
= iplane
;
1982 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1983 .format
= format
.isl_format
,
1984 .base_level
= range
->baseMipLevel
,
1985 .levels
= anv_get_levelCount(image
, range
),
1986 .base_array_layer
= range
->baseArrayLayer
,
1987 .array_len
= anv_get_layerCount(image
, range
),
1989 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1990 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1991 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1992 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1993 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1994 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1995 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1996 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
2000 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
2001 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
2002 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
2005 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
2006 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
2007 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
2009 iview
->planes
[vplane
].isl
.usage
= 0;
2012 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
2013 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
2014 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
2015 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
2016 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
2018 enum isl_aux_usage general_aux_usage
=
2019 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
2020 VK_IMAGE_USAGE_SAMPLED_BIT
,
2021 VK_IMAGE_LAYOUT_GENERAL
);
2022 enum isl_aux_usage optimal_aux_usage
=
2023 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
2024 VK_IMAGE_USAGE_SAMPLED_BIT
,
2025 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
2027 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
2028 &iview
->planes
[vplane
].isl
,
2029 ISL_SURF_USAGE_TEXTURE_BIT
,
2030 optimal_aux_usage
, NULL
,
2031 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
2032 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
2035 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
2036 &iview
->planes
[vplane
].isl
,
2037 ISL_SURF_USAGE_TEXTURE_BIT
,
2038 general_aux_usage
, NULL
,
2040 &iview
->planes
[vplane
].general_sampler_surface_state
,
2044 /* NOTE: This one needs to go last since it may stomp isl_view.format */
2045 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
2046 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
2047 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
2049 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
2050 &iview
->planes
[vplane
].isl
,
2051 ISL_SURF_USAGE_STORAGE_BIT
,
2052 ISL_AUX_USAGE_NONE
, NULL
,
2054 &iview
->planes
[vplane
].storage_surface_state
,
2055 &iview
->planes
[vplane
].storage_image_param
);
2057 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
2058 &iview
->planes
[vplane
].isl
,
2059 ISL_SURF_USAGE_STORAGE_BIT
,
2060 ISL_AUX_USAGE_NONE
, NULL
,
2061 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
2062 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
2069 *pView
= anv_image_view_to_handle(iview
);
2075 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
2076 const VkAllocationCallbacks
*pAllocator
)
2078 ANV_FROM_HANDLE(anv_device
, device
, _device
);
2079 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
2084 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
2085 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
2086 anv_state_pool_free(&device
->surface_state_pool
,
2087 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
2090 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
2091 anv_state_pool_free(&device
->surface_state_pool
,
2092 iview
->planes
[plane
].general_sampler_surface_state
.state
);
2095 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
2096 anv_state_pool_free(&device
->surface_state_pool
,
2097 iview
->planes
[plane
].storage_surface_state
.state
);
2100 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
2101 anv_state_pool_free(&device
->surface_state_pool
,
2102 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
2106 vk_free2(&device
->alloc
, pAllocator
, iview
);
2111 anv_CreateBufferView(VkDevice _device
,
2112 const VkBufferViewCreateInfo
*pCreateInfo
,
2113 const VkAllocationCallbacks
*pAllocator
,
2114 VkBufferView
*pView
)
2116 ANV_FROM_HANDLE(anv_device
, device
, _device
);
2117 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
2118 struct anv_buffer_view
*view
;
2120 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
2121 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
2123 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
2125 /* TODO: Handle the format swizzle? */
2127 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
2128 VK_IMAGE_ASPECT_COLOR_BIT
,
2129 VK_IMAGE_TILING_LINEAR
);
2130 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
2131 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
2132 pCreateInfo
->range
);
2133 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
2135 view
->address
= anv_address_add(buffer
->address
, pCreateInfo
->offset
);
2137 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
2138 view
->surface_state
= alloc_surface_state(device
);
2140 anv_fill_buffer_surface_state(device
, view
->surface_state
,
2142 view
->address
, view
->range
, format_bs
);
2144 view
->surface_state
= (struct anv_state
){ 0 };
2147 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
2148 view
->storage_surface_state
= alloc_surface_state(device
);
2149 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
2151 enum isl_format storage_format
=
2152 isl_has_matching_typed_storage_image_format(&device
->info
,
2154 isl_lower_storage_image_format(&device
->info
, view
->format
) :
2157 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
2159 view
->address
, view
->range
,
2160 (storage_format
== ISL_FORMAT_RAW
? 1 :
2161 isl_format_get_layout(storage_format
)->bpb
/ 8));
2163 /* Write-only accesses should use the original format. */
2164 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
2166 view
->address
, view
->range
,
2167 isl_format_get_layout(view
->format
)->bpb
/ 8);
2169 isl_buffer_fill_image_param(&device
->isl_dev
,
2170 &view
->storage_image_param
,
2171 view
->format
, view
->range
);
2173 view
->storage_surface_state
= (struct anv_state
){ 0 };
2174 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
2177 *pView
= anv_buffer_view_to_handle(view
);
2183 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
2184 const VkAllocationCallbacks
*pAllocator
)
2186 ANV_FROM_HANDLE(anv_device
, device
, _device
);
2187 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
2192 if (view
->surface_state
.alloc_size
> 0)
2193 anv_state_pool_free(&device
->surface_state_pool
,
2194 view
->surface_state
);
2196 if (view
->storage_surface_state
.alloc_size
> 0)
2197 anv_state_pool_free(&device
->surface_state_pool
,
2198 view
->storage_surface_state
);
2200 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
2201 anv_state_pool_free(&device
->surface_state_pool
,
2202 view
->writeonly_storage_surface_state
);
2204 vk_free2(&device
->alloc
, pAllocator
, view
);