anv/image: Add support for the new depth/stencil layouts
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29 #include <sys/mman.h>
30
31 #include "anv_private.h"
32 #include "util/debug.h"
33 #include "vk_util.h"
34
35 #include "vk_format_info.h"
36
37 /**
38 * Exactly one bit must be set in \a aspect.
39 */
40 static isl_surf_usage_flags_t
41 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
42 VkImageUsageFlags vk_usage,
43 VkImageAspectFlags aspect)
44 {
45 isl_surf_usage_flags_t isl_usage = 0;
46
47 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
48 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
49
50 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
51 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
52
53 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
54 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
55
56 if (vk_create_flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
57 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
58
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
62 */
63 switch (aspect) {
64 case VK_IMAGE_ASPECT_DEPTH_BIT:
65 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
66 break;
67 case VK_IMAGE_ASPECT_STENCIL_BIT:
68 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
69 break;
70 case VK_IMAGE_ASPECT_COLOR_BIT:
71 break;
72 default:
73 unreachable("bad VkImageAspect");
74 }
75
76 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
77 /* blorp implements transfers by sampling from the source image. */
78 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
79 }
80
81 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
82 aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
83 /* blorp implements transfers by rendering into the destination image.
84 * Only request this with color images, as we deal with depth/stencil
85 * formats differently. */
86 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
87 }
88
89 return isl_usage;
90 }
91
92 /**
93 * Exactly one bit must be set in \a aspect.
94 */
95 static struct anv_surface *
96 get_surface(struct anv_image *image, VkImageAspectFlags aspect)
97 {
98 switch (aspect) {
99 default:
100 unreachable("bad VkImageAspect");
101 case VK_IMAGE_ASPECT_COLOR_BIT:
102 return &image->color_surface;
103 case VK_IMAGE_ASPECT_DEPTH_BIT:
104 return &image->depth_surface;
105 case VK_IMAGE_ASPECT_STENCIL_BIT:
106 return &image->stencil_surface;
107 }
108 }
109
110 static void
111 add_surface(struct anv_image *image, struct anv_surface *surf)
112 {
113 assert(surf->isl.size > 0); /* isl surface must be initialized */
114
115 surf->offset = align_u32(image->size, surf->isl.alignment);
116 image->size = surf->offset + surf->isl.size;
117 image->alignment = MAX2(image->alignment, surf->isl.alignment);
118 }
119
120
121 static bool
122 all_formats_ccs_e_compatible(const struct gen_device_info *devinfo,
123 const struct VkImageCreateInfo *vk_info)
124 {
125 enum isl_format format =
126 anv_get_isl_format(devinfo, vk_info->format,
127 VK_IMAGE_ASPECT_COLOR_BIT, vk_info->tiling);
128
129 if (!isl_format_supports_ccs_e(devinfo, format))
130 return false;
131
132 if (!(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT))
133 return true;
134
135 const VkImageFormatListCreateInfoKHR *fmt_list =
136 vk_find_struct_const(vk_info->pNext, IMAGE_FORMAT_LIST_CREATE_INFO_KHR);
137
138 if (!fmt_list || fmt_list->viewFormatCount == 0)
139 return false;
140
141 for (uint32_t i = 0; i < fmt_list->viewFormatCount; i++) {
142 enum isl_format view_format =
143 anv_get_isl_format(devinfo, fmt_list->pViewFormats[i],
144 VK_IMAGE_ASPECT_COLOR_BIT, vk_info->tiling);
145
146 if (!isl_formats_are_ccs_e_compatible(devinfo, format, view_format))
147 return false;
148 }
149
150 return true;
151 }
152
153 /**
154 * For color images that have an auxiliary surface, request allocation for an
155 * additional buffer that mainly stores fast-clear values. Use of this buffer
156 * allows us to access the image's subresources while being aware of their
157 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
158 * which a fast clear has occurred).
159 *
160 * For the purpose of discoverability, the algorithm used to manage this buffer
161 * is described here. A clear value in this buffer is updated when a fast clear
162 * is performed on a subresource. One of two synchronization operations is
163 * performed in order for a following memory access to use the fast-clear
164 * value:
165 * a. Copy the value from the buffer to the surface state object used for
166 * reading. This is done implicitly when the value is the clear value
167 * predetermined to be the default in other surface state objects. This
168 * is currently only done explicitly for the operation below.
169 * b. Do (a) and use the surface state object to resolve the subresource.
170 * This is only done during layout transitions for decent performance.
171 *
172 * With the above scheme, we can fast-clear whenever the hardware allows except
173 * for two cases in which synchronization becomes impossible or undesirable:
174 * * The subresource is in the GENERAL layout and is cleared to a value
175 * other than the special default value.
176 *
177 * Performing a synchronization operation in order to read from the
178 * subresource is undesirable in this case. Firstly, b) is not an option
179 * because a layout transition isn't required between a write and read of
180 * an image in the GENERAL layout. Secondly, it's undesirable to do a)
181 * explicitly because it would require large infrastructural changes. The
182 * Vulkan API supports us in deciding not to optimize this layout by
183 * stating that using this layout may cause suboptimal performance. NOTE:
184 * the auxiliary buffer must always be enabled to support a) implicitly.
185 *
186 *
187 * * For the given miplevel, only some of the layers are cleared at once.
188 *
189 * If the user clears each layer to a different value, then tries to
190 * render to multiple layers at once, we have no ability to perform a
191 * synchronization operation in between. a) is not helpful because the
192 * object can only hold one clear value. b) is not an option because a
193 * layout transition isn't required in this case.
194 */
195 static void
196 add_fast_clear_state_buffer(struct anv_image *image,
197 const struct anv_device *device)
198 {
199 assert(image && device);
200 assert(image->aux_surface.isl.size > 0 &&
201 image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
202
203 /* The offset to the buffer of clear values must be dword-aligned for GPU
204 * memcpy operations. It is located immediately after the auxiliary surface.
205 */
206
207 /* Tiled images are guaranteed to be 4K aligned, so the image alignment
208 * should also be dword-aligned.
209 */
210 assert(image->alignment % 4 == 0);
211
212 /* Auxiliary buffers should be a multiple of 4K, so the start of the clear
213 * values buffer should already be dword-aligned.
214 */
215 assert(image->aux_surface.isl.size % 4 == 0);
216
217 /* This buffer should be at the very end of the image. */
218 assert(image->size ==
219 image->aux_surface.offset + image->aux_surface.isl.size);
220
221 const unsigned entry_size = anv_fast_clear_state_entry_size(device);
222 /* There's no padding between entries, so ensure that they're always a
223 * multiple of 32 bits in order to enable GPU memcpy operations.
224 */
225 assert(entry_size % 4 == 0);
226 image->size += entry_size * anv_image_aux_levels(image);
227 }
228
229 /**
230 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
231 * image's memory requirements (that is, the image's size and alignment).
232 *
233 * Exactly one bit must be set in \a aspect.
234 */
235 static VkResult
236 make_surface(const struct anv_device *dev,
237 struct anv_image *image,
238 const struct anv_image_create_info *anv_info,
239 VkImageAspectFlags aspect)
240 {
241 const VkImageCreateInfo *vk_info = anv_info->vk_info;
242 bool ok UNUSED;
243
244 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
245 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
246 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
247 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
248 };
249
250 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
251 * result with an optionally provided ISL tiling argument.
252 */
253 isl_tiling_flags_t tiling_flags =
254 (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
255 ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
256
257 if (anv_info->isl_tiling_flags)
258 tiling_flags &= anv_info->isl_tiling_flags;
259
260 assert(tiling_flags);
261
262 struct anv_surface *anv_surf = get_surface(image, aspect);
263
264 image->extent = anv_sanitize_image_extent(vk_info->imageType,
265 vk_info->extent);
266
267 enum isl_format format = anv_get_isl_format(&dev->info, vk_info->format,
268 aspect, vk_info->tiling);
269 assert(format != ISL_FORMAT_UNSUPPORTED);
270
271 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
272 .dim = vk_to_isl_surf_dim[vk_info->imageType],
273 .format = format,
274 .width = image->extent.width,
275 .height = image->extent.height,
276 .depth = image->extent.depth,
277 .levels = vk_info->mipLevels,
278 .array_len = vk_info->arrayLayers,
279 .samples = vk_info->samples,
280 .min_alignment = 0,
281 .row_pitch = anv_info->stride,
282 .usage = choose_isl_surf_usage(vk_info->flags, image->usage, aspect),
283 .tiling_flags = tiling_flags);
284
285 /* isl_surf_init() will fail only if provided invalid input. Invalid input
286 * is illegal in Vulkan.
287 */
288 assert(ok);
289
290 add_surface(image, anv_surf);
291
292 /* Add a HiZ surface to a depth buffer that will be used for rendering.
293 */
294 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
295 /* We don't advertise that depth buffers could be used as storage
296 * images.
297 */
298 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
299
300 /* Allow the user to control HiZ enabling. Disable by default on gen7
301 * because resolves are not currently implemented pre-BDW.
302 */
303 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
304 /* It will never be used as an attachment, HiZ is pointless. */
305 } else if (dev->info.gen == 7) {
306 anv_perf_warn(dev->instance, image, "Implement gen7 HiZ");
307 } else if (vk_info->mipLevels > 1) {
308 anv_perf_warn(dev->instance, image, "Enable multi-LOD HiZ");
309 } else if (vk_info->arrayLayers > 1) {
310 anv_perf_warn(dev->instance, image,
311 "Implement multi-arrayLayer HiZ clears and resolves");
312 } else if (dev->info.gen == 8 && vk_info->samples > 1) {
313 anv_perf_warn(dev->instance, image, "Enable gen8 multisampled HiZ");
314 } else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
315 assert(image->aux_surface.isl.size == 0);
316 ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
317 &image->aux_surface.isl);
318 assert(ok);
319 add_surface(image, &image->aux_surface);
320 image->aux_usage = ISL_AUX_USAGE_HIZ;
321 }
322 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
323 if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
324 assert(image->aux_surface.isl.size == 0);
325 ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
326 &image->aux_surface.isl, 0);
327 if (ok) {
328
329 /* Disable CCS when it is not useful (i.e., when you can't render
330 * to the image with CCS enabled).
331 */
332 if (!isl_format_supports_rendering(&dev->info, format)) {
333 /* While it may be technically possible to enable CCS for this
334 * image, we currently don't have things hooked up to get it
335 * working.
336 */
337 anv_perf_warn(dev->instance, image,
338 "This image format doesn't support rendering. "
339 "Not allocating an CCS buffer.");
340 image->aux_surface.isl.size = 0;
341 return VK_SUCCESS;
342 }
343
344 add_surface(image, &image->aux_surface);
345 add_fast_clear_state_buffer(image, dev);
346
347 /* For images created without MUTABLE_FORMAT_BIT set, we know that
348 * they will always be used with the original format. In
349 * particular, they will always be used with a format that
350 * supports color compression. If it's never used as a storage
351 * image, then it will only be used through the sampler or the as
352 * a render target. This means that it's safe to just leave
353 * compression on at all times for these formats.
354 */
355 if (!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
356 all_formats_ccs_e_compatible(&dev->info, vk_info)) {
357 image->aux_usage = ISL_AUX_USAGE_CCS_E;
358 }
359 }
360 }
361 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples > 1) {
362 assert(image->aux_surface.isl.size == 0);
363 assert(!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT));
364 ok = isl_surf_get_mcs_surf(&dev->isl_dev, &anv_surf->isl,
365 &image->aux_surface.isl);
366 if (ok) {
367 add_surface(image, &image->aux_surface);
368 add_fast_clear_state_buffer(image, dev);
369 image->aux_usage = ISL_AUX_USAGE_MCS;
370 }
371 }
372
373 return VK_SUCCESS;
374 }
375
376 VkResult
377 anv_image_create(VkDevice _device,
378 const struct anv_image_create_info *create_info,
379 const VkAllocationCallbacks* alloc,
380 VkImage *pImage)
381 {
382 ANV_FROM_HANDLE(anv_device, device, _device);
383 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
384 struct anv_image *image = NULL;
385 VkResult r;
386
387 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
388
389 anv_assert(pCreateInfo->mipLevels > 0);
390 anv_assert(pCreateInfo->arrayLayers > 0);
391 anv_assert(pCreateInfo->samples > 0);
392 anv_assert(pCreateInfo->extent.width > 0);
393 anv_assert(pCreateInfo->extent.height > 0);
394 anv_assert(pCreateInfo->extent.depth > 0);
395
396 image = vk_zalloc2(&device->alloc, alloc, sizeof(*image), 8,
397 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
398 if (!image)
399 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
400
401 image->type = pCreateInfo->imageType;
402 image->extent = pCreateInfo->extent;
403 image->vk_format = pCreateInfo->format;
404 image->aspects = vk_format_aspects(image->vk_format);
405 image->levels = pCreateInfo->mipLevels;
406 image->array_size = pCreateInfo->arrayLayers;
407 image->samples = pCreateInfo->samples;
408 image->usage = pCreateInfo->usage;
409 image->tiling = pCreateInfo->tiling;
410 image->aux_usage = ISL_AUX_USAGE_NONE;
411
412 uint32_t b;
413 for_each_bit(b, image->aspects) {
414 r = make_surface(device, image, create_info, (1 << b));
415 if (r != VK_SUCCESS)
416 goto fail;
417 }
418
419 *pImage = anv_image_to_handle(image);
420
421 return VK_SUCCESS;
422
423 fail:
424 if (image)
425 vk_free2(&device->alloc, alloc, image);
426
427 return r;
428 }
429
430 VkResult
431 anv_CreateImage(VkDevice device,
432 const VkImageCreateInfo *pCreateInfo,
433 const VkAllocationCallbacks *pAllocator,
434 VkImage *pImage)
435 {
436 return anv_image_create(device,
437 &(struct anv_image_create_info) {
438 .vk_info = pCreateInfo,
439 },
440 pAllocator,
441 pImage);
442 }
443
444 void
445 anv_DestroyImage(VkDevice _device, VkImage _image,
446 const VkAllocationCallbacks *pAllocator)
447 {
448 ANV_FROM_HANDLE(anv_device, device, _device);
449 ANV_FROM_HANDLE(anv_image, image, _image);
450
451 if (!image)
452 return;
453
454 vk_free2(&device->alloc, pAllocator, image);
455 }
456
457 static void
458 anv_bind_image_memory(const VkBindImageMemoryInfoKHR *pBindInfo)
459 {
460 ANV_FROM_HANDLE(anv_device_memory, mem, pBindInfo->memory);
461 ANV_FROM_HANDLE(anv_image, image, pBindInfo->image);
462
463 assert(pBindInfo->sType == VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_INFO_KHR);
464
465 if (mem == NULL) {
466 image->bo = NULL;
467 image->offset = 0;
468 return;
469 }
470
471 image->bo = mem->bo;
472 image->offset = pBindInfo->memoryOffset;
473 }
474
475 VkResult anv_BindImageMemory(
476 VkDevice device,
477 VkImage image,
478 VkDeviceMemory memory,
479 VkDeviceSize memoryOffset)
480 {
481 anv_bind_image_memory(
482 &(VkBindImageMemoryInfoKHR) {
483 .sType = VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_INFO_KHR,
484 .image = image,
485 .memory = memory,
486 .memoryOffset = memoryOffset,
487 });
488
489 return VK_SUCCESS;
490 }
491
492 VkResult anv_BindImageMemory2KHR(
493 VkDevice device,
494 uint32_t bindInfoCount,
495 const VkBindImageMemoryInfoKHR* pBindInfos)
496 {
497 for (uint32_t i = 0; i < bindInfoCount; i++)
498 anv_bind_image_memory(&pBindInfos[i]);
499
500 return VK_SUCCESS;
501 }
502
503 static void
504 anv_surface_get_subresource_layout(struct anv_image *image,
505 struct anv_surface *surface,
506 const VkImageSubresource *subresource,
507 VkSubresourceLayout *layout)
508 {
509 /* If we are on a non-zero mip level or array slice, we need to
510 * calculate a real offset.
511 */
512 anv_assert(subresource->mipLevel == 0);
513 anv_assert(subresource->arrayLayer == 0);
514
515 layout->offset = surface->offset;
516 layout->rowPitch = surface->isl.row_pitch;
517 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
518 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
519 layout->size = surface->isl.size;
520 }
521
522 void anv_GetImageSubresourceLayout(
523 VkDevice device,
524 VkImage _image,
525 const VkImageSubresource* pSubresource,
526 VkSubresourceLayout* pLayout)
527 {
528 ANV_FROM_HANDLE(anv_image, image, _image);
529
530 assert(__builtin_popcount(pSubresource->aspectMask) == 1);
531
532 switch (pSubresource->aspectMask) {
533 case VK_IMAGE_ASPECT_COLOR_BIT:
534 anv_surface_get_subresource_layout(image, &image->color_surface,
535 pSubresource, pLayout);
536 break;
537 case VK_IMAGE_ASPECT_DEPTH_BIT:
538 anv_surface_get_subresource_layout(image, &image->depth_surface,
539 pSubresource, pLayout);
540 break;
541 case VK_IMAGE_ASPECT_STENCIL_BIT:
542 anv_surface_get_subresource_layout(image, &image->stencil_surface,
543 pSubresource, pLayout);
544 break;
545 default:
546 assert(!"Invalid image aspect");
547 }
548 }
549
550 /**
551 * This function determines the optimal buffer to use for a given
552 * VkImageLayout and other pieces of information needed to make that
553 * determination. This does not determine the optimal buffer to use
554 * during a resolve operation.
555 *
556 * @param devinfo The device information of the Intel GPU.
557 * @param image The image that may contain a collection of buffers.
558 * @param aspects The aspect(s) of the image to be accessed.
559 * @param layout The current layout of the image aspect(s).
560 *
561 * @return The primary buffer that should be used for the given layout.
562 */
563 enum isl_aux_usage
564 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
565 const struct anv_image * const image,
566 const VkImageAspectFlags aspects,
567 const VkImageLayout layout)
568 {
569 /* Validate the inputs. */
570
571 /* The devinfo is needed as the optimal buffer varies across generations. */
572 assert(devinfo != NULL);
573
574 /* The layout of a NULL image is not properly defined. */
575 assert(image != NULL);
576
577 /* The aspects must be a subset of the image aspects. */
578 assert(aspects & image->aspects && aspects <= image->aspects);
579
580 /* Determine the optimal buffer. */
581
582 /* If there is no auxiliary surface allocated, we must use the one and only
583 * main buffer.
584 */
585 if (image->aux_surface.isl.size == 0)
586 return ISL_AUX_USAGE_NONE;
587
588 /* All images that use an auxiliary surface are required to be tiled. */
589 assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
590
591 /* On BDW+, when clearing the stencil aspect of a depth stencil image,
592 * the HiZ buffer allows us to record the clear with a relatively small
593 * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
594 * to the stencil aspect.
595 */
596 if (devinfo->gen < 8 && aspects == VK_IMAGE_ASPECT_STENCIL_BIT)
597 return ISL_AUX_USAGE_NONE;
598
599 const bool color_aspect = aspects == VK_IMAGE_ASPECT_COLOR_BIT;
600
601 /* The following switch currently only handles depth stencil aspects.
602 * TODO: Handle the color aspect.
603 */
604 if (color_aspect)
605 return image->aux_usage;
606
607 switch (layout) {
608
609 /* Invalid Layouts */
610 case VK_IMAGE_LAYOUT_RANGE_SIZE:
611 case VK_IMAGE_LAYOUT_MAX_ENUM:
612 unreachable("Invalid image layout.");
613
614 /* Undefined layouts
615 *
616 * The pre-initialized layout is equivalent to the undefined layout for
617 * optimally-tiled images. We can only do color compression (CCS or HiZ)
618 * on tiled images.
619 */
620 case VK_IMAGE_LAYOUT_UNDEFINED:
621 case VK_IMAGE_LAYOUT_PREINITIALIZED:
622 return ISL_AUX_USAGE_NONE;
623
624
625 /* Transfer Layouts
626 *
627 * This buffer could be a depth buffer used in a transfer operation. BLORP
628 * currently doesn't use HiZ for transfer operations so we must use the main
629 * buffer for this layout. TODO: Enable HiZ in BLORP.
630 */
631 case VK_IMAGE_LAYOUT_GENERAL:
632 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
633 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
634 return ISL_AUX_USAGE_NONE;
635
636
637 /* Sampling Layouts */
638 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
639 assert(!color_aspect);
640 /* Fall-through */
641 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
642 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL_KHR:
643 if (anv_can_sample_with_hiz(devinfo, aspects, image->samples))
644 return ISL_AUX_USAGE_HIZ;
645 else
646 return ISL_AUX_USAGE_NONE;
647
648 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
649 assert(color_aspect);
650
651 /* On SKL+, the render buffer can be decompressed by the presentation
652 * engine. Support for this feature has not yet landed in the wider
653 * ecosystem. TODO: Update this code when support lands.
654 *
655 * From the BDW PRM, Vol 7, Render Target Resolve:
656 *
657 * If the MCS is enabled on a non-multisampled render target, the
658 * render target must be resolved before being used for other
659 * purposes (display, texture, CPU lock) The clear value from
660 * SURFACE_STATE is written into pixels in the render target
661 * indicated as clear in the MCS.
662 *
663 * Pre-SKL, the render buffer must be resolved before being used for
664 * presentation. We can infer that the auxiliary buffer is not used.
665 */
666 return ISL_AUX_USAGE_NONE;
667
668
669 /* Rendering Layouts */
670 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
671 assert(color_aspect);
672 unreachable("Color images are not yet supported.");
673
674 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
675 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL_KHR:
676 assert(!color_aspect);
677 return ISL_AUX_USAGE_HIZ;
678
679 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
680 unreachable("VK_KHR_shared_presentable_image is unsupported");
681 }
682
683 /* If the layout isn't recognized in the exhaustive switch above, the
684 * VkImageLayout value is not defined in vulkan.h.
685 */
686 unreachable("layout is not a VkImageLayout enumeration member.");
687 }
688
689
690 static struct anv_state
691 alloc_surface_state(struct anv_device *device)
692 {
693 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
694 }
695
696 static enum isl_channel_select
697 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
698 struct isl_swizzle format_swizzle)
699 {
700 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
701 swizzle = component;
702
703 switch (swizzle) {
704 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
705 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
706 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
707 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
708 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
709 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
710 default:
711 unreachable("Invalid swizzle");
712 }
713 }
714
715
716 VkResult
717 anv_CreateImageView(VkDevice _device,
718 const VkImageViewCreateInfo *pCreateInfo,
719 const VkAllocationCallbacks *pAllocator,
720 VkImageView *pView)
721 {
722 ANV_FROM_HANDLE(anv_device, device, _device);
723 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
724 struct anv_image_view *iview;
725
726 iview = vk_zalloc2(&device->alloc, pAllocator, sizeof(*iview), 8,
727 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
728 if (iview == NULL)
729 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
730
731 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
732
733 assert(range->layerCount > 0);
734 assert(range->baseMipLevel < image->levels);
735 assert(image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
736 VK_IMAGE_USAGE_STORAGE_BIT |
737 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
738 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
739 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
740
741 switch (image->type) {
742 default:
743 unreachable("bad VkImageType");
744 case VK_IMAGE_TYPE_1D:
745 case VK_IMAGE_TYPE_2D:
746 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
747 break;
748 case VK_IMAGE_TYPE_3D:
749 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
750 <= anv_minify(image->extent.depth, range->baseMipLevel));
751 break;
752 }
753
754 const struct anv_surface *surface =
755 anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
756
757 iview->image = image;
758 iview->bo = image->bo;
759 iview->offset = image->offset + surface->offset;
760
761 iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
762 iview->vk_format = pCreateInfo->format;
763
764 struct anv_format format = anv_get_format(&device->info, pCreateInfo->format,
765 range->aspectMask, image->tiling);
766
767 iview->isl = (struct isl_view) {
768 .format = format.isl_format,
769 .base_level = range->baseMipLevel,
770 .levels = anv_get_levelCount(image, range),
771 .base_array_layer = range->baseArrayLayer,
772 .array_len = anv_get_layerCount(image, range),
773 .swizzle = {
774 .r = remap_swizzle(pCreateInfo->components.r,
775 VK_COMPONENT_SWIZZLE_R, format.swizzle),
776 .g = remap_swizzle(pCreateInfo->components.g,
777 VK_COMPONENT_SWIZZLE_G, format.swizzle),
778 .b = remap_swizzle(pCreateInfo->components.b,
779 VK_COMPONENT_SWIZZLE_B, format.swizzle),
780 .a = remap_swizzle(pCreateInfo->components.a,
781 VK_COMPONENT_SWIZZLE_A, format.swizzle),
782 },
783 };
784
785 iview->extent = (VkExtent3D) {
786 .width = anv_minify(image->extent.width , range->baseMipLevel),
787 .height = anv_minify(image->extent.height, range->baseMipLevel),
788 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
789 };
790
791 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
792 iview->isl.base_array_layer = 0;
793 iview->isl.array_len = iview->extent.depth;
794 }
795
796 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
797 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
798 iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT;
799 } else {
800 iview->isl.usage = 0;
801 }
802
803 /* Input attachment surfaces for color are allocated and filled
804 * out at BeginRenderPass time because they need compression information.
805 * Compression is not yet enabled for depth textures and stencil doesn't
806 * allow compression so we can just use the texture surface state from the
807 * view.
808 */
809 if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
810 (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
811 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
812 iview->optimal_sampler_surface_state = alloc_surface_state(device);
813 iview->general_sampler_surface_state = alloc_surface_state(device);
814
815 iview->general_sampler_aux_usage =
816 anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
817 VK_IMAGE_LAYOUT_GENERAL);
818 iview->optimal_sampler_aux_usage =
819 anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
820 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
821
822 /* If this is a HiZ buffer we can sample from with a programmable clear
823 * value (SKL+), define the clear value to the optimal constant.
824 */
825 union isl_color_value clear_color = { .u32 = { 0, } };
826 if ((iview->aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT) &&
827 device->info.gen >= 9)
828 clear_color.f32[0] = ANV_HZ_FC_VAL;
829
830 struct isl_view view = iview->isl;
831 view.usage |= ISL_SURF_USAGE_TEXTURE_BIT;
832
833 isl_surf_fill_state(&device->isl_dev,
834 iview->optimal_sampler_surface_state.map,
835 .surf = &surface->isl,
836 .view = &view,
837 .clear_color = clear_color,
838 .aux_surf = &image->aux_surface.isl,
839 .aux_usage = iview->optimal_sampler_aux_usage,
840 .mocs = device->default_mocs);
841
842 isl_surf_fill_state(&device->isl_dev,
843 iview->general_sampler_surface_state.map,
844 .surf = &surface->isl,
845 .view = &view,
846 .clear_color = clear_color,
847 .aux_surf = &image->aux_surface.isl,
848 .aux_usage = iview->general_sampler_aux_usage,
849 .mocs = device->default_mocs);
850
851 anv_state_flush(device, iview->optimal_sampler_surface_state);
852 anv_state_flush(device, iview->general_sampler_surface_state);
853 }
854
855 /* NOTE: This one needs to go last since it may stomp isl_view.format */
856 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
857 iview->storage_surface_state = alloc_surface_state(device);
858 iview->writeonly_storage_surface_state = alloc_surface_state(device);
859
860 struct isl_view view = iview->isl;
861 view.usage |= ISL_SURF_USAGE_STORAGE_BIT;
862
863 /* Write-only accesses always used a typed write instruction and should
864 * therefore use the real format.
865 */
866 isl_surf_fill_state(&device->isl_dev,
867 iview->writeonly_storage_surface_state.map,
868 .surf = &surface->isl,
869 .view = &view,
870 .aux_surf = &image->aux_surface.isl,
871 .aux_usage = image->aux_usage,
872 .mocs = device->default_mocs);
873
874 if (isl_has_matching_typed_storage_image_format(&device->info,
875 format.isl_format)) {
876 /* Typed surface reads support a very limited subset of the shader
877 * image formats. Translate it into the closest format the hardware
878 * supports.
879 */
880 view.format = isl_lower_storage_image_format(&device->info,
881 format.isl_format);
882
883 isl_surf_fill_state(&device->isl_dev,
884 iview->storage_surface_state.map,
885 .surf = &surface->isl,
886 .view = &view,
887 .aux_surf = &image->aux_surface.isl,
888 .aux_usage = image->aux_usage,
889 .mocs = device->default_mocs);
890 } else {
891 anv_fill_buffer_surface_state(device, iview->storage_surface_state,
892 ISL_FORMAT_RAW,
893 iview->offset,
894 iview->bo->size - iview->offset, 1);
895 }
896
897 isl_surf_fill_image_param(&device->isl_dev,
898 &iview->storage_image_param,
899 &surface->isl, &iview->isl);
900
901 anv_state_flush(device, iview->storage_surface_state);
902 anv_state_flush(device, iview->writeonly_storage_surface_state);
903 }
904
905 *pView = anv_image_view_to_handle(iview);
906
907 return VK_SUCCESS;
908 }
909
910 void
911 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
912 const VkAllocationCallbacks *pAllocator)
913 {
914 ANV_FROM_HANDLE(anv_device, device, _device);
915 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
916
917 if (!iview)
918 return;
919
920 if (iview->optimal_sampler_surface_state.alloc_size > 0) {
921 anv_state_pool_free(&device->surface_state_pool,
922 iview->optimal_sampler_surface_state);
923 }
924
925 if (iview->general_sampler_surface_state.alloc_size > 0) {
926 anv_state_pool_free(&device->surface_state_pool,
927 iview->general_sampler_surface_state);
928 }
929
930 if (iview->storage_surface_state.alloc_size > 0) {
931 anv_state_pool_free(&device->surface_state_pool,
932 iview->storage_surface_state);
933 }
934
935 if (iview->writeonly_storage_surface_state.alloc_size > 0) {
936 anv_state_pool_free(&device->surface_state_pool,
937 iview->writeonly_storage_surface_state);
938 }
939
940 vk_free2(&device->alloc, pAllocator, iview);
941 }
942
943
944 VkResult
945 anv_CreateBufferView(VkDevice _device,
946 const VkBufferViewCreateInfo *pCreateInfo,
947 const VkAllocationCallbacks *pAllocator,
948 VkBufferView *pView)
949 {
950 ANV_FROM_HANDLE(anv_device, device, _device);
951 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
952 struct anv_buffer_view *view;
953
954 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
955 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
956 if (!view)
957 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
958
959 /* TODO: Handle the format swizzle? */
960
961 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
962 VK_IMAGE_ASPECT_COLOR_BIT,
963 VK_IMAGE_TILING_LINEAR);
964 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
965 view->bo = buffer->bo;
966 view->offset = buffer->offset + pCreateInfo->offset;
967 view->range = anv_buffer_get_range(buffer, pCreateInfo->offset,
968 pCreateInfo->range);
969 view->range = align_down_npot_u32(view->range, format_bs);
970
971 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
972 view->surface_state = alloc_surface_state(device);
973
974 anv_fill_buffer_surface_state(device, view->surface_state,
975 view->format,
976 view->offset, view->range, format_bs);
977 } else {
978 view->surface_state = (struct anv_state){ 0 };
979 }
980
981 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
982 view->storage_surface_state = alloc_surface_state(device);
983 view->writeonly_storage_surface_state = alloc_surface_state(device);
984
985 enum isl_format storage_format =
986 isl_has_matching_typed_storage_image_format(&device->info,
987 view->format) ?
988 isl_lower_storage_image_format(&device->info, view->format) :
989 ISL_FORMAT_RAW;
990
991 anv_fill_buffer_surface_state(device, view->storage_surface_state,
992 storage_format,
993 view->offset, view->range,
994 (storage_format == ISL_FORMAT_RAW ? 1 :
995 isl_format_get_layout(storage_format)->bpb / 8));
996
997 /* Write-only accesses should use the original format. */
998 anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
999 view->format,
1000 view->offset, view->range,
1001 isl_format_get_layout(view->format)->bpb / 8);
1002
1003 isl_buffer_fill_image_param(&device->isl_dev,
1004 &view->storage_image_param,
1005 view->format, view->range);
1006 } else {
1007 view->storage_surface_state = (struct anv_state){ 0 };
1008 view->writeonly_storage_surface_state = (struct anv_state){ 0 };
1009 }
1010
1011 *pView = anv_buffer_view_to_handle(view);
1012
1013 return VK_SUCCESS;
1014 }
1015
1016 void
1017 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
1018 const VkAllocationCallbacks *pAllocator)
1019 {
1020 ANV_FROM_HANDLE(anv_device, device, _device);
1021 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
1022
1023 if (!view)
1024 return;
1025
1026 if (view->surface_state.alloc_size > 0)
1027 anv_state_pool_free(&device->surface_state_pool,
1028 view->surface_state);
1029
1030 if (view->storage_surface_state.alloc_size > 0)
1031 anv_state_pool_free(&device->surface_state_pool,
1032 view->storage_surface_state);
1033
1034 if (view->writeonly_storage_surface_state.alloc_size > 0)
1035 anv_state_pool_free(&device->surface_state_pool,
1036 view->writeonly_storage_surface_state);
1037
1038 vk_free2(&device->alloc, pAllocator, view);
1039 }
1040
1041 const struct anv_surface *
1042 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
1043 VkImageAspectFlags aspect_mask)
1044 {
1045 switch (aspect_mask) {
1046 case VK_IMAGE_ASPECT_COLOR_BIT:
1047 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
1048 return &image->color_surface;
1049 case VK_IMAGE_ASPECT_DEPTH_BIT:
1050 assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
1051 return &image->depth_surface;
1052 case VK_IMAGE_ASPECT_STENCIL_BIT:
1053 assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
1054 return &image->stencil_surface;
1055 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
1056 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
1057 * combined depth stencil formats. Specifically, it states:
1058 *
1059 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
1060 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
1061 *
1062 * Image views with both depth and stencil aspects are only valid for
1063 * render target attachments, in which case
1064 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
1065 * stencil surfaces from the underlying surface.
1066 */
1067 if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
1068 return &image->depth_surface;
1069 } else {
1070 assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
1071 return &image->stencil_surface;
1072 }
1073 default:
1074 unreachable("image does not have aspect");
1075 return NULL;
1076 }
1077 }