2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
31 #include "util/debug.h"
33 #include "vk_format_info.h"
36 * Exactly one bit must be set in \a aspect.
38 static isl_surf_usage_flags_t
39 choose_isl_surf_usage(VkImageUsageFlags vk_usage
,
40 VkImageAspectFlags aspect
)
42 isl_surf_usage_flags_t isl_usage
= 0;
44 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
45 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
47 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
53 if (vk_usage
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
56 /* Even if we're only using it for transfer operations, clears to depth and
57 * stencil images happen as depth and stencil so they need the right ISL
58 * usage bits or else things will fall apart.
61 case VK_IMAGE_ASPECT_DEPTH_BIT
:
62 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
64 case VK_IMAGE_ASPECT_STENCIL_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
67 case VK_IMAGE_ASPECT_COLOR_BIT
:
70 unreachable("bad VkImageAspect");
73 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
74 /* blorp implements transfers by sampling from the source image. */
75 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
78 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
79 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
80 /* blorp implements transfers by rendering into the destination image.
81 * Only request this with color images, as we deal with depth/stencil
82 * formats differently. */
83 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
90 * Exactly one bit must be set in \a aspect.
92 static struct anv_surface
*
93 get_surface(struct anv_image
*image
, VkImageAspectFlags aspect
)
97 unreachable("bad VkImageAspect");
98 case VK_IMAGE_ASPECT_COLOR_BIT
:
99 return &image
->color_surface
;
100 case VK_IMAGE_ASPECT_DEPTH_BIT
:
101 return &image
->depth_surface
;
102 case VK_IMAGE_ASPECT_STENCIL_BIT
:
103 return &image
->stencil_surface
;
108 add_surface(struct anv_image
*image
, struct anv_surface
*surf
)
110 assert(surf
->isl
.size
> 0); /* isl surface must be initialized */
112 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment
);
113 image
->size
= surf
->offset
+ surf
->isl
.size
;
114 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment
);
118 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
119 * image's memory requirements (that is, the image's size and alignment).
121 * Exactly one bit must be set in \a aspect.
124 make_surface(const struct anv_device
*dev
,
125 struct anv_image
*image
,
126 const struct anv_image_create_info
*anv_info
,
127 VkImageAspectFlags aspect
)
129 const VkImageCreateInfo
*vk_info
= anv_info
->vk_info
;
132 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
133 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
134 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
135 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
138 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
139 * result with an optionally provided ISL tiling argument.
141 isl_tiling_flags_t tiling_flags
=
142 (vk_info
->tiling
== VK_IMAGE_TILING_LINEAR
) ?
143 ISL_TILING_LINEAR_BIT
: ISL_TILING_ANY_MASK
;
145 if (anv_info
->isl_tiling_flags
)
146 tiling_flags
&= anv_info
->isl_tiling_flags
;
148 assert(tiling_flags
);
150 struct anv_surface
*anv_surf
= get_surface(image
, aspect
);
152 image
->extent
= anv_sanitize_image_extent(vk_info
->imageType
,
155 enum isl_format format
= anv_get_isl_format(&dev
->info
, vk_info
->format
,
156 aspect
, vk_info
->tiling
);
157 assert(format
!= ISL_FORMAT_UNSUPPORTED
);
159 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
160 .dim
= vk_to_isl_surf_dim
[vk_info
->imageType
],
162 .width
= image
->extent
.width
,
163 .height
= image
->extent
.height
,
164 .depth
= image
->extent
.depth
,
165 .levels
= vk_info
->mipLevels
,
166 .array_len
= vk_info
->arrayLayers
,
167 .samples
= vk_info
->samples
,
169 .min_pitch
= anv_info
->stride
,
170 .usage
= choose_isl_surf_usage(image
->usage
, aspect
),
171 .tiling_flags
= tiling_flags
);
173 /* isl_surf_init() will fail only if provided invalid input. Invalid input
174 * is illegal in Vulkan.
178 add_surface(image
, anv_surf
);
180 /* Add a HiZ surface to a depth buffer that will be used for rendering.
182 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
183 /* Allow the user to control HiZ enabling. Disable by default on gen7
184 * because resolves are not currently implemented pre-BDW.
186 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
187 /* It will never be used as an attachment, HiZ is pointless. */
188 } else if (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
) {
189 /* From the 1.0.37 spec:
191 * "An attachment used as an input attachment and depth/stencil
192 * attachment must be in either VK_IMAGE_LAYOUT_GENERAL or
193 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL."
195 * It will never have a layout of
196 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, so HiZ is
197 * currently pointless. If transfer operations learn to use the HiZ
198 * buffer, we can enable HiZ for VK_IMAGE_LAYOUT_GENERAL and support
201 anv_finishme("Implement HiZ for input attachments");
202 } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev
->info
.gen
>= 8)) {
203 anv_finishme("Implement gen7 HiZ");
204 } else if (vk_info
->mipLevels
> 1) {
205 anv_finishme("Test multi-LOD HiZ");
206 } else if (vk_info
->arrayLayers
> 1) {
207 anv_finishme("Implement multi-arrayLayer HiZ clears and resolves");
208 } else if (dev
->info
.gen
== 8 && vk_info
->samples
> 1) {
209 anv_finishme("Test gen8 multisampled HiZ");
211 assert(image
->aux_surface
.isl
.size
== 0);
212 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
, &image
->depth_surface
.isl
,
213 &image
->aux_surface
.isl
);
215 add_surface(image
, &image
->aux_surface
);
216 image
->aux_usage
= ISL_AUX_USAGE_HIZ
;
218 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
== 1) {
219 if (!unlikely(INTEL_DEBUG
& DEBUG_NO_RBC
)) {
220 assert(image
->aux_surface
.isl
.size
== 0);
221 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
222 &image
->aux_surface
.isl
);
224 add_surface(image
, &image
->aux_surface
);
226 /* For images created without MUTABLE_FORMAT_BIT set, we know that
227 * they will always be used with the original format. In
228 * particular, they will always be used with a format that
229 * supports color compression. If it's never used as a storage
230 * image, then it will only be used through the sampler or the as
231 * a render target. This means that it's safe to just leave
232 * compression on at all times for these formats.
234 if (!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
235 !(vk_info
->flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
) &&
236 isl_format_supports_ccs_e(&dev
->info
, format
)) {
237 image
->aux_usage
= ISL_AUX_USAGE_CCS_E
;
241 } else if (aspect
== VK_IMAGE_ASPECT_COLOR_BIT
&& vk_info
->samples
> 1) {
242 assert(image
->aux_surface
.isl
.size
== 0);
243 assert(!(vk_info
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
244 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
, &anv_surf
->isl
,
245 &image
->aux_surface
.isl
);
247 add_surface(image
, &image
->aux_surface
);
248 image
->aux_usage
= ISL_AUX_USAGE_MCS
;
256 anv_image_create(VkDevice _device
,
257 const struct anv_image_create_info
*create_info
,
258 const VkAllocationCallbacks
* alloc
,
261 ANV_FROM_HANDLE(anv_device
, device
, _device
);
262 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
263 struct anv_image
*image
= NULL
;
266 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
268 anv_assert(pCreateInfo
->mipLevels
> 0);
269 anv_assert(pCreateInfo
->arrayLayers
> 0);
270 anv_assert(pCreateInfo
->samples
> 0);
271 anv_assert(pCreateInfo
->extent
.width
> 0);
272 anv_assert(pCreateInfo
->extent
.height
> 0);
273 anv_assert(pCreateInfo
->extent
.depth
> 0);
275 image
= vk_alloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
276 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
278 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
280 memset(image
, 0, sizeof(*image
));
281 image
->type
= pCreateInfo
->imageType
;
282 image
->extent
= pCreateInfo
->extent
;
283 image
->vk_format
= pCreateInfo
->format
;
284 image
->aspects
= vk_format_aspects(image
->vk_format
);
285 image
->levels
= pCreateInfo
->mipLevels
;
286 image
->array_size
= pCreateInfo
->arrayLayers
;
287 image
->samples
= pCreateInfo
->samples
;
288 image
->usage
= pCreateInfo
->usage
;
289 image
->tiling
= pCreateInfo
->tiling
;
290 image
->aux_usage
= ISL_AUX_USAGE_NONE
;
293 for_each_bit(b
, image
->aspects
) {
294 r
= make_surface(device
, image
, create_info
, (1 << b
));
299 *pImage
= anv_image_to_handle(image
);
305 vk_free2(&device
->alloc
, alloc
, image
);
311 anv_CreateImage(VkDevice device
,
312 const VkImageCreateInfo
*pCreateInfo
,
313 const VkAllocationCallbacks
*pAllocator
,
316 return anv_image_create(device
,
317 &(struct anv_image_create_info
) {
318 .vk_info
= pCreateInfo
,
325 anv_DestroyImage(VkDevice _device
, VkImage _image
,
326 const VkAllocationCallbacks
*pAllocator
)
328 ANV_FROM_HANDLE(anv_device
, device
, _device
);
329 ANV_FROM_HANDLE(anv_image
, image
, _image
);
334 vk_free2(&device
->alloc
, pAllocator
, image
);
337 VkResult
anv_BindImageMemory(
340 VkDeviceMemory _memory
,
341 VkDeviceSize memoryOffset
)
343 ANV_FROM_HANDLE(anv_device
, device
, _device
);
344 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
345 ANV_FROM_HANDLE(anv_image
, image
, _image
);
348 image
->bo
= &mem
->bo
;
349 image
->offset
= memoryOffset
;
355 if (image
->aux_surface
.isl
.size
> 0) {
357 /* The offset and size must be a multiple of 4K or else the
358 * anv_gem_mmap call below will return NULL.
360 assert((image
->offset
+ image
->aux_surface
.offset
) % 4096 == 0);
361 assert(image
->aux_surface
.isl
.size
% 4096 == 0);
363 /* Auxiliary surfaces need to have their memory cleared to 0 before they
364 * can be used. For CCS surfaces, this puts them in the "resolved"
365 * state so they can be used with CCS enabled before we ever touch it
366 * from the GPU. For HiZ, we need something valid or else we may get
367 * GPU hangs on some hardware and 0 works fine.
369 void *map
= anv_gem_mmap(device
, image
->bo
->gem_handle
,
370 image
->offset
+ image
->aux_surface
.offset
,
371 image
->aux_surface
.isl
.size
,
372 device
->info
.has_llc
? 0 : I915_MMAP_WC
);
374 /* If anv_gem_mmap returns NULL, it's likely that the kernel was
375 * not able to find space on the host to create a proper mapping.
378 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
380 memset(map
, 0, image
->aux_surface
.isl
.size
);
382 anv_gem_munmap(map
, image
->aux_surface
.isl
.size
);
389 anv_surface_get_subresource_layout(struct anv_image
*image
,
390 struct anv_surface
*surface
,
391 const VkImageSubresource
*subresource
,
392 VkSubresourceLayout
*layout
)
394 /* If we are on a non-zero mip level or array slice, we need to
395 * calculate a real offset.
397 anv_assert(subresource
->mipLevel
== 0);
398 anv_assert(subresource
->arrayLayer
== 0);
400 layout
->offset
= surface
->offset
;
401 layout
->rowPitch
= surface
->isl
.row_pitch
;
402 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
403 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
404 layout
->size
= surface
->isl
.size
;
407 void anv_GetImageSubresourceLayout(
410 const VkImageSubresource
* pSubresource
,
411 VkSubresourceLayout
* pLayout
)
413 ANV_FROM_HANDLE(anv_image
, image
, _image
);
415 assert(__builtin_popcount(pSubresource
->aspectMask
) == 1);
417 switch (pSubresource
->aspectMask
) {
418 case VK_IMAGE_ASPECT_COLOR_BIT
:
419 anv_surface_get_subresource_layout(image
, &image
->color_surface
,
420 pSubresource
, pLayout
);
422 case VK_IMAGE_ASPECT_DEPTH_BIT
:
423 anv_surface_get_subresource_layout(image
, &image
->depth_surface
,
424 pSubresource
, pLayout
);
426 case VK_IMAGE_ASPECT_STENCIL_BIT
:
427 anv_surface_get_subresource_layout(image
, &image
->stencil_surface
,
428 pSubresource
, pLayout
);
431 assert(!"Invalid image aspect");
436 * This function determines the optimal buffer to use for device
437 * accesses given a VkImageLayout and other pieces of information needed to
438 * make that determination. This does not determine the optimal buffer to
439 * use during a resolve operation.
441 * NOTE: Some layouts do not support device access.
443 * @param devinfo The device information of the Intel GPU.
444 * @param image The image that may contain a collection of buffers.
445 * @param aspects The aspect(s) of the image to be accessed.
446 * @param layout The current layout of the image aspect(s).
448 * @return The primary buffer that should be used for the given layout.
451 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
452 const struct anv_image
* const image
,
453 const VkImageAspectFlags aspects
,
454 const VkImageLayout layout
)
456 /* Validate the inputs. */
458 /* The devinfo is needed as the optimal buffer varies across generations. */
459 assert(devinfo
!= NULL
);
461 /* The layout of a NULL image is not properly defined. */
462 assert(image
!= NULL
);
464 /* The aspects must be a subset of the image aspects. */
465 assert(aspects
& image
->aspects
&& aspects
<= image
->aspects
);
467 /* Determine the optimal buffer. */
469 /* If there is no auxiliary surface allocated, we must use the one and only
472 if (image
->aux_surface
.isl
.size
== 0)
473 return ISL_AUX_USAGE_NONE
;
475 /* All images that use an auxiliary surface are required to be tiled. */
476 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
478 /* On BDW+, when clearing the stencil aspect of a depth stencil image,
479 * the HiZ buffer allows us to record the clear with a relatively small
480 * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
481 * to the stencil aspect.
483 if (devinfo
->gen
< 8 && aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
)
484 return ISL_AUX_USAGE_NONE
;
486 const bool color_aspect
= aspects
== VK_IMAGE_ASPECT_COLOR_BIT
;
488 /* The following switch currently only handles depth stencil aspects.
489 * TODO: Handle the color aspect.
492 return image
->aux_usage
;
496 /* Invalid Layouts */
498 /* According to the Vulkan Spec, the following layouts are valid only as
499 * initial layouts in a layout transition and don't support device access.
501 case VK_IMAGE_LAYOUT_UNDEFINED
:
502 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
503 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
504 case VK_IMAGE_LAYOUT_MAX_ENUM
:
505 unreachable("Invalid image layout for device access.");
510 * This buffer could be a depth buffer used in a transfer operation. BLORP
511 * currently doesn't use HiZ for transfer operations so we must use the main
512 * buffer for this layout. TODO: Enable HiZ in BLORP.
514 case VK_IMAGE_LAYOUT_GENERAL
:
515 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
516 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
517 return ISL_AUX_USAGE_NONE
;
520 /* Sampling Layouts */
521 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
522 assert(!color_aspect
);
524 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
525 if (anv_can_sample_with_hiz(devinfo
, aspects
, image
->samples
))
526 return ISL_AUX_USAGE_HIZ
;
528 return ISL_AUX_USAGE_NONE
;
530 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
:
531 assert(color_aspect
);
533 /* On SKL+, the render buffer can be decompressed by the presentation
534 * engine. Support for this feature has not yet landed in the wider
535 * ecosystem. TODO: Update this code when support lands.
537 * From the BDW PRM, Vol 7, Render Target Resolve:
539 * If the MCS is enabled on a non-multisampled render target, the
540 * render target must be resolved before being used for other
541 * purposes (display, texture, CPU lock) The clear value from
542 * SURFACE_STATE is written into pixels in the render target
543 * indicated as clear in the MCS.
545 * Pre-SKL, the render buffer must be resolved before being used for
546 * presentation. We can infer that the auxiliary buffer is not used.
548 return ISL_AUX_USAGE_NONE
;
551 /* Rendering Layouts */
552 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
553 assert(color_aspect
);
554 unreachable("Color images are not yet supported.");
556 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
557 assert(!color_aspect
);
558 return ISL_AUX_USAGE_HIZ
;
561 /* If the layout isn't recognized in the exhaustive switch above, the
562 * VkImageLayout value is not defined in vulkan.h.
564 unreachable("layout is not a VkImageLayout enumeration member.");
568 static struct anv_state
569 alloc_surface_state(struct anv_device
*device
)
571 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
574 static enum isl_channel_select
575 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
576 struct isl_swizzle format_swizzle
)
578 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
582 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
583 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
584 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
585 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
586 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
587 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
589 unreachable("Invalid swizzle");
595 anv_CreateImageView(VkDevice _device
,
596 const VkImageViewCreateInfo
*pCreateInfo
,
597 const VkAllocationCallbacks
*pAllocator
,
600 ANV_FROM_HANDLE(anv_device
, device
, _device
);
601 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
602 struct anv_image_view
*iview
;
604 iview
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
605 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
607 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
609 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
611 assert(range
->layerCount
> 0);
612 assert(range
->baseMipLevel
< image
->levels
);
613 assert(image
->usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
614 VK_IMAGE_USAGE_STORAGE_BIT
|
615 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
616 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
618 switch (image
->type
) {
620 unreachable("bad VkImageType");
621 case VK_IMAGE_TYPE_1D
:
622 case VK_IMAGE_TYPE_2D
:
623 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
625 case VK_IMAGE_TYPE_3D
:
626 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
627 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
631 const struct anv_surface
*surface
=
632 anv_image_get_surface_for_aspect_mask(image
, range
->aspectMask
);
634 iview
->image
= image
;
635 iview
->bo
= image
->bo
;
636 iview
->offset
= image
->offset
+ surface
->offset
;
638 iview
->aspect_mask
= pCreateInfo
->subresourceRange
.aspectMask
;
639 iview
->vk_format
= pCreateInfo
->format
;
641 struct anv_format format
= anv_get_format(&device
->info
, pCreateInfo
->format
,
642 range
->aspectMask
, image
->tiling
);
644 iview
->isl
= (struct isl_view
) {
645 .format
= format
.isl_format
,
646 .base_level
= range
->baseMipLevel
,
647 .levels
= anv_get_levelCount(image
, range
),
648 .base_array_layer
= range
->baseArrayLayer
,
649 .array_len
= anv_get_layerCount(image
, range
),
651 .r
= remap_swizzle(pCreateInfo
->components
.r
,
652 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
653 .g
= remap_swizzle(pCreateInfo
->components
.g
,
654 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
655 .b
= remap_swizzle(pCreateInfo
->components
.b
,
656 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
657 .a
= remap_swizzle(pCreateInfo
->components
.a
,
658 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
662 iview
->extent
= (VkExtent3D
) {
663 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
664 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
665 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
668 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
669 iview
->isl
.base_array_layer
= 0;
670 iview
->isl
.array_len
= iview
->extent
.depth
;
673 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
674 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
675 iview
->isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
677 iview
->isl
.usage
= 0;
680 /* If the HiZ buffer can be sampled from, set the constant clear color.
681 * If it cannot, disable the isl aux usage flag.
683 float red_clear_color
= 0.0f
;
684 enum isl_aux_usage surf_usage
= image
->aux_usage
;
685 if (image
->aux_usage
== ISL_AUX_USAGE_HIZ
) {
686 if (anv_can_sample_with_hiz(&device
->info
, iview
->aspect_mask
,
688 /* When a HiZ buffer is sampled on gen9+, ensure that
689 * the constant fast clear value is set in the surface state.
691 if (device
->info
.gen
>= 9)
692 red_clear_color
= ANV_HZ_FC_VAL
;
694 surf_usage
= ISL_AUX_USAGE_NONE
;
698 /* Input attachment surfaces for color are allocated and filled
699 * out at BeginRenderPass time because they need compression information.
700 * Compression is not yet enabled for depth textures and stencil doesn't
701 * allow compression so we can just use the texture surface state from the
704 if (image
->usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
705 (image
->usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
706 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
707 iview
->sampler_surface_state
= alloc_surface_state(device
);
709 struct isl_view view
= iview
->isl
;
710 view
.usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
711 isl_surf_fill_state(&device
->isl_dev
,
712 iview
->sampler_surface_state
.map
,
713 .surf
= &surface
->isl
,
715 .clear_color
.f32
= { red_clear_color
,},
716 .aux_surf
= &image
->aux_surface
.isl
,
717 .aux_usage
= surf_usage
,
718 .mocs
= device
->default_mocs
);
720 anv_state_flush(device
, iview
->sampler_surface_state
);
722 iview
->sampler_surface_state
.alloc_size
= 0;
725 /* NOTE: This one needs to go last since it may stomp isl_view.format */
726 if (image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
727 iview
->storage_surface_state
= alloc_surface_state(device
);
728 iview
->writeonly_storage_surface_state
= alloc_surface_state(device
);
730 struct isl_view view
= iview
->isl
;
731 view
.usage
|= ISL_SURF_USAGE_STORAGE_BIT
;
733 /* Write-only accesses always used a typed write instruction and should
734 * therefore use the real format.
736 isl_surf_fill_state(&device
->isl_dev
,
737 iview
->writeonly_storage_surface_state
.map
,
738 .surf
= &surface
->isl
,
740 .aux_surf
= &image
->aux_surface
.isl
,
741 .aux_usage
= surf_usage
,
742 .mocs
= device
->default_mocs
);
744 if (isl_has_matching_typed_storage_image_format(&device
->info
,
745 format
.isl_format
)) {
746 /* Typed surface reads support a very limited subset of the shader
747 * image formats. Translate it into the closest format the hardware
750 view
.format
= isl_lower_storage_image_format(&device
->info
,
753 isl_surf_fill_state(&device
->isl_dev
,
754 iview
->storage_surface_state
.map
,
755 .surf
= &surface
->isl
,
757 .aux_surf
= &image
->aux_surface
.isl
,
758 .aux_usage
= surf_usage
,
759 .mocs
= device
->default_mocs
);
761 anv_fill_buffer_surface_state(device
, iview
->storage_surface_state
,
764 iview
->bo
->size
- iview
->offset
, 1);
767 isl_surf_fill_image_param(&device
->isl_dev
,
768 &iview
->storage_image_param
,
769 &surface
->isl
, &iview
->isl
);
771 anv_state_flush(device
, iview
->storage_surface_state
);
772 anv_state_flush(device
, iview
->writeonly_storage_surface_state
);
774 iview
->storage_surface_state
.alloc_size
= 0;
775 iview
->writeonly_storage_surface_state
.alloc_size
= 0;
778 *pView
= anv_image_view_to_handle(iview
);
784 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
785 const VkAllocationCallbacks
*pAllocator
)
787 ANV_FROM_HANDLE(anv_device
, device
, _device
);
788 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
793 if (iview
->sampler_surface_state
.alloc_size
> 0) {
794 anv_state_pool_free(&device
->surface_state_pool
,
795 iview
->sampler_surface_state
);
798 if (iview
->storage_surface_state
.alloc_size
> 0) {
799 anv_state_pool_free(&device
->surface_state_pool
,
800 iview
->storage_surface_state
);
803 if (iview
->writeonly_storage_surface_state
.alloc_size
> 0) {
804 anv_state_pool_free(&device
->surface_state_pool
,
805 iview
->writeonly_storage_surface_state
);
808 vk_free2(&device
->alloc
, pAllocator
, iview
);
813 anv_CreateBufferView(VkDevice _device
,
814 const VkBufferViewCreateInfo
*pCreateInfo
,
815 const VkAllocationCallbacks
*pAllocator
,
818 ANV_FROM_HANDLE(anv_device
, device
, _device
);
819 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
820 struct anv_buffer_view
*view
;
822 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
823 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
825 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
827 /* TODO: Handle the format swizzle? */
829 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
830 VK_IMAGE_ASPECT_COLOR_BIT
,
831 VK_IMAGE_TILING_LINEAR
);
832 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
833 view
->bo
= buffer
->bo
;
834 view
->offset
= buffer
->offset
+ pCreateInfo
->offset
;
835 view
->range
= pCreateInfo
->range
== VK_WHOLE_SIZE
?
836 buffer
->size
- pCreateInfo
->offset
: pCreateInfo
->range
;
837 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
839 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
840 view
->surface_state
= alloc_surface_state(device
);
842 anv_fill_buffer_surface_state(device
, view
->surface_state
,
844 view
->offset
, view
->range
, format_bs
);
846 view
->surface_state
= (struct anv_state
){ 0 };
849 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
850 view
->storage_surface_state
= alloc_surface_state(device
);
851 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
853 enum isl_format storage_format
=
854 isl_has_matching_typed_storage_image_format(&device
->info
,
856 isl_lower_storage_image_format(&device
->info
, view
->format
) :
859 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
861 view
->offset
, view
->range
,
862 (storage_format
== ISL_FORMAT_RAW
? 1 :
863 isl_format_get_layout(storage_format
)->bpb
/ 8));
865 /* Write-only accesses should use the original format. */
866 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
868 view
->offset
, view
->range
,
869 isl_format_get_layout(view
->format
)->bpb
/ 8);
871 isl_buffer_fill_image_param(&device
->isl_dev
,
872 &view
->storage_image_param
,
873 view
->format
, view
->range
);
875 view
->storage_surface_state
= (struct anv_state
){ 0 };
876 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
879 *pView
= anv_buffer_view_to_handle(view
);
885 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
886 const VkAllocationCallbacks
*pAllocator
)
888 ANV_FROM_HANDLE(anv_device
, device
, _device
);
889 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
894 if (view
->surface_state
.alloc_size
> 0)
895 anv_state_pool_free(&device
->surface_state_pool
,
896 view
->surface_state
);
898 if (view
->storage_surface_state
.alloc_size
> 0)
899 anv_state_pool_free(&device
->surface_state_pool
,
900 view
->storage_surface_state
);
902 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
903 anv_state_pool_free(&device
->surface_state_pool
,
904 view
->writeonly_storage_surface_state
);
906 vk_free2(&device
->alloc
, pAllocator
, view
);
909 const struct anv_surface
*
910 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
911 VkImageAspectFlags aspect_mask
)
913 switch (aspect_mask
) {
914 case VK_IMAGE_ASPECT_COLOR_BIT
:
915 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
916 return &image
->color_surface
;
917 case VK_IMAGE_ASPECT_DEPTH_BIT
:
918 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
919 return &image
->depth_surface
;
920 case VK_IMAGE_ASPECT_STENCIL_BIT
:
921 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
922 return &image
->stencil_surface
;
923 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
924 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
925 * combined depth stencil formats. Specifically, it states:
927 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
928 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
930 * Image views with both depth and stencil aspects are only valid for
931 * render target attachments, in which case
932 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
933 * stencil surfaces from the underlying surface.
935 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
936 return &image
->depth_surface
;
938 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
939 return &image
->stencil_surface
;
942 unreachable("image does not have aspect");