anv/image: Fix VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29 #include <sys/mman.h>
30
31 #include "anv_private.h"
32 #include "util/debug.h"
33
34 #include "vk_format_info.h"
35
36 /**
37 * Exactly one bit must be set in \a aspect.
38 */
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags,
41 VkImageUsageFlags vk_usage,
42 VkImageAspectFlags aspect)
43 {
44 isl_surf_usage_flags_t isl_usage = 0;
45
46 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
47 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
48
49 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
50 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
51
52 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
53 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
54
55 if (vk_create_flags & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
56 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
57
58 /* Even if we're only using it for transfer operations, clears to depth and
59 * stencil images happen as depth and stencil so they need the right ISL
60 * usage bits or else things will fall apart.
61 */
62 switch (aspect) {
63 case VK_IMAGE_ASPECT_DEPTH_BIT:
64 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
65 break;
66 case VK_IMAGE_ASPECT_STENCIL_BIT:
67 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
68 break;
69 case VK_IMAGE_ASPECT_COLOR_BIT:
70 break;
71 default:
72 unreachable("bad VkImageAspect");
73 }
74
75 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
76 /* blorp implements transfers by sampling from the source image. */
77 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
78 }
79
80 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT &&
81 aspect == VK_IMAGE_ASPECT_COLOR_BIT) {
82 /* blorp implements transfers by rendering into the destination image.
83 * Only request this with color images, as we deal with depth/stencil
84 * formats differently. */
85 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
86 }
87
88 return isl_usage;
89 }
90
91 /**
92 * Exactly one bit must be set in \a aspect.
93 */
94 static struct anv_surface *
95 get_surface(struct anv_image *image, VkImageAspectFlags aspect)
96 {
97 switch (aspect) {
98 default:
99 unreachable("bad VkImageAspect");
100 case VK_IMAGE_ASPECT_COLOR_BIT:
101 return &image->color_surface;
102 case VK_IMAGE_ASPECT_DEPTH_BIT:
103 return &image->depth_surface;
104 case VK_IMAGE_ASPECT_STENCIL_BIT:
105 return &image->stencil_surface;
106 }
107 }
108
109 static void
110 add_surface(struct anv_image *image, struct anv_surface *surf)
111 {
112 assert(surf->isl.size > 0); /* isl surface must be initialized */
113
114 surf->offset = align_u32(image->size, surf->isl.alignment);
115 image->size = surf->offset + surf->isl.size;
116 image->alignment = MAX2(image->alignment, surf->isl.alignment);
117 }
118
119 /**
120 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
121 * image's memory requirements (that is, the image's size and alignment).
122 *
123 * Exactly one bit must be set in \a aspect.
124 */
125 static VkResult
126 make_surface(const struct anv_device *dev,
127 struct anv_image *image,
128 const struct anv_image_create_info *anv_info,
129 VkImageAspectFlags aspect)
130 {
131 const VkImageCreateInfo *vk_info = anv_info->vk_info;
132 bool ok UNUSED;
133
134 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
135 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
136 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
137 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
138 };
139
140 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
141 * result with an optionally provided ISL tiling argument.
142 */
143 isl_tiling_flags_t tiling_flags =
144 (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
145 ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
146
147 if (anv_info->isl_tiling_flags)
148 tiling_flags &= anv_info->isl_tiling_flags;
149
150 assert(tiling_flags);
151
152 struct anv_surface *anv_surf = get_surface(image, aspect);
153
154 image->extent = anv_sanitize_image_extent(vk_info->imageType,
155 vk_info->extent);
156
157 enum isl_format format = anv_get_isl_format(&dev->info, vk_info->format,
158 aspect, vk_info->tiling);
159 assert(format != ISL_FORMAT_UNSUPPORTED);
160
161 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
162 .dim = vk_to_isl_surf_dim[vk_info->imageType],
163 .format = format,
164 .width = image->extent.width,
165 .height = image->extent.height,
166 .depth = image->extent.depth,
167 .levels = vk_info->mipLevels,
168 .array_len = vk_info->arrayLayers,
169 .samples = vk_info->samples,
170 .min_alignment = 0,
171 .row_pitch = anv_info->stride,
172 .usage = choose_isl_surf_usage(vk_info->flags, image->usage, aspect),
173 .tiling_flags = tiling_flags);
174
175 /* isl_surf_init() will fail only if provided invalid input. Invalid input
176 * is illegal in Vulkan.
177 */
178 assert(ok);
179
180 add_surface(image, anv_surf);
181
182 /* Add a HiZ surface to a depth buffer that will be used for rendering.
183 */
184 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
185 /* We don't advertise that depth buffers could be used as storage
186 * images.
187 */
188 assert(!(image->usage & VK_IMAGE_USAGE_STORAGE_BIT));
189
190 /* Allow the user to control HiZ enabling. Disable by default on gen7
191 * because resolves are not currently implemented pre-BDW.
192 */
193 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
194 /* It will never be used as an attachment, HiZ is pointless. */
195 } else if (dev->info.gen == 7) {
196 anv_perf_warn("Implement gen7 HiZ");
197 } else if (vk_info->mipLevels > 1) {
198 anv_perf_warn("Enable multi-LOD HiZ");
199 } else if (vk_info->arrayLayers > 1) {
200 anv_perf_warn("Implement multi-arrayLayer HiZ clears and resolves");
201 } else if (dev->info.gen == 8 && vk_info->samples > 1) {
202 anv_perf_warn("Enable gen8 multisampled HiZ");
203 } else if (!unlikely(INTEL_DEBUG & DEBUG_NO_HIZ)) {
204 assert(image->aux_surface.isl.size == 0);
205 ok = isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
206 &image->aux_surface.isl);
207 assert(ok);
208 add_surface(image, &image->aux_surface);
209 image->aux_usage = ISL_AUX_USAGE_HIZ;
210 }
211 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
212 if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
213 assert(image->aux_surface.isl.size == 0);
214 ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
215 &image->aux_surface.isl, 0);
216 if (ok) {
217 add_surface(image, &image->aux_surface);
218
219 /* For images created without MUTABLE_FORMAT_BIT set, we know that
220 * they will always be used with the original format. In
221 * particular, they will always be used with a format that
222 * supports color compression. If it's never used as a storage
223 * image, then it will only be used through the sampler or the as
224 * a render target. This means that it's safe to just leave
225 * compression on at all times for these formats.
226 */
227 if (!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) &&
228 !(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
229 isl_format_supports_ccs_e(&dev->info, format)) {
230 image->aux_usage = ISL_AUX_USAGE_CCS_E;
231 }
232 }
233 }
234 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples > 1) {
235 assert(image->aux_surface.isl.size == 0);
236 assert(!(vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT));
237 ok = isl_surf_get_mcs_surf(&dev->isl_dev, &anv_surf->isl,
238 &image->aux_surface.isl);
239 if (ok) {
240 add_surface(image, &image->aux_surface);
241 image->aux_usage = ISL_AUX_USAGE_MCS;
242 }
243 }
244
245 return VK_SUCCESS;
246 }
247
248 VkResult
249 anv_image_create(VkDevice _device,
250 const struct anv_image_create_info *create_info,
251 const VkAllocationCallbacks* alloc,
252 VkImage *pImage)
253 {
254 ANV_FROM_HANDLE(anv_device, device, _device);
255 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
256 struct anv_image *image = NULL;
257 VkResult r;
258
259 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
260
261 anv_assert(pCreateInfo->mipLevels > 0);
262 anv_assert(pCreateInfo->arrayLayers > 0);
263 anv_assert(pCreateInfo->samples > 0);
264 anv_assert(pCreateInfo->extent.width > 0);
265 anv_assert(pCreateInfo->extent.height > 0);
266 anv_assert(pCreateInfo->extent.depth > 0);
267
268 image = vk_alloc2(&device->alloc, alloc, sizeof(*image), 8,
269 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
270 if (!image)
271 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
272
273 memset(image, 0, sizeof(*image));
274 image->type = pCreateInfo->imageType;
275 image->extent = pCreateInfo->extent;
276 image->vk_format = pCreateInfo->format;
277 image->aspects = vk_format_aspects(image->vk_format);
278 image->levels = pCreateInfo->mipLevels;
279 image->array_size = pCreateInfo->arrayLayers;
280 image->samples = pCreateInfo->samples;
281 image->usage = pCreateInfo->usage;
282 image->tiling = pCreateInfo->tiling;
283 image->aux_usage = ISL_AUX_USAGE_NONE;
284
285 uint32_t b;
286 for_each_bit(b, image->aspects) {
287 r = make_surface(device, image, create_info, (1 << b));
288 if (r != VK_SUCCESS)
289 goto fail;
290 }
291
292 *pImage = anv_image_to_handle(image);
293
294 return VK_SUCCESS;
295
296 fail:
297 if (image)
298 vk_free2(&device->alloc, alloc, image);
299
300 return r;
301 }
302
303 VkResult
304 anv_CreateImage(VkDevice device,
305 const VkImageCreateInfo *pCreateInfo,
306 const VkAllocationCallbacks *pAllocator,
307 VkImage *pImage)
308 {
309 return anv_image_create(device,
310 &(struct anv_image_create_info) {
311 .vk_info = pCreateInfo,
312 },
313 pAllocator,
314 pImage);
315 }
316
317 void
318 anv_DestroyImage(VkDevice _device, VkImage _image,
319 const VkAllocationCallbacks *pAllocator)
320 {
321 ANV_FROM_HANDLE(anv_device, device, _device);
322 ANV_FROM_HANDLE(anv_image, image, _image);
323
324 if (!image)
325 return;
326
327 vk_free2(&device->alloc, pAllocator, image);
328 }
329
330 VkResult anv_BindImageMemory(
331 VkDevice _device,
332 VkImage _image,
333 VkDeviceMemory _memory,
334 VkDeviceSize memoryOffset)
335 {
336 ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
337 ANV_FROM_HANDLE(anv_image, image, _image);
338
339 if (mem == NULL) {
340 image->bo = NULL;
341 image->offset = 0;
342 return VK_SUCCESS;
343 }
344
345 image->bo = mem->bo;
346 image->offset = memoryOffset;
347
348 return VK_SUCCESS;
349 }
350
351 static void
352 anv_surface_get_subresource_layout(struct anv_image *image,
353 struct anv_surface *surface,
354 const VkImageSubresource *subresource,
355 VkSubresourceLayout *layout)
356 {
357 /* If we are on a non-zero mip level or array slice, we need to
358 * calculate a real offset.
359 */
360 anv_assert(subresource->mipLevel == 0);
361 anv_assert(subresource->arrayLayer == 0);
362
363 layout->offset = surface->offset;
364 layout->rowPitch = surface->isl.row_pitch;
365 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
366 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
367 layout->size = surface->isl.size;
368 }
369
370 void anv_GetImageSubresourceLayout(
371 VkDevice device,
372 VkImage _image,
373 const VkImageSubresource* pSubresource,
374 VkSubresourceLayout* pLayout)
375 {
376 ANV_FROM_HANDLE(anv_image, image, _image);
377
378 assert(__builtin_popcount(pSubresource->aspectMask) == 1);
379
380 switch (pSubresource->aspectMask) {
381 case VK_IMAGE_ASPECT_COLOR_BIT:
382 anv_surface_get_subresource_layout(image, &image->color_surface,
383 pSubresource, pLayout);
384 break;
385 case VK_IMAGE_ASPECT_DEPTH_BIT:
386 anv_surface_get_subresource_layout(image, &image->depth_surface,
387 pSubresource, pLayout);
388 break;
389 case VK_IMAGE_ASPECT_STENCIL_BIT:
390 anv_surface_get_subresource_layout(image, &image->stencil_surface,
391 pSubresource, pLayout);
392 break;
393 default:
394 assert(!"Invalid image aspect");
395 }
396 }
397
398 /**
399 * This function determines the optimal buffer to use for a given
400 * VkImageLayout and other pieces of information needed to make that
401 * determination. This does not determine the optimal buffer to use
402 * during a resolve operation.
403 *
404 * @param devinfo The device information of the Intel GPU.
405 * @param image The image that may contain a collection of buffers.
406 * @param aspects The aspect(s) of the image to be accessed.
407 * @param layout The current layout of the image aspect(s).
408 *
409 * @return The primary buffer that should be used for the given layout.
410 */
411 enum isl_aux_usage
412 anv_layout_to_aux_usage(const struct gen_device_info * const devinfo,
413 const struct anv_image * const image,
414 const VkImageAspectFlags aspects,
415 const VkImageLayout layout)
416 {
417 /* Validate the inputs. */
418
419 /* The devinfo is needed as the optimal buffer varies across generations. */
420 assert(devinfo != NULL);
421
422 /* The layout of a NULL image is not properly defined. */
423 assert(image != NULL);
424
425 /* The aspects must be a subset of the image aspects. */
426 assert(aspects & image->aspects && aspects <= image->aspects);
427
428 /* Determine the optimal buffer. */
429
430 /* If there is no auxiliary surface allocated, we must use the one and only
431 * main buffer.
432 */
433 if (image->aux_surface.isl.size == 0)
434 return ISL_AUX_USAGE_NONE;
435
436 /* All images that use an auxiliary surface are required to be tiled. */
437 assert(image->tiling == VK_IMAGE_TILING_OPTIMAL);
438
439 /* On BDW+, when clearing the stencil aspect of a depth stencil image,
440 * the HiZ buffer allows us to record the clear with a relatively small
441 * number of packets. Prior to BDW, the HiZ buffer provides no known benefit
442 * to the stencil aspect.
443 */
444 if (devinfo->gen < 8 && aspects == VK_IMAGE_ASPECT_STENCIL_BIT)
445 return ISL_AUX_USAGE_NONE;
446
447 const bool color_aspect = aspects == VK_IMAGE_ASPECT_COLOR_BIT;
448
449 /* The following switch currently only handles depth stencil aspects.
450 * TODO: Handle the color aspect.
451 */
452 if (color_aspect)
453 return image->aux_usage;
454
455 switch (layout) {
456
457 /* Invalid Layouts */
458 case VK_IMAGE_LAYOUT_RANGE_SIZE:
459 case VK_IMAGE_LAYOUT_MAX_ENUM:
460 unreachable("Invalid image layout.");
461
462 /* Undefined layouts
463 *
464 * The pre-initialized layout is equivalent to the undefined layout for
465 * optimally-tiled images. We can only do color compression (CCS or HiZ)
466 * on tiled images.
467 */
468 case VK_IMAGE_LAYOUT_UNDEFINED:
469 case VK_IMAGE_LAYOUT_PREINITIALIZED:
470 return ISL_AUX_USAGE_NONE;
471
472
473 /* Transfer Layouts
474 *
475 * This buffer could be a depth buffer used in a transfer operation. BLORP
476 * currently doesn't use HiZ for transfer operations so we must use the main
477 * buffer for this layout. TODO: Enable HiZ in BLORP.
478 */
479 case VK_IMAGE_LAYOUT_GENERAL:
480 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL:
481 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL:
482 return ISL_AUX_USAGE_NONE;
483
484
485 /* Sampling Layouts */
486 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL:
487 assert(!color_aspect);
488 /* Fall-through */
489 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL:
490 if (anv_can_sample_with_hiz(devinfo, aspects, image->samples))
491 return ISL_AUX_USAGE_HIZ;
492 else
493 return ISL_AUX_USAGE_NONE;
494
495 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR:
496 assert(color_aspect);
497
498 /* On SKL+, the render buffer can be decompressed by the presentation
499 * engine. Support for this feature has not yet landed in the wider
500 * ecosystem. TODO: Update this code when support lands.
501 *
502 * From the BDW PRM, Vol 7, Render Target Resolve:
503 *
504 * If the MCS is enabled on a non-multisampled render target, the
505 * render target must be resolved before being used for other
506 * purposes (display, texture, CPU lock) The clear value from
507 * SURFACE_STATE is written into pixels in the render target
508 * indicated as clear in the MCS.
509 *
510 * Pre-SKL, the render buffer must be resolved before being used for
511 * presentation. We can infer that the auxiliary buffer is not used.
512 */
513 return ISL_AUX_USAGE_NONE;
514
515
516 /* Rendering Layouts */
517 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL:
518 assert(color_aspect);
519 unreachable("Color images are not yet supported.");
520
521 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL:
522 assert(!color_aspect);
523 return ISL_AUX_USAGE_HIZ;
524
525 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR:
526 unreachable("VK_KHR_shared_presentable_image is unsupported");
527 }
528
529 /* If the layout isn't recognized in the exhaustive switch above, the
530 * VkImageLayout value is not defined in vulkan.h.
531 */
532 unreachable("layout is not a VkImageLayout enumeration member.");
533 }
534
535
536 static struct anv_state
537 alloc_surface_state(struct anv_device *device)
538 {
539 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
540 }
541
542 static enum isl_channel_select
543 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
544 struct isl_swizzle format_swizzle)
545 {
546 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
547 swizzle = component;
548
549 switch (swizzle) {
550 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
551 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
552 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
553 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
554 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
555 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
556 default:
557 unreachable("Invalid swizzle");
558 }
559 }
560
561
562 VkResult
563 anv_CreateImageView(VkDevice _device,
564 const VkImageViewCreateInfo *pCreateInfo,
565 const VkAllocationCallbacks *pAllocator,
566 VkImageView *pView)
567 {
568 ANV_FROM_HANDLE(anv_device, device, _device);
569 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
570 struct anv_image_view *iview;
571
572 iview = vk_alloc2(&device->alloc, pAllocator, sizeof(*iview), 8,
573 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
574 if (iview == NULL)
575 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
576
577 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
578
579 assert(range->layerCount > 0);
580 assert(range->baseMipLevel < image->levels);
581 assert(image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
582 VK_IMAGE_USAGE_STORAGE_BIT |
583 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
584 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT |
585 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
586
587 switch (image->type) {
588 default:
589 unreachable("bad VkImageType");
590 case VK_IMAGE_TYPE_1D:
591 case VK_IMAGE_TYPE_2D:
592 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
593 break;
594 case VK_IMAGE_TYPE_3D:
595 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
596 <= anv_minify(image->extent.depth, range->baseMipLevel));
597 break;
598 }
599
600 const struct anv_surface *surface =
601 anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
602
603 iview->image = image;
604 iview->bo = image->bo;
605 iview->offset = image->offset + surface->offset;
606
607 iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
608 iview->vk_format = pCreateInfo->format;
609
610 struct anv_format format = anv_get_format(&device->info, pCreateInfo->format,
611 range->aspectMask, image->tiling);
612
613 iview->isl = (struct isl_view) {
614 .format = format.isl_format,
615 .base_level = range->baseMipLevel,
616 .levels = anv_get_levelCount(image, range),
617 .base_array_layer = range->baseArrayLayer,
618 .array_len = anv_get_layerCount(image, range),
619 .swizzle = {
620 .r = remap_swizzle(pCreateInfo->components.r,
621 VK_COMPONENT_SWIZZLE_R, format.swizzle),
622 .g = remap_swizzle(pCreateInfo->components.g,
623 VK_COMPONENT_SWIZZLE_G, format.swizzle),
624 .b = remap_swizzle(pCreateInfo->components.b,
625 VK_COMPONENT_SWIZZLE_B, format.swizzle),
626 .a = remap_swizzle(pCreateInfo->components.a,
627 VK_COMPONENT_SWIZZLE_A, format.swizzle),
628 },
629 };
630
631 iview->extent = (VkExtent3D) {
632 .width = anv_minify(image->extent.width , range->baseMipLevel),
633 .height = anv_minify(image->extent.height, range->baseMipLevel),
634 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
635 };
636
637 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_3D) {
638 iview->isl.base_array_layer = 0;
639 iview->isl.array_len = iview->extent.depth;
640 }
641
642 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
643 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
644 iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT;
645 } else {
646 iview->isl.usage = 0;
647 }
648
649 /* Input attachment surfaces for color are allocated and filled
650 * out at BeginRenderPass time because they need compression information.
651 * Compression is not yet enabled for depth textures and stencil doesn't
652 * allow compression so we can just use the texture surface state from the
653 * view.
654 */
655 if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
656 (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
657 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
658 iview->sampler_surface_state = alloc_surface_state(device);
659 iview->no_aux_sampler_surface_state = alloc_surface_state(device);
660
661 /* Sampling is performed in one of two buffer configurations in anv: with
662 * an auxiliary buffer or without it. Sampler states aren't always needed
663 * for both configurations, but are currently created unconditionally for
664 * simplicity.
665 *
666 * TODO: Consider allocating each surface state only when necessary.
667 */
668
669 /* Create a sampler state with the optimal aux_usage for sampling. This
670 * may use the aux_buffer.
671 */
672 const enum isl_aux_usage surf_usage =
673 anv_layout_to_aux_usage(&device->info, image, iview->aspect_mask,
674 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL);
675
676 /* If this is a HiZ buffer we can sample from with a programmable clear
677 * value (SKL+), define the clear value to the optimal constant.
678 */
679 const float red_clear_color = surf_usage == ISL_AUX_USAGE_HIZ &&
680 device->info.gen >= 9 ?
681 ANV_HZ_FC_VAL : 0.0f;
682
683 struct isl_view view = iview->isl;
684 view.usage |= ISL_SURF_USAGE_TEXTURE_BIT;
685 isl_surf_fill_state(&device->isl_dev,
686 iview->sampler_surface_state.map,
687 .surf = &surface->isl,
688 .view = &view,
689 .clear_color.f32 = { red_clear_color,},
690 .aux_surf = &image->aux_surface.isl,
691 .aux_usage = surf_usage,
692 .mocs = device->default_mocs);
693
694 /* Create a sampler state that only uses the main buffer. */
695 isl_surf_fill_state(&device->isl_dev,
696 iview->no_aux_sampler_surface_state.map,
697 .surf = &surface->isl,
698 .view = &view,
699 .mocs = device->default_mocs);
700
701 anv_state_flush(device, iview->sampler_surface_state);
702 anv_state_flush(device, iview->no_aux_sampler_surface_state);
703 } else {
704 iview->sampler_surface_state.alloc_size = 0;
705 iview->no_aux_sampler_surface_state.alloc_size = 0;
706 }
707
708 /* NOTE: This one needs to go last since it may stomp isl_view.format */
709 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
710 iview->storage_surface_state = alloc_surface_state(device);
711 iview->writeonly_storage_surface_state = alloc_surface_state(device);
712
713 struct isl_view view = iview->isl;
714 view.usage |= ISL_SURF_USAGE_STORAGE_BIT;
715
716 /* Write-only accesses always used a typed write instruction and should
717 * therefore use the real format.
718 */
719 isl_surf_fill_state(&device->isl_dev,
720 iview->writeonly_storage_surface_state.map,
721 .surf = &surface->isl,
722 .view = &view,
723 .aux_surf = &image->aux_surface.isl,
724 .aux_usage = image->aux_usage,
725 .mocs = device->default_mocs);
726
727 if (isl_has_matching_typed_storage_image_format(&device->info,
728 format.isl_format)) {
729 /* Typed surface reads support a very limited subset of the shader
730 * image formats. Translate it into the closest format the hardware
731 * supports.
732 */
733 view.format = isl_lower_storage_image_format(&device->info,
734 format.isl_format);
735
736 isl_surf_fill_state(&device->isl_dev,
737 iview->storage_surface_state.map,
738 .surf = &surface->isl,
739 .view = &view,
740 .aux_surf = &image->aux_surface.isl,
741 .aux_usage = image->aux_usage,
742 .mocs = device->default_mocs);
743 } else {
744 anv_fill_buffer_surface_state(device, iview->storage_surface_state,
745 ISL_FORMAT_RAW,
746 iview->offset,
747 iview->bo->size - iview->offset, 1);
748 }
749
750 isl_surf_fill_image_param(&device->isl_dev,
751 &iview->storage_image_param,
752 &surface->isl, &iview->isl);
753
754 anv_state_flush(device, iview->storage_surface_state);
755 anv_state_flush(device, iview->writeonly_storage_surface_state);
756 } else {
757 iview->storage_surface_state.alloc_size = 0;
758 iview->writeonly_storage_surface_state.alloc_size = 0;
759 }
760
761 *pView = anv_image_view_to_handle(iview);
762
763 return VK_SUCCESS;
764 }
765
766 void
767 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
768 const VkAllocationCallbacks *pAllocator)
769 {
770 ANV_FROM_HANDLE(anv_device, device, _device);
771 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
772
773 if (!iview)
774 return;
775
776 if (iview->sampler_surface_state.alloc_size > 0) {
777 anv_state_pool_free(&device->surface_state_pool,
778 iview->sampler_surface_state);
779 }
780
781 if (iview->no_aux_sampler_surface_state.alloc_size > 0) {
782 anv_state_pool_free(&device->surface_state_pool,
783 iview->no_aux_sampler_surface_state);
784 }
785
786 if (iview->storage_surface_state.alloc_size > 0) {
787 anv_state_pool_free(&device->surface_state_pool,
788 iview->storage_surface_state);
789 }
790
791 if (iview->writeonly_storage_surface_state.alloc_size > 0) {
792 anv_state_pool_free(&device->surface_state_pool,
793 iview->writeonly_storage_surface_state);
794 }
795
796 vk_free2(&device->alloc, pAllocator, iview);
797 }
798
799
800 VkResult
801 anv_CreateBufferView(VkDevice _device,
802 const VkBufferViewCreateInfo *pCreateInfo,
803 const VkAllocationCallbacks *pAllocator,
804 VkBufferView *pView)
805 {
806 ANV_FROM_HANDLE(anv_device, device, _device);
807 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
808 struct anv_buffer_view *view;
809
810 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
811 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
812 if (!view)
813 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
814
815 /* TODO: Handle the format swizzle? */
816
817 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
818 VK_IMAGE_ASPECT_COLOR_BIT,
819 VK_IMAGE_TILING_LINEAR);
820 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
821 view->bo = buffer->bo;
822 view->offset = buffer->offset + pCreateInfo->offset;
823 view->range = anv_buffer_get_range(buffer, pCreateInfo->offset,
824 pCreateInfo->range);
825 view->range = align_down_npot_u32(view->range, format_bs);
826
827 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
828 view->surface_state = alloc_surface_state(device);
829
830 anv_fill_buffer_surface_state(device, view->surface_state,
831 view->format,
832 view->offset, view->range, format_bs);
833 } else {
834 view->surface_state = (struct anv_state){ 0 };
835 }
836
837 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
838 view->storage_surface_state = alloc_surface_state(device);
839 view->writeonly_storage_surface_state = alloc_surface_state(device);
840
841 enum isl_format storage_format =
842 isl_has_matching_typed_storage_image_format(&device->info,
843 view->format) ?
844 isl_lower_storage_image_format(&device->info, view->format) :
845 ISL_FORMAT_RAW;
846
847 anv_fill_buffer_surface_state(device, view->storage_surface_state,
848 storage_format,
849 view->offset, view->range,
850 (storage_format == ISL_FORMAT_RAW ? 1 :
851 isl_format_get_layout(storage_format)->bpb / 8));
852
853 /* Write-only accesses should use the original format. */
854 anv_fill_buffer_surface_state(device, view->writeonly_storage_surface_state,
855 view->format,
856 view->offset, view->range,
857 isl_format_get_layout(view->format)->bpb / 8);
858
859 isl_buffer_fill_image_param(&device->isl_dev,
860 &view->storage_image_param,
861 view->format, view->range);
862 } else {
863 view->storage_surface_state = (struct anv_state){ 0 };
864 view->writeonly_storage_surface_state = (struct anv_state){ 0 };
865 }
866
867 *pView = anv_buffer_view_to_handle(view);
868
869 return VK_SUCCESS;
870 }
871
872 void
873 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
874 const VkAllocationCallbacks *pAllocator)
875 {
876 ANV_FROM_HANDLE(anv_device, device, _device);
877 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
878
879 if (!view)
880 return;
881
882 if (view->surface_state.alloc_size > 0)
883 anv_state_pool_free(&device->surface_state_pool,
884 view->surface_state);
885
886 if (view->storage_surface_state.alloc_size > 0)
887 anv_state_pool_free(&device->surface_state_pool,
888 view->storage_surface_state);
889
890 if (view->writeonly_storage_surface_state.alloc_size > 0)
891 anv_state_pool_free(&device->surface_state_pool,
892 view->writeonly_storage_surface_state);
893
894 vk_free2(&device->alloc, pAllocator, view);
895 }
896
897 const struct anv_surface *
898 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
899 VkImageAspectFlags aspect_mask)
900 {
901 switch (aspect_mask) {
902 case VK_IMAGE_ASPECT_COLOR_BIT:
903 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
904 return &image->color_surface;
905 case VK_IMAGE_ASPECT_DEPTH_BIT:
906 assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
907 return &image->depth_surface;
908 case VK_IMAGE_ASPECT_STENCIL_BIT:
909 assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
910 return &image->stencil_surface;
911 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
912 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
913 * combined depth stencil formats. Specifically, it states:
914 *
915 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
916 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
917 *
918 * Image views with both depth and stencil aspects are only valid for
919 * render target attachments, in which case
920 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
921 * stencil surfaces from the underlying surface.
922 */
923 if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
924 return &image->depth_surface;
925 } else {
926 assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
927 return &image->stencil_surface;
928 }
929 default:
930 unreachable("image does not have aspect");
931 return NULL;
932 }
933 }