2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm-uapi/drm_fourcc.h"
32 #include "anv_private.h"
33 #include "util/debug.h"
35 #include "util/u_math.h"
37 #include "common/gen_aux_map.h"
39 #include "vk_format_info.h"
41 static isl_surf_usage_flags_t
42 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
43 VkImageUsageFlags vk_usage
,
44 isl_surf_usage_flags_t isl_extra_usage
,
45 VkImageAspectFlagBits aspect
)
47 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
49 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
50 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
52 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
53 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
55 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
56 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
58 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
59 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
61 /* Even if we're only using it for transfer operations, clears to depth and
62 * stencil images happen as depth and stencil so they need the right ISL
63 * usage bits or else things will fall apart.
66 case VK_IMAGE_ASPECT_DEPTH_BIT
:
67 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
69 case VK_IMAGE_ASPECT_STENCIL_BIT
:
70 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
72 case VK_IMAGE_ASPECT_COLOR_BIT
:
73 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
74 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
75 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
78 unreachable("bad VkImageAspect");
81 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
82 /* blorp implements transfers by sampling from the source image. */
83 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
86 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
87 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
88 /* blorp implements transfers by rendering into the destination image.
89 * Only request this with color images, as we deal with depth/stencil
90 * formats differently. */
91 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
97 static isl_tiling_flags_t
98 choose_isl_tiling_flags(const struct anv_image_create_info
*anv_info
,
99 const struct isl_drm_modifier_info
*isl_mod_info
,
102 const VkImageCreateInfo
*base_info
= anv_info
->vk_info
;
103 isl_tiling_flags_t flags
= 0;
105 switch (base_info
->tiling
) {
107 unreachable("bad VkImageTiling");
108 case VK_IMAGE_TILING_OPTIMAL
:
109 flags
= ISL_TILING_ANY_MASK
;
111 case VK_IMAGE_TILING_LINEAR
:
112 flags
= ISL_TILING_LINEAR_BIT
;
116 if (anv_info
->isl_tiling_flags
)
117 flags
&= anv_info
->isl_tiling_flags
;
120 flags
&= ISL_TILING_LINEAR_BIT
| ISL_TILING_X_BIT
;
123 flags
&= 1 << isl_mod_info
->tiling
;
130 static struct anv_surface
*
131 get_surface(struct anv_image
*image
, VkImageAspectFlagBits aspect
)
133 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
134 return &image
->planes
[plane
].surface
;
138 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
140 assert(surf
->isl
.size_B
> 0); /* isl surface must be initialized */
142 if (image
->disjoint
) {
143 surf
->offset
= align_u32(image
->planes
[plane
].size
,
144 surf
->isl
.alignment_B
);
145 /* Plane offset is always 0 when it's disjoint. */
147 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment_B
);
148 /* Determine plane's offset only once when the first surface is added. */
149 if (image
->planes
[plane
].size
== 0)
150 image
->planes
[plane
].offset
= image
->size
;
153 image
->size
= surf
->offset
+ surf
->isl
.size_B
;
154 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size_B
) - image
->planes
[plane
].offset
;
156 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment_B
);
157 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
158 surf
->isl
.alignment_B
);
163 anv_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
164 VkImageCreateFlags create_flags
,
166 VkImageTiling vk_tiling
,
167 const VkImageFormatListCreateInfoKHR
*fmt_list
)
169 enum isl_format format
=
170 anv_get_isl_format(devinfo
, vk_format
,
171 VK_IMAGE_ASPECT_COLOR_BIT
, vk_tiling
);
173 if (!isl_format_supports_ccs_e(devinfo
, format
))
176 if (!(create_flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
179 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
182 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
183 enum isl_format view_format
=
184 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
185 VK_IMAGE_ASPECT_COLOR_BIT
, vk_tiling
);
187 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
195 * For color images that have an auxiliary surface, request allocation for an
196 * additional buffer that mainly stores fast-clear values. Use of this buffer
197 * allows us to access the image's subresources while being aware of their
198 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
199 * which a fast clear has occurred).
201 * In order to avoid having multiple clear colors for a single plane of an
202 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
203 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
204 * 2018), there were no known applications which would benefit from fast-
205 * clearing more than just the first slice.
207 * The fast clear portion of the image is laid out in the following order:
209 * * 1 or 4 dwords (depending on hardware generation) for the clear color
210 * * 1 dword for the anv_fast_clear_type of the clear color
211 * * On gen9+, 1 dword per level and layer of the image (3D levels count
212 * multiple layers) in level-major order for compression state.
214 * For the purpose of discoverability, the algorithm used to manage
215 * compression and fast-clears is described here:
217 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
218 * all of the values in the fast clear portion of the image are initialized
221 * * On fast-clear, the clear value is written into surface state and also
222 * into the buffer and the fast clear type is set appropriately. Both
223 * setting the fast-clear value in the buffer and setting the fast-clear
224 * type happen from the GPU using MI commands.
226 * * Whenever a render or blorp operation is performed with CCS_E, we call
227 * genX(cmd_buffer_mark_image_written) to set the compression state to
228 * true (which is represented by UINT32_MAX).
230 * * On pipeline barrier transitions, the worst-case transition is computed
231 * from the image layouts. The command streamer inspects the fast clear
232 * type and compression state dwords and constructs a predicate. The
233 * worst-case resolve is performed with the given predicate and the fast
234 * clear and compression state is set accordingly.
236 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
237 * details on exactly what is allowed in what layouts.
239 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
240 * In order to deal with this, we have to do some clear color management.
242 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
243 * value from the buffer into the surface state with MI commands.
245 * * For any blorp operations, we pass the address to the clear value into
246 * blorp and it knows to copy the clear color.
249 add_aux_state_tracking_buffer(struct anv_image
*image
,
251 const struct anv_device
*device
)
253 assert(image
&& device
);
254 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 &&
255 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
257 /* Compressed images must be tiled and therefore everything should be 4K
258 * aligned. The CCS has the same alignment requirements. This is good
259 * because we need at least dword-alignment for MI_LOAD/STORE operations.
261 assert(image
->alignment
% 4 == 0);
262 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
264 /* This buffer should be at the very end of the plane. */
265 if (image
->disjoint
) {
266 assert(image
->planes
[plane
].size
==
267 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
269 assert(image
->size
==
270 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
273 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
274 device
->isl_dev
.ss
.clear_color_state_size
:
275 device
->isl_dev
.ss
.clear_value_size
;
277 /* Clear color and fast clear type */
278 unsigned state_size
= clear_color_state_size
+ 4;
280 /* We only need to track compression on CCS_E surfaces. */
281 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
282 if (image
->type
== VK_IMAGE_TYPE_3D
) {
283 for (uint32_t l
= 0; l
< image
->levels
; l
++)
284 state_size
+= anv_minify(image
->extent
.depth
, l
) * 4;
286 state_size
+= image
->levels
* image
->array_size
* 4;
290 /* Add some padding to make sure the fast clear color state buffer starts at
291 * a 4K alignment. We believe that 256B might be enough, but due to lack of
292 * testing we will leave this as 4K for now.
294 image
->planes
[plane
].size
= ALIGN(image
->planes
[plane
].size
, 4096);
295 image
->size
= ALIGN(image
->size
, 4096);
297 assert(image
->planes
[plane
].offset
% 4096 == 0);
299 image
->planes
[plane
].fast_clear_state_offset
=
300 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
302 image
->planes
[plane
].size
+= state_size
;
303 image
->size
+= state_size
;
307 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
308 * image's memory requirements (that is, the image's size and alignment).
311 make_surface(const struct anv_device
*dev
,
312 struct anv_image
*image
,
314 isl_tiling_flags_t tiling_flags
,
315 isl_surf_usage_flags_t isl_extra_usage_flags
,
316 VkImageAspectFlagBits aspect
)
320 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
321 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
322 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
323 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
326 image
->extent
= anv_sanitize_image_extent(image
->type
, image
->extent
);
328 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
329 const struct anv_format_plane plane_format
=
330 anv_get_format_plane(&dev
->info
, image
->vk_format
, aspect
, image
->tiling
);
331 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
333 const isl_surf_usage_flags_t usage
=
334 choose_isl_surf_usage(image
->create_flags
, image
->usage
,
335 isl_extra_usage_flags
, aspect
);
337 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
338 * fall back to linear on Broadwell and earlier because we aren't
339 * guaranteed that we can handle offsets correctly. On Sky Lake, the
340 * horizontal and vertical alignments are sufficiently high that we can
341 * just use RENDER_SURFACE_STATE::X/Y Offset.
343 bool needs_shadow
= false;
344 isl_surf_usage_flags_t shadow_usage
= 0;
345 if (dev
->info
.gen
<= 8 &&
346 (image
->create_flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
) &&
347 image
->tiling
== VK_IMAGE_TILING_OPTIMAL
) {
348 assert(isl_format_is_compressed(plane_format
.isl_format
));
349 tiling_flags
= ISL_TILING_LINEAR_BIT
;
351 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
352 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
355 if (dev
->info
.gen
<= 7 &&
356 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
357 (image
->stencil_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)) {
359 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
360 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
363 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
364 .dim
= vk_to_isl_surf_dim
[image
->type
],
365 .format
= plane_format
.isl_format
,
366 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
367 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
368 .depth
= image
->extent
.depth
,
369 .levels
= image
->levels
,
370 .array_len
= image
->array_size
,
371 .samples
= image
->samples
,
372 .min_alignment_B
= 0,
373 .row_pitch_B
= stride
,
375 .tiling_flags
= tiling_flags
);
378 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
380 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
382 add_surface(image
, anv_surf
, plane
);
384 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
385 * create an identical tiled shadow surface for use while texturing so we
386 * don't get garbage performance. If we're on gen7 and the image contains
387 * stencil, then we need to maintain a shadow because we can't texture from
391 ok
= isl_surf_init(&dev
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
392 .dim
= vk_to_isl_surf_dim
[image
->type
],
393 .format
= plane_format
.isl_format
,
394 .width
= image
->extent
.width
,
395 .height
= image
->extent
.height
,
396 .depth
= image
->extent
.depth
,
397 .levels
= image
->levels
,
398 .array_len
= image
->array_size
,
399 .samples
= image
->samples
,
400 .min_alignment_B
= 0,
401 .row_pitch_B
= stride
,
402 .usage
= shadow_usage
,
403 .tiling_flags
= ISL_TILING_ANY_MASK
);
405 /* isl_surf_init() will fail only if provided invalid input. Invalid input
406 * is illegal in Vulkan.
410 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
413 /* Add a HiZ surface to a depth buffer that will be used for rendering.
415 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
416 /* We don't advertise that depth buffers could be used as storage
419 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
421 /* Allow the user to control HiZ enabling. Disable by default on gen7
422 * because resolves are not currently implemented pre-BDW.
424 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
425 /* It will never be used as an attachment, HiZ is pointless. */
426 } else if (dev
->info
.gen
== 7) {
427 anv_perf_warn(dev
->instance
, image
, "Implement gen7 HiZ");
428 } else if (image
->levels
> 1) {
429 anv_perf_warn(dev
->instance
, image
, "Enable multi-LOD HiZ");
430 } else if (image
->array_size
> 1) {
431 anv_perf_warn(dev
->instance
, image
,
432 "Implement multi-arrayLayer HiZ clears and resolves");
433 } else if (dev
->info
.gen
== 8 && image
->samples
> 1) {
434 anv_perf_warn(dev
->instance
, image
, "Enable gen8 multisampled HiZ");
435 } else if (!unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
)) {
436 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
437 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
,
438 &image
->planes
[plane
].surface
.isl
,
439 &image
->planes
[plane
].aux_surface
.isl
);
441 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
442 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
444 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
== 1) {
445 /* TODO: Disallow compression with :
447 * 1) non multiplanar images (We appear to hit a sampler bug with
448 * CCS & R16G16 format. Putting the clear state a page/4096bytes
449 * further fixes the issue).
451 * 2) alias images, because they might be aliases of images
454 * 3) compression disabled by debug
456 const bool allow_compression
=
457 image
->n_planes
== 1 &&
458 (image
->create_flags
& VK_IMAGE_CREATE_ALIAS_BIT
) == 0 &&
459 likely((INTEL_DEBUG
& DEBUG_NO_RBC
) == 0);
461 if (allow_compression
) {
462 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
463 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
,
464 &image
->planes
[plane
].surface
.isl
,
465 &image
->planes
[plane
].aux_surface
.isl
,
469 /* Disable CCS when it is not useful (i.e., when you can't render
470 * to the image with CCS enabled).
472 if (!isl_format_supports_rendering(&dev
->info
,
473 plane_format
.isl_format
)) {
474 /* While it may be technically possible to enable CCS for this
475 * image, we currently don't have things hooked up to get it
478 anv_perf_warn(dev
->instance
, image
,
479 "This image format doesn't support rendering. "
480 "Not allocating an CCS buffer.");
481 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
485 /* For images created without MUTABLE_FORMAT_BIT set, we know that
486 * they will always be used with the original format. In
487 * particular, they will always be used with a format that
488 * supports color compression. If it's never used as a storage
489 * image, then it will only be used through the sampler or the as
490 * a render target. This means that it's safe to just leave
491 * compression on at all times for these formats.
493 if (!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
494 image
->ccs_e_compatible
) {
495 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
496 } else if (dev
->info
.gen
>= 12) {
497 anv_perf_warn(dev
->instance
, image
,
498 "The CCS_D aux mode is not yet handled on "
499 "Gen12+. Not allocating a CCS buffer.");
500 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
504 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
505 add_aux_state_tracking_buffer(image
, plane
, dev
);
508 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
> 1) {
509 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
510 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
511 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
,
512 &image
->planes
[plane
].surface
.isl
,
513 &image
->planes
[plane
].aux_surface
.isl
);
515 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
516 add_aux_state_tracking_buffer(image
, plane
, dev
);
517 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
521 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
523 /* Upper bound of the last surface should be smaller than the plane's
526 assert((MAX2(image
->planes
[plane
].surface
.offset
,
527 image
->planes
[plane
].aux_surface
.offset
) +
528 (image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
529 image
->planes
[plane
].aux_surface
.isl
.size_B
:
530 image
->planes
[plane
].surface
.isl
.size_B
)) <=
531 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
533 if (image
->planes
[plane
].aux_surface
.isl
.size_B
) {
534 /* assert(image->planes[plane].fast_clear_state_offset == */
535 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
536 assert(image
->planes
[plane
].fast_clear_state_offset
<
537 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
544 score_drm_format_mod(uint64_t modifier
)
547 case DRM_FORMAT_MOD_LINEAR
: return 1;
548 case I915_FORMAT_MOD_X_TILED
: return 2;
549 case I915_FORMAT_MOD_Y_TILED
: return 3;
550 case I915_FORMAT_MOD_Y_TILED_CCS
: return 4;
551 default: unreachable("bad DRM format modifier");
555 static const struct isl_drm_modifier_info
*
556 choose_drm_format_mod(const struct anv_physical_device
*device
,
557 uint32_t modifier_count
, const uint64_t *modifiers
)
559 uint64_t best_mod
= UINT64_MAX
;
560 uint32_t best_score
= 0;
562 for (uint32_t i
= 0; i
< modifier_count
; ++i
) {
563 uint32_t score
= score_drm_format_mod(modifiers
[i
]);
564 if (score
> best_score
) {
565 best_mod
= modifiers
[i
];
571 return isl_drm_modifier_get_info(best_mod
);
577 anv_image_create(VkDevice _device
,
578 const struct anv_image_create_info
*create_info
,
579 const VkAllocationCallbacks
* alloc
,
582 ANV_FROM_HANDLE(anv_device
, device
, _device
);
583 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
584 const struct isl_drm_modifier_info
*isl_mod_info
= NULL
;
585 struct anv_image
*image
= NULL
;
588 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
590 const struct wsi_image_create_info
*wsi_info
=
591 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
592 if (wsi_info
&& wsi_info
->modifier_count
> 0) {
593 isl_mod_info
= choose_drm_format_mod(&device
->instance
->physicalDevice
,
594 wsi_info
->modifier_count
,
595 wsi_info
->modifiers
);
596 assert(isl_mod_info
);
599 anv_assert(pCreateInfo
->mipLevels
> 0);
600 anv_assert(pCreateInfo
->arrayLayers
> 0);
601 anv_assert(pCreateInfo
->samples
> 0);
602 anv_assert(pCreateInfo
->extent
.width
> 0);
603 anv_assert(pCreateInfo
->extent
.height
> 0);
604 anv_assert(pCreateInfo
->extent
.depth
> 0);
606 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
607 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
609 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
611 image
->type
= pCreateInfo
->imageType
;
612 image
->extent
= pCreateInfo
->extent
;
613 image
->vk_format
= pCreateInfo
->format
;
614 image
->format
= anv_get_format(pCreateInfo
->format
);
615 image
->aspects
= vk_format_aspects(image
->vk_format
);
616 image
->levels
= pCreateInfo
->mipLevels
;
617 image
->array_size
= pCreateInfo
->arrayLayers
;
618 image
->samples
= pCreateInfo
->samples
;
619 image
->usage
= pCreateInfo
->usage
;
620 image
->create_flags
= pCreateInfo
->flags
;
621 image
->tiling
= pCreateInfo
->tiling
;
622 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT
;
623 image
->needs_set_tiling
= wsi_info
&& wsi_info
->scanout
;
624 image
->drm_format_mod
= isl_mod_info
? isl_mod_info
->modifier
:
625 DRM_FORMAT_MOD_INVALID
;
627 if (image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
) {
628 image
->stencil_usage
= pCreateInfo
->usage
;
629 const VkImageStencilUsageCreateInfoEXT
*stencil_usage_info
=
630 vk_find_struct_const(pCreateInfo
->pNext
,
631 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT
);
632 if (stencil_usage_info
)
633 image
->stencil_usage
= stencil_usage_info
->stencilUsage
;
636 /* In case of external format, We don't know format yet,
637 * so skip the rest for now.
639 if (create_info
->external_format
) {
640 image
->external_format
= true;
641 *pImage
= anv_image_to_handle(image
);
645 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
646 assert(format
!= NULL
);
648 const isl_tiling_flags_t isl_tiling_flags
=
649 choose_isl_tiling_flags(create_info
, isl_mod_info
,
650 image
->needs_set_tiling
);
652 image
->n_planes
= format
->n_planes
;
654 const VkImageFormatListCreateInfoKHR
*fmt_list
=
655 vk_find_struct_const(pCreateInfo
->pNext
,
656 IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
658 image
->ccs_e_compatible
=
659 anv_formats_ccs_e_compatible(&device
->info
, image
->create_flags
,
660 image
->vk_format
, image
->tiling
, fmt_list
);
663 for_each_bit(b
, image
->aspects
) {
664 r
= make_surface(device
, image
, create_info
->stride
, isl_tiling_flags
,
665 create_info
->isl_extra_usage_flags
, (1 << b
));
670 *pImage
= anv_image_to_handle(image
);
676 vk_free2(&device
->alloc
, alloc
, image
);
681 static struct anv_image
*
682 anv_swapchain_get_image(VkSwapchainKHR swapchain
,
685 uint32_t n_images
= index
+ 1;
686 VkImage
*images
= malloc(sizeof(*images
) * n_images
);
687 VkResult result
= wsi_common_get_images(swapchain
, &n_images
, images
);
689 if (result
!= VK_SUCCESS
&& result
!= VK_INCOMPLETE
) {
694 ANV_FROM_HANDLE(anv_image
, image
, images
[index
]);
701 anv_image_from_swapchain(VkDevice device
,
702 const VkImageCreateInfo
*pCreateInfo
,
703 const VkImageSwapchainCreateInfoKHR
*swapchain_info
,
704 const VkAllocationCallbacks
*pAllocator
,
707 struct anv_image
*swapchain_image
= anv_swapchain_get_image(swapchain_info
->swapchain
, 0);
708 assert(swapchain_image
);
710 assert(swapchain_image
->type
== pCreateInfo
->imageType
);
711 assert(swapchain_image
->vk_format
== pCreateInfo
->format
);
712 assert(swapchain_image
->extent
.width
== pCreateInfo
->extent
.width
);
713 assert(swapchain_image
->extent
.height
== pCreateInfo
->extent
.height
);
714 assert(swapchain_image
->extent
.depth
== pCreateInfo
->extent
.depth
);
715 assert(swapchain_image
->array_size
== pCreateInfo
->arrayLayers
);
716 /* Color attachment is added by the wsi code. */
717 assert(swapchain_image
->usage
== (pCreateInfo
->usage
| VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
));
719 VkImageCreateInfo local_create_info
;
720 local_create_info
= *pCreateInfo
;
721 local_create_info
.pNext
= NULL
;
722 /* The following parameters are implictly selected by the wsi code. */
723 local_create_info
.tiling
= VK_IMAGE_TILING_OPTIMAL
;
724 local_create_info
.samples
= VK_SAMPLE_COUNT_1_BIT
;
725 local_create_info
.usage
|= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
727 /* If the image has a particular modifier, specify that modifier. */
728 struct wsi_image_create_info local_wsi_info
= {
729 .sType
= VK_STRUCTURE_TYPE_WSI_IMAGE_CREATE_INFO_MESA
,
731 .modifiers
= &swapchain_image
->drm_format_mod
,
733 if (swapchain_image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
)
734 __vk_append_struct(&local_create_info
, &local_wsi_info
);
736 return anv_image_create(device
,
737 &(struct anv_image_create_info
) {
738 .vk_info
= &local_create_info
,
739 .external_format
= swapchain_image
->external_format
,
746 anv_CreateImage(VkDevice device
,
747 const VkImageCreateInfo
*pCreateInfo
,
748 const VkAllocationCallbacks
*pAllocator
,
751 const VkExternalMemoryImageCreateInfo
*create_info
=
752 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_MEMORY_IMAGE_CREATE_INFO
);
754 if (create_info
&& (create_info
->handleTypes
&
755 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID
))
756 return anv_image_from_external(device
, pCreateInfo
, create_info
,
759 bool use_external_format
= false;
760 const VkExternalFormatANDROID
*ext_format
=
761 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_FORMAT_ANDROID
);
763 /* "If externalFormat is zero, the effect is as if the
764 * VkExternalFormatANDROID structure was not present. Otherwise, the image
765 * will have the specified external format."
767 if (ext_format
&& ext_format
->externalFormat
!= 0)
768 use_external_format
= true;
770 const VkNativeBufferANDROID
*gralloc_info
=
771 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
773 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
776 const VkImageSwapchainCreateInfoKHR
*swapchain_info
=
777 vk_find_struct_const(pCreateInfo
->pNext
, IMAGE_SWAPCHAIN_CREATE_INFO_KHR
);
778 if (swapchain_info
&& swapchain_info
->swapchain
!= VK_NULL_HANDLE
)
779 return anv_image_from_swapchain(device
, pCreateInfo
, swapchain_info
,
782 return anv_image_create(device
,
783 &(struct anv_image_create_info
) {
784 .vk_info
= pCreateInfo
,
785 .external_format
= use_external_format
,
792 anv_DestroyImage(VkDevice _device
, VkImage _image
,
793 const VkAllocationCallbacks
*pAllocator
)
795 ANV_FROM_HANDLE(anv_device
, device
, _device
);
796 ANV_FROM_HANDLE(anv_image
, image
, _image
);
801 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
802 if (anv_image_plane_uses_aux_map(device
, image
, p
) &&
803 image
->planes
[p
].address
.bo
) {
804 gen_aux_map_unmap_range(device
->aux_map_ctx
,
805 image
->planes
[p
].aux_map_surface_address
,
806 image
->planes
[p
].surface
.isl
.size_B
);
808 if (image
->planes
[p
].bo_is_owned
) {
809 assert(image
->planes
[p
].address
.bo
!= NULL
);
810 anv_device_release_bo(device
, image
->planes
[p
].address
.bo
);
814 vk_free2(&device
->alloc
, pAllocator
, image
);
817 static void anv_image_bind_memory_plane(struct anv_device
*device
,
818 struct anv_image
*image
,
820 struct anv_device_memory
*memory
,
821 uint32_t memory_offset
)
823 assert(!image
->planes
[plane
].bo_is_owned
);
826 if (anv_image_plane_uses_aux_map(device
, image
, plane
) &&
827 image
->planes
[plane
].address
.bo
) {
828 gen_aux_map_unmap_range(device
->aux_map_ctx
,
829 image
->planes
[plane
].aux_map_surface_address
,
830 image
->planes
[plane
].surface
.isl
.size_B
);
832 image
->planes
[plane
].address
= ANV_NULL_ADDRESS
;
836 image
->planes
[plane
].address
= (struct anv_address
) {
838 .offset
= memory_offset
,
841 if (anv_image_plane_uses_aux_map(device
, image
, plane
)) {
842 image
->planes
[plane
].aux_map_surface_address
=
843 anv_address_physical(
844 anv_address_add(image
->planes
[plane
].address
,
845 image
->planes
[plane
].surface
.offset
));
847 gen_aux_map_add_image(device
->aux_map_ctx
,
848 &image
->planes
[plane
].surface
.isl
,
849 image
->planes
[plane
].aux_map_surface_address
,
850 anv_address_physical(
851 anv_address_add(image
->planes
[plane
].address
,
852 image
->planes
[plane
].aux_surface
.offset
)));
856 /* We are binding AHardwareBuffer. Get a description, resolve the
857 * format and prepare anv_image properly.
860 resolve_ahw_image(struct anv_device
*device
,
861 struct anv_image
*image
,
862 struct anv_device_memory
*mem
)
864 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
866 AHardwareBuffer_Desc desc
;
867 AHardwareBuffer_describe(mem
->ahw
, &desc
);
870 int i915_tiling
= anv_gem_get_tiling(device
, mem
->bo
->gem_handle
);
871 VkImageTiling vk_tiling
;
872 isl_tiling_flags_t isl_tiling_flags
= 0;
874 switch (i915_tiling
) {
875 case I915_TILING_NONE
:
876 vk_tiling
= VK_IMAGE_TILING_LINEAR
;
877 isl_tiling_flags
= ISL_TILING_LINEAR_BIT
;
880 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
881 isl_tiling_flags
= ISL_TILING_X_BIT
;
884 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
885 isl_tiling_flags
= ISL_TILING_Y0_BIT
;
889 unreachable("Invalid tiling flags.");
892 assert(vk_tiling
== VK_IMAGE_TILING_LINEAR
||
893 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
);
896 VkFormat vk_format
= vk_format_from_android(desc
.format
, desc
.usage
);
897 enum isl_format isl_fmt
= anv_get_isl_format(&device
->info
,
899 VK_IMAGE_ASPECT_COLOR_BIT
,
901 assert(isl_fmt
!= ISL_FORMAT_UNSUPPORTED
);
903 /* Handle RGB(X)->RGBA fallback. */
904 switch (desc
.format
) {
905 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM
:
906 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM
:
907 if (isl_format_is_rgb(isl_fmt
))
908 isl_fmt
= isl_format_rgb_to_rgba(isl_fmt
);
912 /* Now we are able to fill anv_image fields properly and create
913 * isl_surface for it.
915 image
->vk_format
= vk_format
;
916 image
->format
= anv_get_format(vk_format
);
917 image
->aspects
= vk_format_aspects(image
->vk_format
);
918 image
->n_planes
= image
->format
->n_planes
;
919 image
->ccs_e_compatible
= false;
921 uint32_t stride
= desc
.stride
*
922 (isl_format_get_layout(isl_fmt
)->bpb
/ 8);
925 for_each_bit(b
, image
->aspects
) {
926 VkResult r
= make_surface(device
, image
, stride
, isl_tiling_flags
,
927 ISL_SURF_USAGE_DISABLE_AUX_BIT
, (1 << b
));
928 assert(r
== VK_SUCCESS
);
933 VkResult
anv_BindImageMemory(
936 VkDeviceMemory _memory
,
937 VkDeviceSize memoryOffset
)
939 ANV_FROM_HANDLE(anv_device
, device
, _device
);
940 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
941 ANV_FROM_HANDLE(anv_image
, image
, _image
);
944 resolve_ahw_image(device
, image
, mem
);
947 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
949 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
950 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
956 VkResult
anv_BindImageMemory2(
958 uint32_t bindInfoCount
,
959 const VkBindImageMemoryInfo
* pBindInfos
)
961 ANV_FROM_HANDLE(anv_device
, device
, _device
);
963 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
964 const VkBindImageMemoryInfo
*bind_info
= &pBindInfos
[i
];
965 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
966 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
968 /* Resolve will alter the image's aspects, do this first. */
970 resolve_ahw_image(device
, image
, mem
);
972 VkImageAspectFlags aspects
= image
->aspects
;
973 vk_foreach_struct_const(s
, bind_info
->pNext
) {
975 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO
: {
976 const VkBindImagePlaneMemoryInfo
*plane_info
=
977 (const VkBindImagePlaneMemoryInfo
*) s
;
979 aspects
= plane_info
->planeAspect
;
982 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR
: {
983 const VkBindImageMemorySwapchainInfoKHR
*swapchain_info
=
984 (const VkBindImageMemorySwapchainInfoKHR
*) s
;
985 struct anv_image
*swapchain_image
=
986 anv_swapchain_get_image(swapchain_info
->swapchain
,
987 swapchain_info
->imageIndex
);
988 assert(swapchain_image
);
989 assert(image
->aspects
== swapchain_image
->aspects
);
993 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
995 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
996 struct anv_device_memory mem
= {
997 .bo
= swapchain_image
->planes
[plane
].address
.bo
,
999 anv_image_bind_memory_plane(device
, image
, plane
,
1000 &mem
, bind_info
->memoryOffset
);
1005 anv_debug_ignored_stype(s
->sType
);
1010 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
1011 * VK_NULL_HANDLE. In such case, just carry one with the next bind
1017 uint32_t aspect_bit
;
1018 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
1020 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
1021 anv_image_bind_memory_plane(device
, image
, plane
,
1022 mem
, bind_info
->memoryOffset
);
1029 void anv_GetImageSubresourceLayout(
1032 const VkImageSubresource
* subresource
,
1033 VkSubresourceLayout
* layout
)
1035 ANV_FROM_HANDLE(anv_image
, image
, _image
);
1037 const struct anv_surface
*surface
;
1038 if (subresource
->aspectMask
== VK_IMAGE_ASPECT_PLANE_1_BIT
&&
1039 image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
&&
1040 isl_drm_modifier_has_aux(image
->drm_format_mod
))
1041 surface
= &image
->planes
[0].aux_surface
;
1043 surface
= get_surface(image
, subresource
->aspectMask
);
1045 assert(__builtin_popcount(subresource
->aspectMask
) == 1);
1047 layout
->offset
= surface
->offset
;
1048 layout
->rowPitch
= surface
->isl
.row_pitch_B
;
1049 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1050 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1052 if (subresource
->mipLevel
> 0 || subresource
->arrayLayer
> 0) {
1053 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1056 isl_surf_get_image_offset_B_tile_sa(&surface
->isl
,
1057 subresource
->mipLevel
,
1058 subresource
->arrayLayer
,
1059 0 /* logical_z_offset_px */,
1060 &offset_B
, NULL
, NULL
);
1061 layout
->offset
+= offset_B
;
1062 layout
->size
= layout
->rowPitch
* anv_minify(image
->extent
.height
,
1063 subresource
->mipLevel
);
1065 layout
->size
= surface
->isl
.size_B
;
1070 * This function determines the optimal buffer to use for a given
1071 * VkImageLayout and other pieces of information needed to make that
1072 * determination. This does not determine the optimal buffer to use
1073 * during a resolve operation.
1075 * @param devinfo The device information of the Intel GPU.
1076 * @param image The image that may contain a collection of buffers.
1077 * @param aspect The aspect of the image to be accessed.
1078 * @param layout The current layout of the image aspect(s).
1080 * @return The primary buffer that should be used for the given layout.
1083 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
1084 const struct anv_image
* const image
,
1085 const VkImageAspectFlagBits aspect
,
1086 const VkImageLayout layout
)
1088 /* Validate the inputs. */
1090 /* The devinfo is needed as the optimal buffer varies across generations. */
1091 assert(devinfo
!= NULL
);
1093 /* The layout of a NULL image is not properly defined. */
1094 assert(image
!= NULL
);
1096 /* The aspect must be exactly one of the image aspects. */
1097 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1099 /* Determine the optimal buffer. */
1101 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1103 /* If there is no auxiliary surface allocated, we must use the one and only
1106 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1107 return ISL_AUX_USAGE_NONE
;
1109 /* All images that use an auxiliary surface are required to be tiled. */
1110 assert(image
->planes
[plane
].surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1112 /* Stencil has no aux */
1113 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1117 /* Invalid Layouts */
1118 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1119 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1120 unreachable("Invalid image layout.");
1122 /* Undefined layouts
1124 * The pre-initialized layout is equivalent to the undefined layout for
1125 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1128 case VK_IMAGE_LAYOUT_UNDEFINED
:
1129 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1130 return ISL_AUX_USAGE_NONE
;
1135 case VK_IMAGE_LAYOUT_GENERAL
:
1136 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1137 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1138 /* This buffer could be a depth buffer used in a transfer operation.
1139 * BLORP currently doesn't use HiZ for transfer operations so we must
1140 * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
1142 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_HIZ
);
1143 return ISL_AUX_USAGE_NONE
;
1145 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1146 return image
->planes
[plane
].aux_usage
;
1150 /* Sampling Layouts */
1151 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_OPTIMAL_KHR
:
1152 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1153 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1154 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1156 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1157 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1158 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1159 if (anv_can_sample_with_hiz(devinfo
, image
))
1160 return ISL_AUX_USAGE_HIZ
;
1162 return ISL_AUX_USAGE_NONE
;
1164 return image
->planes
[plane
].aux_usage
;
1167 case VK_IMAGE_LAYOUT_STENCIL_READ_ONLY_OPTIMAL_KHR
:
1168 return ISL_AUX_USAGE_NONE
;
1171 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1172 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1174 /* When handing the image off to the presentation engine, we need to
1175 * ensure that things are properly resolved. For images with no
1176 * modifier, we assume that they follow the old rules and always need
1177 * a full resolve because the PE doesn't understand any form of
1178 * compression. For images with modifiers, we use the aux usage from
1181 const struct isl_drm_modifier_info
*mod_info
=
1182 isl_drm_modifier_get_info(image
->drm_format_mod
);
1183 return mod_info
? mod_info
->aux_usage
: ISL_AUX_USAGE_NONE
;
1187 /* Rendering Layouts */
1188 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1189 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1191 case VK_IMAGE_LAYOUT_STENCIL_ATTACHMENT_OPTIMAL_KHR
:
1192 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
) {
1193 assert(image
->samples
== 1);
1194 return ISL_AUX_USAGE_CCS_D
;
1196 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_CCS_D
);
1197 return image
->planes
[plane
].aux_usage
;
1200 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_OPTIMAL_KHR
:
1201 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1202 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1203 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
1204 return ISL_AUX_USAGE_HIZ
;
1206 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1207 unreachable("VK_KHR_shared_presentable_image is unsupported");
1209 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1210 unreachable("VK_EXT_fragment_density_map is unsupported");
1212 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1213 unreachable("VK_NV_shading_rate_image is unsupported");
1216 /* If the layout isn't recognized in the exhaustive switch above, the
1217 * VkImageLayout value is not defined in vulkan.h.
1219 unreachable("layout is not a VkImageLayout enumeration member.");
1223 * This function returns the level of unresolved fast-clear support of the
1224 * given image in the given VkImageLayout.
1226 * @param devinfo The device information of the Intel GPU.
1227 * @param image The image that may contain a collection of buffers.
1228 * @param aspect The aspect of the image to be accessed.
1229 * @param layout The current layout of the image aspect(s).
1231 enum anv_fast_clear_type
1232 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
1233 const struct anv_image
* const image
,
1234 const VkImageAspectFlagBits aspect
,
1235 const VkImageLayout layout
)
1237 if (INTEL_DEBUG
& DEBUG_NO_FAST_CLEAR
)
1238 return ANV_FAST_CLEAR_NONE
;
1240 /* The aspect must be exactly one of the image aspects. */
1241 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1243 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1245 /* If there is no auxiliary surface allocated, there are no fast-clears */
1246 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1247 return ANV_FAST_CLEAR_NONE
;
1249 /* All images that use an auxiliary surface are required to be tiled. */
1250 assert(image
->planes
[plane
].surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1252 /* Stencil has no aux */
1253 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1255 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1256 /* For depth images (with HiZ), the layout supports fast-clears if and
1257 * only if it supports HiZ. However, we only support fast-clears to the
1258 * default depth value.
1260 enum isl_aux_usage aux_usage
=
1261 anv_layout_to_aux_usage(devinfo
, image
, aspect
, layout
);
1262 return aux_usage
== ISL_AUX_USAGE_HIZ
?
1263 ANV_FAST_CLEAR_DEFAULT_VALUE
: ANV_FAST_CLEAR_NONE
;
1266 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1268 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1269 * lack the MI ALU which we need to determine the predicates.
1271 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
&& image
->samples
> 1)
1272 return ANV_FAST_CLEAR_NONE
;
1275 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1276 return ANV_FAST_CLEAR_ANY
;
1278 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1279 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1281 /* We do not yet support any modifiers which support clear color so we
1282 * just always return NONE. One day, this will change.
1284 const struct isl_drm_modifier_info
*mod_info
=
1285 isl_drm_modifier_get_info(image
->drm_format_mod
);
1286 assert(!mod_info
|| !mod_info
->supports_clear_color
);
1288 return ANV_FAST_CLEAR_NONE
;
1292 /* If the image has MCS or CCS_E enabled all the time then we can use
1293 * fast-clear as long as the clear color is the default value of zero
1294 * since this is the default value we program into every surface state
1295 * used for texturing.
1297 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_MCS
||
1298 image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
)
1299 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1301 return ANV_FAST_CLEAR_NONE
;
1306 static struct anv_state
1307 alloc_surface_state(struct anv_device
*device
)
1309 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1312 static enum isl_channel_select
1313 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
1314 struct isl_swizzle format_swizzle
)
1316 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
1317 swizzle
= component
;
1320 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
1321 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
1322 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
1323 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
1324 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
1325 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
1327 unreachable("Invalid swizzle");
1332 anv_image_fill_surface_state(struct anv_device
*device
,
1333 const struct anv_image
*image
,
1334 VkImageAspectFlagBits aspect
,
1335 const struct isl_view
*view_in
,
1336 isl_surf_usage_flags_t view_usage
,
1337 enum isl_aux_usage aux_usage
,
1338 const union isl_color_value
*clear_color
,
1339 enum anv_image_view_state_flags flags
,
1340 struct anv_surface_state
*state_inout
,
1341 struct brw_image_param
*image_param_out
)
1343 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1345 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
1346 *aux_surface
= &image
->planes
[plane
].aux_surface
;
1348 struct isl_view view
= *view_in
;
1349 view
.usage
|= view_usage
;
1351 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1352 * compressed surface with a shadow surface, we use the shadow instead of
1353 * the primary surface. The shadow surface will be tiled, unlike the main
1354 * surface, so it should get significantly better performance.
1356 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1357 isl_format_is_compressed(view
.format
) &&
1358 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
1359 assert(isl_format_is_compressed(surface
->isl
.format
));
1360 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1361 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1362 surface
= &image
->planes
[plane
].shadow_surface
;
1365 /* For texturing from stencil on gen7, we have to sample from a shadow
1366 * surface because we don't support W-tiling in the sampler.
1368 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1369 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1370 assert(device
->info
.gen
== 7);
1371 assert(view_usage
& ISL_SURF_USAGE_TEXTURE_BIT
);
1372 surface
= &image
->planes
[plane
].shadow_surface
;
1375 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
1376 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
1378 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1379 if (device
->info
.gen
== 7 && !device
->info
.is_haswell
)
1380 view
.swizzle
= ISL_SWIZZLE_IDENTITY
;
1382 /* If this is a HiZ buffer we can sample from with a programmable clear
1383 * value (SKL+), define the clear value to the optimal constant.
1385 union isl_color_value default_clear_color
= { .u32
= { 0, } };
1386 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
1387 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
1389 clear_color
= &default_clear_color
;
1391 const struct anv_address address
=
1392 anv_address_add(image
->planes
[plane
].address
, surface
->offset
);
1394 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1395 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
1396 !isl_has_matching_typed_storage_image_format(&device
->info
,
1398 /* In this case, we are a writeable storage buffer which needs to be
1399 * lowered to linear. All tiling and offset calculations will be done in
1402 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1403 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1404 .address
= anv_address_physical(address
),
1405 .size_B
= surface
->isl
.size_B
,
1406 .format
= ISL_FORMAT_RAW
,
1407 .swizzle
= ISL_SWIZZLE_IDENTITY
,
1409 .mocs
= anv_mocs_for_bo(device
, address
.bo
));
1410 state_inout
->address
= address
,
1411 state_inout
->aux_address
= ANV_NULL_ADDRESS
;
1412 state_inout
->clear_address
= ANV_NULL_ADDRESS
;
1414 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1415 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
1416 /* Typed surface reads support a very limited subset of the shader
1417 * image formats. Translate it into the closest format the hardware
1420 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1421 view
.format
= isl_lower_storage_image_format(&device
->info
,
1425 const struct isl_surf
*isl_surf
= &surface
->isl
;
1427 struct isl_surf tmp_surf
;
1428 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
1429 if (isl_format_is_compressed(surface
->isl
.format
) &&
1430 !isl_format_is_compressed(view
.format
)) {
1431 /* We're creating an uncompressed view of a compressed surface. This
1432 * is allowed but only for a single level/layer.
1434 assert(surface
->isl
.samples
== 1);
1435 assert(view
.levels
== 1);
1436 assert(view
.array_len
== 1);
1438 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
1440 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1441 0 : view
.base_array_layer
,
1442 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1443 view
.base_array_layer
: 0,
1445 &offset_B
, &tile_x_sa
, &tile_y_sa
);
1447 /* The newly created image represents the one subimage we're
1448 * referencing with this view so it only has one array slice and
1451 view
.base_array_layer
= 0;
1452 view
.base_level
= 0;
1454 /* We're making an uncompressed view here. The image dimensions need
1455 * to be scaled down by the block size.
1457 const struct isl_format_layout
*fmtl
=
1458 isl_format_get_layout(surface
->isl
.format
);
1459 tmp_surf
.logical_level0_px
=
1460 isl_surf_get_logical_level0_el(&tmp_surf
);
1461 tmp_surf
.phys_level0_sa
= isl_surf_get_phys_level0_el(&tmp_surf
);
1462 tmp_surf
.format
= view
.format
;
1463 tile_x_sa
/= fmtl
->bw
;
1464 tile_y_sa
/= fmtl
->bh
;
1466 isl_surf
= &tmp_surf
;
1468 if (device
->info
.gen
<= 8) {
1469 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1470 assert(tile_x_sa
== 0);
1471 assert(tile_y_sa
== 0);
1475 state_inout
->address
= anv_address_add(address
, offset_B
);
1477 struct anv_address aux_address
= ANV_NULL_ADDRESS
;
1478 if (aux_usage
!= ISL_AUX_USAGE_NONE
) {
1479 aux_address
= anv_address_add(image
->planes
[plane
].address
,
1480 aux_surface
->offset
);
1482 state_inout
->aux_address
= aux_address
;
1484 struct anv_address clear_address
= ANV_NULL_ADDRESS
;
1485 if (device
->info
.gen
>= 10 && aux_usage
!= ISL_AUX_USAGE_NONE
) {
1486 if (aux_usage
== ISL_AUX_USAGE_HIZ
) {
1487 clear_address
= (struct anv_address
) {
1488 .bo
= device
->hiz_clear_bo
,
1492 clear_address
= anv_image_get_clear_color_addr(device
, image
, aspect
);
1495 state_inout
->clear_address
= clear_address
;
1497 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1500 .address
= anv_address_physical(state_inout
->address
),
1501 .clear_color
= *clear_color
,
1502 .aux_surf
= &aux_surface
->isl
,
1503 .aux_usage
= aux_usage
,
1504 .aux_address
= anv_address_physical(aux_address
),
1505 .clear_address
= anv_address_physical(clear_address
),
1506 .use_clear_address
= !anv_address_is_null(clear_address
),
1507 .mocs
= anv_mocs_for_bo(device
,
1508 state_inout
->address
.bo
),
1509 .x_offset_sa
= tile_x_sa
,
1510 .y_offset_sa
= tile_y_sa
);
1512 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1513 * are used to store other information. This should be ok, however,
1514 * because the surface buffer addresses are always 4K page aligned.
1516 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1517 device
->isl_dev
.ss
.aux_addr_offset
;
1518 assert((aux_address
.offset
& 0xfff) == 0);
1519 state_inout
->aux_address
.offset
|= *aux_addr_dw
& 0xfff;
1521 if (device
->info
.gen
>= 10 && clear_address
.bo
) {
1522 uint32_t *clear_addr_dw
= state_inout
->state
.map
+
1523 device
->isl_dev
.ss
.clear_color_state_offset
;
1524 assert((clear_address
.offset
& 0x3f) == 0);
1525 state_inout
->clear_address
.offset
|= *clear_addr_dw
& 0x3f;
1529 if (image_param_out
) {
1530 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1531 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1532 &surface
->isl
, &view
);
1536 static VkImageAspectFlags
1537 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1539 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1540 if (util_bitcount(view_aspects
) == 1)
1541 return VK_IMAGE_ASPECT_COLOR_BIT
;
1543 VkImageAspectFlags color_aspects
= 0;
1544 for (uint32_t i
= 0; i
< util_bitcount(view_aspects
); i
++)
1545 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT
<< i
;
1546 return color_aspects
;
1548 /* No special remapping needed for depth & stencil aspects. */
1549 return view_aspects
;
1553 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
1555 uint32_t planes
= 0;
1557 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
1558 VK_IMAGE_ASPECT_DEPTH_BIT
|
1559 VK_IMAGE_ASPECT_STENCIL_BIT
|
1560 VK_IMAGE_ASPECT_PLANE_0_BIT
))
1562 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
1564 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
1567 if ((aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
) != 0 &&
1568 (aspect_mask
& VK_IMAGE_ASPECT_STENCIL_BIT
) != 0)
1575 anv_CreateImageView(VkDevice _device
,
1576 const VkImageViewCreateInfo
*pCreateInfo
,
1577 const VkAllocationCallbacks
*pAllocator
,
1580 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1581 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1582 struct anv_image_view
*iview
;
1584 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1585 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1587 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1589 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1591 assert(range
->layerCount
> 0);
1592 assert(range
->baseMipLevel
< image
->levels
);
1594 /* Check if a conversion info was passed. */
1595 const struct anv_format
*conv_format
= NULL
;
1596 const VkSamplerYcbcrConversionInfo
*conv_info
=
1597 vk_find_struct_const(pCreateInfo
->pNext
, SAMPLER_YCBCR_CONVERSION_INFO
);
1599 /* If image has an external format, the pNext chain must contain an instance of
1600 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1601 * external format as image."
1603 assert(!image
->external_format
|| conv_info
);
1606 ANV_FROM_HANDLE(anv_ycbcr_conversion
, conversion
, conv_info
->conversion
);
1607 conv_format
= conversion
->format
;
1610 VkImageUsageFlags image_usage
= 0;
1611 if (range
->aspectMask
& ~VK_IMAGE_ASPECT_STENCIL_BIT
)
1612 image_usage
|= image
->usage
;
1613 if (range
->aspectMask
& VK_IMAGE_ASPECT_STENCIL_BIT
)
1614 image_usage
|= image
->stencil_usage
;
1616 const VkImageViewUsageCreateInfo
*usage_info
=
1617 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO
);
1618 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image_usage
;
1620 /* View usage should be a subset of image usage */
1621 assert((view_usage
& ~image_usage
) == 0);
1622 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1623 VK_IMAGE_USAGE_STORAGE_BIT
|
1624 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1625 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1626 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1628 switch (image
->type
) {
1630 unreachable("bad VkImageType");
1631 case VK_IMAGE_TYPE_1D
:
1632 case VK_IMAGE_TYPE_2D
:
1633 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1635 case VK_IMAGE_TYPE_3D
:
1636 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1637 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1641 /* First expand aspects to the image's ones (for example
1642 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1643 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1644 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1645 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1647 VkImageAspectFlags expanded_aspects
=
1648 anv_image_expand_aspects(image
, range
->aspectMask
);
1650 iview
->image
= image
;
1652 /* Remap the expanded aspects for the image view. For example if only
1653 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1654 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1655 * the image view, it only has a single plane.
1657 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1658 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1659 iview
->vk_format
= pCreateInfo
->format
;
1661 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1662 assert(!image
->external_format
|| pCreateInfo
->format
== VK_FORMAT_UNDEFINED
);
1664 /* Format is undefined, this can happen when using external formats. Set
1665 * view format from the passed conversion info.
1667 if (iview
->vk_format
== VK_FORMAT_UNDEFINED
&& conv_format
)
1668 iview
->vk_format
= conv_format
->vk_format
;
1670 iview
->extent
= (VkExtent3D
) {
1671 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1672 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1673 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1676 /* Now go through the underlying image selected planes (computed in
1677 * expanded_aspects) and map them to planes in the image view.
1679 uint32_t iaspect_bit
, vplane
= 0;
1680 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1682 anv_image_aspect_to_plane(image
->aspects
, 1UL << iaspect_bit
);
1683 VkImageAspectFlags vplane_aspect
=
1684 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1685 struct anv_format_plane format
=
1686 anv_get_format_plane(&device
->info
, iview
->vk_format
,
1687 vplane_aspect
, image
->tiling
);
1689 iview
->planes
[vplane
].image_plane
= iplane
;
1691 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1692 .format
= format
.isl_format
,
1693 .base_level
= range
->baseMipLevel
,
1694 .levels
= anv_get_levelCount(image
, range
),
1695 .base_array_layer
= range
->baseArrayLayer
,
1696 .array_len
= anv_get_layerCount(image
, range
),
1698 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1699 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1700 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1701 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1702 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1703 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1704 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1705 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
1709 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
1710 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
1711 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
1714 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
1715 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
1716 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
1718 iview
->planes
[vplane
].isl
.usage
= 0;
1721 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
1722 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
1723 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
1724 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
1725 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
1727 enum isl_aux_usage general_aux_usage
=
1728 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1729 VK_IMAGE_LAYOUT_GENERAL
);
1730 enum isl_aux_usage optimal_aux_usage
=
1731 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1732 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
1734 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1735 &iview
->planes
[vplane
].isl
,
1736 ISL_SURF_USAGE_TEXTURE_BIT
,
1737 optimal_aux_usage
, NULL
,
1738 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
1739 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
1742 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1743 &iview
->planes
[vplane
].isl
,
1744 ISL_SURF_USAGE_TEXTURE_BIT
,
1745 general_aux_usage
, NULL
,
1747 &iview
->planes
[vplane
].general_sampler_surface_state
,
1751 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1752 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
1753 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
1754 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
1756 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1757 &iview
->planes
[vplane
].isl
,
1758 ISL_SURF_USAGE_STORAGE_BIT
,
1759 ISL_AUX_USAGE_NONE
, NULL
,
1761 &iview
->planes
[vplane
].storage_surface_state
,
1762 &iview
->planes
[vplane
].storage_image_param
);
1764 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1765 &iview
->planes
[vplane
].isl
,
1766 ISL_SURF_USAGE_STORAGE_BIT
,
1767 ISL_AUX_USAGE_NONE
, NULL
,
1768 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
1769 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
1776 *pView
= anv_image_view_to_handle(iview
);
1782 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
1783 const VkAllocationCallbacks
*pAllocator
)
1785 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1786 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
1791 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
1792 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
1793 anv_state_pool_free(&device
->surface_state_pool
,
1794 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
1797 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
1798 anv_state_pool_free(&device
->surface_state_pool
,
1799 iview
->planes
[plane
].general_sampler_surface_state
.state
);
1802 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
1803 anv_state_pool_free(&device
->surface_state_pool
,
1804 iview
->planes
[plane
].storage_surface_state
.state
);
1807 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
1808 anv_state_pool_free(&device
->surface_state_pool
,
1809 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
1813 vk_free2(&device
->alloc
, pAllocator
, iview
);
1818 anv_CreateBufferView(VkDevice _device
,
1819 const VkBufferViewCreateInfo
*pCreateInfo
,
1820 const VkAllocationCallbacks
*pAllocator
,
1821 VkBufferView
*pView
)
1823 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1824 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
1825 struct anv_buffer_view
*view
;
1827 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
1828 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1830 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1832 /* TODO: Handle the format swizzle? */
1834 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
1835 VK_IMAGE_ASPECT_COLOR_BIT
,
1836 VK_IMAGE_TILING_LINEAR
);
1837 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
1838 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
1839 pCreateInfo
->range
);
1840 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
1842 view
->address
= anv_address_add(buffer
->address
, pCreateInfo
->offset
);
1844 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
1845 view
->surface_state
= alloc_surface_state(device
);
1847 anv_fill_buffer_surface_state(device
, view
->surface_state
,
1849 view
->address
, view
->range
, format_bs
);
1851 view
->surface_state
= (struct anv_state
){ 0 };
1854 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
1855 view
->storage_surface_state
= alloc_surface_state(device
);
1856 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
1858 enum isl_format storage_format
=
1859 isl_has_matching_typed_storage_image_format(&device
->info
,
1861 isl_lower_storage_image_format(&device
->info
, view
->format
) :
1864 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
1866 view
->address
, view
->range
,
1867 (storage_format
== ISL_FORMAT_RAW
? 1 :
1868 isl_format_get_layout(storage_format
)->bpb
/ 8));
1870 /* Write-only accesses should use the original format. */
1871 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
1873 view
->address
, view
->range
,
1874 isl_format_get_layout(view
->format
)->bpb
/ 8);
1876 isl_buffer_fill_image_param(&device
->isl_dev
,
1877 &view
->storage_image_param
,
1878 view
->format
, view
->range
);
1880 view
->storage_surface_state
= (struct anv_state
){ 0 };
1881 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
1884 *pView
= anv_buffer_view_to_handle(view
);
1890 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
1891 const VkAllocationCallbacks
*pAllocator
)
1893 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1894 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
1899 if (view
->surface_state
.alloc_size
> 0)
1900 anv_state_pool_free(&device
->surface_state_pool
,
1901 view
->surface_state
);
1903 if (view
->storage_surface_state
.alloc_size
> 0)
1904 anv_state_pool_free(&device
->surface_state_pool
,
1905 view
->storage_surface_state
);
1907 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
1908 anv_state_pool_free(&device
->surface_state_pool
,
1909 view
->writeonly_storage_surface_state
);
1911 vk_free2(&device
->alloc
, pAllocator
, view
);
1914 const struct anv_surface
*
1915 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
1916 VkImageAspectFlags aspect_mask
)
1918 VkImageAspectFlags sanitized_mask
;
1920 switch (aspect_mask
) {
1921 case VK_IMAGE_ASPECT_COLOR_BIT
:
1922 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1923 sanitized_mask
= VK_IMAGE_ASPECT_COLOR_BIT
;
1925 case VK_IMAGE_ASPECT_DEPTH_BIT
:
1926 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1927 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1929 case VK_IMAGE_ASPECT_STENCIL_BIT
:
1930 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1931 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1933 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
1934 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
1935 * combined depth stencil formats. Specifically, it states:
1937 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
1938 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
1940 * Image views with both depth and stencil aspects are only valid for
1941 * render target attachments, in which case
1942 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
1943 * stencil surfaces from the underlying surface.
1945 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
1946 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1948 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
1949 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1952 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
1953 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1954 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_0_BIT
;
1956 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
1957 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1958 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_1_BIT
;
1960 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
1961 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1962 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_2_BIT
;
1965 unreachable("image does not have aspect");
1969 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, sanitized_mask
);
1970 return &image
->planes
[plane
].surface
;