anv: Enable sampling from HiZ
[mesa.git] / src / intel / vulkan / anv_image.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25 #include <stdbool.h>
26 #include <string.h>
27 #include <unistd.h>
28 #include <fcntl.h>
29
30 #include "anv_private.h"
31 #include "util/debug.h"
32
33 #include "vk_format_info.h"
34
35 /**
36 * Exactly one bit must be set in \a aspect.
37 */
38 static isl_surf_usage_flags_t
39 choose_isl_surf_usage(VkImageUsageFlags vk_usage,
40 VkImageAspectFlags aspect)
41 {
42 isl_surf_usage_flags_t isl_usage = 0;
43
44 if (vk_usage & VK_IMAGE_USAGE_SAMPLED_BIT)
45 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
46
47 if (vk_usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT)
48 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
49
50 if (vk_usage & VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT)
51 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
52
53 if (vk_usage & VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT)
54 isl_usage |= ISL_SURF_USAGE_CUBE_BIT;
55
56 /* Even if we're only using it for transfer operations, clears to depth and
57 * stencil images happen as depth and stencil so they need the right ISL
58 * usage bits or else things will fall apart.
59 */
60 switch (aspect) {
61 case VK_IMAGE_ASPECT_DEPTH_BIT:
62 isl_usage |= ISL_SURF_USAGE_DEPTH_BIT;
63 break;
64 case VK_IMAGE_ASPECT_STENCIL_BIT:
65 isl_usage |= ISL_SURF_USAGE_STENCIL_BIT;
66 break;
67 case VK_IMAGE_ASPECT_COLOR_BIT:
68 break;
69 default:
70 unreachable("bad VkImageAspect");
71 }
72
73 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_SRC_BIT) {
74 /* blorp implements transfers by sampling from the source image. */
75 isl_usage |= ISL_SURF_USAGE_TEXTURE_BIT;
76 }
77
78 if (vk_usage & VK_IMAGE_USAGE_TRANSFER_DST_BIT) {
79 /* blorp implements transfers by rendering into the destination image. */
80 isl_usage |= ISL_SURF_USAGE_RENDER_TARGET_BIT;
81 }
82
83 return isl_usage;
84 }
85
86 /**
87 * Exactly one bit must be set in \a aspect.
88 */
89 static struct anv_surface *
90 get_surface(struct anv_image *image, VkImageAspectFlags aspect)
91 {
92 switch (aspect) {
93 default:
94 unreachable("bad VkImageAspect");
95 case VK_IMAGE_ASPECT_COLOR_BIT:
96 return &image->color_surface;
97 case VK_IMAGE_ASPECT_DEPTH_BIT:
98 return &image->depth_surface;
99 case VK_IMAGE_ASPECT_STENCIL_BIT:
100 return &image->stencil_surface;
101 }
102 }
103
104 static void
105 add_surface(struct anv_image *image, struct anv_surface *surf)
106 {
107 assert(surf->isl.size > 0); /* isl surface must be initialized */
108
109 surf->offset = align_u32(image->size, surf->isl.alignment);
110 image->size = surf->offset + surf->isl.size;
111 image->alignment = MAX2(image->alignment, surf->isl.alignment);
112 }
113
114 /**
115 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
116 * image's memory requirements (that is, the image's size and alignment).
117 *
118 * Exactly one bit must be set in \a aspect.
119 */
120 static VkResult
121 make_surface(const struct anv_device *dev,
122 struct anv_image *image,
123 const struct anv_image_create_info *anv_info,
124 VkImageAspectFlags aspect)
125 {
126 const VkImageCreateInfo *vk_info = anv_info->vk_info;
127 bool ok UNUSED;
128
129 static const enum isl_surf_dim vk_to_isl_surf_dim[] = {
130 [VK_IMAGE_TYPE_1D] = ISL_SURF_DIM_1D,
131 [VK_IMAGE_TYPE_2D] = ISL_SURF_DIM_2D,
132 [VK_IMAGE_TYPE_3D] = ISL_SURF_DIM_3D,
133 };
134
135 /* Translate the Vulkan tiling to an equivalent ISL tiling, then filter the
136 * result with an optionally provided ISL tiling argument.
137 */
138 isl_tiling_flags_t tiling_flags =
139 (vk_info->tiling == VK_IMAGE_TILING_LINEAR) ?
140 ISL_TILING_LINEAR_BIT : ISL_TILING_ANY_MASK;
141
142 if (anv_info->isl_tiling_flags)
143 tiling_flags &= anv_info->isl_tiling_flags;
144
145 assert(tiling_flags);
146
147 struct anv_surface *anv_surf = get_surface(image, aspect);
148
149 image->extent = anv_sanitize_image_extent(vk_info->imageType,
150 vk_info->extent);
151
152 enum isl_format format = anv_get_isl_format(&dev->info, vk_info->format,
153 aspect, vk_info->tiling);
154 assert(format != ISL_FORMAT_UNSUPPORTED);
155
156 ok = isl_surf_init(&dev->isl_dev, &anv_surf->isl,
157 .dim = vk_to_isl_surf_dim[vk_info->imageType],
158 .format = format,
159 .width = image->extent.width,
160 .height = image->extent.height,
161 .depth = image->extent.depth,
162 .levels = vk_info->mipLevels,
163 .array_len = vk_info->arrayLayers,
164 .samples = vk_info->samples,
165 .min_alignment = 0,
166 .min_pitch = anv_info->stride,
167 .usage = choose_isl_surf_usage(image->usage, aspect),
168 .tiling_flags = tiling_flags);
169
170 /* isl_surf_init() will fail only if provided invalid input. Invalid input
171 * is illegal in Vulkan.
172 */
173 assert(ok);
174
175 add_surface(image, anv_surf);
176
177 /* Add a HiZ surface to a depth buffer that will be used for rendering.
178 */
179 if (aspect == VK_IMAGE_ASPECT_DEPTH_BIT) {
180 /* Allow the user to control HiZ enabling. Disable by default on gen7
181 * because resolves are not currently implemented pre-BDW.
182 */
183 if (!(image->usage & VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT)) {
184 /* It will never be used as an attachment, HiZ is pointless. */
185 } else if (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT) {
186 /* From the 1.0.37 spec:
187 *
188 * "An attachment used as an input attachment and depth/stencil
189 * attachment must be in either VK_IMAGE_LAYOUT_GENERAL or
190 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL."
191 *
192 * It will never have a layout of
193 * VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL, so HiZ is
194 * currently pointless. If transfer operations learn to use the HiZ
195 * buffer, we can enable HiZ for VK_IMAGE_LAYOUT_GENERAL and support
196 * input attachments.
197 */
198 anv_finishme("Implement HiZ for input attachments");
199 } else if (!env_var_as_boolean("INTEL_VK_HIZ", dev->info.gen >= 8)) {
200 anv_finishme("Implement gen7 HiZ");
201 } else if (vk_info->mipLevels > 1) {
202 anv_finishme("Test multi-LOD HiZ");
203 } else if (vk_info->arrayLayers > 1) {
204 anv_finishme("Implement multi-arrayLayer HiZ clears and resolves");
205 } else if (dev->info.gen == 8 && vk_info->samples > 1) {
206 anv_finishme("Test gen8 multisampled HiZ");
207 } else {
208 assert(image->aux_surface.isl.size == 0);
209 isl_surf_get_hiz_surf(&dev->isl_dev, &image->depth_surface.isl,
210 &image->aux_surface.isl);
211 add_surface(image, &image->aux_surface);
212 image->aux_usage = ISL_AUX_USAGE_HIZ;
213 }
214 } else if (aspect == VK_IMAGE_ASPECT_COLOR_BIT && vk_info->samples == 1) {
215 if (!unlikely(INTEL_DEBUG & DEBUG_NO_RBC)) {
216 assert(image->aux_surface.isl.size == 0);
217 ok = isl_surf_get_ccs_surf(&dev->isl_dev, &anv_surf->isl,
218 &image->aux_surface.isl);
219 if (ok) {
220 add_surface(image, &image->aux_surface);
221
222 /* For images created without MUTABLE_FORMAT_BIT set, we know that
223 * they will always be used with the original format. In
224 * particular, they will always be used with a format that
225 * supports color compression. This means that it's safe to just
226 * leave compression on at all times for these formats.
227 */
228 if (!(vk_info->flags & VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT) &&
229 isl_format_supports_lossless_compression(&dev->info, format)) {
230 if (vk_info->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
231 /*
232 * For now, we leave compression off for anything that may
233 * be used as a storage image. This is because accessing
234 * storage images may involve ccs-incompatible views or even
235 * untyped messages which don't support compression at all.
236 */
237 anv_finishme("Enable CCS for storage images");
238 } else {
239 image->aux_usage = ISL_AUX_USAGE_CCS_E;
240 }
241 }
242 }
243 }
244 }
245
246 return VK_SUCCESS;
247 }
248
249 VkResult
250 anv_image_create(VkDevice _device,
251 const struct anv_image_create_info *create_info,
252 const VkAllocationCallbacks* alloc,
253 VkImage *pImage)
254 {
255 ANV_FROM_HANDLE(anv_device, device, _device);
256 const VkImageCreateInfo *pCreateInfo = create_info->vk_info;
257 struct anv_image *image = NULL;
258 VkResult r;
259
260 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO);
261
262 anv_assert(pCreateInfo->mipLevels > 0);
263 anv_assert(pCreateInfo->arrayLayers > 0);
264 anv_assert(pCreateInfo->samples > 0);
265 anv_assert(pCreateInfo->extent.width > 0);
266 anv_assert(pCreateInfo->extent.height > 0);
267 anv_assert(pCreateInfo->extent.depth > 0);
268
269 image = vk_alloc2(&device->alloc, alloc, sizeof(*image), 8,
270 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
271 if (!image)
272 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
273
274 memset(image, 0, sizeof(*image));
275 image->type = pCreateInfo->imageType;
276 image->extent = pCreateInfo->extent;
277 image->vk_format = pCreateInfo->format;
278 image->aspects = vk_format_aspects(image->vk_format);
279 image->levels = pCreateInfo->mipLevels;
280 image->array_size = pCreateInfo->arrayLayers;
281 image->samples = pCreateInfo->samples;
282 image->usage = pCreateInfo->usage;
283 image->tiling = pCreateInfo->tiling;
284 image->aux_usage = ISL_AUX_USAGE_NONE;
285
286 uint32_t b;
287 for_each_bit(b, image->aspects) {
288 r = make_surface(device, image, create_info, (1 << b));
289 if (r != VK_SUCCESS)
290 goto fail;
291 }
292
293 *pImage = anv_image_to_handle(image);
294
295 return VK_SUCCESS;
296
297 fail:
298 if (image)
299 vk_free2(&device->alloc, alloc, image);
300
301 return r;
302 }
303
304 VkResult
305 anv_CreateImage(VkDevice device,
306 const VkImageCreateInfo *pCreateInfo,
307 const VkAllocationCallbacks *pAllocator,
308 VkImage *pImage)
309 {
310 return anv_image_create(device,
311 &(struct anv_image_create_info) {
312 .vk_info = pCreateInfo,
313 },
314 pAllocator,
315 pImage);
316 }
317
318 void
319 anv_DestroyImage(VkDevice _device, VkImage _image,
320 const VkAllocationCallbacks *pAllocator)
321 {
322 ANV_FROM_HANDLE(anv_device, device, _device);
323 ANV_FROM_HANDLE(anv_image, image, _image);
324
325 if (!image)
326 return;
327
328 vk_free2(&device->alloc, pAllocator, image);
329 }
330
331 VkResult anv_BindImageMemory(
332 VkDevice _device,
333 VkImage _image,
334 VkDeviceMemory _memory,
335 VkDeviceSize memoryOffset)
336 {
337 ANV_FROM_HANDLE(anv_device, device, _device);
338 ANV_FROM_HANDLE(anv_device_memory, mem, _memory);
339 ANV_FROM_HANDLE(anv_image, image, _image);
340
341 if (mem) {
342 image->bo = &mem->bo;
343 image->offset = memoryOffset;
344 } else {
345 image->bo = NULL;
346 image->offset = 0;
347 }
348
349 if (image->aux_surface.isl.size > 0) {
350
351 /* The offset and size must be a multiple of 4K or else the
352 * anv_gem_mmap call below will return NULL.
353 */
354 assert((image->offset + image->aux_surface.offset) % 4096 == 0);
355 assert(image->aux_surface.isl.size % 4096 == 0);
356
357 /* Auxiliary surfaces need to have their memory cleared to 0 before they
358 * can be used. For CCS surfaces, this puts them in the "resolved"
359 * state so they can be used with CCS enabled before we ever touch it
360 * from the GPU. For HiZ, we need something valid or else we may get
361 * GPU hangs on some hardware and 0 works fine.
362 */
363 void *map = anv_gem_mmap(device, image->bo->gem_handle,
364 image->offset + image->aux_surface.offset,
365 image->aux_surface.isl.size,
366 device->info.has_llc ? 0 : I915_MMAP_WC);
367
368 /* If anv_gem_mmap returns NULL, it's likely that the kernel was
369 * not able to find space on the host to create a proper mapping.
370 */
371 if (map == NULL)
372 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
373
374 memset(map, 0, image->aux_surface.isl.size);
375
376 anv_gem_munmap(map, image->aux_surface.isl.size);
377 }
378
379 return VK_SUCCESS;
380 }
381
382 static void
383 anv_surface_get_subresource_layout(struct anv_image *image,
384 struct anv_surface *surface,
385 const VkImageSubresource *subresource,
386 VkSubresourceLayout *layout)
387 {
388 /* If we are on a non-zero mip level or array slice, we need to
389 * calculate a real offset.
390 */
391 anv_assert(subresource->mipLevel == 0);
392 anv_assert(subresource->arrayLayer == 0);
393
394 layout->offset = surface->offset;
395 layout->rowPitch = surface->isl.row_pitch;
396 layout->depthPitch = isl_surf_get_array_pitch(&surface->isl);
397 layout->arrayPitch = isl_surf_get_array_pitch(&surface->isl);
398 layout->size = surface->isl.size;
399 }
400
401 void anv_GetImageSubresourceLayout(
402 VkDevice device,
403 VkImage _image,
404 const VkImageSubresource* pSubresource,
405 VkSubresourceLayout* pLayout)
406 {
407 ANV_FROM_HANDLE(anv_image, image, _image);
408
409 assert(__builtin_popcount(pSubresource->aspectMask) == 1);
410
411 switch (pSubresource->aspectMask) {
412 case VK_IMAGE_ASPECT_COLOR_BIT:
413 anv_surface_get_subresource_layout(image, &image->color_surface,
414 pSubresource, pLayout);
415 break;
416 case VK_IMAGE_ASPECT_DEPTH_BIT:
417 anv_surface_get_subresource_layout(image, &image->depth_surface,
418 pSubresource, pLayout);
419 break;
420 case VK_IMAGE_ASPECT_STENCIL_BIT:
421 anv_surface_get_subresource_layout(image, &image->stencil_surface,
422 pSubresource, pLayout);
423 break;
424 default:
425 assert(!"Invalid image aspect");
426 }
427 }
428
429 static struct anv_state
430 alloc_surface_state(struct anv_device *device)
431 {
432 return anv_state_pool_alloc(&device->surface_state_pool, 64, 64);
433 }
434
435 static enum isl_channel_select
436 remap_swizzle(VkComponentSwizzle swizzle, VkComponentSwizzle component,
437 struct isl_swizzle format_swizzle)
438 {
439 if (swizzle == VK_COMPONENT_SWIZZLE_IDENTITY)
440 swizzle = component;
441
442 switch (swizzle) {
443 case VK_COMPONENT_SWIZZLE_ZERO: return ISL_CHANNEL_SELECT_ZERO;
444 case VK_COMPONENT_SWIZZLE_ONE: return ISL_CHANNEL_SELECT_ONE;
445 case VK_COMPONENT_SWIZZLE_R: return format_swizzle.r;
446 case VK_COMPONENT_SWIZZLE_G: return format_swizzle.g;
447 case VK_COMPONENT_SWIZZLE_B: return format_swizzle.b;
448 case VK_COMPONENT_SWIZZLE_A: return format_swizzle.a;
449 default:
450 unreachable("Invalid swizzle");
451 }
452 }
453
454
455 VkResult
456 anv_CreateImageView(VkDevice _device,
457 const VkImageViewCreateInfo *pCreateInfo,
458 const VkAllocationCallbacks *pAllocator,
459 VkImageView *pView)
460 {
461 ANV_FROM_HANDLE(anv_device, device, _device);
462 ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
463 struct anv_image_view *iview;
464
465 iview = vk_alloc2(&device->alloc, pAllocator, sizeof(*iview), 8,
466 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
467 if (iview == NULL)
468 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
469
470 const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
471
472 assert(range->layerCount > 0);
473 assert(range->baseMipLevel < image->levels);
474 assert(image->usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
475 VK_IMAGE_USAGE_STORAGE_BIT |
476 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT |
477 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT));
478
479 switch (image->type) {
480 default:
481 unreachable("bad VkImageType");
482 case VK_IMAGE_TYPE_1D:
483 case VK_IMAGE_TYPE_2D:
484 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1 <= image->array_size);
485 break;
486 case VK_IMAGE_TYPE_3D:
487 assert(range->baseArrayLayer + anv_get_layerCount(image, range) - 1
488 <= anv_minify(image->extent.depth, range->baseMipLevel));
489 break;
490 }
491
492 const struct anv_surface *surface =
493 anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
494
495 iview->image = image;
496 iview->bo = image->bo;
497 iview->offset = image->offset + surface->offset;
498
499 iview->aspect_mask = pCreateInfo->subresourceRange.aspectMask;
500 iview->vk_format = pCreateInfo->format;
501
502 struct anv_format format = anv_get_format(&device->info, pCreateInfo->format,
503 range->aspectMask, image->tiling);
504
505 iview->isl = (struct isl_view) {
506 .format = format.isl_format,
507 .base_level = range->baseMipLevel,
508 .levels = anv_get_levelCount(image, range),
509 .base_array_layer = range->baseArrayLayer,
510 .array_len = anv_get_layerCount(image, range),
511 .swizzle = {
512 .r = remap_swizzle(pCreateInfo->components.r,
513 VK_COMPONENT_SWIZZLE_R, format.swizzle),
514 .g = remap_swizzle(pCreateInfo->components.g,
515 VK_COMPONENT_SWIZZLE_G, format.swizzle),
516 .b = remap_swizzle(pCreateInfo->components.b,
517 VK_COMPONENT_SWIZZLE_B, format.swizzle),
518 .a = remap_swizzle(pCreateInfo->components.a,
519 VK_COMPONENT_SWIZZLE_A, format.swizzle),
520 },
521 };
522
523 iview->extent = (VkExtent3D) {
524 .width = anv_minify(image->extent.width , range->baseMipLevel),
525 .height = anv_minify(image->extent.height, range->baseMipLevel),
526 .depth = anv_minify(image->extent.depth , range->baseMipLevel),
527 };
528
529 if (image->type == VK_IMAGE_TYPE_3D) {
530 iview->isl.base_array_layer = 0;
531 iview->isl.array_len = iview->extent.depth;
532 }
533
534 if (pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE ||
535 pCreateInfo->viewType == VK_IMAGE_VIEW_TYPE_CUBE_ARRAY) {
536 iview->isl.usage = ISL_SURF_USAGE_CUBE_BIT;
537 } else {
538 iview->isl.usage = 0;
539 }
540
541 /* If the HiZ buffer can be sampled from, set the constant clear color.
542 * If it cannot, disable the isl aux usage flag.
543 */
544 float red_clear_color = 0.0f;
545 enum isl_aux_usage surf_usage = image->aux_usage;
546 if (image->aux_usage == ISL_AUX_USAGE_HIZ) {
547 if (iview->aspect_mask & VK_IMAGE_ASPECT_DEPTH_BIT &&
548 anv_can_sample_with_hiz(device->info.gen, image->samples)) {
549 /* When a HiZ buffer is sampled on gen9+, ensure that
550 * the constant fast clear value is set in the surface state.
551 */
552 if (device->info.gen >= 9)
553 red_clear_color = ANV_HZ_FC_VAL;
554 } else {
555 surf_usage = ISL_AUX_USAGE_NONE;
556 }
557 }
558
559 /* Input attachment surfaces for color are allocated and filled
560 * out at BeginRenderPass time because they need compression information.
561 * Compression is not yet enabled for depth textures and stencil doesn't
562 * allow compression so we can just use the texture surface state from the
563 * view.
564 */
565 if (image->usage & VK_IMAGE_USAGE_SAMPLED_BIT ||
566 (image->usage & VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT &&
567 !(iview->aspect_mask & VK_IMAGE_ASPECT_COLOR_BIT))) {
568 iview->sampler_surface_state = alloc_surface_state(device);
569
570 struct isl_view view = iview->isl;
571 view.usage |= ISL_SURF_USAGE_TEXTURE_BIT;
572 isl_surf_fill_state(&device->isl_dev,
573 iview->sampler_surface_state.map,
574 .surf = &surface->isl,
575 .view = &view,
576 .clear_color.f32 = { red_clear_color,},
577 .aux_surf = &image->aux_surface.isl,
578 .aux_usage = surf_usage,
579 .mocs = device->default_mocs);
580
581 if (!device->info.has_llc)
582 anv_state_clflush(iview->sampler_surface_state);
583 } else {
584 iview->sampler_surface_state.alloc_size = 0;
585 }
586
587 /* NOTE: This one needs to go last since it may stomp isl_view.format */
588 if (image->usage & VK_IMAGE_USAGE_STORAGE_BIT) {
589 iview->storage_surface_state = alloc_surface_state(device);
590
591 if (isl_has_matching_typed_storage_image_format(&device->info,
592 format.isl_format)) {
593 struct isl_view view = iview->isl;
594 view.usage |= ISL_SURF_USAGE_STORAGE_BIT;
595 view.format = isl_lower_storage_image_format(&device->info,
596 format.isl_format);
597 isl_surf_fill_state(&device->isl_dev,
598 iview->storage_surface_state.map,
599 .surf = &surface->isl,
600 .view = &view,
601 .aux_surf = &image->aux_surface.isl,
602 .aux_usage = surf_usage,
603 .mocs = device->default_mocs);
604 } else {
605 anv_fill_buffer_surface_state(device, iview->storage_surface_state,
606 ISL_FORMAT_RAW,
607 iview->offset,
608 iview->bo->size - iview->offset, 1);
609 }
610
611 isl_surf_fill_image_param(&device->isl_dev,
612 &iview->storage_image_param,
613 &surface->isl, &iview->isl);
614
615 if (!device->info.has_llc)
616 anv_state_clflush(iview->storage_surface_state);
617 } else {
618 iview->storage_surface_state.alloc_size = 0;
619 }
620
621 *pView = anv_image_view_to_handle(iview);
622
623 return VK_SUCCESS;
624 }
625
626 void
627 anv_DestroyImageView(VkDevice _device, VkImageView _iview,
628 const VkAllocationCallbacks *pAllocator)
629 {
630 ANV_FROM_HANDLE(anv_device, device, _device);
631 ANV_FROM_HANDLE(anv_image_view, iview, _iview);
632
633 if (!iview)
634 return;
635
636 if (iview->sampler_surface_state.alloc_size > 0) {
637 anv_state_pool_free(&device->surface_state_pool,
638 iview->sampler_surface_state);
639 }
640
641 if (iview->storage_surface_state.alloc_size > 0) {
642 anv_state_pool_free(&device->surface_state_pool,
643 iview->storage_surface_state);
644 }
645
646 vk_free2(&device->alloc, pAllocator, iview);
647 }
648
649
650 VkResult
651 anv_CreateBufferView(VkDevice _device,
652 const VkBufferViewCreateInfo *pCreateInfo,
653 const VkAllocationCallbacks *pAllocator,
654 VkBufferView *pView)
655 {
656 ANV_FROM_HANDLE(anv_device, device, _device);
657 ANV_FROM_HANDLE(anv_buffer, buffer, pCreateInfo->buffer);
658 struct anv_buffer_view *view;
659
660 view = vk_alloc2(&device->alloc, pAllocator, sizeof(*view), 8,
661 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
662 if (!view)
663 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
664
665 /* TODO: Handle the format swizzle? */
666
667 view->format = anv_get_isl_format(&device->info, pCreateInfo->format,
668 VK_IMAGE_ASPECT_COLOR_BIT,
669 VK_IMAGE_TILING_LINEAR);
670 const uint32_t format_bs = isl_format_get_layout(view->format)->bpb / 8;
671 view->bo = buffer->bo;
672 view->offset = buffer->offset + pCreateInfo->offset;
673 view->range = pCreateInfo->range == VK_WHOLE_SIZE ?
674 buffer->size - pCreateInfo->offset : pCreateInfo->range;
675 view->range = align_down_npot_u32(view->range, format_bs);
676
677 if (buffer->usage & VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT) {
678 view->surface_state = alloc_surface_state(device);
679
680 anv_fill_buffer_surface_state(device, view->surface_state,
681 view->format,
682 view->offset, view->range, format_bs);
683 } else {
684 view->surface_state = (struct anv_state){ 0 };
685 }
686
687 if (buffer->usage & VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT) {
688 view->storage_surface_state = alloc_surface_state(device);
689
690 enum isl_format storage_format =
691 isl_has_matching_typed_storage_image_format(&device->info,
692 view->format) ?
693 isl_lower_storage_image_format(&device->info, view->format) :
694 ISL_FORMAT_RAW;
695
696 anv_fill_buffer_surface_state(device, view->storage_surface_state,
697 storage_format,
698 view->offset, view->range,
699 (storage_format == ISL_FORMAT_RAW ? 1 :
700 isl_format_get_layout(storage_format)->bpb / 8));
701
702 isl_buffer_fill_image_param(&device->isl_dev,
703 &view->storage_image_param,
704 view->format, view->range);
705 } else {
706 view->storage_surface_state = (struct anv_state){ 0 };
707 }
708
709 *pView = anv_buffer_view_to_handle(view);
710
711 return VK_SUCCESS;
712 }
713
714 void
715 anv_DestroyBufferView(VkDevice _device, VkBufferView bufferView,
716 const VkAllocationCallbacks *pAllocator)
717 {
718 ANV_FROM_HANDLE(anv_device, device, _device);
719 ANV_FROM_HANDLE(anv_buffer_view, view, bufferView);
720
721 if (!view)
722 return;
723
724 if (view->surface_state.alloc_size > 0)
725 anv_state_pool_free(&device->surface_state_pool,
726 view->surface_state);
727
728 if (view->storage_surface_state.alloc_size > 0)
729 anv_state_pool_free(&device->surface_state_pool,
730 view->storage_surface_state);
731
732 vk_free2(&device->alloc, pAllocator, view);
733 }
734
735 const struct anv_surface *
736 anv_image_get_surface_for_aspect_mask(const struct anv_image *image,
737 VkImageAspectFlags aspect_mask)
738 {
739 switch (aspect_mask) {
740 case VK_IMAGE_ASPECT_COLOR_BIT:
741 assert(image->aspects == VK_IMAGE_ASPECT_COLOR_BIT);
742 return &image->color_surface;
743 case VK_IMAGE_ASPECT_DEPTH_BIT:
744 assert(image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT);
745 return &image->depth_surface;
746 case VK_IMAGE_ASPECT_STENCIL_BIT:
747 assert(image->aspects & VK_IMAGE_ASPECT_STENCIL_BIT);
748 return &image->stencil_surface;
749 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
750 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
751 * combined depth stencil formats. Specifically, it states:
752 *
753 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
754 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
755 *
756 * Image views with both depth and stencil aspects are only valid for
757 * render target attachments, in which case
758 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
759 * stencil surfaces from the underlying surface.
760 */
761 if (image->aspects & VK_IMAGE_ASPECT_DEPTH_BIT) {
762 return &image->depth_surface;
763 } else {
764 assert(image->aspects == VK_IMAGE_ASPECT_STENCIL_BIT);
765 return &image->stencil_surface;
766 }
767 default:
768 unreachable("image does not have aspect");
769 return NULL;
770 }
771 }