2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm-uapi/drm_fourcc.h"
32 #include "anv_private.h"
33 #include "util/debug.h"
35 #include "util/u_math.h"
37 #include "vk_format_info.h"
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
41 VkImageUsageFlags vk_usage
,
42 isl_surf_usage_flags_t isl_extra_usage
,
43 VkImageAspectFlagBits aspect
)
45 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
47 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
53 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
56 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
57 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
64 case VK_IMAGE_ASPECT_DEPTH_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
67 case VK_IMAGE_ASPECT_STENCIL_BIT
:
68 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
70 case VK_IMAGE_ASPECT_COLOR_BIT
:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
76 unreachable("bad VkImageAspect");
79 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
84 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
85 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct anv_image_create_info
*anv_info
,
97 const struct isl_drm_modifier_info
*isl_mod_info
,
100 const VkImageCreateInfo
*base_info
= anv_info
->vk_info
;
101 isl_tiling_flags_t flags
= 0;
103 switch (base_info
->tiling
) {
105 unreachable("bad VkImageTiling");
106 case VK_IMAGE_TILING_OPTIMAL
:
107 flags
= ISL_TILING_ANY_MASK
;
109 case VK_IMAGE_TILING_LINEAR
:
110 flags
= ISL_TILING_LINEAR_BIT
;
114 if (anv_info
->isl_tiling_flags
)
115 flags
&= anv_info
->isl_tiling_flags
;
118 flags
&= ISL_TILING_LINEAR_BIT
| ISL_TILING_X_BIT
;
121 flags
&= 1 << isl_mod_info
->tiling
;
128 static struct anv_surface
*
129 get_surface(struct anv_image
*image
, VkImageAspectFlagBits aspect
)
131 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
132 return &image
->planes
[plane
].surface
;
136 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
138 assert(surf
->isl
.size_B
> 0); /* isl surface must be initialized */
140 if (image
->disjoint
) {
141 surf
->offset
= align_u32(image
->planes
[plane
].size
,
142 surf
->isl
.alignment_B
);
143 /* Plane offset is always 0 when it's disjoint. */
145 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment_B
);
146 /* Determine plane's offset only once when the first surface is added. */
147 if (image
->planes
[plane
].size
== 0)
148 image
->planes
[plane
].offset
= image
->size
;
151 image
->size
= surf
->offset
+ surf
->isl
.size_B
;
152 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size_B
) - image
->planes
[plane
].offset
;
154 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment_B
);
155 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
156 surf
->isl
.alignment_B
);
161 all_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
162 const VkImageFormatListCreateInfoKHR
*fmt_list
,
163 struct anv_image
*image
)
165 enum isl_format format
=
166 anv_get_isl_format(devinfo
, image
->vk_format
,
167 VK_IMAGE_ASPECT_COLOR_BIT
, image
->tiling
);
169 if (!isl_format_supports_ccs_e(devinfo
, format
))
172 if (!(image
->create_flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
175 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
178 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
179 enum isl_format view_format
=
180 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
181 VK_IMAGE_ASPECT_COLOR_BIT
, image
->tiling
);
183 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
191 * For color images that have an auxiliary surface, request allocation for an
192 * additional buffer that mainly stores fast-clear values. Use of this buffer
193 * allows us to access the image's subresources while being aware of their
194 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
195 * which a fast clear has occurred).
197 * In order to avoid having multiple clear colors for a single plane of an
198 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
199 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
200 * 2018), there were no known applications which would benefit from fast-
201 * clearing more than just the first slice.
203 * The fast clear portion of the image is laid out in the following order:
205 * * 1 or 4 dwords (depending on hardware generation) for the clear color
206 * * 1 dword for the anv_fast_clear_type of the clear color
207 * * On gen9+, 1 dword per level and layer of the image (3D levels count
208 * multiple layers) in level-major order for compression state.
210 * For the purpose of discoverability, the algorithm used to manage
211 * compression and fast-clears is described here:
213 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
214 * all of the values in the fast clear portion of the image are initialized
217 * * On fast-clear, the clear value is written into surface state and also
218 * into the buffer and the fast clear type is set appropriately. Both
219 * setting the fast-clear value in the buffer and setting the fast-clear
220 * type happen from the GPU using MI commands.
222 * * Whenever a render or blorp operation is performed with CCS_E, we call
223 * genX(cmd_buffer_mark_image_written) to set the compression state to
224 * true (which is represented by UINT32_MAX).
226 * * On pipeline barrier transitions, the worst-case transition is computed
227 * from the image layouts. The command streamer inspects the fast clear
228 * type and compression state dwords and constructs a predicate. The
229 * worst-case resolve is performed with the given predicate and the fast
230 * clear and compression state is set accordingly.
232 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
233 * details on exactly what is allowed in what layouts.
235 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
236 * In order to deal with this, we have to do some clear color management.
238 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
239 * value from the buffer into the surface state with MI commands.
241 * * For any blorp operations, we pass the address to the clear value into
242 * blorp and it knows to copy the clear color.
245 add_aux_state_tracking_buffer(struct anv_image
*image
,
247 const struct anv_device
*device
)
249 assert(image
&& device
);
250 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 &&
251 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
253 /* Compressed images must be tiled and therefore everything should be 4K
254 * aligned. The CCS has the same alignment requirements. This is good
255 * because we need at least dword-alignment for MI_LOAD/STORE operations.
257 assert(image
->alignment
% 4 == 0);
258 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
260 /* This buffer should be at the very end of the plane. */
261 if (image
->disjoint
) {
262 assert(image
->planes
[plane
].size
==
263 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
265 assert(image
->size
==
266 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
269 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
270 device
->isl_dev
.ss
.clear_color_state_size
:
271 device
->isl_dev
.ss
.clear_value_size
;
273 /* Clear color and fast clear type */
274 unsigned state_size
= clear_color_state_size
+ 4;
276 /* We only need to track compression on CCS_E surfaces. */
277 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
278 if (image
->type
== VK_IMAGE_TYPE_3D
) {
279 for (uint32_t l
= 0; l
< image
->levels
; l
++)
280 state_size
+= anv_minify(image
->extent
.depth
, l
) * 4;
282 state_size
+= image
->levels
* image
->array_size
* 4;
286 image
->planes
[plane
].fast_clear_state_offset
=
287 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
289 image
->planes
[plane
].size
+= state_size
;
290 image
->size
+= state_size
;
294 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
295 * image's memory requirements (that is, the image's size and alignment).
298 make_surface(const struct anv_device
*dev
,
299 struct anv_image
*image
,
301 isl_tiling_flags_t tiling_flags
,
302 isl_surf_usage_flags_t isl_extra_usage_flags
,
303 VkImageAspectFlagBits aspect
)
307 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
308 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
309 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
310 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
313 image
->extent
= anv_sanitize_image_extent(image
->type
, image
->extent
);
315 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
316 const struct anv_format_plane plane_format
=
317 anv_get_format_plane(&dev
->info
, image
->vk_format
, aspect
, image
->tiling
);
318 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
320 const isl_surf_usage_flags_t usage
=
321 choose_isl_surf_usage(image
->create_flags
, image
->usage
,
322 isl_extra_usage_flags
, aspect
);
324 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
325 * fall back to linear on Broadwell and earlier because we aren't
326 * guaranteed that we can handle offsets correctly. On Sky Lake, the
327 * horizontal and vertical alignments are sufficiently high that we can
328 * just use RENDER_SURFACE_STATE::X/Y Offset.
330 bool needs_shadow
= false;
331 isl_surf_usage_flags_t shadow_usage
= 0;
332 if (dev
->info
.gen
<= 8 &&
333 (image
->create_flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
) &&
334 image
->tiling
== VK_IMAGE_TILING_OPTIMAL
) {
335 assert(isl_format_is_compressed(plane_format
.isl_format
));
336 tiling_flags
= ISL_TILING_LINEAR_BIT
;
338 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
339 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
342 if (dev
->info
.gen
<= 7 &&
343 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
344 (image
->stencil_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)) {
346 shadow_usage
= ISL_SURF_USAGE_TEXTURE_BIT
|
347 (usage
& ISL_SURF_USAGE_CUBE_BIT
);
350 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
351 .dim
= vk_to_isl_surf_dim
[image
->type
],
352 .format
= plane_format
.isl_format
,
353 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
354 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
355 .depth
= image
->extent
.depth
,
356 .levels
= image
->levels
,
357 .array_len
= image
->array_size
,
358 .samples
= image
->samples
,
359 .min_alignment_B
= 0,
360 .row_pitch_B
= stride
,
362 .tiling_flags
= tiling_flags
);
365 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
367 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
369 add_surface(image
, anv_surf
, plane
);
371 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
372 * create an identical tiled shadow surface for use while texturing so we
373 * don't get garbage performance. If we're on gen7 and the image contains
374 * stencil, then we need to maintain a shadow because we can't texture from
378 ok
= isl_surf_init(&dev
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
379 .dim
= vk_to_isl_surf_dim
[image
->type
],
380 .format
= plane_format
.isl_format
,
381 .width
= image
->extent
.width
,
382 .height
= image
->extent
.height
,
383 .depth
= image
->extent
.depth
,
384 .levels
= image
->levels
,
385 .array_len
= image
->array_size
,
386 .samples
= image
->samples
,
387 .min_alignment_B
= 0,
388 .row_pitch_B
= stride
,
389 .usage
= shadow_usage
,
390 .tiling_flags
= ISL_TILING_ANY_MASK
);
392 /* isl_surf_init() will fail only if provided invalid input. Invalid input
393 * is illegal in Vulkan.
397 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
400 /* Add a HiZ surface to a depth buffer that will be used for rendering.
402 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
403 /* We don't advertise that depth buffers could be used as storage
406 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
408 /* Allow the user to control HiZ enabling. Disable by default on gen7
409 * because resolves are not currently implemented pre-BDW.
411 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
412 /* It will never be used as an attachment, HiZ is pointless. */
413 } else if (dev
->info
.gen
== 7) {
414 anv_perf_warn(dev
->instance
, image
, "Implement gen7 HiZ");
415 } else if (image
->levels
> 1) {
416 anv_perf_warn(dev
->instance
, image
, "Enable multi-LOD HiZ");
417 } else if (image
->array_size
> 1) {
418 anv_perf_warn(dev
->instance
, image
,
419 "Implement multi-arrayLayer HiZ clears and resolves");
420 } else if (dev
->info
.gen
== 8 && image
->samples
> 1) {
421 anv_perf_warn(dev
->instance
, image
, "Enable gen8 multisampled HiZ");
422 } else if (!unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
)) {
423 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
424 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
,
425 &image
->planes
[plane
].surface
.isl
,
426 &image
->planes
[plane
].aux_surface
.isl
);
428 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
429 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
431 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
== 1) {
432 /* TODO: Disallow compression with :
434 * 1) non multiplanar images (We appear to hit a sampler bug with
435 * CCS & R16G16 format. Putting the clear state a page/4096bytes
436 * further fixes the issue).
438 * 2) alias images, because they might be aliases of images
441 * 3) compression disabled by debug
443 const bool allow_compression
=
444 image
->n_planes
== 1 &&
445 (image
->create_flags
& VK_IMAGE_CREATE_ALIAS_BIT
) == 0 &&
446 likely((INTEL_DEBUG
& DEBUG_NO_RBC
) == 0);
448 if (allow_compression
) {
449 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
450 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
,
451 &image
->planes
[plane
].surface
.isl
,
452 &image
->planes
[plane
].aux_surface
.isl
, 0);
455 /* Disable CCS when it is not useful (i.e., when you can't render
456 * to the image with CCS enabled).
458 if (!isl_format_supports_rendering(&dev
->info
,
459 plane_format
.isl_format
)) {
460 /* While it may be technically possible to enable CCS for this
461 * image, we currently don't have things hooked up to get it
464 anv_perf_warn(dev
->instance
, image
,
465 "This image format doesn't support rendering. "
466 "Not allocating an CCS buffer.");
467 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
471 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
472 add_aux_state_tracking_buffer(image
, plane
, dev
);
474 /* For images created without MUTABLE_FORMAT_BIT set, we know that
475 * they will always be used with the original format. In
476 * particular, they will always be used with a format that
477 * supports color compression. If it's never used as a storage
478 * image, then it will only be used through the sampler or the as
479 * a render target. This means that it's safe to just leave
480 * compression on at all times for these formats.
482 if (!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
483 image
->ccs_e_compatible
) {
484 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
488 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
> 1) {
489 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
490 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
491 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
,
492 &image
->planes
[plane
].surface
.isl
,
493 &image
->planes
[plane
].aux_surface
.isl
);
495 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
496 add_aux_state_tracking_buffer(image
, plane
, dev
);
497 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
501 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
503 /* Upper bound of the last surface should be smaller than the plane's
506 assert((MAX2(image
->planes
[plane
].surface
.offset
,
507 image
->planes
[plane
].aux_surface
.offset
) +
508 (image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
509 image
->planes
[plane
].aux_surface
.isl
.size_B
:
510 image
->planes
[plane
].surface
.isl
.size_B
)) <=
511 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
513 if (image
->planes
[plane
].aux_surface
.isl
.size_B
) {
514 /* assert(image->planes[plane].fast_clear_state_offset == */
515 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
516 assert(image
->planes
[plane
].fast_clear_state_offset
<
517 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
524 score_drm_format_mod(uint64_t modifier
)
527 case DRM_FORMAT_MOD_LINEAR
: return 1;
528 case I915_FORMAT_MOD_X_TILED
: return 2;
529 case I915_FORMAT_MOD_Y_TILED
: return 3;
530 case I915_FORMAT_MOD_Y_TILED_CCS
: return 4;
531 default: unreachable("bad DRM format modifier");
535 static const struct isl_drm_modifier_info
*
536 choose_drm_format_mod(const struct anv_physical_device
*device
,
537 uint32_t modifier_count
, const uint64_t *modifiers
)
539 uint64_t best_mod
= UINT64_MAX
;
540 uint32_t best_score
= 0;
542 for (uint32_t i
= 0; i
< modifier_count
; ++i
) {
543 uint32_t score
= score_drm_format_mod(modifiers
[i
]);
544 if (score
> best_score
) {
545 best_mod
= modifiers
[i
];
551 return isl_drm_modifier_get_info(best_mod
);
557 anv_image_create(VkDevice _device
,
558 const struct anv_image_create_info
*create_info
,
559 const VkAllocationCallbacks
* alloc
,
562 ANV_FROM_HANDLE(anv_device
, device
, _device
);
563 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
564 const struct isl_drm_modifier_info
*isl_mod_info
= NULL
;
565 struct anv_image
*image
= NULL
;
568 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
570 const struct wsi_image_create_info
*wsi_info
=
571 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
572 if (wsi_info
&& wsi_info
->modifier_count
> 0) {
573 isl_mod_info
= choose_drm_format_mod(&device
->instance
->physicalDevice
,
574 wsi_info
->modifier_count
,
575 wsi_info
->modifiers
);
576 assert(isl_mod_info
);
579 anv_assert(pCreateInfo
->mipLevels
> 0);
580 anv_assert(pCreateInfo
->arrayLayers
> 0);
581 anv_assert(pCreateInfo
->samples
> 0);
582 anv_assert(pCreateInfo
->extent
.width
> 0);
583 anv_assert(pCreateInfo
->extent
.height
> 0);
584 anv_assert(pCreateInfo
->extent
.depth
> 0);
586 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
587 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
589 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
591 image
->type
= pCreateInfo
->imageType
;
592 image
->extent
= pCreateInfo
->extent
;
593 image
->vk_format
= pCreateInfo
->format
;
594 image
->format
= anv_get_format(pCreateInfo
->format
);
595 image
->aspects
= vk_format_aspects(image
->vk_format
);
596 image
->levels
= pCreateInfo
->mipLevels
;
597 image
->array_size
= pCreateInfo
->arrayLayers
;
598 image
->samples
= pCreateInfo
->samples
;
599 image
->usage
= pCreateInfo
->usage
;
600 image
->create_flags
= pCreateInfo
->flags
;
601 image
->tiling
= pCreateInfo
->tiling
;
602 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT
;
603 image
->needs_set_tiling
= wsi_info
&& wsi_info
->scanout
;
604 image
->drm_format_mod
= isl_mod_info
? isl_mod_info
->modifier
:
605 DRM_FORMAT_MOD_INVALID
;
607 if (image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
) {
608 image
->stencil_usage
= pCreateInfo
->usage
;
609 const VkImageStencilUsageCreateInfoEXT
*stencil_usage_info
=
610 vk_find_struct_const(pCreateInfo
->pNext
,
611 IMAGE_STENCIL_USAGE_CREATE_INFO_EXT
);
612 if (stencil_usage_info
)
613 image
->stencil_usage
= stencil_usage_info
->stencilUsage
;
616 /* In case of external format, We don't know format yet,
617 * so skip the rest for now.
619 if (create_info
->external_format
) {
620 image
->external_format
= true;
621 *pImage
= anv_image_to_handle(image
);
625 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
626 assert(format
!= NULL
);
628 const isl_tiling_flags_t isl_tiling_flags
=
629 choose_isl_tiling_flags(create_info
, isl_mod_info
,
630 image
->needs_set_tiling
);
632 image
->n_planes
= format
->n_planes
;
634 const VkImageFormatListCreateInfoKHR
*fmt_list
=
635 vk_find_struct_const(pCreateInfo
->pNext
,
636 IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
638 image
->ccs_e_compatible
=
639 all_formats_ccs_e_compatible(&device
->info
, fmt_list
, image
);
642 for_each_bit(b
, image
->aspects
) {
643 r
= make_surface(device
, image
, create_info
->stride
, isl_tiling_flags
,
644 create_info
->isl_extra_usage_flags
, (1 << b
));
649 *pImage
= anv_image_to_handle(image
);
655 vk_free2(&device
->alloc
, alloc
, image
);
660 static struct anv_image
*
661 anv_swapchain_get_image(VkSwapchainKHR swapchain
,
664 uint32_t n_images
= index
+ 1;
665 VkImage
*images
= malloc(sizeof(*images
) * n_images
);
666 VkResult result
= wsi_common_get_images(swapchain
, &n_images
, images
);
668 if (result
!= VK_SUCCESS
&& result
!= VK_INCOMPLETE
) {
673 ANV_FROM_HANDLE(anv_image
, image
, images
[index
]);
680 anv_image_from_swapchain(VkDevice device
,
681 const VkImageCreateInfo
*pCreateInfo
,
682 const VkImageSwapchainCreateInfoKHR
*swapchain_info
,
683 const VkAllocationCallbacks
*pAllocator
,
686 struct anv_image
*swapchain_image
= anv_swapchain_get_image(swapchain_info
->swapchain
, 0);
687 assert(swapchain_image
);
689 assert(swapchain_image
->type
== pCreateInfo
->imageType
);
690 assert(swapchain_image
->vk_format
== pCreateInfo
->format
);
691 assert(swapchain_image
->extent
.width
== pCreateInfo
->extent
.width
);
692 assert(swapchain_image
->extent
.height
== pCreateInfo
->extent
.height
);
693 assert(swapchain_image
->extent
.depth
== pCreateInfo
->extent
.depth
);
694 assert(swapchain_image
->array_size
== pCreateInfo
->arrayLayers
);
695 /* Color attachment is added by the wsi code. */
696 assert(swapchain_image
->usage
== (pCreateInfo
->usage
| VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
));
698 VkImageCreateInfo local_create_info
;
699 local_create_info
= *pCreateInfo
;
700 local_create_info
.pNext
= NULL
;
701 /* The following parameters are implictly selected by the wsi code. */
702 local_create_info
.tiling
= VK_IMAGE_TILING_OPTIMAL
;
703 local_create_info
.samples
= VK_SAMPLE_COUNT_1_BIT
;
704 local_create_info
.usage
|= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
706 /* If the image has a particular modifier, specify that modifier. */
707 struct wsi_image_create_info local_wsi_info
= {
708 .sType
= VK_STRUCTURE_TYPE_WSI_IMAGE_CREATE_INFO_MESA
,
710 .modifiers
= &swapchain_image
->drm_format_mod
,
712 if (swapchain_image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
)
713 __vk_append_struct(&local_create_info
, &local_wsi_info
);
715 return anv_image_create(device
,
716 &(struct anv_image_create_info
) {
717 .vk_info
= &local_create_info
,
718 .external_format
= swapchain_image
->external_format
,
725 anv_CreateImage(VkDevice device
,
726 const VkImageCreateInfo
*pCreateInfo
,
727 const VkAllocationCallbacks
*pAllocator
,
730 const struct VkExternalMemoryImageCreateInfo
*create_info
=
731 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_MEMORY_IMAGE_CREATE_INFO
);
733 if (create_info
&& (create_info
->handleTypes
&
734 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID
))
735 return anv_image_from_external(device
, pCreateInfo
, create_info
,
738 bool use_external_format
= false;
739 const struct VkExternalFormatANDROID
*ext_format
=
740 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_FORMAT_ANDROID
);
742 /* "If externalFormat is zero, the effect is as if the
743 * VkExternalFormatANDROID structure was not present. Otherwise, the image
744 * will have the specified external format."
746 if (ext_format
&& ext_format
->externalFormat
!= 0)
747 use_external_format
= true;
749 const VkNativeBufferANDROID
*gralloc_info
=
750 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
752 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
755 const VkImageSwapchainCreateInfoKHR
*swapchain_info
=
756 vk_find_struct_const(pCreateInfo
->pNext
, IMAGE_SWAPCHAIN_CREATE_INFO_KHR
);
757 if (swapchain_info
&& swapchain_info
->swapchain
!= VK_NULL_HANDLE
)
758 return anv_image_from_swapchain(device
, pCreateInfo
, swapchain_info
,
761 return anv_image_create(device
,
762 &(struct anv_image_create_info
) {
763 .vk_info
= pCreateInfo
,
764 .external_format
= use_external_format
,
771 anv_DestroyImage(VkDevice _device
, VkImage _image
,
772 const VkAllocationCallbacks
*pAllocator
)
774 ANV_FROM_HANDLE(anv_device
, device
, _device
);
775 ANV_FROM_HANDLE(anv_image
, image
, _image
);
780 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
781 if (image
->planes
[p
].bo_is_owned
) {
782 assert(image
->planes
[p
].address
.bo
!= NULL
);
783 anv_bo_cache_release(device
, &device
->bo_cache
,
784 image
->planes
[p
].address
.bo
);
788 vk_free2(&device
->alloc
, pAllocator
, image
);
791 static void anv_image_bind_memory_plane(struct anv_device
*device
,
792 struct anv_image
*image
,
794 struct anv_device_memory
*memory
,
795 uint32_t memory_offset
)
797 assert(!image
->planes
[plane
].bo_is_owned
);
800 image
->planes
[plane
].address
= ANV_NULL_ADDRESS
;
804 image
->planes
[plane
].address
= (struct anv_address
) {
806 .offset
= memory_offset
,
810 /* We are binding AHardwareBuffer. Get a description, resolve the
811 * format and prepare anv_image properly.
814 resolve_ahw_image(struct anv_device
*device
,
815 struct anv_image
*image
,
816 struct anv_device_memory
*mem
)
818 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
820 AHardwareBuffer_Desc desc
;
821 AHardwareBuffer_describe(mem
->ahw
, &desc
);
824 int i915_tiling
= anv_gem_get_tiling(device
, mem
->bo
->gem_handle
);
825 VkImageTiling vk_tiling
;
826 isl_tiling_flags_t isl_tiling_flags
= 0;
828 switch (i915_tiling
) {
829 case I915_TILING_NONE
:
830 vk_tiling
= VK_IMAGE_TILING_LINEAR
;
831 isl_tiling_flags
= ISL_TILING_LINEAR_BIT
;
834 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
835 isl_tiling_flags
= ISL_TILING_X_BIT
;
838 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
839 isl_tiling_flags
= ISL_TILING_Y0_BIT
;
843 unreachable("Invalid tiling flags.");
846 assert(vk_tiling
== VK_IMAGE_TILING_LINEAR
||
847 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
);
850 VkFormat vk_format
= vk_format_from_android(desc
.format
, desc
.usage
);
851 enum isl_format isl_fmt
= anv_get_isl_format(&device
->info
,
853 VK_IMAGE_ASPECT_COLOR_BIT
,
855 assert(isl_fmt
!= ISL_FORMAT_UNSUPPORTED
);
857 /* Handle RGB(X)->RGBA fallback. */
858 switch (desc
.format
) {
859 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM
:
860 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM
:
861 if (isl_format_is_rgb(isl_fmt
))
862 isl_fmt
= isl_format_rgb_to_rgba(isl_fmt
);
866 /* Now we are able to fill anv_image fields properly and create
867 * isl_surface for it.
869 image
->vk_format
= vk_format
;
870 image
->format
= anv_get_format(vk_format
);
871 image
->aspects
= vk_format_aspects(image
->vk_format
);
872 image
->n_planes
= image
->format
->n_planes
;
873 image
->ccs_e_compatible
= false;
875 uint32_t stride
= desc
.stride
*
876 (isl_format_get_layout(isl_fmt
)->bpb
/ 8);
879 for_each_bit(b
, image
->aspects
) {
880 VkResult r
= make_surface(device
, image
, stride
, isl_tiling_flags
,
881 ISL_SURF_USAGE_DISABLE_AUX_BIT
, (1 << b
));
882 assert(r
== VK_SUCCESS
);
887 VkResult
anv_BindImageMemory(
890 VkDeviceMemory _memory
,
891 VkDeviceSize memoryOffset
)
893 ANV_FROM_HANDLE(anv_device
, device
, _device
);
894 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
895 ANV_FROM_HANDLE(anv_image
, image
, _image
);
898 resolve_ahw_image(device
, image
, mem
);
901 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
903 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
904 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
910 VkResult
anv_BindImageMemory2(
912 uint32_t bindInfoCount
,
913 const VkBindImageMemoryInfo
* pBindInfos
)
915 ANV_FROM_HANDLE(anv_device
, device
, _device
);
917 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
918 const VkBindImageMemoryInfo
*bind_info
= &pBindInfos
[i
];
919 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
920 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
922 /* Resolve will alter the image's aspects, do this first. */
924 resolve_ahw_image(device
, image
, mem
);
926 VkImageAspectFlags aspects
= image
->aspects
;
927 vk_foreach_struct_const(s
, bind_info
->pNext
) {
929 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO
: {
930 const VkBindImagePlaneMemoryInfo
*plane_info
=
931 (const VkBindImagePlaneMemoryInfo
*) s
;
933 aspects
= plane_info
->planeAspect
;
936 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR
: {
937 const VkBindImageMemorySwapchainInfoKHR
*swapchain_info
=
938 (const VkBindImageMemorySwapchainInfoKHR
*) s
;
939 struct anv_image
*swapchain_image
=
940 anv_swapchain_get_image(swapchain_info
->swapchain
,
941 swapchain_info
->imageIndex
);
942 assert(swapchain_image
);
943 assert(image
->aspects
== swapchain_image
->aspects
);
947 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
949 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
950 struct anv_device_memory mem
= {
951 .bo
= swapchain_image
->planes
[plane
].address
.bo
,
953 anv_image_bind_memory_plane(device
, image
, plane
,
954 &mem
, bind_info
->memoryOffset
);
959 anv_debug_ignored_stype(s
->sType
);
964 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
965 * VK_NULL_HANDLE. In such case, just carry one with the next bind
972 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
974 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
975 anv_image_bind_memory_plane(device
, image
, plane
,
976 mem
, bind_info
->memoryOffset
);
983 void anv_GetImageSubresourceLayout(
986 const VkImageSubresource
* subresource
,
987 VkSubresourceLayout
* layout
)
989 ANV_FROM_HANDLE(anv_image
, image
, _image
);
991 const struct anv_surface
*surface
;
992 if (subresource
->aspectMask
== VK_IMAGE_ASPECT_PLANE_1_BIT
&&
993 image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
&&
994 isl_drm_modifier_has_aux(image
->drm_format_mod
))
995 surface
= &image
->planes
[0].aux_surface
;
997 surface
= get_surface(image
, subresource
->aspectMask
);
999 assert(__builtin_popcount(subresource
->aspectMask
) == 1);
1001 layout
->offset
= surface
->offset
;
1002 layout
->rowPitch
= surface
->isl
.row_pitch_B
;
1003 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1004 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
1006 if (subresource
->mipLevel
> 0 || subresource
->arrayLayer
> 0) {
1007 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1010 isl_surf_get_image_offset_B_tile_sa(&surface
->isl
,
1011 subresource
->mipLevel
,
1012 subresource
->arrayLayer
,
1013 0 /* logical_z_offset_px */,
1014 &offset_B
, NULL
, NULL
);
1015 layout
->offset
+= offset_B
;
1016 layout
->size
= layout
->rowPitch
* anv_minify(image
->extent
.height
,
1017 subresource
->mipLevel
);
1019 layout
->size
= surface
->isl
.size_B
;
1024 * This function determines the optimal buffer to use for a given
1025 * VkImageLayout and other pieces of information needed to make that
1026 * determination. This does not determine the optimal buffer to use
1027 * during a resolve operation.
1029 * @param devinfo The device information of the Intel GPU.
1030 * @param image The image that may contain a collection of buffers.
1031 * @param aspect The aspect of the image to be accessed.
1032 * @param layout The current layout of the image aspect(s).
1034 * @return The primary buffer that should be used for the given layout.
1037 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
1038 const struct anv_image
* const image
,
1039 const VkImageAspectFlagBits aspect
,
1040 const VkImageLayout layout
)
1042 /* Validate the inputs. */
1044 /* The devinfo is needed as the optimal buffer varies across generations. */
1045 assert(devinfo
!= NULL
);
1047 /* The layout of a NULL image is not properly defined. */
1048 assert(image
!= NULL
);
1050 /* The aspect must be exactly one of the image aspects. */
1051 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1053 /* Determine the optimal buffer. */
1055 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1057 /* If there is no auxiliary surface allocated, we must use the one and only
1060 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1061 return ISL_AUX_USAGE_NONE
;
1063 /* All images that use an auxiliary surface are required to be tiled. */
1064 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
1066 /* Stencil has no aux */
1067 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1071 /* Invalid Layouts */
1072 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1073 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1074 unreachable("Invalid image layout.");
1076 /* Undefined layouts
1078 * The pre-initialized layout is equivalent to the undefined layout for
1079 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1082 case VK_IMAGE_LAYOUT_UNDEFINED
:
1083 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1084 return ISL_AUX_USAGE_NONE
;
1089 case VK_IMAGE_LAYOUT_GENERAL
:
1090 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1091 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1092 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1093 /* This buffer could be a depth buffer used in a transfer operation.
1094 * BLORP currently doesn't use HiZ for transfer operations so we must
1095 * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
1097 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_HIZ
);
1098 return ISL_AUX_USAGE_NONE
;
1100 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1101 return image
->planes
[plane
].aux_usage
;
1105 /* Sampling Layouts */
1106 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1107 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1108 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1110 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1111 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1112 if (anv_can_sample_with_hiz(devinfo
, image
))
1113 return ISL_AUX_USAGE_HIZ
;
1115 return ISL_AUX_USAGE_NONE
;
1117 return image
->planes
[plane
].aux_usage
;
1121 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1122 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1124 /* When handing the image off to the presentation engine, we need to
1125 * ensure that things are properly resolved. For images with no
1126 * modifier, we assume that they follow the old rules and always need
1127 * a full resolve because the PE doesn't understand any form of
1128 * compression. For images with modifiers, we use the aux usage from
1131 const struct isl_drm_modifier_info
*mod_info
=
1132 isl_drm_modifier_get_info(image
->drm_format_mod
);
1133 return mod_info
? mod_info
->aux_usage
: ISL_AUX_USAGE_NONE
;
1137 /* Rendering Layouts */
1138 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1139 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1140 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
) {
1141 assert(image
->samples
== 1);
1142 return ISL_AUX_USAGE_CCS_D
;
1144 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_CCS_D
);
1145 return image
->planes
[plane
].aux_usage
;
1148 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1149 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1150 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
1151 return ISL_AUX_USAGE_HIZ
;
1153 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1154 unreachable("VK_KHR_shared_presentable_image is unsupported");
1156 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1157 unreachable("VK_EXT_fragment_density_map is unsupported");
1159 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1160 unreachable("VK_NV_shading_rate_image is unsupported");
1163 /* If the layout isn't recognized in the exhaustive switch above, the
1164 * VkImageLayout value is not defined in vulkan.h.
1166 unreachable("layout is not a VkImageLayout enumeration member.");
1170 * This function returns the level of unresolved fast-clear support of the
1171 * given image in the given VkImageLayout.
1173 * @param devinfo The device information of the Intel GPU.
1174 * @param image The image that may contain a collection of buffers.
1175 * @param aspect The aspect of the image to be accessed.
1176 * @param layout The current layout of the image aspect(s).
1178 enum anv_fast_clear_type
1179 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
1180 const struct anv_image
* const image
,
1181 const VkImageAspectFlagBits aspect
,
1182 const VkImageLayout layout
)
1184 /* The aspect must be exactly one of the image aspects. */
1185 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1187 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1189 /* If there is no auxiliary surface allocated, there are no fast-clears */
1190 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1191 return ANV_FAST_CLEAR_NONE
;
1193 /* All images that use an auxiliary surface are required to be tiled. */
1194 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
1196 /* Stencil has no aux */
1197 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1199 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1200 /* For depth images (with HiZ), the layout supports fast-clears if and
1201 * only if it supports HiZ. However, we only support fast-clears to the
1202 * default depth value.
1204 enum isl_aux_usage aux_usage
=
1205 anv_layout_to_aux_usage(devinfo
, image
, aspect
, layout
);
1206 return aux_usage
== ISL_AUX_USAGE_HIZ
?
1207 ANV_FAST_CLEAR_DEFAULT_VALUE
: ANV_FAST_CLEAR_NONE
;
1210 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1212 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1213 * lack the MI ALU which we need to determine the predicates.
1215 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
&& image
->samples
> 1)
1216 return ANV_FAST_CLEAR_NONE
;
1219 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1220 return ANV_FAST_CLEAR_ANY
;
1222 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1223 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1225 /* We do not yet support any modifiers which support clear color so we
1226 * just always return NONE. One day, this will change.
1228 const struct isl_drm_modifier_info
*mod_info
=
1229 isl_drm_modifier_get_info(image
->drm_format_mod
);
1230 assert(!mod_info
|| !mod_info
->supports_clear_color
);
1232 return ANV_FAST_CLEAR_NONE
;
1236 /* If the image has MCS or CCS_E enabled all the time then we can use
1237 * fast-clear as long as the clear color is the default value of zero
1238 * since this is the default value we program into every surface state
1239 * used for texturing.
1241 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_MCS
||
1242 image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
)
1243 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1245 return ANV_FAST_CLEAR_NONE
;
1250 static struct anv_state
1251 alloc_surface_state(struct anv_device
*device
)
1253 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1256 static enum isl_channel_select
1257 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
1258 struct isl_swizzle format_swizzle
)
1260 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
1261 swizzle
= component
;
1264 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
1265 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
1266 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
1267 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
1268 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
1269 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
1271 unreachable("Invalid swizzle");
1276 anv_image_fill_surface_state(struct anv_device
*device
,
1277 const struct anv_image
*image
,
1278 VkImageAspectFlagBits aspect
,
1279 const struct isl_view
*view_in
,
1280 isl_surf_usage_flags_t view_usage
,
1281 enum isl_aux_usage aux_usage
,
1282 const union isl_color_value
*clear_color
,
1283 enum anv_image_view_state_flags flags
,
1284 struct anv_surface_state
*state_inout
,
1285 struct brw_image_param
*image_param_out
)
1287 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1289 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
1290 *aux_surface
= &image
->planes
[plane
].aux_surface
;
1292 struct isl_view view
= *view_in
;
1293 view
.usage
|= view_usage
;
1295 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1296 * compressed surface with a shadow surface, we use the shadow instead of
1297 * the primary surface. The shadow surface will be tiled, unlike the main
1298 * surface, so it should get significantly better performance.
1300 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1301 isl_format_is_compressed(view
.format
) &&
1302 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
1303 assert(isl_format_is_compressed(surface
->isl
.format
));
1304 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1305 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1306 surface
= &image
->planes
[plane
].shadow_surface
;
1309 /* For texturing from stencil on gen7, we have to sample from a shadow
1310 * surface because we don't support W-tiling in the sampler.
1312 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1313 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1314 assert(device
->info
.gen
== 7);
1315 assert(view_usage
& ISL_SURF_USAGE_TEXTURE_BIT
);
1316 surface
= &image
->planes
[plane
].shadow_surface
;
1319 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
1320 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
1322 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1323 if (device
->info
.gen
== 7 && !device
->info
.is_haswell
)
1324 view
.swizzle
= ISL_SWIZZLE_IDENTITY
;
1326 /* If this is a HiZ buffer we can sample from with a programmable clear
1327 * value (SKL+), define the clear value to the optimal constant.
1329 union isl_color_value default_clear_color
= { .u32
= { 0, } };
1330 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
1331 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
1333 clear_color
= &default_clear_color
;
1335 const struct anv_address address
=
1336 anv_address_add(image
->planes
[plane
].address
, surface
->offset
);
1338 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1339 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
1340 !isl_has_matching_typed_storage_image_format(&device
->info
,
1342 /* In this case, we are a writeable storage buffer which needs to be
1343 * lowered to linear. All tiling and offset calculations will be done in
1346 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1347 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1348 .address
= anv_address_physical(address
),
1349 .size_B
= surface
->isl
.size_B
,
1350 .format
= ISL_FORMAT_RAW
,
1351 .swizzle
= ISL_SWIZZLE_IDENTITY
,
1353 .mocs
= anv_mocs_for_bo(device
, address
.bo
));
1354 state_inout
->address
= address
,
1355 state_inout
->aux_address
= ANV_NULL_ADDRESS
;
1356 state_inout
->clear_address
= ANV_NULL_ADDRESS
;
1358 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1359 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
1360 /* Typed surface reads support a very limited subset of the shader
1361 * image formats. Translate it into the closest format the hardware
1364 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1365 view
.format
= isl_lower_storage_image_format(&device
->info
,
1369 const struct isl_surf
*isl_surf
= &surface
->isl
;
1371 struct isl_surf tmp_surf
;
1372 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
1373 if (isl_format_is_compressed(surface
->isl
.format
) &&
1374 !isl_format_is_compressed(view
.format
)) {
1375 /* We're creating an uncompressed view of a compressed surface. This
1376 * is allowed but only for a single level/layer.
1378 assert(surface
->isl
.samples
== 1);
1379 assert(view
.levels
== 1);
1380 assert(view
.array_len
== 1);
1382 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
1384 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1385 0 : view
.base_array_layer
,
1386 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1387 view
.base_array_layer
: 0,
1389 &offset_B
, &tile_x_sa
, &tile_y_sa
);
1391 /* The newly created image represents the one subimage we're
1392 * referencing with this view so it only has one array slice and
1395 view
.base_array_layer
= 0;
1396 view
.base_level
= 0;
1398 /* We're making an uncompressed view here. The image dimensions need
1399 * to be scaled down by the block size.
1401 const struct isl_format_layout
*fmtl
=
1402 isl_format_get_layout(surface
->isl
.format
);
1403 tmp_surf
.logical_level0_px
=
1404 isl_surf_get_logical_level0_el(&tmp_surf
);
1405 tmp_surf
.phys_level0_sa
= isl_surf_get_phys_level0_el(&tmp_surf
);
1406 tmp_surf
.format
= view
.format
;
1407 tile_x_sa
/= fmtl
->bw
;
1408 tile_y_sa
/= fmtl
->bh
;
1410 isl_surf
= &tmp_surf
;
1412 if (device
->info
.gen
<= 8) {
1413 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1414 assert(tile_x_sa
== 0);
1415 assert(tile_y_sa
== 0);
1419 state_inout
->address
= anv_address_add(address
, offset_B
);
1421 struct anv_address aux_address
= ANV_NULL_ADDRESS
;
1422 if (aux_usage
!= ISL_AUX_USAGE_NONE
) {
1423 aux_address
= anv_address_add(image
->planes
[plane
].address
,
1424 aux_surface
->offset
);
1426 state_inout
->aux_address
= aux_address
;
1428 struct anv_address clear_address
= ANV_NULL_ADDRESS
;
1429 if (device
->info
.gen
>= 10 && aux_usage
!= ISL_AUX_USAGE_NONE
) {
1430 if (aux_usage
== ISL_AUX_USAGE_HIZ
) {
1431 clear_address
= (struct anv_address
) {
1432 .bo
= &device
->hiz_clear_bo
,
1436 clear_address
= anv_image_get_clear_color_addr(device
, image
, aspect
);
1439 state_inout
->clear_address
= clear_address
;
1441 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1444 .address
= anv_address_physical(state_inout
->address
),
1445 .clear_color
= *clear_color
,
1446 .aux_surf
= &aux_surface
->isl
,
1447 .aux_usage
= aux_usage
,
1448 .aux_address
= anv_address_physical(aux_address
),
1449 .clear_address
= anv_address_physical(clear_address
),
1450 .use_clear_address
= !anv_address_is_null(clear_address
),
1451 .mocs
= anv_mocs_for_bo(device
,
1452 state_inout
->address
.bo
),
1453 .x_offset_sa
= tile_x_sa
,
1454 .y_offset_sa
= tile_y_sa
);
1456 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1457 * are used to store other information. This should be ok, however,
1458 * because the surface buffer addresses are always 4K page aligned.
1460 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1461 device
->isl_dev
.ss
.aux_addr_offset
;
1462 assert((aux_address
.offset
& 0xfff) == 0);
1463 state_inout
->aux_address
.offset
|= *aux_addr_dw
& 0xfff;
1465 if (device
->info
.gen
>= 10 && clear_address
.bo
) {
1466 uint32_t *clear_addr_dw
= state_inout
->state
.map
+
1467 device
->isl_dev
.ss
.clear_color_state_offset
;
1468 assert((clear_address
.offset
& 0x3f) == 0);
1469 state_inout
->clear_address
.offset
|= *clear_addr_dw
& 0x3f;
1473 if (image_param_out
) {
1474 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1475 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1476 &surface
->isl
, &view
);
1480 static VkImageAspectFlags
1481 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1483 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1484 if (util_bitcount(view_aspects
) == 1)
1485 return VK_IMAGE_ASPECT_COLOR_BIT
;
1487 VkImageAspectFlags color_aspects
= 0;
1488 for (uint32_t i
= 0; i
< util_bitcount(view_aspects
); i
++)
1489 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT
<< i
;
1490 return color_aspects
;
1492 /* No special remapping needed for depth & stencil aspects. */
1493 return view_aspects
;
1497 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
1499 uint32_t planes
= 0;
1501 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
1502 VK_IMAGE_ASPECT_DEPTH_BIT
|
1503 VK_IMAGE_ASPECT_STENCIL_BIT
|
1504 VK_IMAGE_ASPECT_PLANE_0_BIT
))
1506 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
1508 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
1511 if ((aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
) != 0 &&
1512 (aspect_mask
& VK_IMAGE_ASPECT_STENCIL_BIT
) != 0)
1519 anv_CreateImageView(VkDevice _device
,
1520 const VkImageViewCreateInfo
*pCreateInfo
,
1521 const VkAllocationCallbacks
*pAllocator
,
1524 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1525 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1526 struct anv_image_view
*iview
;
1528 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1529 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1531 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1533 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1535 assert(range
->layerCount
> 0);
1536 assert(range
->baseMipLevel
< image
->levels
);
1538 /* Check if a conversion info was passed. */
1539 const struct anv_format
*conv_format
= NULL
;
1540 const struct VkSamplerYcbcrConversionInfo
*conv_info
=
1541 vk_find_struct_const(pCreateInfo
->pNext
, SAMPLER_YCBCR_CONVERSION_INFO
);
1543 /* If image has an external format, the pNext chain must contain an instance of
1544 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1545 * external format as image."
1547 assert(!image
->external_format
|| conv_info
);
1550 ANV_FROM_HANDLE(anv_ycbcr_conversion
, conversion
, conv_info
->conversion
);
1551 conv_format
= conversion
->format
;
1554 VkImageUsageFlags image_usage
= 0;
1555 if (range
->aspectMask
& ~VK_IMAGE_ASPECT_STENCIL_BIT
)
1556 image_usage
|= image
->usage
;
1557 if (range
->aspectMask
& VK_IMAGE_ASPECT_STENCIL_BIT
)
1558 image_usage
|= image
->stencil_usage
;
1560 const VkImageViewUsageCreateInfo
*usage_info
=
1561 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO
);
1562 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image_usage
;
1564 /* View usage should be a subset of image usage */
1565 assert((view_usage
& ~image_usage
) == 0);
1566 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1567 VK_IMAGE_USAGE_STORAGE_BIT
|
1568 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1569 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1570 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1572 switch (image
->type
) {
1574 unreachable("bad VkImageType");
1575 case VK_IMAGE_TYPE_1D
:
1576 case VK_IMAGE_TYPE_2D
:
1577 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1579 case VK_IMAGE_TYPE_3D
:
1580 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1581 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1585 /* First expand aspects to the image's ones (for example
1586 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1587 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1588 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1589 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1591 VkImageAspectFlags expanded_aspects
=
1592 anv_image_expand_aspects(image
, range
->aspectMask
);
1594 iview
->image
= image
;
1596 /* Remap the expanded aspects for the image view. For example if only
1597 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1598 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1599 * the image view, it only has a single plane.
1601 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1602 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1603 iview
->vk_format
= pCreateInfo
->format
;
1605 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1606 assert(!image
->external_format
|| pCreateInfo
->format
== VK_FORMAT_UNDEFINED
);
1608 /* Format is undefined, this can happen when using external formats. Set
1609 * view format from the passed conversion info.
1611 if (iview
->vk_format
== VK_FORMAT_UNDEFINED
&& conv_format
)
1612 iview
->vk_format
= conv_format
->vk_format
;
1614 iview
->extent
= (VkExtent3D
) {
1615 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1616 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1617 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1620 /* Now go through the underlying image selected planes (computed in
1621 * expanded_aspects) and map them to planes in the image view.
1623 uint32_t iaspect_bit
, vplane
= 0;
1624 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1626 anv_image_aspect_to_plane(image
->aspects
, 1UL << iaspect_bit
);
1627 VkImageAspectFlags vplane_aspect
=
1628 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1629 struct anv_format_plane format
=
1630 anv_get_format_plane(&device
->info
, iview
->vk_format
,
1631 vplane_aspect
, image
->tiling
);
1633 iview
->planes
[vplane
].image_plane
= iplane
;
1635 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1636 .format
= format
.isl_format
,
1637 .base_level
= range
->baseMipLevel
,
1638 .levels
= anv_get_levelCount(image
, range
),
1639 .base_array_layer
= range
->baseArrayLayer
,
1640 .array_len
= anv_get_layerCount(image
, range
),
1642 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1643 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1644 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1645 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1646 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1647 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1648 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1649 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
1653 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
1654 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
1655 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
1658 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
1659 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
1660 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
1662 iview
->planes
[vplane
].isl
.usage
= 0;
1665 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
1666 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
1667 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
1668 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
1669 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
1671 enum isl_aux_usage general_aux_usage
=
1672 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1673 VK_IMAGE_LAYOUT_GENERAL
);
1674 enum isl_aux_usage optimal_aux_usage
=
1675 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1676 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
1678 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1679 &iview
->planes
[vplane
].isl
,
1680 ISL_SURF_USAGE_TEXTURE_BIT
,
1681 optimal_aux_usage
, NULL
,
1682 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
1683 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
1686 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1687 &iview
->planes
[vplane
].isl
,
1688 ISL_SURF_USAGE_TEXTURE_BIT
,
1689 general_aux_usage
, NULL
,
1691 &iview
->planes
[vplane
].general_sampler_surface_state
,
1695 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1696 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
1697 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
1698 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
1700 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1701 &iview
->planes
[vplane
].isl
,
1702 ISL_SURF_USAGE_STORAGE_BIT
,
1703 ISL_AUX_USAGE_NONE
, NULL
,
1705 &iview
->planes
[vplane
].storage_surface_state
,
1706 &iview
->planes
[vplane
].storage_image_param
);
1708 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1709 &iview
->planes
[vplane
].isl
,
1710 ISL_SURF_USAGE_STORAGE_BIT
,
1711 ISL_AUX_USAGE_NONE
, NULL
,
1712 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
1713 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
1720 *pView
= anv_image_view_to_handle(iview
);
1726 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
1727 const VkAllocationCallbacks
*pAllocator
)
1729 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1730 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
1735 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
1736 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
1737 anv_state_pool_free(&device
->surface_state_pool
,
1738 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
1741 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
1742 anv_state_pool_free(&device
->surface_state_pool
,
1743 iview
->planes
[plane
].general_sampler_surface_state
.state
);
1746 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
1747 anv_state_pool_free(&device
->surface_state_pool
,
1748 iview
->planes
[plane
].storage_surface_state
.state
);
1751 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
1752 anv_state_pool_free(&device
->surface_state_pool
,
1753 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
1757 vk_free2(&device
->alloc
, pAllocator
, iview
);
1762 anv_CreateBufferView(VkDevice _device
,
1763 const VkBufferViewCreateInfo
*pCreateInfo
,
1764 const VkAllocationCallbacks
*pAllocator
,
1765 VkBufferView
*pView
)
1767 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1768 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
1769 struct anv_buffer_view
*view
;
1771 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
1772 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1774 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1776 /* TODO: Handle the format swizzle? */
1778 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
1779 VK_IMAGE_ASPECT_COLOR_BIT
,
1780 VK_IMAGE_TILING_LINEAR
);
1781 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
1782 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
1783 pCreateInfo
->range
);
1784 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
1786 view
->address
= anv_address_add(buffer
->address
, pCreateInfo
->offset
);
1788 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
1789 view
->surface_state
= alloc_surface_state(device
);
1791 anv_fill_buffer_surface_state(device
, view
->surface_state
,
1793 view
->address
, view
->range
, format_bs
);
1795 view
->surface_state
= (struct anv_state
){ 0 };
1798 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
1799 view
->storage_surface_state
= alloc_surface_state(device
);
1800 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
1802 enum isl_format storage_format
=
1803 isl_has_matching_typed_storage_image_format(&device
->info
,
1805 isl_lower_storage_image_format(&device
->info
, view
->format
) :
1808 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
1810 view
->address
, view
->range
,
1811 (storage_format
== ISL_FORMAT_RAW
? 1 :
1812 isl_format_get_layout(storage_format
)->bpb
/ 8));
1814 /* Write-only accesses should use the original format. */
1815 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
1817 view
->address
, view
->range
,
1818 isl_format_get_layout(view
->format
)->bpb
/ 8);
1820 isl_buffer_fill_image_param(&device
->isl_dev
,
1821 &view
->storage_image_param
,
1822 view
->format
, view
->range
);
1824 view
->storage_surface_state
= (struct anv_state
){ 0 };
1825 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
1828 *pView
= anv_buffer_view_to_handle(view
);
1834 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
1835 const VkAllocationCallbacks
*pAllocator
)
1837 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1838 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
1843 if (view
->surface_state
.alloc_size
> 0)
1844 anv_state_pool_free(&device
->surface_state_pool
,
1845 view
->surface_state
);
1847 if (view
->storage_surface_state
.alloc_size
> 0)
1848 anv_state_pool_free(&device
->surface_state_pool
,
1849 view
->storage_surface_state
);
1851 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
1852 anv_state_pool_free(&device
->surface_state_pool
,
1853 view
->writeonly_storage_surface_state
);
1855 vk_free2(&device
->alloc
, pAllocator
, view
);
1858 const struct anv_surface
*
1859 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
1860 VkImageAspectFlags aspect_mask
)
1862 VkImageAspectFlags sanitized_mask
;
1864 switch (aspect_mask
) {
1865 case VK_IMAGE_ASPECT_COLOR_BIT
:
1866 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1867 sanitized_mask
= VK_IMAGE_ASPECT_COLOR_BIT
;
1869 case VK_IMAGE_ASPECT_DEPTH_BIT
:
1870 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1871 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1873 case VK_IMAGE_ASPECT_STENCIL_BIT
:
1874 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1875 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1877 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
1878 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
1879 * combined depth stencil formats. Specifically, it states:
1881 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
1882 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
1884 * Image views with both depth and stencil aspects are only valid for
1885 * render target attachments, in which case
1886 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
1887 * stencil surfaces from the underlying surface.
1889 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
1890 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1892 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
1893 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1896 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
1897 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1898 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_0_BIT
;
1900 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
1901 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1902 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_1_BIT
;
1904 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
1905 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1906 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_2_BIT
;
1909 unreachable("image does not have aspect");
1913 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, sanitized_mask
);
1914 return &image
->planes
[plane
].surface
;