2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "drm-uapi/drm_fourcc.h"
32 #include "anv_private.h"
33 #include "util/debug.h"
35 #include "util/u_math.h"
37 #include "vk_format_info.h"
39 static isl_surf_usage_flags_t
40 choose_isl_surf_usage(VkImageCreateFlags vk_create_flags
,
41 VkImageUsageFlags vk_usage
,
42 isl_surf_usage_flags_t isl_extra_usage
,
43 VkImageAspectFlagBits aspect
)
45 isl_surf_usage_flags_t isl_usage
= isl_extra_usage
;
47 if (vk_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)
48 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
50 if (vk_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
)
51 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
53 if (vk_usage
& VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
)
54 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
56 if (vk_create_flags
& VK_IMAGE_CREATE_CUBE_COMPATIBLE_BIT
)
57 isl_usage
|= ISL_SURF_USAGE_CUBE_BIT
;
59 /* Even if we're only using it for transfer operations, clears to depth and
60 * stencil images happen as depth and stencil so they need the right ISL
61 * usage bits or else things will fall apart.
64 case VK_IMAGE_ASPECT_DEPTH_BIT
:
65 isl_usage
|= ISL_SURF_USAGE_DEPTH_BIT
;
67 case VK_IMAGE_ASPECT_STENCIL_BIT
:
68 isl_usage
|= ISL_SURF_USAGE_STENCIL_BIT
;
70 case VK_IMAGE_ASPECT_COLOR_BIT
:
71 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
72 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
73 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
76 unreachable("bad VkImageAspect");
79 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_SRC_BIT
) {
80 /* blorp implements transfers by sampling from the source image. */
81 isl_usage
|= ISL_SURF_USAGE_TEXTURE_BIT
;
84 if (vk_usage
& VK_IMAGE_USAGE_TRANSFER_DST_BIT
&&
85 aspect
== VK_IMAGE_ASPECT_COLOR_BIT
) {
86 /* blorp implements transfers by rendering into the destination image.
87 * Only request this with color images, as we deal with depth/stencil
88 * formats differently. */
89 isl_usage
|= ISL_SURF_USAGE_RENDER_TARGET_BIT
;
95 static isl_tiling_flags_t
96 choose_isl_tiling_flags(const struct anv_image_create_info
*anv_info
,
97 const struct isl_drm_modifier_info
*isl_mod_info
,
100 const VkImageCreateInfo
*base_info
= anv_info
->vk_info
;
101 isl_tiling_flags_t flags
= 0;
103 switch (base_info
->tiling
) {
105 unreachable("bad VkImageTiling");
106 case VK_IMAGE_TILING_OPTIMAL
:
107 flags
= ISL_TILING_ANY_MASK
;
109 case VK_IMAGE_TILING_LINEAR
:
110 flags
= ISL_TILING_LINEAR_BIT
;
114 if (anv_info
->isl_tiling_flags
)
115 flags
&= anv_info
->isl_tiling_flags
;
118 flags
&= ISL_TILING_LINEAR_BIT
| ISL_TILING_X_BIT
;
121 flags
&= 1 << isl_mod_info
->tiling
;
128 static struct anv_surface
*
129 get_surface(struct anv_image
*image
, VkImageAspectFlagBits aspect
)
131 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
132 return &image
->planes
[plane
].surface
;
136 add_surface(struct anv_image
*image
, struct anv_surface
*surf
, uint32_t plane
)
138 assert(surf
->isl
.size_B
> 0); /* isl surface must be initialized */
140 if (image
->disjoint
) {
141 surf
->offset
= align_u32(image
->planes
[plane
].size
,
142 surf
->isl
.alignment_B
);
143 /* Plane offset is always 0 when it's disjoint. */
145 surf
->offset
= align_u32(image
->size
, surf
->isl
.alignment_B
);
146 /* Determine plane's offset only once when the first surface is added. */
147 if (image
->planes
[plane
].size
== 0)
148 image
->planes
[plane
].offset
= image
->size
;
151 image
->size
= surf
->offset
+ surf
->isl
.size_B
;
152 image
->planes
[plane
].size
= (surf
->offset
+ surf
->isl
.size_B
) - image
->planes
[plane
].offset
;
154 image
->alignment
= MAX2(image
->alignment
, surf
->isl
.alignment_B
);
155 image
->planes
[plane
].alignment
= MAX2(image
->planes
[plane
].alignment
,
156 surf
->isl
.alignment_B
);
161 all_formats_ccs_e_compatible(const struct gen_device_info
*devinfo
,
162 const VkImageFormatListCreateInfoKHR
*fmt_list
,
163 struct anv_image
*image
)
165 enum isl_format format
=
166 anv_get_isl_format(devinfo
, image
->vk_format
,
167 VK_IMAGE_ASPECT_COLOR_BIT
, image
->tiling
);
169 if (!isl_format_supports_ccs_e(devinfo
, format
))
172 if (!(image
->create_flags
& VK_IMAGE_CREATE_MUTABLE_FORMAT_BIT
))
175 if (!fmt_list
|| fmt_list
->viewFormatCount
== 0)
178 for (uint32_t i
= 0; i
< fmt_list
->viewFormatCount
; i
++) {
179 enum isl_format view_format
=
180 anv_get_isl_format(devinfo
, fmt_list
->pViewFormats
[i
],
181 VK_IMAGE_ASPECT_COLOR_BIT
, image
->tiling
);
183 if (!isl_formats_are_ccs_e_compatible(devinfo
, format
, view_format
))
191 * For color images that have an auxiliary surface, request allocation for an
192 * additional buffer that mainly stores fast-clear values. Use of this buffer
193 * allows us to access the image's subresources while being aware of their
194 * fast-clear values in non-trivial cases (e.g., outside of a render pass in
195 * which a fast clear has occurred).
197 * In order to avoid having multiple clear colors for a single plane of an
198 * image (hence a single RENDER_SURFACE_STATE), we only allow fast-clears on
199 * the first slice (level 0, layer 0). At the time of our testing (Jan 17,
200 * 2018), there were no known applications which would benefit from fast-
201 * clearing more than just the first slice.
203 * The fast clear portion of the image is laid out in the following order:
205 * * 1 or 4 dwords (depending on hardware generation) for the clear color
206 * * 1 dword for the anv_fast_clear_type of the clear color
207 * * On gen9+, 1 dword per level and layer of the image (3D levels count
208 * multiple layers) in level-major order for compression state.
210 * For the purpose of discoverability, the algorithm used to manage
211 * compression and fast-clears is described here:
213 * * On a transition from UNDEFINED or PREINITIALIZED to a defined layout,
214 * all of the values in the fast clear portion of the image are initialized
217 * * On fast-clear, the clear value is written into surface state and also
218 * into the buffer and the fast clear type is set appropriately. Both
219 * setting the fast-clear value in the buffer and setting the fast-clear
220 * type happen from the GPU using MI commands.
222 * * Whenever a render or blorp operation is performed with CCS_E, we call
223 * genX(cmd_buffer_mark_image_written) to set the compression state to
224 * true (which is represented by UINT32_MAX).
226 * * On pipeline barrier transitions, the worst-case transition is computed
227 * from the image layouts. The command streamer inspects the fast clear
228 * type and compression state dwords and constructs a predicate. The
229 * worst-case resolve is performed with the given predicate and the fast
230 * clear and compression state is set accordingly.
232 * See anv_layout_to_aux_usage and anv_layout_to_fast_clear_type functions for
233 * details on exactly what is allowed in what layouts.
235 * On gen7-9, we do not have a concept of indirect clear colors in hardware.
236 * In order to deal with this, we have to do some clear color management.
238 * * For LOAD_OP_LOAD at the top of a renderpass, we have to copy the clear
239 * value from the buffer into the surface state with MI commands.
241 * * For any blorp operations, we pass the address to the clear value into
242 * blorp and it knows to copy the clear color.
245 add_aux_state_tracking_buffer(struct anv_image
*image
,
247 const struct anv_device
*device
)
249 assert(image
&& device
);
250 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 &&
251 image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
253 /* Compressed images must be tiled and therefore everything should be 4K
254 * aligned. The CCS has the same alignment requirements. This is good
255 * because we need at least dword-alignment for MI_LOAD/STORE operations.
257 assert(image
->alignment
% 4 == 0);
258 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) % 4 == 0);
260 /* This buffer should be at the very end of the plane. */
261 if (image
->disjoint
) {
262 assert(image
->planes
[plane
].size
==
263 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
265 assert(image
->size
==
266 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
269 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
270 device
->isl_dev
.ss
.clear_color_state_size
:
271 device
->isl_dev
.ss
.clear_value_size
;
273 /* Clear color and fast clear type */
274 unsigned state_size
= clear_color_state_size
+ 4;
276 /* We only need to track compression on CCS_E surfaces. */
277 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
) {
278 if (image
->type
== VK_IMAGE_TYPE_3D
) {
279 for (uint32_t l
= 0; l
< image
->levels
; l
++)
280 state_size
+= anv_minify(image
->extent
.depth
, l
) * 4;
282 state_size
+= image
->levels
* image
->array_size
* 4;
286 image
->planes
[plane
].fast_clear_state_offset
=
287 image
->planes
[plane
].offset
+ image
->planes
[plane
].size
;
289 image
->planes
[plane
].size
+= state_size
;
290 image
->size
+= state_size
;
294 * Initialize the anv_image::*_surface selected by \a aspect. Then update the
295 * image's memory requirements (that is, the image's size and alignment).
298 make_surface(const struct anv_device
*dev
,
299 struct anv_image
*image
,
301 isl_tiling_flags_t tiling_flags
,
302 isl_surf_usage_flags_t isl_extra_usage_flags
,
303 VkImageAspectFlagBits aspect
)
307 static const enum isl_surf_dim vk_to_isl_surf_dim
[] = {
308 [VK_IMAGE_TYPE_1D
] = ISL_SURF_DIM_1D
,
309 [VK_IMAGE_TYPE_2D
] = ISL_SURF_DIM_2D
,
310 [VK_IMAGE_TYPE_3D
] = ISL_SURF_DIM_3D
,
313 image
->extent
= anv_sanitize_image_extent(image
->type
, image
->extent
);
315 const unsigned plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
316 const struct anv_format_plane plane_format
=
317 anv_get_format_plane(&dev
->info
, image
->vk_format
, aspect
, image
->tiling
);
318 struct anv_surface
*anv_surf
= &image
->planes
[plane
].surface
;
320 const isl_surf_usage_flags_t usage
=
321 choose_isl_surf_usage(image
->create_flags
, image
->usage
,
322 isl_extra_usage_flags
, aspect
);
324 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
325 * fall back to linear on Broadwell and earlier because we aren't
326 * guaranteed that we can handle offsets correctly. On Sky Lake, the
327 * horizontal and vertical alignments are sufficiently high that we can
328 * just use RENDER_SURFACE_STATE::X/Y Offset.
330 bool needs_shadow
= false;
331 if (dev
->info
.gen
<= 8 &&
332 (image
->create_flags
& VK_IMAGE_CREATE_BLOCK_TEXEL_VIEW_COMPATIBLE_BIT
) &&
333 image
->tiling
== VK_IMAGE_TILING_OPTIMAL
) {
334 assert(isl_format_is_compressed(plane_format
.isl_format
));
335 tiling_flags
= ISL_TILING_LINEAR_BIT
;
339 if (dev
->info
.gen
<= 7 &&
340 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
&&
341 (image
->usage
& VK_IMAGE_USAGE_SAMPLED_BIT
)) {
345 ok
= isl_surf_init(&dev
->isl_dev
, &anv_surf
->isl
,
346 .dim
= vk_to_isl_surf_dim
[image
->type
],
347 .format
= plane_format
.isl_format
,
348 .width
= image
->extent
.width
/ plane_format
.denominator_scales
[0],
349 .height
= image
->extent
.height
/ plane_format
.denominator_scales
[1],
350 .depth
= image
->extent
.depth
,
351 .levels
= image
->levels
,
352 .array_len
= image
->array_size
,
353 .samples
= image
->samples
,
354 .min_alignment_B
= 0,
355 .row_pitch_B
= stride
,
357 .tiling_flags
= tiling_flags
);
360 return VK_ERROR_OUT_OF_DEVICE_MEMORY
;
362 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_NONE
;
364 add_surface(image
, anv_surf
, plane
);
366 /* If an image is created as BLOCK_TEXEL_VIEW_COMPATIBLE, then we need to
367 * create an identical tiled shadow surface for use while texturing so we
368 * don't get garbage performance. If we're on gen7 and the image contains
369 * stencil, then we need to maintain a shadow because we can't texture from
373 ok
= isl_surf_init(&dev
->isl_dev
, &image
->planes
[plane
].shadow_surface
.isl
,
374 .dim
= vk_to_isl_surf_dim
[image
->type
],
375 .format
= plane_format
.isl_format
,
376 .width
= image
->extent
.width
,
377 .height
= image
->extent
.height
,
378 .depth
= image
->extent
.depth
,
379 .levels
= image
->levels
,
380 .array_len
= image
->array_size
,
381 .samples
= image
->samples
,
382 .min_alignment_B
= 0,
383 .row_pitch_B
= stride
,
385 .tiling_flags
= ISL_TILING_ANY_MASK
);
387 /* isl_surf_init() will fail only if provided invalid input. Invalid input
388 * is illegal in Vulkan.
392 add_surface(image
, &image
->planes
[plane
].shadow_surface
, plane
);
395 /* Add a HiZ surface to a depth buffer that will be used for rendering.
397 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
398 /* We don't advertise that depth buffers could be used as storage
401 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
403 /* Allow the user to control HiZ enabling. Disable by default on gen7
404 * because resolves are not currently implemented pre-BDW.
406 if (!(image
->usage
& VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
)) {
407 /* It will never be used as an attachment, HiZ is pointless. */
408 } else if (dev
->info
.gen
== 7) {
409 anv_perf_warn(dev
->instance
, image
, "Implement gen7 HiZ");
410 } else if (image
->levels
> 1) {
411 anv_perf_warn(dev
->instance
, image
, "Enable multi-LOD HiZ");
412 } else if (image
->array_size
> 1) {
413 anv_perf_warn(dev
->instance
, image
,
414 "Implement multi-arrayLayer HiZ clears and resolves");
415 } else if (dev
->info
.gen
== 8 && image
->samples
> 1) {
416 anv_perf_warn(dev
->instance
, image
, "Enable gen8 multisampled HiZ");
417 } else if (!unlikely(INTEL_DEBUG
& DEBUG_NO_HIZ
)) {
418 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
419 ok
= isl_surf_get_hiz_surf(&dev
->isl_dev
,
420 &image
->planes
[plane
].surface
.isl
,
421 &image
->planes
[plane
].aux_surface
.isl
);
423 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
424 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_HIZ
;
426 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
== 1) {
427 /* TODO: Disallow compression with :
429 * 1) non multiplanar images (We appear to hit a sampler bug with
430 * CCS & R16G16 format. Putting the clear state a page/4096bytes
431 * further fixes the issue).
433 * 2) alias images, because they might be aliases of images
436 * 3) compression disabled by debug
438 const bool allow_compression
=
439 image
->n_planes
== 1 &&
440 (image
->create_flags
& VK_IMAGE_CREATE_ALIAS_BIT
) == 0 &&
441 likely((INTEL_DEBUG
& DEBUG_NO_RBC
) == 0);
443 if (allow_compression
) {
444 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
445 ok
= isl_surf_get_ccs_surf(&dev
->isl_dev
,
446 &image
->planes
[plane
].surface
.isl
,
447 &image
->planes
[plane
].aux_surface
.isl
, 0);
450 /* Disable CCS when it is not useful (i.e., when you can't render
451 * to the image with CCS enabled).
453 if (!isl_format_supports_rendering(&dev
->info
,
454 plane_format
.isl_format
)) {
455 /* While it may be technically possible to enable CCS for this
456 * image, we currently don't have things hooked up to get it
459 anv_perf_warn(dev
->instance
, image
,
460 "This image format doesn't support rendering. "
461 "Not allocating an CCS buffer.");
462 image
->planes
[plane
].aux_surface
.isl
.size_B
= 0;
466 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
467 add_aux_state_tracking_buffer(image
, plane
, dev
);
469 /* For images created without MUTABLE_FORMAT_BIT set, we know that
470 * they will always be used with the original format. In
471 * particular, they will always be used with a format that
472 * supports color compression. If it's never used as a storage
473 * image, then it will only be used through the sampler or the as
474 * a render target. This means that it's safe to just leave
475 * compression on at all times for these formats.
477 if (!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
) &&
478 image
->ccs_e_compatible
) {
479 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_CCS_E
;
483 } else if ((aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) && image
->samples
> 1) {
484 assert(!(image
->usage
& VK_IMAGE_USAGE_STORAGE_BIT
));
485 assert(image
->planes
[plane
].aux_surface
.isl
.size_B
== 0);
486 ok
= isl_surf_get_mcs_surf(&dev
->isl_dev
,
487 &image
->planes
[plane
].surface
.isl
,
488 &image
->planes
[plane
].aux_surface
.isl
);
490 add_surface(image
, &image
->planes
[plane
].aux_surface
, plane
);
491 add_aux_state_tracking_buffer(image
, plane
, dev
);
492 image
->planes
[plane
].aux_usage
= ISL_AUX_USAGE_MCS
;
496 assert((image
->planes
[plane
].offset
+ image
->planes
[plane
].size
) == image
->size
);
498 /* Upper bound of the last surface should be smaller than the plane's
501 assert((MAX2(image
->planes
[plane
].surface
.offset
,
502 image
->planes
[plane
].aux_surface
.offset
) +
503 (image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
504 image
->planes
[plane
].aux_surface
.isl
.size_B
:
505 image
->planes
[plane
].surface
.isl
.size_B
)) <=
506 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
508 if (image
->planes
[plane
].aux_surface
.isl
.size_B
) {
509 /* assert(image->planes[plane].fast_clear_state_offset == */
510 /* (image->planes[plane].aux_surface.offset + image->planes[plane].aux_surface.isl.size_B)); */
511 assert(image
->planes
[plane
].fast_clear_state_offset
<
512 (image
->planes
[plane
].offset
+ image
->planes
[plane
].size
));
519 score_drm_format_mod(uint64_t modifier
)
522 case DRM_FORMAT_MOD_LINEAR
: return 1;
523 case I915_FORMAT_MOD_X_TILED
: return 2;
524 case I915_FORMAT_MOD_Y_TILED
: return 3;
525 case I915_FORMAT_MOD_Y_TILED_CCS
: return 4;
526 default: unreachable("bad DRM format modifier");
530 static const struct isl_drm_modifier_info
*
531 choose_drm_format_mod(const struct anv_physical_device
*device
,
532 uint32_t modifier_count
, const uint64_t *modifiers
)
534 uint64_t best_mod
= UINT64_MAX
;
535 uint32_t best_score
= 0;
537 for (uint32_t i
= 0; i
< modifier_count
; ++i
) {
538 uint32_t score
= score_drm_format_mod(modifiers
[i
]);
539 if (score
> best_score
) {
540 best_mod
= modifiers
[i
];
546 return isl_drm_modifier_get_info(best_mod
);
552 anv_image_create(VkDevice _device
,
553 const struct anv_image_create_info
*create_info
,
554 const VkAllocationCallbacks
* alloc
,
557 ANV_FROM_HANDLE(anv_device
, device
, _device
);
558 const VkImageCreateInfo
*pCreateInfo
= create_info
->vk_info
;
559 const struct isl_drm_modifier_info
*isl_mod_info
= NULL
;
560 struct anv_image
*image
= NULL
;
563 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO
);
565 const struct wsi_image_create_info
*wsi_info
=
566 vk_find_struct_const(pCreateInfo
->pNext
, WSI_IMAGE_CREATE_INFO_MESA
);
567 if (wsi_info
&& wsi_info
->modifier_count
> 0) {
568 isl_mod_info
= choose_drm_format_mod(&device
->instance
->physicalDevice
,
569 wsi_info
->modifier_count
,
570 wsi_info
->modifiers
);
571 assert(isl_mod_info
);
574 anv_assert(pCreateInfo
->mipLevels
> 0);
575 anv_assert(pCreateInfo
->arrayLayers
> 0);
576 anv_assert(pCreateInfo
->samples
> 0);
577 anv_assert(pCreateInfo
->extent
.width
> 0);
578 anv_assert(pCreateInfo
->extent
.height
> 0);
579 anv_assert(pCreateInfo
->extent
.depth
> 0);
581 image
= vk_zalloc2(&device
->alloc
, alloc
, sizeof(*image
), 8,
582 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
584 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
586 image
->type
= pCreateInfo
->imageType
;
587 image
->extent
= pCreateInfo
->extent
;
588 image
->vk_format
= pCreateInfo
->format
;
589 image
->format
= anv_get_format(pCreateInfo
->format
);
590 image
->aspects
= vk_format_aspects(image
->vk_format
);
591 image
->levels
= pCreateInfo
->mipLevels
;
592 image
->array_size
= pCreateInfo
->arrayLayers
;
593 image
->samples
= pCreateInfo
->samples
;
594 image
->usage
= pCreateInfo
->usage
;
595 image
->create_flags
= pCreateInfo
->flags
;
596 image
->tiling
= pCreateInfo
->tiling
;
597 image
->disjoint
= pCreateInfo
->flags
& VK_IMAGE_CREATE_DISJOINT_BIT
;
598 image
->needs_set_tiling
= wsi_info
&& wsi_info
->scanout
;
599 image
->drm_format_mod
= isl_mod_info
? isl_mod_info
->modifier
:
600 DRM_FORMAT_MOD_INVALID
;
602 /* In case of external format, We don't know format yet,
603 * so skip the rest for now.
605 if (create_info
->external_format
) {
606 image
->external_format
= true;
607 *pImage
= anv_image_to_handle(image
);
611 const struct anv_format
*format
= anv_get_format(image
->vk_format
);
612 assert(format
!= NULL
);
614 const isl_tiling_flags_t isl_tiling_flags
=
615 choose_isl_tiling_flags(create_info
, isl_mod_info
,
616 image
->needs_set_tiling
);
618 image
->n_planes
= format
->n_planes
;
620 const VkImageFormatListCreateInfoKHR
*fmt_list
=
621 vk_find_struct_const(pCreateInfo
->pNext
,
622 IMAGE_FORMAT_LIST_CREATE_INFO_KHR
);
624 image
->ccs_e_compatible
=
625 all_formats_ccs_e_compatible(&device
->info
, fmt_list
, image
);
628 for_each_bit(b
, image
->aspects
) {
629 r
= make_surface(device
, image
, create_info
->stride
, isl_tiling_flags
,
630 create_info
->isl_extra_usage_flags
, (1 << b
));
635 *pImage
= anv_image_to_handle(image
);
641 vk_free2(&device
->alloc
, alloc
, image
);
646 static struct anv_image
*
647 anv_swapchain_get_image(VkSwapchainKHR swapchain
,
650 uint32_t n_images
= index
+ 1;
651 VkImage
*images
= malloc(sizeof(*images
) * n_images
);
652 VkResult result
= wsi_common_get_images(swapchain
, &n_images
, images
);
654 if (result
!= VK_SUCCESS
&& result
!= VK_INCOMPLETE
) {
659 ANV_FROM_HANDLE(anv_image
, image
, images
[index
]);
666 anv_image_from_swapchain(VkDevice device
,
667 const VkImageCreateInfo
*pCreateInfo
,
668 const VkImageSwapchainCreateInfoKHR
*swapchain_info
,
669 const VkAllocationCallbacks
*pAllocator
,
672 struct anv_image
*swapchain_image
= anv_swapchain_get_image(swapchain_info
->swapchain
, 0);
673 assert(swapchain_image
);
675 assert(swapchain_image
->type
== pCreateInfo
->imageType
);
676 assert(swapchain_image
->vk_format
== pCreateInfo
->format
);
677 assert(swapchain_image
->extent
.width
== pCreateInfo
->extent
.width
);
678 assert(swapchain_image
->extent
.height
== pCreateInfo
->extent
.height
);
679 assert(swapchain_image
->extent
.depth
== pCreateInfo
->extent
.depth
);
680 assert(swapchain_image
->array_size
== pCreateInfo
->arrayLayers
);
681 /* Color attachment is added by the wsi code. */
682 assert(swapchain_image
->usage
== (pCreateInfo
->usage
| VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
));
684 VkImageCreateInfo local_create_info
;
685 local_create_info
= *pCreateInfo
;
686 local_create_info
.pNext
= NULL
;
687 /* The following parameters are implictly selected by the wsi code. */
688 local_create_info
.tiling
= VK_IMAGE_TILING_OPTIMAL
;
689 local_create_info
.samples
= VK_SAMPLE_COUNT_1_BIT
;
690 local_create_info
.usage
|= VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
;
692 /* If the image has a particular modifier, specify that modifier. */
693 struct wsi_image_create_info local_wsi_info
= {
694 .sType
= VK_STRUCTURE_TYPE_WSI_IMAGE_CREATE_INFO_MESA
,
696 .modifiers
= &swapchain_image
->drm_format_mod
,
698 if (swapchain_image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
)
699 __vk_append_struct(&local_create_info
, &local_wsi_info
);
701 return anv_image_create(device
,
702 &(struct anv_image_create_info
) {
703 .vk_info
= &local_create_info
,
704 .external_format
= swapchain_image
->external_format
,
711 anv_CreateImage(VkDevice device
,
712 const VkImageCreateInfo
*pCreateInfo
,
713 const VkAllocationCallbacks
*pAllocator
,
716 const struct VkExternalMemoryImageCreateInfo
*create_info
=
717 vk_find_struct_const(pCreateInfo
->pNext
, EXTERNAL_MEMORY_IMAGE_CREATE_INFO
);
719 if (create_info
&& (create_info
->handleTypes
&
720 VK_EXTERNAL_MEMORY_HANDLE_TYPE_ANDROID_HARDWARE_BUFFER_BIT_ANDROID
))
721 return anv_image_from_external(device
, pCreateInfo
, create_info
,
724 const VkNativeBufferANDROID
*gralloc_info
=
725 vk_find_struct_const(pCreateInfo
->pNext
, NATIVE_BUFFER_ANDROID
);
727 return anv_image_from_gralloc(device
, pCreateInfo
, gralloc_info
,
730 const VkImageSwapchainCreateInfoKHR
*swapchain_info
=
731 vk_find_struct_const(pCreateInfo
->pNext
, IMAGE_SWAPCHAIN_CREATE_INFO_KHR
);
732 if (swapchain_info
&& swapchain_info
->swapchain
!= VK_NULL_HANDLE
)
733 return anv_image_from_swapchain(device
, pCreateInfo
, swapchain_info
,
736 return anv_image_create(device
,
737 &(struct anv_image_create_info
) {
738 .vk_info
= pCreateInfo
,
745 anv_DestroyImage(VkDevice _device
, VkImage _image
,
746 const VkAllocationCallbacks
*pAllocator
)
748 ANV_FROM_HANDLE(anv_device
, device
, _device
);
749 ANV_FROM_HANDLE(anv_image
, image
, _image
);
754 for (uint32_t p
= 0; p
< image
->n_planes
; ++p
) {
755 if (image
->planes
[p
].bo_is_owned
) {
756 assert(image
->planes
[p
].address
.bo
!= NULL
);
757 anv_bo_cache_release(device
, &device
->bo_cache
,
758 image
->planes
[p
].address
.bo
);
762 vk_free2(&device
->alloc
, pAllocator
, image
);
765 static void anv_image_bind_memory_plane(struct anv_device
*device
,
766 struct anv_image
*image
,
768 struct anv_device_memory
*memory
,
769 uint32_t memory_offset
)
771 assert(!image
->planes
[plane
].bo_is_owned
);
774 image
->planes
[plane
].address
= ANV_NULL_ADDRESS
;
778 image
->planes
[plane
].address
= (struct anv_address
) {
780 .offset
= memory_offset
,
784 /* We are binding AHardwareBuffer. Get a description, resolve the
785 * format and prepare anv_image properly.
788 resolve_ahw_image(struct anv_device
*device
,
789 struct anv_image
*image
,
790 struct anv_device_memory
*mem
)
792 #if defined(ANDROID) && ANDROID_API_LEVEL >= 26
794 AHardwareBuffer_Desc desc
;
795 AHardwareBuffer_describe(mem
->ahw
, &desc
);
798 int i915_tiling
= anv_gem_get_tiling(device
, mem
->bo
->gem_handle
);
799 VkImageTiling vk_tiling
;
800 isl_tiling_flags_t isl_tiling_flags
= 0;
802 switch (i915_tiling
) {
803 case I915_TILING_NONE
:
804 vk_tiling
= VK_IMAGE_TILING_LINEAR
;
805 isl_tiling_flags
= ISL_TILING_LINEAR_BIT
;
808 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
809 isl_tiling_flags
= ISL_TILING_X_BIT
;
812 vk_tiling
= VK_IMAGE_TILING_OPTIMAL
;
813 isl_tiling_flags
= ISL_TILING_Y0_BIT
;
817 unreachable("Invalid tiling flags.");
820 assert(vk_tiling
== VK_IMAGE_TILING_LINEAR
||
821 vk_tiling
== VK_IMAGE_TILING_OPTIMAL
);
824 VkFormat vk_format
= vk_format_from_android(desc
.format
);
825 enum isl_format isl_fmt
= anv_get_isl_format(&device
->info
,
827 VK_IMAGE_ASPECT_COLOR_BIT
,
829 assert(isl_fmt
!= ISL_FORMAT_UNSUPPORTED
);
831 /* Handle RGB(X)->RGBA fallback. */
832 switch (desc
.format
) {
833 case AHARDWAREBUFFER_FORMAT_R8G8B8_UNORM
:
834 case AHARDWAREBUFFER_FORMAT_R8G8B8X8_UNORM
:
835 if (isl_format_is_rgb(isl_fmt
))
836 isl_fmt
= isl_format_rgb_to_rgba(isl_fmt
);
840 /* Now we are able to fill anv_image fields properly and create
841 * isl_surface for it.
843 image
->vk_format
= vk_format
;
844 image
->format
= anv_get_format(vk_format
);
845 image
->aspects
= vk_format_aspects(image
->vk_format
);
846 image
->n_planes
= image
->format
->n_planes
;
847 image
->ccs_e_compatible
= false;
849 uint32_t stride
= desc
.stride
*
850 (isl_format_get_layout(isl_fmt
)->bpb
/ 8);
853 for_each_bit(b
, image
->aspects
) {
854 VkResult r
= make_surface(device
, image
, stride
, isl_tiling_flags
,
855 ISL_SURF_USAGE_DISABLE_AUX_BIT
, (1 << b
));
856 assert(r
== VK_SUCCESS
);
861 VkResult
anv_BindImageMemory(
864 VkDeviceMemory _memory
,
865 VkDeviceSize memoryOffset
)
867 ANV_FROM_HANDLE(anv_device
, device
, _device
);
868 ANV_FROM_HANDLE(anv_device_memory
, mem
, _memory
);
869 ANV_FROM_HANDLE(anv_image
, image
, _image
);
872 resolve_ahw_image(device
, image
, mem
);
875 anv_foreach_image_aspect_bit(aspect_bit
, image
, image
->aspects
) {
877 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
878 anv_image_bind_memory_plane(device
, image
, plane
, mem
, memoryOffset
);
884 VkResult
anv_BindImageMemory2(
886 uint32_t bindInfoCount
,
887 const VkBindImageMemoryInfo
* pBindInfos
)
889 ANV_FROM_HANDLE(anv_device
, device
, _device
);
891 for (uint32_t i
= 0; i
< bindInfoCount
; i
++) {
892 const VkBindImageMemoryInfo
*bind_info
= &pBindInfos
[i
];
893 ANV_FROM_HANDLE(anv_device_memory
, mem
, bind_info
->memory
);
894 ANV_FROM_HANDLE(anv_image
, image
, bind_info
->image
);
896 /* Resolve will alter the image's aspects, do this first. */
898 resolve_ahw_image(device
, image
, mem
);
900 VkImageAspectFlags aspects
= image
->aspects
;
901 vk_foreach_struct_const(s
, bind_info
->pNext
) {
903 case VK_STRUCTURE_TYPE_BIND_IMAGE_PLANE_MEMORY_INFO
: {
904 const VkBindImagePlaneMemoryInfo
*plane_info
=
905 (const VkBindImagePlaneMemoryInfo
*) s
;
907 aspects
= plane_info
->planeAspect
;
910 case VK_STRUCTURE_TYPE_BIND_IMAGE_MEMORY_SWAPCHAIN_INFO_KHR
: {
911 const VkBindImageMemorySwapchainInfoKHR
*swapchain_info
=
912 (const VkBindImageMemorySwapchainInfoKHR
*) s
;
913 struct anv_image
*swapchain_image
=
914 anv_swapchain_get_image(swapchain_info
->swapchain
,
915 swapchain_info
->imageIndex
);
916 assert(swapchain_image
);
917 assert(image
->aspects
== swapchain_image
->aspects
);
921 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
923 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
924 struct anv_device_memory mem
= {
925 .bo
= swapchain_image
->planes
[plane
].address
.bo
,
927 anv_image_bind_memory_plane(device
, image
, plane
,
928 &mem
, bind_info
->memoryOffset
);
933 anv_debug_ignored_stype(s
->sType
);
938 /* VkBindImageMemorySwapchainInfoKHR requires memory to be
939 * VK_NULL_HANDLE. In such case, just carry one with the next bind
946 anv_foreach_image_aspect_bit(aspect_bit
, image
, aspects
) {
948 anv_image_aspect_to_plane(image
->aspects
, 1UL << aspect_bit
);
949 anv_image_bind_memory_plane(device
, image
, plane
,
950 mem
, bind_info
->memoryOffset
);
957 void anv_GetImageSubresourceLayout(
960 const VkImageSubresource
* subresource
,
961 VkSubresourceLayout
* layout
)
963 ANV_FROM_HANDLE(anv_image
, image
, _image
);
965 const struct anv_surface
*surface
;
966 if (subresource
->aspectMask
== VK_IMAGE_ASPECT_PLANE_1_BIT
&&
967 image
->drm_format_mod
!= DRM_FORMAT_MOD_INVALID
&&
968 isl_drm_modifier_has_aux(image
->drm_format_mod
))
969 surface
= &image
->planes
[0].aux_surface
;
971 surface
= get_surface(image
, subresource
->aspectMask
);
973 assert(__builtin_popcount(subresource
->aspectMask
) == 1);
975 layout
->offset
= surface
->offset
;
976 layout
->rowPitch
= surface
->isl
.row_pitch_B
;
977 layout
->depthPitch
= isl_surf_get_array_pitch(&surface
->isl
);
978 layout
->arrayPitch
= isl_surf_get_array_pitch(&surface
->isl
);
980 if (subresource
->mipLevel
> 0 || subresource
->arrayLayer
> 0) {
981 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
984 isl_surf_get_image_offset_B_tile_sa(&surface
->isl
,
985 subresource
->mipLevel
,
986 subresource
->arrayLayer
,
987 0 /* logical_z_offset_px */,
988 &offset_B
, NULL
, NULL
);
989 layout
->offset
+= offset_B
;
990 layout
->size
= layout
->rowPitch
* anv_minify(image
->extent
.height
,
991 subresource
->mipLevel
);
993 layout
->size
= surface
->isl
.size_B
;
998 * This function determines the optimal buffer to use for a given
999 * VkImageLayout and other pieces of information needed to make that
1000 * determination. This does not determine the optimal buffer to use
1001 * during a resolve operation.
1003 * @param devinfo The device information of the Intel GPU.
1004 * @param image The image that may contain a collection of buffers.
1005 * @param aspect The aspect of the image to be accessed.
1006 * @param layout The current layout of the image aspect(s).
1008 * @return The primary buffer that should be used for the given layout.
1011 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
1012 const struct anv_image
* const image
,
1013 const VkImageAspectFlagBits aspect
,
1014 const VkImageLayout layout
)
1016 /* Validate the inputs. */
1018 /* The devinfo is needed as the optimal buffer varies across generations. */
1019 assert(devinfo
!= NULL
);
1021 /* The layout of a NULL image is not properly defined. */
1022 assert(image
!= NULL
);
1024 /* The aspect must be exactly one of the image aspects. */
1025 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1027 /* Determine the optimal buffer. */
1029 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1031 /* If there is no auxiliary surface allocated, we must use the one and only
1034 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1035 return ISL_AUX_USAGE_NONE
;
1037 /* All images that use an auxiliary surface are required to be tiled. */
1038 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
1040 /* Stencil has no aux */
1041 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1045 /* Invalid Layouts */
1046 case VK_IMAGE_LAYOUT_RANGE_SIZE
:
1047 case VK_IMAGE_LAYOUT_MAX_ENUM
:
1048 unreachable("Invalid image layout.");
1050 /* Undefined layouts
1052 * The pre-initialized layout is equivalent to the undefined layout for
1053 * optimally-tiled images. We can only do color compression (CCS or HiZ)
1056 case VK_IMAGE_LAYOUT_UNDEFINED
:
1057 case VK_IMAGE_LAYOUT_PREINITIALIZED
:
1058 return ISL_AUX_USAGE_NONE
;
1063 case VK_IMAGE_LAYOUT_GENERAL
:
1064 case VK_IMAGE_LAYOUT_TRANSFER_DST_OPTIMAL
:
1065 case VK_IMAGE_LAYOUT_TRANSFER_SRC_OPTIMAL
:
1066 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1067 /* This buffer could be a depth buffer used in a transfer operation.
1068 * BLORP currently doesn't use HiZ for transfer operations so we must
1069 * use the main buffer for this layout. TODO: Enable HiZ in BLORP.
1071 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_HIZ
);
1072 return ISL_AUX_USAGE_NONE
;
1074 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1075 return image
->planes
[plane
].aux_usage
;
1079 /* Sampling Layouts */
1080 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_READ_ONLY_OPTIMAL
:
1081 case VK_IMAGE_LAYOUT_DEPTH_READ_ONLY_STENCIL_ATTACHMENT_OPTIMAL
:
1082 assert((image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1084 case VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
:
1085 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1086 if (anv_can_sample_with_hiz(devinfo
, image
))
1087 return ISL_AUX_USAGE_HIZ
;
1089 return ISL_AUX_USAGE_NONE
;
1091 return image
->planes
[plane
].aux_usage
;
1095 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1096 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1098 /* When handing the image off to the presentation engine, we need to
1099 * ensure that things are properly resolved. For images with no
1100 * modifier, we assume that they follow the old rules and always need
1101 * a full resolve because the PE doesn't understand any form of
1102 * compression. For images with modifiers, we use the aux usage from
1105 const struct isl_drm_modifier_info
*mod_info
=
1106 isl_drm_modifier_get_info(image
->drm_format_mod
);
1107 return mod_info
? mod_info
->aux_usage
: ISL_AUX_USAGE_NONE
;
1111 /* Rendering Layouts */
1112 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1113 assert(aspect
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1114 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_NONE
) {
1115 assert(image
->samples
== 1);
1116 return ISL_AUX_USAGE_CCS_D
;
1118 assert(image
->planes
[plane
].aux_usage
!= ISL_AUX_USAGE_CCS_D
);
1119 return image
->planes
[plane
].aux_usage
;
1122 case VK_IMAGE_LAYOUT_DEPTH_STENCIL_ATTACHMENT_OPTIMAL
:
1123 case VK_IMAGE_LAYOUT_DEPTH_ATTACHMENT_STENCIL_READ_ONLY_OPTIMAL
:
1124 assert(aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
);
1125 return ISL_AUX_USAGE_HIZ
;
1127 case VK_IMAGE_LAYOUT_SHARED_PRESENT_KHR
:
1128 unreachable("VK_KHR_shared_presentable_image is unsupported");
1130 case VK_IMAGE_LAYOUT_FRAGMENT_DENSITY_MAP_OPTIMAL_EXT
:
1131 unreachable("VK_EXT_fragment_density_map is unsupported");
1133 case VK_IMAGE_LAYOUT_SHADING_RATE_OPTIMAL_NV
:
1134 unreachable("VK_NV_shading_rate_image is unsupported");
1137 /* If the layout isn't recognized in the exhaustive switch above, the
1138 * VkImageLayout value is not defined in vulkan.h.
1140 unreachable("layout is not a VkImageLayout enumeration member.");
1144 * This function returns the level of unresolved fast-clear support of the
1145 * given image in the given VkImageLayout.
1147 * @param devinfo The device information of the Intel GPU.
1148 * @param image The image that may contain a collection of buffers.
1149 * @param aspect The aspect of the image to be accessed.
1150 * @param layout The current layout of the image aspect(s).
1152 enum anv_fast_clear_type
1153 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
1154 const struct anv_image
* const image
,
1155 const VkImageAspectFlagBits aspect
,
1156 const VkImageLayout layout
)
1158 /* The aspect must be exactly one of the image aspects. */
1159 assert(util_bitcount(aspect
) == 1 && (aspect
& image
->aspects
));
1161 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1163 /* If there is no auxiliary surface allocated, there are no fast-clears */
1164 if (image
->planes
[plane
].aux_surface
.isl
.size_B
== 0)
1165 return ANV_FAST_CLEAR_NONE
;
1167 /* All images that use an auxiliary surface are required to be tiled. */
1168 assert(image
->tiling
== VK_IMAGE_TILING_OPTIMAL
);
1170 /* Stencil has no aux */
1171 assert(aspect
!= VK_IMAGE_ASPECT_STENCIL_BIT
);
1173 if (aspect
== VK_IMAGE_ASPECT_DEPTH_BIT
) {
1174 /* For depth images (with HiZ), the layout supports fast-clears if and
1175 * only if it supports HiZ. However, we only support fast-clears to the
1176 * default depth value.
1178 enum isl_aux_usage aux_usage
=
1179 anv_layout_to_aux_usage(devinfo
, image
, aspect
, layout
);
1180 return aux_usage
== ISL_AUX_USAGE_HIZ
?
1181 ANV_FAST_CLEAR_DEFAULT_VALUE
: ANV_FAST_CLEAR_NONE
;
1184 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
1186 /* We don't support MSAA fast-clears on Ivybridge or Bay Trail because they
1187 * lack the MI ALU which we need to determine the predicates.
1189 if (devinfo
->gen
== 7 && !devinfo
->is_haswell
&& image
->samples
> 1)
1190 return ANV_FAST_CLEAR_NONE
;
1193 case VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL
:
1194 return ANV_FAST_CLEAR_ANY
;
1196 case VK_IMAGE_LAYOUT_PRESENT_SRC_KHR
: {
1197 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1199 /* We do not yet support any modifiers which support clear color so we
1200 * just always return NONE. One day, this will change.
1202 const struct isl_drm_modifier_info
*mod_info
=
1203 isl_drm_modifier_get_info(image
->drm_format_mod
);
1204 assert(!mod_info
|| !mod_info
->supports_clear_color
);
1206 return ANV_FAST_CLEAR_NONE
;
1210 /* If the image has MCS or CCS_E enabled all the time then we can use
1211 * fast-clear as long as the clear color is the default value of zero
1212 * since this is the default value we program into every surface state
1213 * used for texturing.
1215 if (image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_MCS
||
1216 image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
)
1217 return ANV_FAST_CLEAR_DEFAULT_VALUE
;
1219 return ANV_FAST_CLEAR_NONE
;
1224 static struct anv_state
1225 alloc_surface_state(struct anv_device
*device
)
1227 return anv_state_pool_alloc(&device
->surface_state_pool
, 64, 64);
1230 static enum isl_channel_select
1231 remap_swizzle(VkComponentSwizzle swizzle
, VkComponentSwizzle component
,
1232 struct isl_swizzle format_swizzle
)
1234 if (swizzle
== VK_COMPONENT_SWIZZLE_IDENTITY
)
1235 swizzle
= component
;
1238 case VK_COMPONENT_SWIZZLE_ZERO
: return ISL_CHANNEL_SELECT_ZERO
;
1239 case VK_COMPONENT_SWIZZLE_ONE
: return ISL_CHANNEL_SELECT_ONE
;
1240 case VK_COMPONENT_SWIZZLE_R
: return format_swizzle
.r
;
1241 case VK_COMPONENT_SWIZZLE_G
: return format_swizzle
.g
;
1242 case VK_COMPONENT_SWIZZLE_B
: return format_swizzle
.b
;
1243 case VK_COMPONENT_SWIZZLE_A
: return format_swizzle
.a
;
1245 unreachable("Invalid swizzle");
1250 anv_image_fill_surface_state(struct anv_device
*device
,
1251 const struct anv_image
*image
,
1252 VkImageAspectFlagBits aspect
,
1253 const struct isl_view
*view_in
,
1254 isl_surf_usage_flags_t view_usage
,
1255 enum isl_aux_usage aux_usage
,
1256 const union isl_color_value
*clear_color
,
1257 enum anv_image_view_state_flags flags
,
1258 struct anv_surface_state
*state_inout
,
1259 struct brw_image_param
*image_param_out
)
1261 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
1263 const struct anv_surface
*surface
= &image
->planes
[plane
].surface
,
1264 *aux_surface
= &image
->planes
[plane
].aux_surface
;
1266 struct isl_view view
= *view_in
;
1267 view
.usage
|= view_usage
;
1269 /* For texturing with VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL from a
1270 * compressed surface with a shadow surface, we use the shadow instead of
1271 * the primary surface. The shadow surface will be tiled, unlike the main
1272 * surface, so it should get significantly better performance.
1274 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1275 isl_format_is_compressed(view
.format
) &&
1276 (flags
& ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
)) {
1277 assert(isl_format_is_compressed(surface
->isl
.format
));
1278 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1279 assert(image
->planes
[plane
].shadow_surface
.isl
.tiling
!= ISL_TILING_LINEAR
);
1280 surface
= &image
->planes
[plane
].shadow_surface
;
1283 /* For texturing from stencil on gen7, we have to sample from a shadow
1284 * surface because we don't support W-tiling in the sampler.
1286 if (image
->planes
[plane
].shadow_surface
.isl
.size_B
> 0 &&
1287 aspect
== VK_IMAGE_ASPECT_STENCIL_BIT
) {
1288 assert(device
->info
.gen
== 7);
1289 assert(view_usage
& ISL_SURF_USAGE_TEXTURE_BIT
);
1290 surface
= &image
->planes
[plane
].shadow_surface
;
1293 if (view_usage
== ISL_SURF_USAGE_RENDER_TARGET_BIT
)
1294 view
.swizzle
= anv_swizzle_for_render(view
.swizzle
);
1296 /* On Ivy Bridge and Bay Trail we do the swizzle in the shader */
1297 if (device
->info
.gen
== 7 && !device
->info
.is_haswell
)
1298 view
.swizzle
= ISL_SWIZZLE_IDENTITY
;
1300 /* If this is a HiZ buffer we can sample from with a programmable clear
1301 * value (SKL+), define the clear value to the optimal constant.
1303 union isl_color_value default_clear_color
= { .u32
= { 0, } };
1304 if (device
->info
.gen
>= 9 && aux_usage
== ISL_AUX_USAGE_HIZ
)
1305 default_clear_color
.f32
[0] = ANV_HZ_FC_VAL
;
1307 clear_color
= &default_clear_color
;
1309 const struct anv_address address
=
1310 anv_address_add(image
->planes
[plane
].address
, surface
->offset
);
1312 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1313 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
) &&
1314 !isl_has_matching_typed_storage_image_format(&device
->info
,
1316 /* In this case, we are a writeable storage buffer which needs to be
1317 * lowered to linear. All tiling and offset calculations will be done in
1320 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1321 isl_buffer_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1322 .address
= anv_address_physical(address
),
1323 .size_B
= surface
->isl
.size_B
,
1324 .format
= ISL_FORMAT_RAW
,
1325 .swizzle
= ISL_SWIZZLE_IDENTITY
,
1327 .mocs
= anv_mocs_for_bo(device
, address
.bo
));
1328 state_inout
->address
= address
,
1329 state_inout
->aux_address
= ANV_NULL_ADDRESS
;
1330 state_inout
->clear_address
= ANV_NULL_ADDRESS
;
1332 if (view_usage
== ISL_SURF_USAGE_STORAGE_BIT
&&
1333 !(flags
& ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
)) {
1334 /* Typed surface reads support a very limited subset of the shader
1335 * image formats. Translate it into the closest format the hardware
1338 assert(aux_usage
== ISL_AUX_USAGE_NONE
);
1339 view
.format
= isl_lower_storage_image_format(&device
->info
,
1343 const struct isl_surf
*isl_surf
= &surface
->isl
;
1345 struct isl_surf tmp_surf
;
1346 uint32_t offset_B
= 0, tile_x_sa
= 0, tile_y_sa
= 0;
1347 if (isl_format_is_compressed(surface
->isl
.format
) &&
1348 !isl_format_is_compressed(view
.format
)) {
1349 /* We're creating an uncompressed view of a compressed surface. This
1350 * is allowed but only for a single level/layer.
1352 assert(surface
->isl
.samples
== 1);
1353 assert(view
.levels
== 1);
1354 assert(view
.array_len
== 1);
1356 isl_surf_get_image_surf(&device
->isl_dev
, isl_surf
,
1358 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1359 0 : view
.base_array_layer
,
1360 surface
->isl
.dim
== ISL_SURF_DIM_3D
?
1361 view
.base_array_layer
: 0,
1363 &offset_B
, &tile_x_sa
, &tile_y_sa
);
1365 /* The newly created image represents the one subimage we're
1366 * referencing with this view so it only has one array slice and
1369 view
.base_array_layer
= 0;
1370 view
.base_level
= 0;
1372 /* We're making an uncompressed view here. The image dimensions need
1373 * to be scaled down by the block size.
1375 const struct isl_format_layout
*fmtl
=
1376 isl_format_get_layout(surface
->isl
.format
);
1377 tmp_surf
.format
= view
.format
;
1378 tmp_surf
.logical_level0_px
.width
=
1379 DIV_ROUND_UP(tmp_surf
.logical_level0_px
.width
, fmtl
->bw
);
1380 tmp_surf
.logical_level0_px
.height
=
1381 DIV_ROUND_UP(tmp_surf
.logical_level0_px
.height
, fmtl
->bh
);
1382 tmp_surf
.phys_level0_sa
.width
/= fmtl
->bw
;
1383 tmp_surf
.phys_level0_sa
.height
/= fmtl
->bh
;
1384 tile_x_sa
/= fmtl
->bw
;
1385 tile_y_sa
/= fmtl
->bh
;
1387 isl_surf
= &tmp_surf
;
1389 if (device
->info
.gen
<= 8) {
1390 assert(surface
->isl
.tiling
== ISL_TILING_LINEAR
);
1391 assert(tile_x_sa
== 0);
1392 assert(tile_y_sa
== 0);
1396 state_inout
->address
= anv_address_add(address
, offset_B
);
1398 struct anv_address aux_address
= ANV_NULL_ADDRESS
;
1399 if (aux_usage
!= ISL_AUX_USAGE_NONE
) {
1400 aux_address
= anv_address_add(image
->planes
[plane
].address
,
1401 aux_surface
->offset
);
1403 state_inout
->aux_address
= aux_address
;
1405 struct anv_address clear_address
= ANV_NULL_ADDRESS
;
1406 if (device
->info
.gen
>= 10 && aux_usage
!= ISL_AUX_USAGE_NONE
) {
1407 if (aux_usage
== ISL_AUX_USAGE_HIZ
) {
1408 clear_address
= (struct anv_address
) {
1409 .bo
= &device
->hiz_clear_bo
,
1413 clear_address
= anv_image_get_clear_color_addr(device
, image
, aspect
);
1416 state_inout
->clear_address
= clear_address
;
1418 isl_surf_fill_state(&device
->isl_dev
, state_inout
->state
.map
,
1421 .address
= anv_address_physical(state_inout
->address
),
1422 .clear_color
= *clear_color
,
1423 .aux_surf
= &aux_surface
->isl
,
1424 .aux_usage
= aux_usage
,
1425 .aux_address
= anv_address_physical(aux_address
),
1426 .clear_address
= anv_address_physical(clear_address
),
1427 .use_clear_address
= !anv_address_is_null(clear_address
),
1428 .mocs
= anv_mocs_for_bo(device
,
1429 state_inout
->address
.bo
),
1430 .x_offset_sa
= tile_x_sa
,
1431 .y_offset_sa
= tile_y_sa
);
1433 /* With the exception of gen8, the bottom 12 bits of the MCS base address
1434 * are used to store other information. This should be ok, however,
1435 * because the surface buffer addresses are always 4K page aligned.
1437 uint32_t *aux_addr_dw
= state_inout
->state
.map
+
1438 device
->isl_dev
.ss
.aux_addr_offset
;
1439 assert((aux_address
.offset
& 0xfff) == 0);
1440 state_inout
->aux_address
.offset
|= *aux_addr_dw
& 0xfff;
1442 if (device
->info
.gen
>= 10 && clear_address
.bo
) {
1443 uint32_t *clear_addr_dw
= state_inout
->state
.map
+
1444 device
->isl_dev
.ss
.clear_color_state_offset
;
1445 assert((clear_address
.offset
& 0x3f) == 0);
1446 state_inout
->clear_address
.offset
|= *clear_addr_dw
& 0x3f;
1450 if (image_param_out
) {
1451 assert(view_usage
== ISL_SURF_USAGE_STORAGE_BIT
);
1452 isl_surf_fill_image_param(&device
->isl_dev
, image_param_out
,
1453 &surface
->isl
, &view
);
1457 static VkImageAspectFlags
1458 remap_aspect_flags(VkImageAspectFlags view_aspects
)
1460 if (view_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
1461 if (util_bitcount(view_aspects
) == 1)
1462 return VK_IMAGE_ASPECT_COLOR_BIT
;
1464 VkImageAspectFlags color_aspects
= 0;
1465 for (uint32_t i
= 0; i
< util_bitcount(view_aspects
); i
++)
1466 color_aspects
|= VK_IMAGE_ASPECT_PLANE_0_BIT
<< i
;
1467 return color_aspects
;
1469 /* No special remapping needed for depth & stencil aspects. */
1470 return view_aspects
;
1474 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
1476 uint32_t planes
= 0;
1478 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
1479 VK_IMAGE_ASPECT_DEPTH_BIT
|
1480 VK_IMAGE_ASPECT_STENCIL_BIT
|
1481 VK_IMAGE_ASPECT_PLANE_0_BIT
))
1483 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
1485 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
1488 if ((aspect_mask
& VK_IMAGE_ASPECT_DEPTH_BIT
) != 0 &&
1489 (aspect_mask
& VK_IMAGE_ASPECT_STENCIL_BIT
) != 0)
1496 anv_CreateImageView(VkDevice _device
,
1497 const VkImageViewCreateInfo
*pCreateInfo
,
1498 const VkAllocationCallbacks
*pAllocator
,
1501 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1502 ANV_FROM_HANDLE(anv_image
, image
, pCreateInfo
->image
);
1503 struct anv_image_view
*iview
;
1505 iview
= vk_zalloc2(&device
->alloc
, pAllocator
, sizeof(*iview
), 8,
1506 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1508 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1510 const VkImageSubresourceRange
*range
= &pCreateInfo
->subresourceRange
;
1512 assert(range
->layerCount
> 0);
1513 assert(range
->baseMipLevel
< image
->levels
);
1515 /* Check if a conversion info was passed. */
1516 const struct anv_format
*conv_format
= NULL
;
1517 const struct VkSamplerYcbcrConversionInfo
*conv_info
=
1518 vk_find_struct_const(pCreateInfo
->pNext
, SAMPLER_YCBCR_CONVERSION_INFO
);
1520 /* If image has an external format, the pNext chain must contain an instance of
1521 * VKSamplerYcbcrConversionInfo with a conversion object created with the same
1522 * external format as image."
1524 assert(!image
->external_format
|| conv_info
);
1527 ANV_FROM_HANDLE(anv_ycbcr_conversion
, conversion
, conv_info
->conversion
);
1528 conv_format
= conversion
->format
;
1531 const VkImageViewUsageCreateInfo
*usage_info
=
1532 vk_find_struct_const(pCreateInfo
, IMAGE_VIEW_USAGE_CREATE_INFO
);
1533 VkImageUsageFlags view_usage
= usage_info
? usage_info
->usage
: image
->usage
;
1534 /* View usage should be a subset of image usage */
1535 assert((view_usage
& ~image
->usage
) == 0);
1536 assert(view_usage
& (VK_IMAGE_USAGE_SAMPLED_BIT
|
1537 VK_IMAGE_USAGE_STORAGE_BIT
|
1538 VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT
|
1539 VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
|
1540 VK_IMAGE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT
));
1542 switch (image
->type
) {
1544 unreachable("bad VkImageType");
1545 case VK_IMAGE_TYPE_1D
:
1546 case VK_IMAGE_TYPE_2D
:
1547 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1 <= image
->array_size
);
1549 case VK_IMAGE_TYPE_3D
:
1550 assert(range
->baseArrayLayer
+ anv_get_layerCount(image
, range
) - 1
1551 <= anv_minify(image
->extent
.depth
, range
->baseMipLevel
));
1555 /* First expand aspects to the image's ones (for example
1556 * VK_IMAGE_ASPECT_COLOR_BIT will be converted to
1557 * VK_IMAGE_ASPECT_PLANE_0_BIT | VK_IMAGE_ASPECT_PLANE_1_BIT |
1558 * VK_IMAGE_ASPECT_PLANE_2_BIT for an image of format
1559 * VK_FORMAT_G8_B8_R8_3PLANE_420_UNORM.
1561 VkImageAspectFlags expanded_aspects
=
1562 anv_image_expand_aspects(image
, range
->aspectMask
);
1564 iview
->image
= image
;
1566 /* Remap the expanded aspects for the image view. For example if only
1567 * VK_IMAGE_ASPECT_PLANE_1_BIT was given in range->aspectMask, we will
1568 * convert it to VK_IMAGE_ASPECT_COLOR_BIT since from the point of view of
1569 * the image view, it only has a single plane.
1571 iview
->aspect_mask
= remap_aspect_flags(expanded_aspects
);
1572 iview
->n_planes
= anv_image_aspect_get_planes(iview
->aspect_mask
);
1573 iview
->vk_format
= pCreateInfo
->format
;
1575 /* "If image has an external format, format must be VK_FORMAT_UNDEFINED." */
1576 assert(!image
->external_format
|| pCreateInfo
->format
== VK_FORMAT_UNDEFINED
);
1578 /* Format is undefined, this can happen when using external formats. Set
1579 * view format from the passed conversion info.
1581 if (iview
->vk_format
== VK_FORMAT_UNDEFINED
&& conv_format
)
1582 iview
->vk_format
= conv_format
->vk_format
;
1584 iview
->extent
= (VkExtent3D
) {
1585 .width
= anv_minify(image
->extent
.width
, range
->baseMipLevel
),
1586 .height
= anv_minify(image
->extent
.height
, range
->baseMipLevel
),
1587 .depth
= anv_minify(image
->extent
.depth
, range
->baseMipLevel
),
1590 /* Now go through the underlying image selected planes (computed in
1591 * expanded_aspects) and map them to planes in the image view.
1593 uint32_t iaspect_bit
, vplane
= 0;
1594 anv_foreach_image_aspect_bit(iaspect_bit
, image
, expanded_aspects
) {
1596 anv_image_aspect_to_plane(image
->aspects
, 1UL << iaspect_bit
);
1597 VkImageAspectFlags vplane_aspect
=
1598 anv_plane_to_aspect(iview
->aspect_mask
, vplane
);
1599 struct anv_format_plane format
=
1600 anv_get_format_plane(&device
->info
, iview
->vk_format
,
1601 vplane_aspect
, image
->tiling
);
1603 iview
->planes
[vplane
].image_plane
= iplane
;
1605 iview
->planes
[vplane
].isl
= (struct isl_view
) {
1606 .format
= format
.isl_format
,
1607 .base_level
= range
->baseMipLevel
,
1608 .levels
= anv_get_levelCount(image
, range
),
1609 .base_array_layer
= range
->baseArrayLayer
,
1610 .array_len
= anv_get_layerCount(image
, range
),
1612 .r
= remap_swizzle(pCreateInfo
->components
.r
,
1613 VK_COMPONENT_SWIZZLE_R
, format
.swizzle
),
1614 .g
= remap_swizzle(pCreateInfo
->components
.g
,
1615 VK_COMPONENT_SWIZZLE_G
, format
.swizzle
),
1616 .b
= remap_swizzle(pCreateInfo
->components
.b
,
1617 VK_COMPONENT_SWIZZLE_B
, format
.swizzle
),
1618 .a
= remap_swizzle(pCreateInfo
->components
.a
,
1619 VK_COMPONENT_SWIZZLE_A
, format
.swizzle
),
1623 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_3D
) {
1624 iview
->planes
[vplane
].isl
.base_array_layer
= 0;
1625 iview
->planes
[vplane
].isl
.array_len
= iview
->extent
.depth
;
1628 if (pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE
||
1629 pCreateInfo
->viewType
== VK_IMAGE_VIEW_TYPE_CUBE_ARRAY
) {
1630 iview
->planes
[vplane
].isl
.usage
= ISL_SURF_USAGE_CUBE_BIT
;
1632 iview
->planes
[vplane
].isl
.usage
= 0;
1635 if (view_usage
& VK_IMAGE_USAGE_SAMPLED_BIT
||
1636 (view_usage
& VK_IMAGE_USAGE_INPUT_ATTACHMENT_BIT
&&
1637 !(iview
->aspect_mask
& VK_IMAGE_ASPECT_COLOR_BIT
))) {
1638 iview
->planes
[vplane
].optimal_sampler_surface_state
.state
= alloc_surface_state(device
);
1639 iview
->planes
[vplane
].general_sampler_surface_state
.state
= alloc_surface_state(device
);
1641 enum isl_aux_usage general_aux_usage
=
1642 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1643 VK_IMAGE_LAYOUT_GENERAL
);
1644 enum isl_aux_usage optimal_aux_usage
=
1645 anv_layout_to_aux_usage(&device
->info
, image
, 1UL << iaspect_bit
,
1646 VK_IMAGE_LAYOUT_SHADER_READ_ONLY_OPTIMAL
);
1648 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1649 &iview
->planes
[vplane
].isl
,
1650 ISL_SURF_USAGE_TEXTURE_BIT
,
1651 optimal_aux_usage
, NULL
,
1652 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
,
1653 &iview
->planes
[vplane
].optimal_sampler_surface_state
,
1656 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1657 &iview
->planes
[vplane
].isl
,
1658 ISL_SURF_USAGE_TEXTURE_BIT
,
1659 general_aux_usage
, NULL
,
1661 &iview
->planes
[vplane
].general_sampler_surface_state
,
1665 /* NOTE: This one needs to go last since it may stomp isl_view.format */
1666 if (view_usage
& VK_IMAGE_USAGE_STORAGE_BIT
) {
1667 iview
->planes
[vplane
].storage_surface_state
.state
= alloc_surface_state(device
);
1668 iview
->planes
[vplane
].writeonly_storage_surface_state
.state
= alloc_surface_state(device
);
1670 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1671 &iview
->planes
[vplane
].isl
,
1672 ISL_SURF_USAGE_STORAGE_BIT
,
1673 ISL_AUX_USAGE_NONE
, NULL
,
1675 &iview
->planes
[vplane
].storage_surface_state
,
1676 &iview
->planes
[vplane
].storage_image_param
);
1678 anv_image_fill_surface_state(device
, image
, 1ULL << iaspect_bit
,
1679 &iview
->planes
[vplane
].isl
,
1680 ISL_SURF_USAGE_STORAGE_BIT
,
1681 ISL_AUX_USAGE_NONE
, NULL
,
1682 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
,
1683 &iview
->planes
[vplane
].writeonly_storage_surface_state
,
1690 *pView
= anv_image_view_to_handle(iview
);
1696 anv_DestroyImageView(VkDevice _device
, VkImageView _iview
,
1697 const VkAllocationCallbacks
*pAllocator
)
1699 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1700 ANV_FROM_HANDLE(anv_image_view
, iview
, _iview
);
1705 for (uint32_t plane
= 0; plane
< iview
->n_planes
; plane
++) {
1706 if (iview
->planes
[plane
].optimal_sampler_surface_state
.state
.alloc_size
> 0) {
1707 anv_state_pool_free(&device
->surface_state_pool
,
1708 iview
->planes
[plane
].optimal_sampler_surface_state
.state
);
1711 if (iview
->planes
[plane
].general_sampler_surface_state
.state
.alloc_size
> 0) {
1712 anv_state_pool_free(&device
->surface_state_pool
,
1713 iview
->planes
[plane
].general_sampler_surface_state
.state
);
1716 if (iview
->planes
[plane
].storage_surface_state
.state
.alloc_size
> 0) {
1717 anv_state_pool_free(&device
->surface_state_pool
,
1718 iview
->planes
[plane
].storage_surface_state
.state
);
1721 if (iview
->planes
[plane
].writeonly_storage_surface_state
.state
.alloc_size
> 0) {
1722 anv_state_pool_free(&device
->surface_state_pool
,
1723 iview
->planes
[plane
].writeonly_storage_surface_state
.state
);
1727 vk_free2(&device
->alloc
, pAllocator
, iview
);
1732 anv_CreateBufferView(VkDevice _device
,
1733 const VkBufferViewCreateInfo
*pCreateInfo
,
1734 const VkAllocationCallbacks
*pAllocator
,
1735 VkBufferView
*pView
)
1737 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1738 ANV_FROM_HANDLE(anv_buffer
, buffer
, pCreateInfo
->buffer
);
1739 struct anv_buffer_view
*view
;
1741 view
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*view
), 8,
1742 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
1744 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
1746 /* TODO: Handle the format swizzle? */
1748 view
->format
= anv_get_isl_format(&device
->info
, pCreateInfo
->format
,
1749 VK_IMAGE_ASPECT_COLOR_BIT
,
1750 VK_IMAGE_TILING_LINEAR
);
1751 const uint32_t format_bs
= isl_format_get_layout(view
->format
)->bpb
/ 8;
1752 view
->range
= anv_buffer_get_range(buffer
, pCreateInfo
->offset
,
1753 pCreateInfo
->range
);
1754 view
->range
= align_down_npot_u32(view
->range
, format_bs
);
1756 view
->address
= anv_address_add(buffer
->address
, pCreateInfo
->offset
);
1758 if (buffer
->usage
& VK_BUFFER_USAGE_UNIFORM_TEXEL_BUFFER_BIT
) {
1759 view
->surface_state
= alloc_surface_state(device
);
1761 anv_fill_buffer_surface_state(device
, view
->surface_state
,
1763 view
->address
, view
->range
, format_bs
);
1765 view
->surface_state
= (struct anv_state
){ 0 };
1768 if (buffer
->usage
& VK_BUFFER_USAGE_STORAGE_TEXEL_BUFFER_BIT
) {
1769 view
->storage_surface_state
= alloc_surface_state(device
);
1770 view
->writeonly_storage_surface_state
= alloc_surface_state(device
);
1772 enum isl_format storage_format
=
1773 isl_has_matching_typed_storage_image_format(&device
->info
,
1775 isl_lower_storage_image_format(&device
->info
, view
->format
) :
1778 anv_fill_buffer_surface_state(device
, view
->storage_surface_state
,
1780 view
->address
, view
->range
,
1781 (storage_format
== ISL_FORMAT_RAW
? 1 :
1782 isl_format_get_layout(storage_format
)->bpb
/ 8));
1784 /* Write-only accesses should use the original format. */
1785 anv_fill_buffer_surface_state(device
, view
->writeonly_storage_surface_state
,
1787 view
->address
, view
->range
,
1788 isl_format_get_layout(view
->format
)->bpb
/ 8);
1790 isl_buffer_fill_image_param(&device
->isl_dev
,
1791 &view
->storage_image_param
,
1792 view
->format
, view
->range
);
1794 view
->storage_surface_state
= (struct anv_state
){ 0 };
1795 view
->writeonly_storage_surface_state
= (struct anv_state
){ 0 };
1798 *pView
= anv_buffer_view_to_handle(view
);
1804 anv_DestroyBufferView(VkDevice _device
, VkBufferView bufferView
,
1805 const VkAllocationCallbacks
*pAllocator
)
1807 ANV_FROM_HANDLE(anv_device
, device
, _device
);
1808 ANV_FROM_HANDLE(anv_buffer_view
, view
, bufferView
);
1813 if (view
->surface_state
.alloc_size
> 0)
1814 anv_state_pool_free(&device
->surface_state_pool
,
1815 view
->surface_state
);
1817 if (view
->storage_surface_state
.alloc_size
> 0)
1818 anv_state_pool_free(&device
->surface_state_pool
,
1819 view
->storage_surface_state
);
1821 if (view
->writeonly_storage_surface_state
.alloc_size
> 0)
1822 anv_state_pool_free(&device
->surface_state_pool
,
1823 view
->writeonly_storage_surface_state
);
1825 vk_free2(&device
->alloc
, pAllocator
, view
);
1828 const struct anv_surface
*
1829 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
1830 VkImageAspectFlags aspect_mask
)
1832 VkImageAspectFlags sanitized_mask
;
1834 switch (aspect_mask
) {
1835 case VK_IMAGE_ASPECT_COLOR_BIT
:
1836 assert(image
->aspects
== VK_IMAGE_ASPECT_COLOR_BIT
);
1837 sanitized_mask
= VK_IMAGE_ASPECT_COLOR_BIT
;
1839 case VK_IMAGE_ASPECT_DEPTH_BIT
:
1840 assert(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
);
1841 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1843 case VK_IMAGE_ASPECT_STENCIL_BIT
:
1844 assert(image
->aspects
& VK_IMAGE_ASPECT_STENCIL_BIT
);
1845 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1847 case VK_IMAGE_ASPECT_DEPTH_BIT
| VK_IMAGE_ASPECT_STENCIL_BIT
:
1848 /* FINISHME: The Vulkan spec (git a511ba2) requires support for
1849 * combined depth stencil formats. Specifically, it states:
1851 * At least one of ename:VK_FORMAT_D24_UNORM_S8_UINT or
1852 * ename:VK_FORMAT_D32_SFLOAT_S8_UINT must be supported.
1854 * Image views with both depth and stencil aspects are only valid for
1855 * render target attachments, in which case
1856 * cmd_buffer_emit_depth_stencil() will pick out both the depth and
1857 * stencil surfaces from the underlying surface.
1859 if (image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) {
1860 sanitized_mask
= VK_IMAGE_ASPECT_DEPTH_BIT
;
1862 assert(image
->aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
1863 sanitized_mask
= VK_IMAGE_ASPECT_STENCIL_BIT
;
1866 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
1867 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1868 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_0_BIT
;
1870 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
1871 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1872 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_1_BIT
;
1874 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
1875 assert((image
->aspects
& ~VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) == 0);
1876 sanitized_mask
= VK_IMAGE_ASPECT_PLANE_2_BIT
;
1879 unreachable("image does not have aspect");
1883 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, sanitized_mask
);
1884 return &image
->planes
[plane
].surface
;