cf2dc66597d5cd185cfd320d2fc5ebc5b0625b15
[mesa.git] / src / intel / vulkan / anv_meta_blit2d.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_meta.h"
25 #include "nir/nir_builder.h"
26
27 enum blit2d_src_type {
28 /* We can make a "normal" image view of this source and just texture
29 * from it like you would in any other shader.
30 */
31 BLIT2D_SRC_TYPE_NORMAL,
32
33 /* The source is W-tiled and we need to detile manually in the shader.
34 * This will work on any platform but is needed for all W-tiled sources
35 * prior to Broadwell.
36 */
37 BLIT2D_SRC_TYPE_W_DETILE,
38
39 BLIT2D_NUM_SRC_TYPES,
40 };
41
42 enum blit2d_dst_type {
43 /* We can bind this destination as a "normal" render target and render
44 * to it just like you would anywhere else.
45 */
46 BLIT2D_DST_TYPE_NORMAL,
47
48 /* The destination is W-tiled and we need to do the tiling manually in
49 * the shader. This is required for all W-tiled destinations.
50 *
51 * Sky Lake adds a feature for providing explicit stencil values in the
52 * shader but mesa doesn't support that yet so neither do we.
53 */
54 BLIT2D_DST_TYPE_W_TILE,
55
56 /* The destination has a 3-channel RGB format. Since we can't render to
57 * non-power-of-two textures, we have to bind it as a red texture and
58 * select the correct component for the given red pixel in the shader.
59 */
60 BLIT2D_DST_TYPE_RGB,
61
62 BLIT2D_NUM_DST_TYPES,
63 };
64
65 static VkFormat
66 vk_format_for_size(int bs)
67 {
68 /* The choice of UNORM and UINT formats is very intentional here. Most of
69 * the time, we want to use a UINT format to avoid any rounding error in
70 * the blit. For stencil blits, R8_UINT is required by the hardware.
71 * (It's the only format allowed in conjunction with W-tiling.) Also we
72 * intentionally use the 4-channel formats whenever we can. This is so
73 * that, when we do a RGB <-> RGBX copy, the two formats will line up even
74 * though one of them is 3/4 the size of the other. The choice of UNORM
75 * vs. UINT is also very intentional because Haswell doesn't handle 8 or
76 * 16-bit RGB UINT formats at all so we have to use UNORM there.
77 * Fortunately, the only time we should ever use two different formats in
78 * the table below is for RGB -> RGBA blits and so we will never have any
79 * UNORM/UINT mismatch.
80 */
81 switch (bs) {
82 case 1: return VK_FORMAT_R8_UINT;
83 case 2: return VK_FORMAT_R8G8_UINT;
84 case 3: return VK_FORMAT_R8G8B8_UNORM;
85 case 4: return VK_FORMAT_R8G8B8A8_UNORM;
86 case 6: return VK_FORMAT_R16G16B16_UNORM;
87 case 8: return VK_FORMAT_R16G16B16A16_UNORM;
88 case 12: return VK_FORMAT_R32G32B32_UINT;
89 case 16: return VK_FORMAT_R32G32B32A32_UINT;
90 default:
91 unreachable("Invalid format block size");
92 }
93 }
94
95 static void
96 create_iview(struct anv_cmd_buffer *cmd_buffer,
97 struct anv_meta_blit2d_surf *surf,
98 struct anv_meta_blit2d_rect *rect,
99 VkImageUsageFlags usage,
100 VkImage *img,
101 struct anv_image_view *iview)
102 {
103 struct isl_tile_info tile_info;
104 isl_tiling_get_info(&cmd_buffer->device->isl_dev,
105 surf->tiling, surf->bs, &tile_info);
106 const unsigned tile_width_px = tile_info.width > surf->bs ?
107 tile_info.width / surf->bs : 1;
108 uint32_t *rect_y = (usage == VK_IMAGE_USAGE_SAMPLED_BIT) ?
109 &rect->src_y : &rect->dst_y;
110 uint32_t *rect_x = (usage == VK_IMAGE_USAGE_SAMPLED_BIT) ?
111 &rect->src_x : &rect->dst_x;
112
113 /* Define the shared state among all created image views */
114 const VkImageCreateInfo image_info = {
115 .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
116 .imageType = VK_IMAGE_TYPE_2D,
117 .format = vk_format_for_size(surf->bs),
118 .extent = {
119 .width = rect->width + (*rect_x) % tile_width_px,
120 .height = rect->height + (*rect_y) % tile_info.height,
121 .depth = 1,
122 },
123 .mipLevels = 1,
124 .arrayLayers = 1,
125 .samples = 1,
126 .tiling = surf->tiling == ISL_TILING_LINEAR ?
127 VK_IMAGE_TILING_LINEAR : VK_IMAGE_TILING_OPTIMAL,
128 .usage = usage,
129 };
130
131 /* Create the VkImage that is bound to the surface's memory. */
132 anv_image_create(anv_device_to_handle(cmd_buffer->device),
133 &(struct anv_image_create_info) {
134 .vk_info = &image_info,
135 .isl_tiling_flags = 1 << surf->tiling,
136 .stride = surf->pitch,
137 }, &cmd_buffer->pool->alloc, img);
138
139 /* We could use a vk call to bind memory, but that would require
140 * creating a dummy memory object etc. so there's really no point.
141 */
142 anv_image_from_handle(*img)->bo = surf->bo;
143 anv_image_from_handle(*img)->offset = surf->base_offset;
144
145 /* Create a VkImageView that starts at the tile aligned offset closest
146 * to the provided x/y offset into the surface.
147 */
148 struct isl_surf *isl_surf = &anv_image_from_handle(*img)->color_surface.isl;
149
150 uint32_t img_o = 0;
151 isl_tiling_get_intratile_offset_el(&cmd_buffer->device->isl_dev,
152 isl_surf->tiling, surf->bs,
153 isl_surf->row_pitch,
154 *rect_x * surf->bs, *rect_y,
155 &img_o, rect_x, rect_y);
156
157 anv_image_view_init(iview, cmd_buffer->device,
158 &(VkImageViewCreateInfo) {
159 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
160 .image = *img,
161 .viewType = VK_IMAGE_VIEW_TYPE_2D,
162 .format = image_info.format,
163 .subresourceRange = {
164 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
165 .baseMipLevel = 0,
166 .levelCount = 1,
167 .baseArrayLayer = 0,
168 .layerCount = 1
169 },
170 }, cmd_buffer, img_o, usage);
171 }
172
173 struct blit2d_src_temps {
174 VkImage image;
175 struct anv_image_view iview;
176 VkDescriptorPool desc_pool;
177 VkDescriptorSet set;
178 };
179
180 static void
181 blit2d_bind_src(struct anv_cmd_buffer *cmd_buffer,
182 struct anv_meta_blit2d_surf *src,
183 enum blit2d_src_type src_type,
184 struct anv_meta_blit2d_rect *rect,
185 struct blit2d_src_temps *tmp)
186 {
187 struct anv_device *device = cmd_buffer->device;
188 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
189
190 create_iview(cmd_buffer, src, rect, VK_IMAGE_USAGE_SAMPLED_BIT,
191 &tmp->image, &tmp->iview);
192
193 anv_CreateDescriptorPool(vk_device,
194 &(const VkDescriptorPoolCreateInfo) {
195 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO,
196 .pNext = NULL,
197 .flags = 0,
198 .maxSets = 1,
199 .poolSizeCount = 1,
200 .pPoolSizes = (VkDescriptorPoolSize[]) {
201 {
202 .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
203 .descriptorCount = 1
204 },
205 }
206 }, &cmd_buffer->pool->alloc, &tmp->desc_pool);
207
208 anv_AllocateDescriptorSets(vk_device,
209 &(VkDescriptorSetAllocateInfo) {
210 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO,
211 .descriptorPool = tmp->desc_pool,
212 .descriptorSetCount = 1,
213 .pSetLayouts = &device->meta_state.blit2d.img_ds_layout
214 }, &tmp->set);
215
216 anv_UpdateDescriptorSets(vk_device,
217 1, /* writeCount */
218 (VkWriteDescriptorSet[]) {
219 {
220 .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
221 .dstSet = tmp->set,
222 .dstBinding = 0,
223 .dstArrayElement = 0,
224 .descriptorCount = 1,
225 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
226 .pImageInfo = (VkDescriptorImageInfo[]) {
227 {
228 .sampler = NULL,
229 .imageView = anv_image_view_to_handle(&tmp->iview),
230 .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
231 },
232 }
233 }
234 }, 0, NULL);
235
236 anv_CmdBindDescriptorSets(anv_cmd_buffer_to_handle(cmd_buffer),
237 VK_PIPELINE_BIND_POINT_GRAPHICS,
238 device->meta_state.blit2d.img_p_layout, 0, 1,
239 &tmp->set, 0, NULL);
240 }
241
242 static void
243 blit2d_unbind_src(struct anv_cmd_buffer *cmd_buffer,
244 enum blit2d_src_type src_type,
245 struct blit2d_src_temps *tmp)
246 {
247 anv_DestroyDescriptorPool(anv_device_to_handle(cmd_buffer->device),
248 tmp->desc_pool, &cmd_buffer->pool->alloc);
249 anv_DestroyImage(anv_device_to_handle(cmd_buffer->device),
250 tmp->image, &cmd_buffer->pool->alloc);
251 }
252
253 void
254 anv_meta_end_blit2d(struct anv_cmd_buffer *cmd_buffer,
255 struct anv_meta_saved_state *save)
256 {
257 anv_meta_restore(save, cmd_buffer);
258 }
259
260 void
261 anv_meta_begin_blit2d(struct anv_cmd_buffer *cmd_buffer,
262 struct anv_meta_saved_state *save)
263 {
264 anv_meta_save(save, cmd_buffer,
265 (1 << VK_DYNAMIC_STATE_VIEWPORT));
266 }
267
268 static void
269 bind_pipeline(struct anv_cmd_buffer *cmd_buffer,
270 enum blit2d_src_type src_type,
271 enum blit2d_dst_type dst_type)
272 {
273 VkPipeline pipeline =
274 cmd_buffer->device->meta_state.blit2d.pipelines[src_type][dst_type];
275
276 if (cmd_buffer->state.pipeline != anv_pipeline_from_handle(pipeline)) {
277 anv_CmdBindPipeline(anv_cmd_buffer_to_handle(cmd_buffer),
278 VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
279 }
280 }
281
282 static void
283 anv_meta_blit2d_normal_dst(struct anv_cmd_buffer *cmd_buffer,
284 struct anv_meta_blit2d_surf *src,
285 enum blit2d_src_type src_type,
286 struct anv_meta_blit2d_surf *dst,
287 unsigned num_rects,
288 struct anv_meta_blit2d_rect *rects)
289 {
290 struct anv_device *device = cmd_buffer->device;
291 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
292 VkImageUsageFlags dst_usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
293
294 for (unsigned r = 0; r < num_rects; ++r) {
295 struct blit2d_src_temps src_temps;
296 blit2d_bind_src(cmd_buffer, src, src_type, &rects[r], &src_temps);
297
298 VkImage dst_img;
299 struct anv_image_view dst_iview;
300 create_iview(cmd_buffer, dst, &rects[r], dst_usage, &dst_img, &dst_iview);
301
302 struct blit_vb_data {
303 float pos[2];
304 float tex_coord[3];
305 } *vb_data;
306
307 unsigned vb_size = sizeof(struct anv_vue_header) + 3 * sizeof(*vb_data);
308
309 struct anv_state vb_state =
310 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16);
311 memset(vb_state.map, 0, sizeof(struct anv_vue_header));
312 vb_data = vb_state.map + sizeof(struct anv_vue_header);
313
314 vb_data[0] = (struct blit_vb_data) {
315 .pos = {
316 rects[r].dst_x + rects[r].width,
317 rects[r].dst_y + rects[r].height,
318 },
319 .tex_coord = {
320 rects[r].src_x + rects[r].width,
321 rects[r].src_y + rects[r].height,
322 src->pitch,
323 },
324 };
325
326 vb_data[1] = (struct blit_vb_data) {
327 .pos = {
328 rects[r].dst_x,
329 rects[r].dst_y + rects[r].height,
330 },
331 .tex_coord = {
332 rects[r].src_x,
333 rects[r].src_y + rects[r].height,
334 src->pitch,
335 },
336 };
337
338 vb_data[2] = (struct blit_vb_data) {
339 .pos = {
340 rects[r].dst_x,
341 rects[r].dst_y,
342 },
343 .tex_coord = {
344 rects[r].src_x,
345 rects[r].src_y,
346 src->pitch,
347 },
348 };
349
350 anv_state_clflush(vb_state);
351
352 struct anv_buffer vertex_buffer = {
353 .device = device,
354 .size = vb_size,
355 .bo = &device->dynamic_state_block_pool.bo,
356 .offset = vb_state.offset,
357 };
358
359 anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2,
360 (VkBuffer[]) {
361 anv_buffer_to_handle(&vertex_buffer),
362 anv_buffer_to_handle(&vertex_buffer)
363 },
364 (VkDeviceSize[]) {
365 0,
366 sizeof(struct anv_vue_header),
367 });
368
369 VkFramebuffer fb;
370 anv_CreateFramebuffer(vk_device,
371 &(VkFramebufferCreateInfo) {
372 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
373 .attachmentCount = 1,
374 .pAttachments = (VkImageView[]) {
375 anv_image_view_to_handle(&dst_iview),
376 },
377 .width = dst_iview.extent.width,
378 .height = dst_iview.extent.height,
379 .layers = 1
380 }, &cmd_buffer->pool->alloc, &fb);
381
382 ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
383 &(VkRenderPassBeginInfo) {
384 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
385 .renderPass = device->meta_state.blit2d.render_pass,
386 .framebuffer = fb,
387 .renderArea = {
388 .offset = { rects[r].dst_x, rects[r].dst_y, },
389 .extent = { rects[r].width, rects[r].height },
390 },
391 .clearValueCount = 0,
392 .pClearValues = NULL,
393 }, VK_SUBPASS_CONTENTS_INLINE);
394
395 bind_pipeline(cmd_buffer, src_type, BLIT2D_DST_TYPE_NORMAL);
396
397 anv_CmdSetViewport(anv_cmd_buffer_to_handle(cmd_buffer), 0, 1,
398 &(VkViewport) {
399 .x = 0.0f,
400 .y = 0.0f,
401 .width = dst_iview.extent.width,
402 .height = dst_iview.extent.height,
403 .minDepth = 0.0f,
404 .maxDepth = 1.0f,
405 });
406
407 ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
408
409 ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
410
411 /* At the point where we emit the draw call, all data from the
412 * descriptor sets, etc. has been used. We are free to delete it.
413 */
414 blit2d_unbind_src(cmd_buffer, src_type, &src_temps);
415 anv_DestroyFramebuffer(vk_device, fb, &cmd_buffer->pool->alloc);
416 anv_DestroyImage(vk_device, dst_img, &cmd_buffer->pool->alloc);
417 }
418 }
419
420 void
421 anv_meta_blit2d(struct anv_cmd_buffer *cmd_buffer,
422 struct anv_meta_blit2d_surf *src,
423 struct anv_meta_blit2d_surf *dst,
424 unsigned num_rects,
425 struct anv_meta_blit2d_rect *rects)
426 {
427 enum blit2d_src_type src_type;
428 if (src->tiling == ISL_TILING_W && cmd_buffer->device->info.gen < 8) {
429 src_type = BLIT2D_SRC_TYPE_W_DETILE;
430 } else {
431 src_type = BLIT2D_SRC_TYPE_NORMAL;
432 }
433
434 if (dst->tiling == ISL_TILING_W) {
435 assert(dst->bs == 1);
436 anv_finishme("Blitting to w-tiled destinations not yet supported");
437 return;
438 } else if (dst->bs % 3 == 0) {
439 anv_finishme("Blitting to RGB destinations not yet supported");
440 return;
441 } else {
442 assert(util_is_power_of_two(dst->bs));
443 anv_meta_blit2d_normal_dst(cmd_buffer, src, src_type, dst,
444 num_rects, rects);
445 }
446 }
447
448 static nir_shader *
449 build_nir_vertex_shader(void)
450 {
451 const struct glsl_type *vec4 = glsl_vec4_type();
452 nir_builder b;
453
454 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
455 b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_vs");
456
457 nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in,
458 vec4, "a_pos");
459 pos_in->data.location = VERT_ATTRIB_GENERIC0;
460 nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out,
461 vec4, "gl_Position");
462 pos_out->data.location = VARYING_SLOT_POS;
463 nir_copy_var(&b, pos_out, pos_in);
464
465 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in,
466 vec4, "a_tex_pos");
467 tex_pos_in->data.location = VERT_ATTRIB_GENERIC1;
468 nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out,
469 vec4, "v_tex_pos");
470 tex_pos_out->data.location = VARYING_SLOT_VAR0;
471 tex_pos_out->data.interpolation = INTERP_QUALIFIER_SMOOTH;
472 nir_copy_var(&b, tex_pos_out, tex_pos_in);
473
474 return b.shader;
475 }
476
477 typedef nir_ssa_def* (*texel_fetch_build_func)(struct nir_builder *,
478 struct anv_device *,
479 nir_ssa_def *, nir_ssa_def *);
480
481 static nir_ssa_def *
482 build_nir_texel_fetch(struct nir_builder *b, struct anv_device *device,
483 nir_ssa_def *tex_pos, nir_ssa_def *tex_pitch)
484 {
485 const struct glsl_type *sampler_type =
486 glsl_sampler_type(GLSL_SAMPLER_DIM_2D, false, false, GLSL_TYPE_FLOAT);
487 nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform,
488 sampler_type, "s_tex");
489 sampler->data.descriptor_set = 0;
490 sampler->data.binding = 0;
491
492 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
493 tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
494 tex->op = nir_texop_txf;
495 tex->src[0].src_type = nir_tex_src_coord;
496 tex->src[0].src = nir_src_for_ssa(tex_pos);
497 tex->src[1].src_type = nir_tex_src_lod;
498 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
499 tex->dest_type = nir_type_float; /* TODO */
500 tex->is_array = false;
501 tex->coord_components = 2;
502 tex->texture = nir_deref_var_create(tex, sampler);
503 tex->sampler = NULL;
504
505 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
506 nir_builder_instr_insert(b, &tex->instr);
507
508 return &tex->dest.ssa;
509 }
510
511 static nir_shader *
512 build_nir_copy_fragment_shader(struct anv_device *device,
513 texel_fetch_build_func txf_func)
514 {
515 const struct glsl_type *vec4 = glsl_vec4_type();
516 const struct glsl_type *vec3 = glsl_vector_type(GLSL_TYPE_FLOAT, 3);
517 nir_builder b;
518
519 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
520 b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs");
521
522 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in,
523 vec3, "v_tex_pos");
524 tex_pos_in->data.location = VARYING_SLOT_VAR0;
525
526 nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
527 vec4, "f_color");
528 color_out->data.location = FRAG_RESULT_DATA0;
529
530 nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in));
531 unsigned swiz[4] = { 0, 1 };
532 nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false);
533 nir_ssa_def *tex_pitch = nir_channel(&b, pos_int, 2);
534
535 nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch);
536 nir_store_var(&b, color_out, color, 0xf);
537
538 return b.shader;
539 }
540
541 void
542 anv_device_finish_meta_blit2d_state(struct anv_device *device)
543 {
544 if (device->meta_state.blit2d.render_pass) {
545 anv_DestroyRenderPass(anv_device_to_handle(device),
546 device->meta_state.blit2d.render_pass,
547 &device->meta_state.alloc);
548 }
549
550 if (device->meta_state.blit2d.img_p_layout) {
551 anv_DestroyPipelineLayout(anv_device_to_handle(device),
552 device->meta_state.blit2d.img_p_layout,
553 &device->meta_state.alloc);
554 }
555
556 if (device->meta_state.blit2d.img_ds_layout) {
557 anv_DestroyDescriptorSetLayout(anv_device_to_handle(device),
558 device->meta_state.blit2d.img_ds_layout,
559 &device->meta_state.alloc);
560 }
561
562 if (device->meta_state.blit2d.buf_p_layout) {
563 anv_DestroyPipelineLayout(anv_device_to_handle(device),
564 device->meta_state.blit2d.buf_p_layout,
565 &device->meta_state.alloc);
566 }
567
568 if (device->meta_state.blit2d.buf_ds_layout) {
569 anv_DestroyDescriptorSetLayout(anv_device_to_handle(device),
570 device->meta_state.blit2d.buf_ds_layout,
571 &device->meta_state.alloc);
572 }
573
574 for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
575 for (unsigned dst = 0; dst < BLIT2D_NUM_DST_TYPES; dst++) {
576 if (device->meta_state.blit2d.pipelines[src][dst]) {
577 anv_DestroyPipeline(anv_device_to_handle(device),
578 device->meta_state.blit2d.pipelines[src][dst],
579 &device->meta_state.alloc);
580 }
581 }
582 }
583 }
584
585 static VkResult
586 blit2d_init_pipeline(struct anv_device *device,
587 enum blit2d_src_type src_type,
588 enum blit2d_dst_type dst_type)
589 {
590 VkResult result;
591
592 texel_fetch_build_func src_func;
593 switch (src_type) {
594 case BLIT2D_SRC_TYPE_NORMAL:
595 src_func = build_nir_texel_fetch;
596 break;
597 case BLIT2D_SRC_TYPE_W_DETILE:
598 /* Not yet supported */
599 default:
600 return VK_SUCCESS;
601 }
602
603 struct anv_shader_module fs = { .nir = NULL };
604 switch (dst_type) {
605 case BLIT2D_DST_TYPE_NORMAL:
606 fs.nir = build_nir_copy_fragment_shader(device, src_func);
607 break;
608 case BLIT2D_DST_TYPE_W_TILE:
609 case BLIT2D_DST_TYPE_RGB:
610 /* Not yet supported */
611 default:
612 return VK_SUCCESS;
613 }
614
615 /* We don't use a vertex shader for blitting, but instead build and pass
616 * the VUEs directly to the rasterization backend. However, we do need
617 * to provide GLSL source for the vertex shader so that the compiler
618 * does not dead-code our inputs.
619 */
620 struct anv_shader_module vs = {
621 .nir = build_nir_vertex_shader(),
622 };
623
624 VkPipelineVertexInputStateCreateInfo vi_create_info = {
625 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
626 .vertexBindingDescriptionCount = 2,
627 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
628 {
629 .binding = 0,
630 .stride = 0,
631 .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
632 },
633 {
634 .binding = 1,
635 .stride = 5 * sizeof(float),
636 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
637 },
638 },
639 .vertexAttributeDescriptionCount = 3,
640 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
641 {
642 /* VUE Header */
643 .location = 0,
644 .binding = 0,
645 .format = VK_FORMAT_R32G32B32A32_UINT,
646 .offset = 0
647 },
648 {
649 /* Position */
650 .location = 1,
651 .binding = 1,
652 .format = VK_FORMAT_R32G32_SFLOAT,
653 .offset = 0
654 },
655 {
656 /* Texture Coordinate */
657 .location = 2,
658 .binding = 1,
659 .format = VK_FORMAT_R32G32B32_SFLOAT,
660 .offset = 8
661 }
662 }
663 };
664
665 VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
666 {
667 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
668 .stage = VK_SHADER_STAGE_VERTEX_BIT,
669 .module = anv_shader_module_to_handle(&vs),
670 .pName = "main",
671 .pSpecializationInfo = NULL
672 }, {
673 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
674 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
675 .module = anv_shader_module_to_handle(&fs),
676 .pName = "main",
677 .pSpecializationInfo = NULL
678 },
679 };
680
681 const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
682 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
683 .stageCount = ARRAY_SIZE(pipeline_shader_stages),
684 .pStages = pipeline_shader_stages,
685 .pVertexInputState = &vi_create_info,
686 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
687 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
688 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
689 .primitiveRestartEnable = false,
690 },
691 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
692 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
693 .viewportCount = 1,
694 .scissorCount = 1,
695 },
696 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
697 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
698 .rasterizerDiscardEnable = false,
699 .polygonMode = VK_POLYGON_MODE_FILL,
700 .cullMode = VK_CULL_MODE_NONE,
701 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
702 },
703 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
704 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
705 .rasterizationSamples = 1,
706 .sampleShadingEnable = false,
707 .pSampleMask = (VkSampleMask[]) { UINT32_MAX },
708 },
709 .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
710 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
711 .attachmentCount = 1,
712 .pAttachments = (VkPipelineColorBlendAttachmentState []) {
713 { .colorWriteMask =
714 VK_COLOR_COMPONENT_A_BIT |
715 VK_COLOR_COMPONENT_R_BIT |
716 VK_COLOR_COMPONENT_G_BIT |
717 VK_COLOR_COMPONENT_B_BIT },
718 }
719 },
720 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
721 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
722 .dynamicStateCount = 9,
723 .pDynamicStates = (VkDynamicState[]) {
724 VK_DYNAMIC_STATE_VIEWPORT,
725 VK_DYNAMIC_STATE_SCISSOR,
726 VK_DYNAMIC_STATE_LINE_WIDTH,
727 VK_DYNAMIC_STATE_DEPTH_BIAS,
728 VK_DYNAMIC_STATE_BLEND_CONSTANTS,
729 VK_DYNAMIC_STATE_DEPTH_BOUNDS,
730 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
731 VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
732 VK_DYNAMIC_STATE_STENCIL_REFERENCE,
733 },
734 },
735 .flags = 0,
736 .layout = device->meta_state.blit2d.img_p_layout,
737 .renderPass = device->meta_state.blit2d.render_pass,
738 .subpass = 0,
739 };
740
741 const struct anv_graphics_pipeline_create_info anv_pipeline_info = {
742 .color_attachment_count = -1,
743 .use_repclear = false,
744 .disable_viewport = true,
745 .disable_scissor = true,
746 .disable_vs = true,
747 .use_rectlist = true
748 };
749
750 result = anv_graphics_pipeline_create(anv_device_to_handle(device),
751 VK_NULL_HANDLE,
752 &vk_pipeline_info, &anv_pipeline_info,
753 &device->meta_state.alloc,
754 &device->meta_state.blit2d.pipelines[src_type][dst_type]);
755
756 ralloc_free(vs.nir);
757 ralloc_free(fs.nir);
758
759 return result;
760 }
761
762 VkResult
763 anv_device_init_meta_blit2d_state(struct anv_device *device)
764 {
765 VkResult result;
766
767 zero(device->meta_state.blit2d);
768
769 result = anv_CreateRenderPass(anv_device_to_handle(device),
770 &(VkRenderPassCreateInfo) {
771 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
772 .attachmentCount = 1,
773 .pAttachments = &(VkAttachmentDescription) {
774 .format = VK_FORMAT_UNDEFINED, /* Our shaders don't care */
775 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
776 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
777 .initialLayout = VK_IMAGE_LAYOUT_GENERAL,
778 .finalLayout = VK_IMAGE_LAYOUT_GENERAL,
779 },
780 .subpassCount = 1,
781 .pSubpasses = &(VkSubpassDescription) {
782 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
783 .inputAttachmentCount = 0,
784 .colorAttachmentCount = 1,
785 .pColorAttachments = &(VkAttachmentReference) {
786 .attachment = 0,
787 .layout = VK_IMAGE_LAYOUT_GENERAL,
788 },
789 .pResolveAttachments = NULL,
790 .pDepthStencilAttachment = &(VkAttachmentReference) {
791 .attachment = VK_ATTACHMENT_UNUSED,
792 .layout = VK_IMAGE_LAYOUT_GENERAL,
793 },
794 .preserveAttachmentCount = 1,
795 .pPreserveAttachments = (uint32_t[]) { 0 },
796 },
797 .dependencyCount = 0,
798 }, &device->meta_state.alloc, &device->meta_state.blit2d.render_pass);
799 if (result != VK_SUCCESS)
800 goto fail;
801
802 result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device),
803 &(VkDescriptorSetLayoutCreateInfo) {
804 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
805 .bindingCount = 1,
806 .pBindings = (VkDescriptorSetLayoutBinding[]) {
807 {
808 .binding = 0,
809 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
810 .descriptorCount = 1,
811 .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
812 .pImmutableSamplers = NULL
813 },
814 }
815 }, &device->meta_state.alloc, &device->meta_state.blit2d.img_ds_layout);
816 if (result != VK_SUCCESS)
817 goto fail;
818
819 result = anv_CreatePipelineLayout(anv_device_to_handle(device),
820 &(VkPipelineLayoutCreateInfo) {
821 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
822 .setLayoutCount = 1,
823 .pSetLayouts = &device->meta_state.blit2d.img_ds_layout,
824 },
825 &device->meta_state.alloc, &device->meta_state.blit2d.img_p_layout);
826 if (result != VK_SUCCESS)
827 goto fail;
828
829 result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device),
830 &(VkDescriptorSetLayoutCreateInfo) {
831 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
832 .bindingCount = 1,
833 .pBindings = (VkDescriptorSetLayoutBinding[]) {
834 {
835 .binding = 0,
836 .descriptorType = VK_DESCRIPTOR_TYPE_UNIFORM_TEXEL_BUFFER,
837 .descriptorCount = 1,
838 .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
839 .pImmutableSamplers = NULL
840 },
841 }
842 }, &device->meta_state.alloc, &device->meta_state.blit2d.buf_ds_layout);
843 if (result != VK_SUCCESS)
844 goto fail;
845
846 result = anv_CreatePipelineLayout(anv_device_to_handle(device),
847 &(VkPipelineLayoutCreateInfo) {
848 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
849 .setLayoutCount = 1,
850 .pSetLayouts = &device->meta_state.blit2d.buf_ds_layout,
851 },
852 &device->meta_state.alloc, &device->meta_state.blit2d.buf_p_layout);
853 if (result != VK_SUCCESS)
854 goto fail;
855
856 for (unsigned src = 0; src < BLIT2D_NUM_SRC_TYPES; src++) {
857 for (unsigned dst = 0; dst < BLIT2D_NUM_DST_TYPES; dst++) {
858 result = blit2d_init_pipeline(device, src, dst);
859 if (result != VK_SUCCESS)
860 goto fail;
861 }
862 }
863
864 return VK_SUCCESS;
865
866 fail:
867 anv_device_finish_meta_blit2d_state(device);
868 return result;
869 }