fc72f7808f88eb3eee4092763fc566e2b685645b
[mesa.git] / src / intel / vulkan / anv_meta_blit2d.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_meta.h"
25 #include "nir/nir_builder.h"
26
27 static VkFormat
28 vk_format_for_size(int bs)
29 {
30 /* The choice of UNORM and UINT formats is very intentional here. Most of
31 * the time, we want to use a UINT format to avoid any rounding error in
32 * the blit. For stencil blits, R8_UINT is required by the hardware.
33 * (It's the only format allowed in conjunction with W-tiling.) Also we
34 * intentionally use the 4-channel formats whenever we can. This is so
35 * that, when we do a RGB <-> RGBX copy, the two formats will line up even
36 * though one of them is 3/4 the size of the other. The choice of UNORM
37 * vs. UINT is also very intentional because Haswell doesn't handle 8 or
38 * 16-bit RGB UINT formats at all so we have to use UNORM there.
39 * Fortunately, the only time we should ever use two different formats in
40 * the table below is for RGB -> RGBA blits and so we will never have any
41 * UNORM/UINT mismatch.
42 */
43 switch (bs) {
44 case 1: return VK_FORMAT_R8_UINT;
45 case 2: return VK_FORMAT_R8G8_UINT;
46 case 3: return VK_FORMAT_R8G8B8_UNORM;
47 case 4: return VK_FORMAT_R8G8B8A8_UNORM;
48 case 6: return VK_FORMAT_R16G16B16_UNORM;
49 case 8: return VK_FORMAT_R16G16B16A16_UNORM;
50 case 12: return VK_FORMAT_R32G32B32_UINT;
51 case 16: return VK_FORMAT_R32G32B32A32_UINT;
52 default:
53 unreachable("Invalid format block size");
54 }
55 }
56
57 static void
58 create_iview(struct anv_cmd_buffer *cmd_buffer,
59 struct anv_meta_blit2d_surf *surf,
60 struct anv_meta_blit2d_rect *rect,
61 VkImageUsageFlags usage,
62 VkImage *img,
63 struct anv_image_view *iview)
64 {
65 struct isl_tile_info tile_info;
66 isl_tiling_get_info(&cmd_buffer->device->isl_dev,
67 surf->tiling, surf->bs, &tile_info);
68 const unsigned tile_width_px = tile_info.width > surf->bs ?
69 tile_info.width / surf->bs : 1;
70 uint32_t *rect_y = (usage == VK_IMAGE_USAGE_SAMPLED_BIT) ?
71 &rect->src_y : &rect->dst_y;
72 uint32_t *rect_x = (usage == VK_IMAGE_USAGE_SAMPLED_BIT) ?
73 &rect->src_x : &rect->dst_x;
74
75 /* Define the shared state among all created image views */
76 const VkImageCreateInfo image_info = {
77 .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
78 .imageType = VK_IMAGE_TYPE_2D,
79 .format = vk_format_for_size(surf->bs),
80 .extent = {
81 .width = rect->width + (*rect_x) % tile_width_px,
82 .height = rect->height + (*rect_y) % tile_info.height,
83 .depth = 1,
84 },
85 .mipLevels = 1,
86 .arrayLayers = 1,
87 .samples = 1,
88 .tiling = surf->tiling == ISL_TILING_LINEAR ?
89 VK_IMAGE_TILING_LINEAR : VK_IMAGE_TILING_OPTIMAL,
90 .usage = usage,
91 };
92
93 /* Create the VkImage that is bound to the surface's memory. */
94 anv_image_create(anv_device_to_handle(cmd_buffer->device),
95 &(struct anv_image_create_info) {
96 .vk_info = &image_info,
97 .isl_tiling_flags = 1 << surf->tiling,
98 .stride = surf->pitch,
99 }, &cmd_buffer->pool->alloc, img);
100
101 /* We could use a vk call to bind memory, but that would require
102 * creating a dummy memory object etc. so there's really no point.
103 */
104 anv_image_from_handle(*img)->bo = surf->bo;
105 anv_image_from_handle(*img)->offset = surf->base_offset;
106
107 /* Create a VkImageView that starts at the tile aligned offset closest
108 * to the provided x/y offset into the surface.
109 */
110 uint32_t img_o = 0;
111 isl_surf_get_image_intratile_offset_el_xy(&cmd_buffer->device->isl_dev,
112 &anv_image_from_handle(*img)->
113 color_surface.isl,
114 *rect_x, *rect_y,
115 &img_o, rect_x, rect_y);
116 anv_image_view_init(iview, cmd_buffer->device,
117 &(VkImageViewCreateInfo) {
118 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
119 .image = *img,
120 .viewType = VK_IMAGE_VIEW_TYPE_2D,
121 .format = image_info.format,
122 .subresourceRange = {
123 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
124 .baseMipLevel = 0,
125 .levelCount = 1,
126 .baseArrayLayer = 0,
127 .layerCount = 1
128 },
129 }, cmd_buffer, img_o, usage);
130 }
131
132 void
133 anv_meta_end_blit2d(struct anv_cmd_buffer *cmd_buffer,
134 struct anv_meta_saved_state *save)
135 {
136 anv_meta_restore(save, cmd_buffer);
137 }
138
139 void
140 anv_meta_begin_blit2d(struct anv_cmd_buffer *cmd_buffer,
141 struct anv_meta_saved_state *save)
142 {
143 anv_meta_save(save, cmd_buffer,
144 (1 << VK_DYNAMIC_STATE_VIEWPORT));
145 }
146
147 void
148 anv_meta_blit2d(struct anv_cmd_buffer *cmd_buffer,
149 struct anv_meta_blit2d_surf *src,
150 struct anv_meta_blit2d_surf *dst,
151 unsigned num_rects,
152 struct anv_meta_blit2d_rect *rects)
153 {
154 struct anv_device *device = cmd_buffer->device;
155 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
156 VkImageUsageFlags src_usage = VK_IMAGE_USAGE_SAMPLED_BIT;
157 VkImageUsageFlags dst_usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
158
159 for (unsigned r = 0; r < num_rects; ++r) {
160 VkImage src_img;
161 VkImage dst_img;
162 struct anv_image_view src_iview;
163 struct anv_image_view dst_iview;
164 create_iview(cmd_buffer, src, &rects[r], src_usage, &src_img, &src_iview);
165 create_iview(cmd_buffer, dst, &rects[r], dst_usage, &dst_img, &dst_iview);
166
167 struct blit_vb_data {
168 float pos[2];
169 float tex_coord[3];
170 } *vb_data;
171
172 unsigned vb_size = sizeof(struct anv_vue_header) + 3 * sizeof(*vb_data);
173
174 struct anv_state vb_state =
175 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, vb_size, 16);
176 memset(vb_state.map, 0, sizeof(struct anv_vue_header));
177 vb_data = vb_state.map + sizeof(struct anv_vue_header);
178
179 vb_data[0] = (struct blit_vb_data) {
180 .pos = {
181 rects[r].dst_x + rects[r].width,
182 rects[r].dst_y + rects[r].height,
183 },
184 .tex_coord = {
185 rects[r].src_x + rects[r].width,
186 rects[r].src_y + rects[r].height,
187 src->pitch,
188 },
189 };
190
191 vb_data[1] = (struct blit_vb_data) {
192 .pos = {
193 rects[r].dst_x,
194 rects[r].dst_y + rects[r].height,
195 },
196 .tex_coord = {
197 rects[r].src_x,
198 rects[r].src_y + rects[r].height,
199 src->pitch,
200 },
201 };
202
203 vb_data[2] = (struct blit_vb_data) {
204 .pos = {
205 rects[r].dst_x,
206 rects[r].dst_y,
207 },
208 .tex_coord = {
209 rects[r].src_x,
210 rects[r].src_y,
211 src->pitch,
212 },
213 };
214
215 anv_state_clflush(vb_state);
216
217 struct anv_buffer vertex_buffer = {
218 .device = device,
219 .size = vb_size,
220 .bo = &device->dynamic_state_block_pool.bo,
221 .offset = vb_state.offset,
222 };
223
224 anv_CmdBindVertexBuffers(anv_cmd_buffer_to_handle(cmd_buffer), 0, 2,
225 (VkBuffer[]) {
226 anv_buffer_to_handle(&vertex_buffer),
227 anv_buffer_to_handle(&vertex_buffer)
228 },
229 (VkDeviceSize[]) {
230 0,
231 sizeof(struct anv_vue_header),
232 });
233
234 VkDescriptorPool desc_pool;
235 anv_CreateDescriptorPool(vk_device,
236 &(const VkDescriptorPoolCreateInfo) {
237 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_POOL_CREATE_INFO,
238 .pNext = NULL,
239 .flags = 0,
240 .maxSets = 1,
241 .poolSizeCount = 1,
242 .pPoolSizes = (VkDescriptorPoolSize[]) {
243 {
244 .type = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
245 .descriptorCount = 1
246 },
247 }
248 }, &cmd_buffer->pool->alloc, &desc_pool);
249
250 VkDescriptorSet set;
251 anv_AllocateDescriptorSets(vk_device,
252 &(VkDescriptorSetAllocateInfo) {
253 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_ALLOCATE_INFO,
254 .descriptorPool = desc_pool,
255 .descriptorSetCount = 1,
256 .pSetLayouts = &device->meta_state.blit2d.ds_layout
257 }, &set);
258
259 anv_UpdateDescriptorSets(vk_device,
260 1, /* writeCount */
261 (VkWriteDescriptorSet[]) {
262 {
263 .sType = VK_STRUCTURE_TYPE_WRITE_DESCRIPTOR_SET,
264 .dstSet = set,
265 .dstBinding = 0,
266 .dstArrayElement = 0,
267 .descriptorCount = 1,
268 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
269 .pImageInfo = (VkDescriptorImageInfo[]) {
270 {
271 .sampler = NULL,
272 .imageView = anv_image_view_to_handle(&src_iview),
273 .imageLayout = VK_IMAGE_LAYOUT_GENERAL,
274 },
275 }
276 }
277 }, 0, NULL);
278
279 VkFramebuffer fb;
280 anv_CreateFramebuffer(vk_device,
281 &(VkFramebufferCreateInfo) {
282 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
283 .attachmentCount = 1,
284 .pAttachments = (VkImageView[]) {
285 anv_image_view_to_handle(&dst_iview),
286 },
287 .width = dst_iview.extent.width,
288 .height = dst_iview.extent.height,
289 .layers = 1
290 }, &cmd_buffer->pool->alloc, &fb);
291
292 ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
293 &(VkRenderPassBeginInfo) {
294 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
295 .renderPass = device->meta_state.blit2d.render_pass,
296 .framebuffer = fb,
297 .renderArea = {
298 .offset = { rects[r].dst_x, rects[r].dst_y, },
299 .extent = { rects[r].width, rects[r].height },
300 },
301 .clearValueCount = 0,
302 .pClearValues = NULL,
303 }, VK_SUBPASS_CONTENTS_INLINE);
304
305 VkPipeline pipeline = device->meta_state.blit2d.pipeline_2d_src;
306
307 if (cmd_buffer->state.pipeline != anv_pipeline_from_handle(pipeline)) {
308 anv_CmdBindPipeline(anv_cmd_buffer_to_handle(cmd_buffer),
309 VK_PIPELINE_BIND_POINT_GRAPHICS, pipeline);
310 }
311
312 anv_CmdSetViewport(anv_cmd_buffer_to_handle(cmd_buffer), 0, 1,
313 &(VkViewport) {
314 .x = 0.0f,
315 .y = 0.0f,
316 .width = dst_iview.extent.width,
317 .height = dst_iview.extent.height,
318 .minDepth = 0.0f,
319 .maxDepth = 1.0f,
320 });
321
322 anv_CmdBindDescriptorSets(anv_cmd_buffer_to_handle(cmd_buffer),
323 VK_PIPELINE_BIND_POINT_GRAPHICS,
324 device->meta_state.blit2d.pipeline_layout, 0, 1,
325 &set, 0, NULL);
326
327 ANV_CALL(CmdDraw)(anv_cmd_buffer_to_handle(cmd_buffer), 3, 1, 0, 0);
328
329 ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
330
331 /* At the point where we emit the draw call, all data from the
332 * descriptor sets, etc. has been used. We are free to delete it.
333 */
334 anv_DestroyDescriptorPool(vk_device, desc_pool, &cmd_buffer->pool->alloc);
335 anv_DestroyFramebuffer(vk_device, fb, &cmd_buffer->pool->alloc);
336
337 anv_DestroyImage(vk_device, src_img, &cmd_buffer->pool->alloc);
338 anv_DestroyImage(vk_device, dst_img, &cmd_buffer->pool->alloc);
339 }
340 }
341
342
343 static nir_shader *
344 build_nir_vertex_shader(void)
345 {
346 const struct glsl_type *vec4 = glsl_vec4_type();
347 nir_builder b;
348
349 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
350 b.shader->info.name = ralloc_strdup(b.shader, "meta_blit_vs");
351
352 nir_variable *pos_in = nir_variable_create(b.shader, nir_var_shader_in,
353 vec4, "a_pos");
354 pos_in->data.location = VERT_ATTRIB_GENERIC0;
355 nir_variable *pos_out = nir_variable_create(b.shader, nir_var_shader_out,
356 vec4, "gl_Position");
357 pos_out->data.location = VARYING_SLOT_POS;
358 nir_copy_var(&b, pos_out, pos_in);
359
360 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in,
361 vec4, "a_tex_pos");
362 tex_pos_in->data.location = VERT_ATTRIB_GENERIC1;
363 nir_variable *tex_pos_out = nir_variable_create(b.shader, nir_var_shader_out,
364 vec4, "v_tex_pos");
365 tex_pos_out->data.location = VARYING_SLOT_VAR0;
366 tex_pos_out->data.interpolation = INTERP_QUALIFIER_SMOOTH;
367 nir_copy_var(&b, tex_pos_out, tex_pos_in);
368
369 return b.shader;
370 }
371
372 typedef nir_ssa_def* (*texel_fetch_build_func)(struct nir_builder *,
373 struct anv_device *,
374 nir_ssa_def *, nir_ssa_def *);
375
376 static nir_ssa_def *
377 build_nir_texel_fetch(struct nir_builder *b, struct anv_device *device,
378 nir_ssa_def *tex_pos, nir_ssa_def *tex_pitch)
379 {
380 const struct glsl_type *sampler_type =
381 glsl_sampler_type(GLSL_SAMPLER_DIM_2D, false, false, GLSL_TYPE_FLOAT);
382 nir_variable *sampler = nir_variable_create(b->shader, nir_var_uniform,
383 sampler_type, "s_tex");
384 sampler->data.descriptor_set = 0;
385 sampler->data.binding = 0;
386
387 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
388 tex->sampler_dim = GLSL_SAMPLER_DIM_2D;
389 tex->op = nir_texop_txf;
390 tex->src[0].src_type = nir_tex_src_coord;
391 tex->src[0].src = nir_src_for_ssa(tex_pos);
392 tex->src[1].src_type = nir_tex_src_lod;
393 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
394 tex->dest_type = nir_type_float; /* TODO */
395 tex->is_array = false;
396 tex->coord_components = 2;
397 tex->texture = nir_deref_var_create(tex, sampler);
398 tex->sampler = NULL;
399
400 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
401 nir_builder_instr_insert(b, &tex->instr);
402
403 return &tex->dest.ssa;
404 }
405
406 static nir_shader *
407 build_nir_copy_fragment_shader(struct anv_device *device,
408 texel_fetch_build_func txf_func)
409 {
410 const struct glsl_type *vec4 = glsl_vec4_type();
411 const struct glsl_type *vec3 = glsl_vector_type(GLSL_TYPE_FLOAT, 3);
412 nir_builder b;
413
414 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
415 b.shader->info.name = ralloc_strdup(b.shader, "meta_blit2d_fs");
416
417 nir_variable *tex_pos_in = nir_variable_create(b.shader, nir_var_shader_in,
418 vec3, "v_tex_pos");
419 tex_pos_in->data.location = VARYING_SLOT_VAR0;
420
421 nir_variable *color_out = nir_variable_create(b.shader, nir_var_shader_out,
422 vec4, "f_color");
423 color_out->data.location = FRAG_RESULT_DATA0;
424
425 nir_ssa_def *pos_int = nir_f2i(&b, nir_load_var(&b, tex_pos_in));
426 unsigned swiz[4] = { 0, 1 };
427 nir_ssa_def *tex_pos = nir_swizzle(&b, pos_int, swiz, 2, false);
428 nir_ssa_def *tex_pitch = nir_channel(&b, pos_int, 2);
429
430 nir_ssa_def *color = txf_func(&b, device, tex_pos, tex_pitch);
431 nir_store_var(&b, color_out, color, 0xf);
432
433 return b.shader;
434 }
435
436 void
437 anv_device_finish_meta_blit2d_state(struct anv_device *device)
438 {
439 anv_DestroyRenderPass(anv_device_to_handle(device),
440 device->meta_state.blit2d.render_pass,
441 &device->meta_state.alloc);
442 anv_DestroyPipeline(anv_device_to_handle(device),
443 device->meta_state.blit2d.pipeline_2d_src,
444 &device->meta_state.alloc);
445 anv_DestroyPipelineLayout(anv_device_to_handle(device),
446 device->meta_state.blit2d.pipeline_layout,
447 &device->meta_state.alloc);
448 anv_DestroyDescriptorSetLayout(anv_device_to_handle(device),
449 device->meta_state.blit2d.ds_layout,
450 &device->meta_state.alloc);
451 }
452
453 VkResult
454 anv_device_init_meta_blit2d_state(struct anv_device *device)
455 {
456 VkResult result;
457
458 result = anv_CreateRenderPass(anv_device_to_handle(device),
459 &(VkRenderPassCreateInfo) {
460 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
461 .attachmentCount = 1,
462 .pAttachments = &(VkAttachmentDescription) {
463 .format = VK_FORMAT_UNDEFINED, /* Our shaders don't care */
464 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
465 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
466 .initialLayout = VK_IMAGE_LAYOUT_GENERAL,
467 .finalLayout = VK_IMAGE_LAYOUT_GENERAL,
468 },
469 .subpassCount = 1,
470 .pSubpasses = &(VkSubpassDescription) {
471 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
472 .inputAttachmentCount = 0,
473 .colorAttachmentCount = 1,
474 .pColorAttachments = &(VkAttachmentReference) {
475 .attachment = 0,
476 .layout = VK_IMAGE_LAYOUT_GENERAL,
477 },
478 .pResolveAttachments = NULL,
479 .pDepthStencilAttachment = &(VkAttachmentReference) {
480 .attachment = VK_ATTACHMENT_UNUSED,
481 .layout = VK_IMAGE_LAYOUT_GENERAL,
482 },
483 .preserveAttachmentCount = 1,
484 .pPreserveAttachments = (uint32_t[]) { 0 },
485 },
486 .dependencyCount = 0,
487 }, &device->meta_state.alloc, &device->meta_state.blit2d.render_pass);
488 if (result != VK_SUCCESS)
489 goto fail;
490
491 /* We don't use a vertex shader for blitting, but instead build and pass
492 * the VUEs directly to the rasterization backend. However, we do need
493 * to provide GLSL source for the vertex shader so that the compiler
494 * does not dead-code our inputs.
495 */
496 struct anv_shader_module vs = {
497 .nir = build_nir_vertex_shader(),
498 };
499
500 struct anv_shader_module fs_2d = {
501 .nir = build_nir_copy_fragment_shader(device, build_nir_texel_fetch),
502 };
503
504 VkPipelineVertexInputStateCreateInfo vi_create_info = {
505 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
506 .vertexBindingDescriptionCount = 2,
507 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
508 {
509 .binding = 0,
510 .stride = 0,
511 .inputRate = VK_VERTEX_INPUT_RATE_INSTANCE
512 },
513 {
514 .binding = 1,
515 .stride = 5 * sizeof(float),
516 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
517 },
518 },
519 .vertexAttributeDescriptionCount = 3,
520 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
521 {
522 /* VUE Header */
523 .location = 0,
524 .binding = 0,
525 .format = VK_FORMAT_R32G32B32A32_UINT,
526 .offset = 0
527 },
528 {
529 /* Position */
530 .location = 1,
531 .binding = 1,
532 .format = VK_FORMAT_R32G32_SFLOAT,
533 .offset = 0
534 },
535 {
536 /* Texture Coordinate */
537 .location = 2,
538 .binding = 1,
539 .format = VK_FORMAT_R32G32B32_SFLOAT,
540 .offset = 8
541 }
542 }
543 };
544
545 VkDescriptorSetLayoutCreateInfo ds_layout_info = {
546 .sType = VK_STRUCTURE_TYPE_DESCRIPTOR_SET_LAYOUT_CREATE_INFO,
547 .bindingCount = 1,
548 .pBindings = (VkDescriptorSetLayoutBinding[]) {
549 {
550 .binding = 0,
551 .descriptorType = VK_DESCRIPTOR_TYPE_SAMPLED_IMAGE,
552 .descriptorCount = 1,
553 .stageFlags = VK_SHADER_STAGE_FRAGMENT_BIT,
554 .pImmutableSamplers = NULL
555 },
556 }
557 };
558 result = anv_CreateDescriptorSetLayout(anv_device_to_handle(device),
559 &ds_layout_info,
560 &device->meta_state.alloc,
561 &device->meta_state.blit2d.ds_layout);
562 if (result != VK_SUCCESS)
563 goto fail_render_pass;
564
565 result = anv_CreatePipelineLayout(anv_device_to_handle(device),
566 &(VkPipelineLayoutCreateInfo) {
567 .sType = VK_STRUCTURE_TYPE_PIPELINE_LAYOUT_CREATE_INFO,
568 .setLayoutCount = 1,
569 .pSetLayouts = &device->meta_state.blit2d.ds_layout,
570 },
571 &device->meta_state.alloc, &device->meta_state.blit2d.pipeline_layout);
572 if (result != VK_SUCCESS)
573 goto fail_descriptor_set_layout;
574
575 VkPipelineShaderStageCreateInfo pipeline_shader_stages[] = {
576 {
577 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
578 .stage = VK_SHADER_STAGE_VERTEX_BIT,
579 .module = anv_shader_module_to_handle(&vs),
580 .pName = "main",
581 .pSpecializationInfo = NULL
582 }, {
583 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
584 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
585 .module = VK_NULL_HANDLE, /* TEMPLATE VALUE! FILL ME IN! */
586 .pName = "main",
587 .pSpecializationInfo = NULL
588 },
589 };
590
591 const VkGraphicsPipelineCreateInfo vk_pipeline_info = {
592 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
593 .stageCount = ARRAY_SIZE(pipeline_shader_stages),
594 .pStages = pipeline_shader_stages,
595 .pVertexInputState = &vi_create_info,
596 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
597 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
598 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
599 .primitiveRestartEnable = false,
600 },
601 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
602 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
603 .viewportCount = 1,
604 .scissorCount = 1,
605 },
606 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
607 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
608 .rasterizerDiscardEnable = false,
609 .polygonMode = VK_POLYGON_MODE_FILL,
610 .cullMode = VK_CULL_MODE_NONE,
611 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE
612 },
613 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
614 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
615 .rasterizationSamples = 1,
616 .sampleShadingEnable = false,
617 .pSampleMask = (VkSampleMask[]) { UINT32_MAX },
618 },
619 .pColorBlendState = &(VkPipelineColorBlendStateCreateInfo) {
620 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
621 .attachmentCount = 1,
622 .pAttachments = (VkPipelineColorBlendAttachmentState []) {
623 { .colorWriteMask =
624 VK_COLOR_COMPONENT_A_BIT |
625 VK_COLOR_COMPONENT_R_BIT |
626 VK_COLOR_COMPONENT_G_BIT |
627 VK_COLOR_COMPONENT_B_BIT },
628 }
629 },
630 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
631 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
632 .dynamicStateCount = 9,
633 .pDynamicStates = (VkDynamicState[]) {
634 VK_DYNAMIC_STATE_VIEWPORT,
635 VK_DYNAMIC_STATE_SCISSOR,
636 VK_DYNAMIC_STATE_LINE_WIDTH,
637 VK_DYNAMIC_STATE_DEPTH_BIAS,
638 VK_DYNAMIC_STATE_BLEND_CONSTANTS,
639 VK_DYNAMIC_STATE_DEPTH_BOUNDS,
640 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
641 VK_DYNAMIC_STATE_STENCIL_WRITE_MASK,
642 VK_DYNAMIC_STATE_STENCIL_REFERENCE,
643 },
644 },
645 .flags = 0,
646 .layout = device->meta_state.blit2d.pipeline_layout,
647 .renderPass = device->meta_state.blit2d.render_pass,
648 .subpass = 0,
649 };
650
651 const struct anv_graphics_pipeline_create_info anv_pipeline_info = {
652 .color_attachment_count = -1,
653 .use_repclear = false,
654 .disable_viewport = true,
655 .disable_scissor = true,
656 .disable_vs = true,
657 .use_rectlist = true
658 };
659
660 pipeline_shader_stages[1].module = anv_shader_module_to_handle(&fs_2d);
661 result = anv_graphics_pipeline_create(anv_device_to_handle(device),
662 VK_NULL_HANDLE,
663 &vk_pipeline_info, &anv_pipeline_info,
664 &device->meta_state.alloc, &device->meta_state.blit2d.pipeline_2d_src);
665 if (result != VK_SUCCESS)
666 goto fail_pipeline_layout;
667
668 ralloc_free(vs.nir);
669 ralloc_free(fs_2d.nir);
670
671 return VK_SUCCESS;
672
673 fail_pipeline_layout:
674 anv_DestroyPipelineLayout(anv_device_to_handle(device),
675 device->meta_state.blit2d.pipeline_layout,
676 &device->meta_state.alloc);
677 fail_descriptor_set_layout:
678 anv_DestroyDescriptorSetLayout(anv_device_to_handle(device),
679 device->meta_state.blit2d.ds_layout,
680 &device->meta_state.alloc);
681 fail_render_pass:
682 anv_DestroyRenderPass(anv_device_to_handle(device),
683 device->meta_state.blit2d.render_pass,
684 &device->meta_state.alloc);
685
686 ralloc_free(vs.nir);
687 ralloc_free(fs_2d.nir);
688 fail:
689 return result;
690 }