Merge remote-tracking branch 'public/master' into vulkan
[mesa.git] / src / intel / vulkan / anv_meta_clear.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_meta.h"
25 #include "anv_private.h"
26 #include "nir/nir_builder.h"
27
28 /** Vertex attributes for color clears. */
29 struct color_clear_vattrs {
30 struct anv_vue_header vue_header;
31 float position[2]; /**< 3DPRIM_RECTLIST */
32 VkClearColorValue color;
33 };
34
35 /** Vertex attributes for depthstencil clears. */
36 struct depthstencil_clear_vattrs {
37 struct anv_vue_header vue_header;
38 float position[2]; /*<< 3DPRIM_RECTLIST */
39 };
40
41 static void
42 meta_clear_begin(struct anv_meta_saved_state *saved_state,
43 struct anv_cmd_buffer *cmd_buffer)
44 {
45 anv_meta_save(saved_state, cmd_buffer,
46 (1 << VK_DYNAMIC_STATE_VIEWPORT) |
47 (1 << VK_DYNAMIC_STATE_SCISSOR) |
48 (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE) |
49 (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK));
50
51 cmd_buffer->state.dynamic.viewport.count = 0;
52 cmd_buffer->state.dynamic.scissor.count = 0;
53 }
54
55 static void
56 meta_clear_end(struct anv_meta_saved_state *saved_state,
57 struct anv_cmd_buffer *cmd_buffer)
58 {
59 anv_meta_restore(saved_state, cmd_buffer);
60 }
61
62 static void
63 build_color_shaders(struct nir_shader **out_vs,
64 struct nir_shader **out_fs,
65 uint32_t frag_output)
66 {
67 nir_builder vs_b;
68 nir_builder fs_b;
69
70 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
71 nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
72
73 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs");
74 fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs");
75
76 const struct glsl_type *position_type = glsl_vec4_type();
77 const struct glsl_type *color_type = glsl_vec4_type();
78
79 nir_variable *vs_in_pos =
80 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
81 "a_position");
82 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
83
84 nir_variable *vs_out_pos =
85 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
86 "gl_Position");
87 vs_out_pos->data.location = VARYING_SLOT_POS;
88
89 nir_variable *vs_in_color =
90 nir_variable_create(vs_b.shader, nir_var_shader_in, color_type,
91 "a_color");
92 vs_in_color->data.location = VERT_ATTRIB_GENERIC1;
93
94 nir_variable *vs_out_color =
95 nir_variable_create(vs_b.shader, nir_var_shader_out, color_type,
96 "v_color");
97 vs_out_color->data.location = VARYING_SLOT_VAR0;
98 vs_out_color->data.interpolation = INTERP_QUALIFIER_FLAT;
99
100 nir_variable *fs_in_color =
101 nir_variable_create(fs_b.shader, nir_var_shader_in, color_type,
102 "v_color");
103 fs_in_color->data.location = vs_out_color->data.location;
104 fs_in_color->data.interpolation = vs_out_color->data.interpolation;
105
106 nir_variable *fs_out_color =
107 nir_variable_create(fs_b.shader, nir_var_shader_out, color_type,
108 "f_color");
109 fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output;
110
111 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
112 nir_copy_var(&vs_b, vs_out_color, vs_in_color);
113 nir_copy_var(&fs_b, fs_out_color, fs_in_color);
114
115 *out_vs = vs_b.shader;
116 *out_fs = fs_b.shader;
117 }
118
119 static VkResult
120 create_pipeline(struct anv_device *device,
121 uint32_t samples,
122 struct nir_shader *vs_nir,
123 struct nir_shader *fs_nir,
124 const VkPipelineVertexInputStateCreateInfo *vi_state,
125 const VkPipelineDepthStencilStateCreateInfo *ds_state,
126 const VkPipelineColorBlendStateCreateInfo *cb_state,
127 const VkAllocationCallbacks *alloc,
128 bool use_repclear,
129 struct anv_pipeline **pipeline)
130 {
131 VkDevice device_h = anv_device_to_handle(device);
132 VkResult result;
133
134 struct anv_shader_module vs_m = { .nir = vs_nir };
135 struct anv_shader_module fs_m = { .nir = fs_nir };
136
137 VkPipeline pipeline_h = VK_NULL_HANDLE;
138 result = anv_graphics_pipeline_create(device_h,
139 VK_NULL_HANDLE,
140 &(VkGraphicsPipelineCreateInfo) {
141 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
142 .stageCount = fs_nir ? 2 : 1,
143 .pStages = (VkPipelineShaderStageCreateInfo[]) {
144 {
145 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
146 .stage = VK_SHADER_STAGE_VERTEX_BIT,
147 .module = anv_shader_module_to_handle(&vs_m),
148 .pName = "main",
149 },
150 {
151 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
152 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
153 .module = anv_shader_module_to_handle(&fs_m),
154 .pName = "main",
155 },
156 },
157 .pVertexInputState = vi_state,
158 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
159 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
160 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
161 .primitiveRestartEnable = false,
162 },
163 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
164 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
165 .viewportCount = 1,
166 .pViewports = NULL, /* dynamic */
167 .scissorCount = 1,
168 .pScissors = NULL, /* dynamic */
169 },
170 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
171 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
172 .rasterizerDiscardEnable = false,
173 .polygonMode = VK_POLYGON_MODE_FILL,
174 .cullMode = VK_CULL_MODE_NONE,
175 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
176 .depthBiasEnable = false,
177 },
178 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
179 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
180 .rasterizationSamples = samples,
181 .sampleShadingEnable = false,
182 .pSampleMask = (VkSampleMask[]) { ~0 },
183 .alphaToCoverageEnable = false,
184 .alphaToOneEnable = false,
185 },
186 .pDepthStencilState = ds_state,
187 .pColorBlendState = cb_state,
188 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
189 /* The meta clear pipeline declares all state as dynamic.
190 * As a consequence, vkCmdBindPipeline writes no dynamic state
191 * to the cmd buffer. Therefore, at the end of the meta clear,
192 * we need only restore dynamic state was vkCmdSet.
193 */
194 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
195 .dynamicStateCount = 8,
196 .pDynamicStates = (VkDynamicState[]) {
197 /* Everything except stencil write mask */
198 VK_DYNAMIC_STATE_VIEWPORT,
199 VK_DYNAMIC_STATE_SCISSOR,
200 VK_DYNAMIC_STATE_LINE_WIDTH,
201 VK_DYNAMIC_STATE_DEPTH_BIAS,
202 VK_DYNAMIC_STATE_BLEND_CONSTANTS,
203 VK_DYNAMIC_STATE_DEPTH_BOUNDS,
204 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
205 VK_DYNAMIC_STATE_STENCIL_REFERENCE,
206 },
207 },
208 .flags = 0,
209 .renderPass = anv_render_pass_to_handle(&anv_meta_dummy_renderpass),
210 .subpass = 0,
211 },
212 &(struct anv_graphics_pipeline_create_info) {
213 .color_attachment_count = MAX_RTS,
214 .use_repclear = use_repclear,
215 .disable_viewport = true,
216 .disable_vs = true,
217 .use_rectlist = true
218 },
219 alloc,
220 &pipeline_h);
221
222 ralloc_free(vs_nir);
223 ralloc_free(fs_nir);
224
225 *pipeline = anv_pipeline_from_handle(pipeline_h);
226
227 return result;
228 }
229
230 static VkResult
231 create_color_pipeline(struct anv_device *device,
232 uint32_t samples,
233 uint32_t frag_output,
234 struct anv_pipeline **pipeline)
235 {
236 struct nir_shader *vs_nir;
237 struct nir_shader *fs_nir;
238 build_color_shaders(&vs_nir, &fs_nir, frag_output);
239
240 const VkPipelineVertexInputStateCreateInfo vi_state = {
241 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
242 .vertexBindingDescriptionCount = 1,
243 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
244 {
245 .binding = 0,
246 .stride = sizeof(struct color_clear_vattrs),
247 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
248 },
249 },
250 .vertexAttributeDescriptionCount = 3,
251 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
252 {
253 /* VUE Header */
254 .location = 0,
255 .binding = 0,
256 .format = VK_FORMAT_R32G32B32A32_UINT,
257 .offset = offsetof(struct color_clear_vattrs, vue_header),
258 },
259 {
260 /* Position */
261 .location = 1,
262 .binding = 0,
263 .format = VK_FORMAT_R32G32_SFLOAT,
264 .offset = offsetof(struct color_clear_vattrs, position),
265 },
266 {
267 /* Color */
268 .location = 2,
269 .binding = 0,
270 .format = VK_FORMAT_R32G32B32A32_SFLOAT,
271 .offset = offsetof(struct color_clear_vattrs, color),
272 },
273 },
274 };
275
276 const VkPipelineDepthStencilStateCreateInfo ds_state = {
277 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
278 .depthTestEnable = false,
279 .depthWriteEnable = false,
280 .depthBoundsTestEnable = false,
281 .stencilTestEnable = false,
282 };
283
284 VkPipelineColorBlendAttachmentState blend_attachment_state[MAX_RTS] = { 0 };
285 blend_attachment_state[frag_output] = (VkPipelineColorBlendAttachmentState) {
286 .blendEnable = false,
287 .colorWriteMask = VK_COLOR_COMPONENT_A_BIT |
288 VK_COLOR_COMPONENT_R_BIT |
289 VK_COLOR_COMPONENT_G_BIT |
290 VK_COLOR_COMPONENT_B_BIT,
291 };
292
293 const VkPipelineColorBlendStateCreateInfo cb_state = {
294 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
295 .logicOpEnable = false,
296 .attachmentCount = MAX_RTS,
297 .pAttachments = blend_attachment_state
298 };
299
300 /* Use the repclear shader. Since the NIR shader we are providing has
301 * exactly one output, that output will get compacted down to binding
302 * table entry 0. The hard-coded repclear shader is then exactly what
303 * we want regardless of what attachment we are actually clearing.
304 */
305 return
306 create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state,
307 &cb_state, &device->meta_state.alloc,
308 /*use_repclear*/ true, pipeline);
309 }
310
311 static void
312 destroy_pipeline(struct anv_device *device, struct anv_pipeline *pipeline)
313 {
314 if (!pipeline)
315 return;
316
317 ANV_CALL(DestroyPipeline)(anv_device_to_handle(device),
318 anv_pipeline_to_handle(pipeline),
319 &device->meta_state.alloc);
320 }
321
322 void
323 anv_device_finish_meta_clear_state(struct anv_device *device)
324 {
325 struct anv_meta_state *state = &device->meta_state;
326
327 for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
328 for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
329 destroy_pipeline(device, state->clear[i].color_pipelines[j]);
330 }
331
332 destroy_pipeline(device, state->clear[i].depth_only_pipeline);
333 destroy_pipeline(device, state->clear[i].stencil_only_pipeline);
334 destroy_pipeline(device, state->clear[i].depthstencil_pipeline);
335 }
336 }
337
338 static void
339 emit_color_clear(struct anv_cmd_buffer *cmd_buffer,
340 const VkClearAttachment *clear_att,
341 const VkClearRect *clear_rect)
342 {
343 struct anv_device *device = cmd_buffer->device;
344 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
345 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
346 const uint32_t subpass_att = clear_att->colorAttachment;
347 const uint32_t pass_att = subpass->color_attachments[subpass_att];
348 const struct anv_image_view *iview = fb->attachments[pass_att];
349 const uint32_t samples = iview->image->samples;
350 const uint32_t samples_log2 = ffs(samples) - 1;
351 struct anv_pipeline *pipeline =
352 device->meta_state.clear[samples_log2].color_pipelines[subpass_att];
353 VkClearColorValue clear_value = clear_att->clearValue.color;
354
355 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
356 VkPipeline pipeline_h = anv_pipeline_to_handle(pipeline);
357
358 assert(samples_log2 < ARRAY_SIZE(device->meta_state.clear));
359 assert(clear_att->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
360 assert(clear_att->colorAttachment < subpass->color_count);
361
362 const struct color_clear_vattrs vertex_data[3] = {
363 {
364 .vue_header = { 0 },
365 .position = {
366 clear_rect->rect.offset.x,
367 clear_rect->rect.offset.y,
368 },
369 .color = clear_value,
370 },
371 {
372 .vue_header = { 0 },
373 .position = {
374 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
375 clear_rect->rect.offset.y,
376 },
377 .color = clear_value,
378 },
379 {
380 .vue_header = { 0 },
381 .position = {
382 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
383 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
384 },
385 .color = clear_value,
386 },
387 };
388
389 struct anv_state state =
390 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
391
392 struct anv_buffer vertex_buffer = {
393 .device = device,
394 .size = sizeof(vertex_data),
395 .bo = &device->dynamic_state_block_pool.bo,
396 .offset = state.offset,
397 };
398
399 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
400 (VkViewport[]) {
401 {
402 .x = 0,
403 .y = 0,
404 .width = fb->width,
405 .height = fb->height,
406 .minDepth = 0.0,
407 .maxDepth = 1.0,
408 },
409 });
410
411 ANV_CALL(CmdSetScissor)(cmd_buffer_h, 0, 1,
412 (VkRect2D[]) {
413 {
414 .offset = { 0, 0 },
415 .extent = { fb->width, fb->height },
416 }
417 });
418
419 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
420 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
421 (VkDeviceSize[]) { 0 });
422
423 if (cmd_buffer->state.pipeline != pipeline) {
424 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
425 pipeline_h);
426 }
427
428 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
429 }
430
431
432 static void
433 build_depthstencil_shader(struct nir_shader **out_vs)
434 {
435 nir_builder vs_b;
436
437 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
438
439 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs");
440
441 const struct glsl_type *position_type = glsl_vec4_type();
442
443 nir_variable *vs_in_pos =
444 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
445 "a_position");
446 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
447
448 nir_variable *vs_out_pos =
449 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
450 "gl_Position");
451 vs_out_pos->data.location = VARYING_SLOT_POS;
452
453 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
454
455 *out_vs = vs_b.shader;
456 }
457
458 static VkResult
459 create_depthstencil_pipeline(struct anv_device *device,
460 VkImageAspectFlags aspects,
461 uint32_t samples,
462 struct anv_pipeline **pipeline)
463 {
464 struct nir_shader *vs_nir;
465
466 build_depthstencil_shader(&vs_nir);
467
468 const VkPipelineVertexInputStateCreateInfo vi_state = {
469 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
470 .vertexBindingDescriptionCount = 1,
471 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
472 {
473 .binding = 0,
474 .stride = sizeof(struct depthstencil_clear_vattrs),
475 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
476 },
477 },
478 .vertexAttributeDescriptionCount = 2,
479 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
480 {
481 /* VUE Header */
482 .location = 0,
483 .binding = 0,
484 .format = VK_FORMAT_R32G32B32A32_UINT,
485 .offset = offsetof(struct depthstencil_clear_vattrs, vue_header),
486 },
487 {
488 /* Position */
489 .location = 1,
490 .binding = 0,
491 .format = VK_FORMAT_R32G32_SFLOAT,
492 .offset = offsetof(struct depthstencil_clear_vattrs, position),
493 },
494 },
495 };
496
497 const VkPipelineDepthStencilStateCreateInfo ds_state = {
498 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
499 .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
500 .depthCompareOp = VK_COMPARE_OP_ALWAYS,
501 .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
502 .depthBoundsTestEnable = false,
503 .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT),
504 .front = {
505 .passOp = VK_STENCIL_OP_REPLACE,
506 .compareOp = VK_COMPARE_OP_ALWAYS,
507 .writeMask = UINT32_MAX,
508 .reference = 0, /* dynamic */
509 },
510 .back = { 0 /* dont care */ },
511 };
512
513 const VkPipelineColorBlendStateCreateInfo cb_state = {
514 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
515 .logicOpEnable = false,
516 .attachmentCount = 0,
517 .pAttachments = NULL,
518 };
519
520 return create_pipeline(device, samples, vs_nir, NULL, &vi_state, &ds_state,
521 &cb_state, &device->meta_state.alloc,
522 /*use_repclear*/ true, pipeline);
523 }
524
525 static void
526 emit_depthstencil_clear(struct anv_cmd_buffer *cmd_buffer,
527 const VkClearAttachment *clear_att,
528 const VkClearRect *clear_rect)
529 {
530 struct anv_device *device = cmd_buffer->device;
531 struct anv_meta_state *meta_state = &device->meta_state;
532 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
533 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
534 const uint32_t pass_att = subpass->depth_stencil_attachment;
535 const struct anv_image_view *iview = fb->attachments[pass_att];
536 const uint32_t samples = iview->image->samples;
537 const uint32_t samples_log2 = ffs(samples) - 1;
538 VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
539 VkImageAspectFlags aspects = clear_att->aspectMask;
540
541 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
542
543 assert(samples_log2 < ARRAY_SIZE(meta_state->clear));
544 assert(aspects == VK_IMAGE_ASPECT_DEPTH_BIT ||
545 aspects == VK_IMAGE_ASPECT_STENCIL_BIT ||
546 aspects == (VK_IMAGE_ASPECT_DEPTH_BIT |
547 VK_IMAGE_ASPECT_STENCIL_BIT));
548 assert(pass_att != VK_ATTACHMENT_UNUSED);
549
550 const struct depthstencil_clear_vattrs vertex_data[3] = {
551 {
552 .vue_header = { 0 },
553 .position = {
554 clear_rect->rect.offset.x,
555 clear_rect->rect.offset.y,
556 },
557 },
558 {
559 .vue_header = { 0 },
560 .position = {
561 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
562 clear_rect->rect.offset.y,
563 },
564 },
565 {
566 .vue_header = { 0 },
567 .position = {
568 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
569 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
570 },
571 },
572 };
573
574 struct anv_state state =
575 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
576
577 struct anv_buffer vertex_buffer = {
578 .device = device,
579 .size = sizeof(vertex_data),
580 .bo = &device->dynamic_state_block_pool.bo,
581 .offset = state.offset,
582 };
583
584 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
585 (VkViewport[]) {
586 {
587 .x = 0,
588 .y = 0,
589 .width = fb->width,
590 .height = fb->height,
591
592 /* Ignored when clearing only stencil. */
593 .minDepth = clear_value.depth,
594 .maxDepth = clear_value.depth,
595 },
596 });
597
598 ANV_CALL(CmdSetScissor)(cmd_buffer_h, 0, 1,
599 (VkRect2D[]) {
600 {
601 .offset = { 0, 0 },
602 .extent = { fb->width, fb->height },
603 }
604 });
605
606 if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
607 ANV_CALL(CmdSetStencilReference)(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT,
608 clear_value.stencil);
609 }
610
611 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
612 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
613 (VkDeviceSize[]) { 0 });
614
615 struct anv_pipeline *pipeline;
616 switch (aspects) {
617 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
618 pipeline = meta_state->clear[samples_log2].depthstencil_pipeline;
619 break;
620 case VK_IMAGE_ASPECT_DEPTH_BIT:
621 pipeline = meta_state->clear[samples_log2].depth_only_pipeline;
622 break;
623 case VK_IMAGE_ASPECT_STENCIL_BIT:
624 pipeline = meta_state->clear[samples_log2].stencil_only_pipeline;
625 break;
626 default:
627 unreachable("expected depth or stencil aspect");
628 }
629
630 if (cmd_buffer->state.pipeline != pipeline) {
631 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
632 anv_pipeline_to_handle(pipeline));
633 }
634
635 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
636 }
637
638 VkResult
639 anv_device_init_meta_clear_state(struct anv_device *device)
640 {
641 VkResult res;
642 struct anv_meta_state *state = &device->meta_state;
643
644 zero(device->meta_state.clear);
645
646 for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
647 uint32_t samples = 1 << i;
648
649 for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
650 res = create_color_pipeline(device, samples, /* frag_output */ j,
651 &state->clear[i].color_pipelines[j]);
652 if (res != VK_SUCCESS)
653 goto fail;
654 }
655
656 res = create_depthstencil_pipeline(device,
657 VK_IMAGE_ASPECT_DEPTH_BIT, samples,
658 &state->clear[i].depth_only_pipeline);
659 if (res != VK_SUCCESS)
660 goto fail;
661
662 res = create_depthstencil_pipeline(device,
663 VK_IMAGE_ASPECT_STENCIL_BIT, samples,
664 &state->clear[i].stencil_only_pipeline);
665 if (res != VK_SUCCESS)
666 goto fail;
667
668 res = create_depthstencil_pipeline(device,
669 VK_IMAGE_ASPECT_DEPTH_BIT |
670 VK_IMAGE_ASPECT_STENCIL_BIT, samples,
671 &state->clear[i].depthstencil_pipeline);
672 if (res != VK_SUCCESS)
673 goto fail;
674 }
675
676 return VK_SUCCESS;
677
678 fail:
679 anv_device_finish_meta_clear_state(device);
680 return res;
681 }
682
683 /**
684 * The parameters mean that same as those in vkCmdClearAttachments.
685 */
686 static void
687 emit_clear(struct anv_cmd_buffer *cmd_buffer,
688 const VkClearAttachment *clear_att,
689 const VkClearRect *clear_rect)
690 {
691 if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
692 emit_color_clear(cmd_buffer, clear_att, clear_rect);
693 } else {
694 assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
695 VK_IMAGE_ASPECT_STENCIL_BIT));
696 emit_depthstencil_clear(cmd_buffer, clear_att, clear_rect);
697 }
698 }
699
700 static bool
701 subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
702 {
703 const struct anv_cmd_state *cmd_state = &cmd_buffer->state;
704 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
705
706 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
707 uint32_t a = cmd_state->subpass->color_attachments[i];
708 if (cmd_state->attachments[a].pending_clear_aspects) {
709 return true;
710 }
711 }
712
713 if (ds != VK_ATTACHMENT_UNUSED &&
714 cmd_state->attachments[ds].pending_clear_aspects) {
715 return true;
716 }
717
718 return false;
719 }
720
721 /**
722 * Emit any pending attachment clears for the current subpass.
723 *
724 * @see anv_attachment_state::pending_clear_aspects
725 */
726 void
727 anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
728 {
729 struct anv_cmd_state *cmd_state = &cmd_buffer->state;
730 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
731 struct anv_meta_saved_state saved_state;
732
733 if (!subpass_needs_clear(cmd_buffer))
734 return;
735
736 meta_clear_begin(&saved_state, cmd_buffer);
737
738 if (cmd_state->framebuffer->layers > 1)
739 anv_finishme("clearing multi-layer framebuffer");
740
741 VkClearRect clear_rect = {
742 .rect = {
743 .offset = { 0, 0 },
744 .extent = { fb->width, fb->height },
745 },
746 .baseArrayLayer = 0,
747 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
748 };
749
750 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
751 uint32_t a = cmd_state->subpass->color_attachments[i];
752
753 if (!cmd_state->attachments[a].pending_clear_aspects)
754 continue;
755
756 assert(cmd_state->attachments[a].pending_clear_aspects ==
757 VK_IMAGE_ASPECT_COLOR_BIT);
758
759 VkClearAttachment clear_att = {
760 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
761 .colorAttachment = i, /* Use attachment index relative to subpass */
762 .clearValue = cmd_state->attachments[a].clear_value,
763 };
764
765 emit_clear(cmd_buffer, &clear_att, &clear_rect);
766 cmd_state->attachments[a].pending_clear_aspects = 0;
767 }
768
769 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
770
771 if (ds != VK_ATTACHMENT_UNUSED &&
772 cmd_state->attachments[ds].pending_clear_aspects) {
773
774 VkClearAttachment clear_att = {
775 .aspectMask = cmd_state->attachments[ds].pending_clear_aspects,
776 .clearValue = cmd_state->attachments[ds].clear_value,
777 };
778
779 emit_clear(cmd_buffer, &clear_att, &clear_rect);
780 cmd_state->attachments[ds].pending_clear_aspects = 0;
781 }
782
783 meta_clear_end(&saved_state, cmd_buffer);
784 }
785
786 static void
787 anv_cmd_clear_image(struct anv_cmd_buffer *cmd_buffer,
788 struct anv_image *image,
789 VkImageLayout image_layout,
790 const VkClearValue *clear_value,
791 uint32_t range_count,
792 const VkImageSubresourceRange *ranges)
793 {
794 VkDevice device_h = anv_device_to_handle(cmd_buffer->device);
795
796 for (uint32_t r = 0; r < range_count; r++) {
797 const VkImageSubresourceRange *range = &ranges[r];
798
799 for (uint32_t l = 0; l < anv_get_levelCount(image, range); ++l) {
800 for (uint32_t s = 0; s < anv_get_layerCount(image, range); ++s) {
801 struct anv_image_view iview;
802 anv_image_view_init(&iview, cmd_buffer->device,
803 &(VkImageViewCreateInfo) {
804 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
805 .image = anv_image_to_handle(image),
806 .viewType = anv_meta_get_view_type(image),
807 .format = image->vk_format,
808 .subresourceRange = {
809 .aspectMask = range->aspectMask,
810 .baseMipLevel = range->baseMipLevel + l,
811 .levelCount = 1,
812 .baseArrayLayer = range->baseArrayLayer + s,
813 .layerCount = 1
814 },
815 },
816 cmd_buffer, 0, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
817
818 VkFramebuffer fb;
819 anv_CreateFramebuffer(device_h,
820 &(VkFramebufferCreateInfo) {
821 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
822 .attachmentCount = 1,
823 .pAttachments = (VkImageView[]) {
824 anv_image_view_to_handle(&iview),
825 },
826 .width = iview.extent.width,
827 .height = iview.extent.height,
828 .layers = 1
829 },
830 &cmd_buffer->pool->alloc,
831 &fb);
832
833 VkAttachmentDescription att_desc = {
834 .format = iview.vk_format,
835 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
836 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
837 .stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
838 .stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE,
839 .initialLayout = image_layout,
840 .finalLayout = image_layout,
841 };
842
843 VkSubpassDescription subpass_desc = {
844 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
845 .inputAttachmentCount = 0,
846 .colorAttachmentCount = 0,
847 .pColorAttachments = NULL,
848 .pResolveAttachments = NULL,
849 .pDepthStencilAttachment = NULL,
850 .preserveAttachmentCount = 0,
851 .pPreserveAttachments = NULL,
852 };
853
854 const VkAttachmentReference att_ref = {
855 .attachment = 0,
856 .layout = image_layout,
857 };
858
859 if (range->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
860 subpass_desc.colorAttachmentCount = 1;
861 subpass_desc.pColorAttachments = &att_ref;
862 } else {
863 subpass_desc.pDepthStencilAttachment = &att_ref;
864 }
865
866 VkRenderPass pass;
867 anv_CreateRenderPass(device_h,
868 &(VkRenderPassCreateInfo) {
869 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
870 .attachmentCount = 1,
871 .pAttachments = &att_desc,
872 .subpassCount = 1,
873 .pSubpasses = &subpass_desc,
874 },
875 &cmd_buffer->pool->alloc,
876 &pass);
877
878 ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
879 &(VkRenderPassBeginInfo) {
880 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
881 .renderArea = {
882 .offset = { 0, 0, },
883 .extent = {
884 .width = iview.extent.width,
885 .height = iview.extent.height,
886 },
887 },
888 .renderPass = pass,
889 .framebuffer = fb,
890 .clearValueCount = 0,
891 .pClearValues = NULL,
892 },
893 VK_SUBPASS_CONTENTS_INLINE);
894
895 VkClearAttachment clear_att = {
896 .aspectMask = range->aspectMask,
897 .colorAttachment = 0,
898 .clearValue = *clear_value,
899 };
900
901 VkClearRect clear_rect = {
902 .rect = {
903 .offset = { 0, 0 },
904 .extent = { iview.extent.width, iview.extent.height },
905 },
906 .baseArrayLayer = range->baseArrayLayer,
907 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
908 };
909
910 emit_clear(cmd_buffer, &clear_att, &clear_rect);
911
912 ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
913 ANV_CALL(DestroyRenderPass)(device_h, pass,
914 &cmd_buffer->pool->alloc);
915 ANV_CALL(DestroyFramebuffer)(device_h, fb,
916 &cmd_buffer->pool->alloc);
917 }
918 }
919 }
920 }
921
922 void anv_CmdClearColorImage(
923 VkCommandBuffer commandBuffer,
924 VkImage image_h,
925 VkImageLayout imageLayout,
926 const VkClearColorValue* pColor,
927 uint32_t rangeCount,
928 const VkImageSubresourceRange* pRanges)
929 {
930 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
931 ANV_FROM_HANDLE(anv_image, image, image_h);
932 struct anv_meta_saved_state saved_state;
933
934 meta_clear_begin(&saved_state, cmd_buffer);
935
936 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
937 (const VkClearValue *) pColor,
938 rangeCount, pRanges);
939
940 meta_clear_end(&saved_state, cmd_buffer);
941 }
942
943 void anv_CmdClearDepthStencilImage(
944 VkCommandBuffer commandBuffer,
945 VkImage image_h,
946 VkImageLayout imageLayout,
947 const VkClearDepthStencilValue* pDepthStencil,
948 uint32_t rangeCount,
949 const VkImageSubresourceRange* pRanges)
950 {
951 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
952 ANV_FROM_HANDLE(anv_image, image, image_h);
953 struct anv_meta_saved_state saved_state;
954
955 meta_clear_begin(&saved_state, cmd_buffer);
956
957 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
958 (const VkClearValue *) pDepthStencil,
959 rangeCount, pRanges);
960
961 meta_clear_end(&saved_state, cmd_buffer);
962 }
963
964 void anv_CmdClearAttachments(
965 VkCommandBuffer commandBuffer,
966 uint32_t attachmentCount,
967 const VkClearAttachment* pAttachments,
968 uint32_t rectCount,
969 const VkClearRect* pRects)
970 {
971 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
972 struct anv_meta_saved_state saved_state;
973
974 meta_clear_begin(&saved_state, cmd_buffer);
975
976 /* FINISHME: We can do better than this dumb loop. It thrashes too much
977 * state.
978 */
979 for (uint32_t a = 0; a < attachmentCount; ++a) {
980 for (uint32_t r = 0; r < rectCount; ++r) {
981 emit_clear(cmd_buffer, &pAttachments[a], &pRects[r]);
982 }
983 }
984
985 meta_clear_end(&saved_state, cmd_buffer);
986 }
987
988 static void
989 do_buffer_fill(struct anv_cmd_buffer *cmd_buffer,
990 struct anv_bo *dest, uint64_t dest_offset,
991 int width, int height, VkFormat fill_format, uint32_t data)
992 {
993 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
994
995 VkImageCreateInfo image_info = {
996 .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
997 .imageType = VK_IMAGE_TYPE_2D,
998 .format = fill_format,
999 .extent = {
1000 .width = width,
1001 .height = height,
1002 .depth = 1,
1003 },
1004 .mipLevels = 1,
1005 .arrayLayers = 1,
1006 .samples = 1,
1007 .tiling = VK_IMAGE_TILING_LINEAR,
1008 .usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
1009 .flags = 0,
1010 };
1011
1012 VkImage dest_image;
1013 image_info.usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
1014 anv_CreateImage(vk_device, &image_info,
1015 &cmd_buffer->pool->alloc, &dest_image);
1016
1017 /* We could use a vk call to bind memory, but that would require
1018 * creating a dummy memory object etc. so there's really no point.
1019 */
1020 anv_image_from_handle(dest_image)->bo = dest;
1021 anv_image_from_handle(dest_image)->offset = dest_offset;
1022
1023 const VkClearValue clear_value = {
1024 .color = {
1025 .uint32 = { data, data, data, data }
1026 }
1027 };
1028
1029 const VkImageSubresourceRange range = {
1030 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
1031 .baseMipLevel = 0,
1032 .levelCount = 1,
1033 .baseArrayLayer = 0,
1034 .layerCount = 1,
1035 };
1036
1037 anv_cmd_clear_image(cmd_buffer, anv_image_from_handle(dest_image),
1038 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
1039 &clear_value, 1, &range);
1040 }
1041
1042 void anv_CmdFillBuffer(
1043 VkCommandBuffer commandBuffer,
1044 VkBuffer dstBuffer,
1045 VkDeviceSize dstOffset,
1046 VkDeviceSize fillSize,
1047 uint32_t data)
1048 {
1049 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1050 ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);
1051 struct anv_meta_saved_state saved_state;
1052
1053 meta_clear_begin(&saved_state, cmd_buffer);
1054
1055 VkFormat format;
1056 int bs;
1057 if ((fillSize & 15) == 0 && (dstOffset & 15) == 0) {
1058 format = VK_FORMAT_R32G32B32A32_UINT;
1059 bs = 16;
1060 } else if ((fillSize & 7) == 0 && (dstOffset & 15) == 0) {
1061 format = VK_FORMAT_R32G32_UINT;
1062 bs = 8;
1063 } else {
1064 assert((fillSize & 3) == 0 && (dstOffset & 3) == 0);
1065 format = VK_FORMAT_R32_UINT;
1066 bs = 4;
1067 }
1068
1069 /* This is maximum possible width/height our HW can handle */
1070 const uint64_t max_surface_dim = 1 << 14;
1071
1072 /* First, we make a bunch of max-sized copies */
1073 const uint64_t max_fill_size = max_surface_dim * max_surface_dim * bs;
1074 while (fillSize > max_fill_size) {
1075 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1076 dst_buffer->offset + dstOffset,
1077 max_surface_dim, max_surface_dim, format, data);
1078 fillSize -= max_fill_size;
1079 dstOffset += max_fill_size;
1080 }
1081
1082 uint64_t height = fillSize / (max_surface_dim * bs);
1083 assert(height < max_surface_dim);
1084 if (height != 0) {
1085 const uint64_t rect_fill_size = height * max_surface_dim * bs;
1086 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1087 dst_buffer->offset + dstOffset,
1088 max_surface_dim, height, format, data);
1089 fillSize -= rect_fill_size;
1090 dstOffset += rect_fill_size;
1091 }
1092
1093 if (fillSize != 0) {
1094 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1095 dst_buffer->offset + dstOffset,
1096 fillSize / bs, 1, format, data);
1097 }
1098
1099 meta_clear_end(&saved_state, cmd_buffer);
1100 }