nv50/ir: silence unsupported TGSI_PROPERTY_CS_FIXED_BLOCK_*
[mesa.git] / src / intel / vulkan / anv_meta_clear.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_meta.h"
25 #include "anv_private.h"
26 #include "nir/nir_builder.h"
27
28 /** Vertex attributes for color clears. */
29 struct color_clear_vattrs {
30 struct anv_vue_header vue_header;
31 float position[2]; /**< 3DPRIM_RECTLIST */
32 VkClearColorValue color;
33 };
34
35 /** Vertex attributes for depthstencil clears. */
36 struct depthstencil_clear_vattrs {
37 struct anv_vue_header vue_header;
38 float position[2]; /*<< 3DPRIM_RECTLIST */
39 };
40
41 static void
42 meta_clear_begin(struct anv_meta_saved_state *saved_state,
43 struct anv_cmd_buffer *cmd_buffer)
44 {
45 anv_meta_save(saved_state, cmd_buffer,
46 (1 << VK_DYNAMIC_STATE_VIEWPORT) |
47 (1 << VK_DYNAMIC_STATE_STENCIL_REFERENCE) |
48 (1 << VK_DYNAMIC_STATE_STENCIL_WRITE_MASK));
49
50 /* Avoid uploading more viewport states than necessary */
51 cmd_buffer->state.dynamic.viewport.count = 0;
52 }
53
54 static void
55 meta_clear_end(struct anv_meta_saved_state *saved_state,
56 struct anv_cmd_buffer *cmd_buffer)
57 {
58 anv_meta_restore(saved_state, cmd_buffer);
59 }
60
61 static void
62 build_color_shaders(struct nir_shader **out_vs,
63 struct nir_shader **out_fs,
64 uint32_t frag_output)
65 {
66 nir_builder vs_b;
67 nir_builder fs_b;
68
69 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
70 nir_builder_init_simple_shader(&fs_b, NULL, MESA_SHADER_FRAGMENT, NULL);
71
72 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_color_vs");
73 fs_b.shader->info.name = ralloc_strdup(fs_b.shader, "meta_clear_color_fs");
74
75 const struct glsl_type *position_type = glsl_vec4_type();
76 const struct glsl_type *color_type = glsl_vec4_type();
77
78 nir_variable *vs_in_pos =
79 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
80 "a_position");
81 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
82
83 nir_variable *vs_out_pos =
84 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
85 "gl_Position");
86 vs_out_pos->data.location = VARYING_SLOT_POS;
87
88 nir_variable *vs_in_color =
89 nir_variable_create(vs_b.shader, nir_var_shader_in, color_type,
90 "a_color");
91 vs_in_color->data.location = VERT_ATTRIB_GENERIC1;
92
93 nir_variable *vs_out_color =
94 nir_variable_create(vs_b.shader, nir_var_shader_out, color_type,
95 "v_color");
96 vs_out_color->data.location = VARYING_SLOT_VAR0;
97 vs_out_color->data.interpolation = INTERP_QUALIFIER_FLAT;
98
99 nir_variable *fs_in_color =
100 nir_variable_create(fs_b.shader, nir_var_shader_in, color_type,
101 "v_color");
102 fs_in_color->data.location = vs_out_color->data.location;
103 fs_in_color->data.interpolation = vs_out_color->data.interpolation;
104
105 nir_variable *fs_out_color =
106 nir_variable_create(fs_b.shader, nir_var_shader_out, color_type,
107 "f_color");
108 fs_out_color->data.location = FRAG_RESULT_DATA0 + frag_output;
109
110 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
111 nir_copy_var(&vs_b, vs_out_color, vs_in_color);
112 nir_copy_var(&fs_b, fs_out_color, fs_in_color);
113
114 *out_vs = vs_b.shader;
115 *out_fs = fs_b.shader;
116 }
117
118 static VkResult
119 create_pipeline(struct anv_device *device,
120 uint32_t samples,
121 struct nir_shader *vs_nir,
122 struct nir_shader *fs_nir,
123 const VkPipelineVertexInputStateCreateInfo *vi_state,
124 const VkPipelineDepthStencilStateCreateInfo *ds_state,
125 const VkPipelineColorBlendStateCreateInfo *cb_state,
126 const VkAllocationCallbacks *alloc,
127 bool use_repclear,
128 struct anv_pipeline **pipeline)
129 {
130 VkDevice device_h = anv_device_to_handle(device);
131 VkResult result;
132
133 struct anv_shader_module vs_m = { .nir = vs_nir };
134 struct anv_shader_module fs_m = { .nir = fs_nir };
135
136 VkPipeline pipeline_h = VK_NULL_HANDLE;
137 result = anv_graphics_pipeline_create(device_h,
138 VK_NULL_HANDLE,
139 &(VkGraphicsPipelineCreateInfo) {
140 .sType = VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO,
141 .stageCount = fs_nir ? 2 : 1,
142 .pStages = (VkPipelineShaderStageCreateInfo[]) {
143 {
144 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
145 .stage = VK_SHADER_STAGE_VERTEX_BIT,
146 .module = anv_shader_module_to_handle(&vs_m),
147 .pName = "main",
148 },
149 {
150 .sType = VK_STRUCTURE_TYPE_PIPELINE_SHADER_STAGE_CREATE_INFO,
151 .stage = VK_SHADER_STAGE_FRAGMENT_BIT,
152 .module = anv_shader_module_to_handle(&fs_m),
153 .pName = "main",
154 },
155 },
156 .pVertexInputState = vi_state,
157 .pInputAssemblyState = &(VkPipelineInputAssemblyStateCreateInfo) {
158 .sType = VK_STRUCTURE_TYPE_PIPELINE_INPUT_ASSEMBLY_STATE_CREATE_INFO,
159 .topology = VK_PRIMITIVE_TOPOLOGY_TRIANGLE_STRIP,
160 .primitiveRestartEnable = false,
161 },
162 .pViewportState = &(VkPipelineViewportStateCreateInfo) {
163 .sType = VK_STRUCTURE_TYPE_PIPELINE_VIEWPORT_STATE_CREATE_INFO,
164 .viewportCount = 1,
165 .pViewports = NULL, /* dynamic */
166 .scissorCount = 1,
167 .pScissors = NULL, /* dynamic */
168 },
169 .pRasterizationState = &(VkPipelineRasterizationStateCreateInfo) {
170 .sType = VK_STRUCTURE_TYPE_PIPELINE_RASTERIZATION_STATE_CREATE_INFO,
171 .rasterizerDiscardEnable = false,
172 .polygonMode = VK_POLYGON_MODE_FILL,
173 .cullMode = VK_CULL_MODE_NONE,
174 .frontFace = VK_FRONT_FACE_COUNTER_CLOCKWISE,
175 .depthBiasEnable = false,
176 },
177 .pMultisampleState = &(VkPipelineMultisampleStateCreateInfo) {
178 .sType = VK_STRUCTURE_TYPE_PIPELINE_MULTISAMPLE_STATE_CREATE_INFO,
179 .rasterizationSamples = samples,
180 .sampleShadingEnable = false,
181 .pSampleMask = (VkSampleMask[]) { ~0 },
182 .alphaToCoverageEnable = false,
183 .alphaToOneEnable = false,
184 },
185 .pDepthStencilState = ds_state,
186 .pColorBlendState = cb_state,
187 .pDynamicState = &(VkPipelineDynamicStateCreateInfo) {
188 /* The meta clear pipeline declares all state as dynamic.
189 * As a consequence, vkCmdBindPipeline writes no dynamic state
190 * to the cmd buffer. Therefore, at the end of the meta clear,
191 * we need only restore dynamic state was vkCmdSet.
192 */
193 .sType = VK_STRUCTURE_TYPE_PIPELINE_DYNAMIC_STATE_CREATE_INFO,
194 .dynamicStateCount = 8,
195 .pDynamicStates = (VkDynamicState[]) {
196 /* Everything except stencil write mask */
197 VK_DYNAMIC_STATE_VIEWPORT,
198 VK_DYNAMIC_STATE_SCISSOR,
199 VK_DYNAMIC_STATE_LINE_WIDTH,
200 VK_DYNAMIC_STATE_DEPTH_BIAS,
201 VK_DYNAMIC_STATE_BLEND_CONSTANTS,
202 VK_DYNAMIC_STATE_DEPTH_BOUNDS,
203 VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK,
204 VK_DYNAMIC_STATE_STENCIL_REFERENCE,
205 },
206 },
207 .flags = 0,
208 .renderPass = anv_render_pass_to_handle(&anv_meta_dummy_renderpass),
209 .subpass = 0,
210 },
211 &(struct anv_graphics_pipeline_create_info) {
212 .color_attachment_count = MAX_RTS,
213 .use_repclear = use_repclear,
214 .disable_vs = true,
215 .use_rectlist = true
216 },
217 alloc,
218 &pipeline_h);
219
220 ralloc_free(vs_nir);
221 ralloc_free(fs_nir);
222
223 *pipeline = anv_pipeline_from_handle(pipeline_h);
224
225 return result;
226 }
227
228 static VkResult
229 create_color_pipeline(struct anv_device *device,
230 uint32_t samples,
231 uint32_t frag_output,
232 struct anv_pipeline **pipeline)
233 {
234 struct nir_shader *vs_nir;
235 struct nir_shader *fs_nir;
236 build_color_shaders(&vs_nir, &fs_nir, frag_output);
237
238 const VkPipelineVertexInputStateCreateInfo vi_state = {
239 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
240 .vertexBindingDescriptionCount = 1,
241 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
242 {
243 .binding = 0,
244 .stride = sizeof(struct color_clear_vattrs),
245 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
246 },
247 },
248 .vertexAttributeDescriptionCount = 3,
249 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
250 {
251 /* VUE Header */
252 .location = 0,
253 .binding = 0,
254 .format = VK_FORMAT_R32G32B32A32_UINT,
255 .offset = offsetof(struct color_clear_vattrs, vue_header),
256 },
257 {
258 /* Position */
259 .location = 1,
260 .binding = 0,
261 .format = VK_FORMAT_R32G32_SFLOAT,
262 .offset = offsetof(struct color_clear_vattrs, position),
263 },
264 {
265 /* Color */
266 .location = 2,
267 .binding = 0,
268 .format = VK_FORMAT_R32G32B32A32_SFLOAT,
269 .offset = offsetof(struct color_clear_vattrs, color),
270 },
271 },
272 };
273
274 const VkPipelineDepthStencilStateCreateInfo ds_state = {
275 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
276 .depthTestEnable = false,
277 .depthWriteEnable = false,
278 .depthBoundsTestEnable = false,
279 .stencilTestEnable = false,
280 };
281
282 VkPipelineColorBlendAttachmentState blend_attachment_state[MAX_RTS] = { 0 };
283 blend_attachment_state[frag_output] = (VkPipelineColorBlendAttachmentState) {
284 .blendEnable = false,
285 .colorWriteMask = VK_COLOR_COMPONENT_A_BIT |
286 VK_COLOR_COMPONENT_R_BIT |
287 VK_COLOR_COMPONENT_G_BIT |
288 VK_COLOR_COMPONENT_B_BIT,
289 };
290
291 const VkPipelineColorBlendStateCreateInfo cb_state = {
292 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
293 .logicOpEnable = false,
294 .attachmentCount = MAX_RTS,
295 .pAttachments = blend_attachment_state
296 };
297
298 /* Use the repclear shader. Since the NIR shader we are providing has
299 * exactly one output, that output will get compacted down to binding
300 * table entry 0. The hard-coded repclear shader is then exactly what
301 * we want regardless of what attachment we are actually clearing.
302 */
303 return
304 create_pipeline(device, samples, vs_nir, fs_nir, &vi_state, &ds_state,
305 &cb_state, &device->meta_state.alloc,
306 /*use_repclear*/ true, pipeline);
307 }
308
309 static void
310 destroy_pipeline(struct anv_device *device, struct anv_pipeline *pipeline)
311 {
312 if (!pipeline)
313 return;
314
315 ANV_CALL(DestroyPipeline)(anv_device_to_handle(device),
316 anv_pipeline_to_handle(pipeline),
317 &device->meta_state.alloc);
318 }
319
320 void
321 anv_device_finish_meta_clear_state(struct anv_device *device)
322 {
323 struct anv_meta_state *state = &device->meta_state;
324
325 for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
326 for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
327 destroy_pipeline(device, state->clear[i].color_pipelines[j]);
328 }
329
330 destroy_pipeline(device, state->clear[i].depth_only_pipeline);
331 destroy_pipeline(device, state->clear[i].stencil_only_pipeline);
332 destroy_pipeline(device, state->clear[i].depthstencil_pipeline);
333 }
334 }
335
336 static void
337 emit_color_clear(struct anv_cmd_buffer *cmd_buffer,
338 const VkClearAttachment *clear_att,
339 const VkClearRect *clear_rect)
340 {
341 struct anv_device *device = cmd_buffer->device;
342 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
343 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
344 const uint32_t subpass_att = clear_att->colorAttachment;
345 const uint32_t pass_att = subpass->color_attachments[subpass_att];
346 const struct anv_image_view *iview = fb->attachments[pass_att];
347 const uint32_t samples = iview->image->samples;
348 const uint32_t samples_log2 = ffs(samples) - 1;
349 struct anv_pipeline *pipeline =
350 device->meta_state.clear[samples_log2].color_pipelines[subpass_att];
351 VkClearColorValue clear_value = clear_att->clearValue.color;
352
353 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
354 VkPipeline pipeline_h = anv_pipeline_to_handle(pipeline);
355
356 assert(samples_log2 < ARRAY_SIZE(device->meta_state.clear));
357 assert(clear_att->aspectMask == VK_IMAGE_ASPECT_COLOR_BIT);
358 assert(clear_att->colorAttachment < subpass->color_count);
359
360 const struct color_clear_vattrs vertex_data[3] = {
361 {
362 .vue_header = { 0 },
363 .position = {
364 clear_rect->rect.offset.x,
365 clear_rect->rect.offset.y,
366 },
367 .color = clear_value,
368 },
369 {
370 .vue_header = { 0 },
371 .position = {
372 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
373 clear_rect->rect.offset.y,
374 },
375 .color = clear_value,
376 },
377 {
378 .vue_header = { 0 },
379 .position = {
380 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
381 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
382 },
383 .color = clear_value,
384 },
385 };
386
387 struct anv_state state =
388 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
389
390 struct anv_buffer vertex_buffer = {
391 .device = device,
392 .size = sizeof(vertex_data),
393 .bo = &device->dynamic_state_block_pool.bo,
394 .offset = state.offset,
395 };
396
397 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
398 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
399 (VkDeviceSize[]) { 0 });
400
401 if (cmd_buffer->state.pipeline != pipeline) {
402 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
403 pipeline_h);
404 }
405
406 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
407 }
408
409
410 static void
411 build_depthstencil_shader(struct nir_shader **out_vs)
412 {
413 nir_builder vs_b;
414
415 nir_builder_init_simple_shader(&vs_b, NULL, MESA_SHADER_VERTEX, NULL);
416
417 vs_b.shader->info.name = ralloc_strdup(vs_b.shader, "meta_clear_depthstencil_vs");
418
419 const struct glsl_type *position_type = glsl_vec4_type();
420
421 nir_variable *vs_in_pos =
422 nir_variable_create(vs_b.shader, nir_var_shader_in, position_type,
423 "a_position");
424 vs_in_pos->data.location = VERT_ATTRIB_GENERIC0;
425
426 nir_variable *vs_out_pos =
427 nir_variable_create(vs_b.shader, nir_var_shader_out, position_type,
428 "gl_Position");
429 vs_out_pos->data.location = VARYING_SLOT_POS;
430
431 nir_copy_var(&vs_b, vs_out_pos, vs_in_pos);
432
433 *out_vs = vs_b.shader;
434 }
435
436 static VkResult
437 create_depthstencil_pipeline(struct anv_device *device,
438 VkImageAspectFlags aspects,
439 uint32_t samples,
440 struct anv_pipeline **pipeline)
441 {
442 struct nir_shader *vs_nir;
443
444 build_depthstencil_shader(&vs_nir);
445
446 const VkPipelineVertexInputStateCreateInfo vi_state = {
447 .sType = VK_STRUCTURE_TYPE_PIPELINE_VERTEX_INPUT_STATE_CREATE_INFO,
448 .vertexBindingDescriptionCount = 1,
449 .pVertexBindingDescriptions = (VkVertexInputBindingDescription[]) {
450 {
451 .binding = 0,
452 .stride = sizeof(struct depthstencil_clear_vattrs),
453 .inputRate = VK_VERTEX_INPUT_RATE_VERTEX
454 },
455 },
456 .vertexAttributeDescriptionCount = 2,
457 .pVertexAttributeDescriptions = (VkVertexInputAttributeDescription[]) {
458 {
459 /* VUE Header */
460 .location = 0,
461 .binding = 0,
462 .format = VK_FORMAT_R32G32B32A32_UINT,
463 .offset = offsetof(struct depthstencil_clear_vattrs, vue_header),
464 },
465 {
466 /* Position */
467 .location = 1,
468 .binding = 0,
469 .format = VK_FORMAT_R32G32_SFLOAT,
470 .offset = offsetof(struct depthstencil_clear_vattrs, position),
471 },
472 },
473 };
474
475 const VkPipelineDepthStencilStateCreateInfo ds_state = {
476 .sType = VK_STRUCTURE_TYPE_PIPELINE_DEPTH_STENCIL_STATE_CREATE_INFO,
477 .depthTestEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
478 .depthCompareOp = VK_COMPARE_OP_ALWAYS,
479 .depthWriteEnable = (aspects & VK_IMAGE_ASPECT_DEPTH_BIT),
480 .depthBoundsTestEnable = false,
481 .stencilTestEnable = (aspects & VK_IMAGE_ASPECT_STENCIL_BIT),
482 .front = {
483 .passOp = VK_STENCIL_OP_REPLACE,
484 .compareOp = VK_COMPARE_OP_ALWAYS,
485 .writeMask = UINT32_MAX,
486 .reference = 0, /* dynamic */
487 },
488 .back = { 0 /* dont care */ },
489 };
490
491 const VkPipelineColorBlendStateCreateInfo cb_state = {
492 .sType = VK_STRUCTURE_TYPE_PIPELINE_COLOR_BLEND_STATE_CREATE_INFO,
493 .logicOpEnable = false,
494 .attachmentCount = 0,
495 .pAttachments = NULL,
496 };
497
498 return create_pipeline(device, samples, vs_nir, NULL, &vi_state, &ds_state,
499 &cb_state, &device->meta_state.alloc,
500 /*use_repclear*/ true, pipeline);
501 }
502
503 static void
504 emit_depthstencil_clear(struct anv_cmd_buffer *cmd_buffer,
505 const VkClearAttachment *clear_att,
506 const VkClearRect *clear_rect)
507 {
508 struct anv_device *device = cmd_buffer->device;
509 struct anv_meta_state *meta_state = &device->meta_state;
510 const struct anv_subpass *subpass = cmd_buffer->state.subpass;
511 const struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
512 const uint32_t pass_att = subpass->depth_stencil_attachment;
513 const struct anv_image_view *iview = fb->attachments[pass_att];
514 const uint32_t samples = iview->image->samples;
515 const uint32_t samples_log2 = ffs(samples) - 1;
516 VkClearDepthStencilValue clear_value = clear_att->clearValue.depthStencil;
517 VkImageAspectFlags aspects = clear_att->aspectMask;
518
519 VkCommandBuffer cmd_buffer_h = anv_cmd_buffer_to_handle(cmd_buffer);
520
521 assert(samples_log2 < ARRAY_SIZE(meta_state->clear));
522 assert(aspects == VK_IMAGE_ASPECT_DEPTH_BIT ||
523 aspects == VK_IMAGE_ASPECT_STENCIL_BIT ||
524 aspects == (VK_IMAGE_ASPECT_DEPTH_BIT |
525 VK_IMAGE_ASPECT_STENCIL_BIT));
526 assert(pass_att != VK_ATTACHMENT_UNUSED);
527
528 const struct depthstencil_clear_vattrs vertex_data[3] = {
529 {
530 .vue_header = { 0 },
531 .position = {
532 clear_rect->rect.offset.x,
533 clear_rect->rect.offset.y,
534 },
535 },
536 {
537 .vue_header = { 0 },
538 .position = {
539 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
540 clear_rect->rect.offset.y,
541 },
542 },
543 {
544 .vue_header = { 0 },
545 .position = {
546 clear_rect->rect.offset.x + clear_rect->rect.extent.width,
547 clear_rect->rect.offset.y + clear_rect->rect.extent.height,
548 },
549 },
550 };
551
552 struct anv_state state =
553 anv_cmd_buffer_emit_dynamic(cmd_buffer, vertex_data, sizeof(vertex_data), 16);
554
555 struct anv_buffer vertex_buffer = {
556 .device = device,
557 .size = sizeof(vertex_data),
558 .bo = &device->dynamic_state_block_pool.bo,
559 .offset = state.offset,
560 };
561
562 ANV_CALL(CmdSetViewport)(cmd_buffer_h, 0, 1,
563 (VkViewport[]) {
564 {
565 .x = 0,
566 .y = 0,
567 .width = fb->width,
568 .height = fb->height,
569
570 /* Ignored when clearing only stencil. */
571 .minDepth = clear_value.depth,
572 .maxDepth = clear_value.depth,
573 },
574 });
575
576 if (aspects & VK_IMAGE_ASPECT_STENCIL_BIT) {
577 ANV_CALL(CmdSetStencilReference)(cmd_buffer_h, VK_STENCIL_FACE_FRONT_BIT,
578 clear_value.stencil);
579 }
580
581 ANV_CALL(CmdBindVertexBuffers)(cmd_buffer_h, 0, 1,
582 (VkBuffer[]) { anv_buffer_to_handle(&vertex_buffer) },
583 (VkDeviceSize[]) { 0 });
584
585 struct anv_pipeline *pipeline;
586 switch (aspects) {
587 case VK_IMAGE_ASPECT_DEPTH_BIT | VK_IMAGE_ASPECT_STENCIL_BIT:
588 pipeline = meta_state->clear[samples_log2].depthstencil_pipeline;
589 break;
590 case VK_IMAGE_ASPECT_DEPTH_BIT:
591 pipeline = meta_state->clear[samples_log2].depth_only_pipeline;
592 break;
593 case VK_IMAGE_ASPECT_STENCIL_BIT:
594 pipeline = meta_state->clear[samples_log2].stencil_only_pipeline;
595 break;
596 default:
597 unreachable("expected depth or stencil aspect");
598 }
599
600 if (cmd_buffer->state.pipeline != pipeline) {
601 ANV_CALL(CmdBindPipeline)(cmd_buffer_h, VK_PIPELINE_BIND_POINT_GRAPHICS,
602 anv_pipeline_to_handle(pipeline));
603 }
604
605 ANV_CALL(CmdDraw)(cmd_buffer_h, 3, 1, 0, 0);
606 }
607
608 VkResult
609 anv_device_init_meta_clear_state(struct anv_device *device)
610 {
611 VkResult res;
612 struct anv_meta_state *state = &device->meta_state;
613
614 zero(device->meta_state.clear);
615
616 for (uint32_t i = 0; i < ARRAY_SIZE(state->clear); ++i) {
617 uint32_t samples = 1 << i;
618
619 for (uint32_t j = 0; j < ARRAY_SIZE(state->clear[i].color_pipelines); ++j) {
620 res = create_color_pipeline(device, samples, /* frag_output */ j,
621 &state->clear[i].color_pipelines[j]);
622 if (res != VK_SUCCESS)
623 goto fail;
624 }
625
626 res = create_depthstencil_pipeline(device,
627 VK_IMAGE_ASPECT_DEPTH_BIT, samples,
628 &state->clear[i].depth_only_pipeline);
629 if (res != VK_SUCCESS)
630 goto fail;
631
632 res = create_depthstencil_pipeline(device,
633 VK_IMAGE_ASPECT_STENCIL_BIT, samples,
634 &state->clear[i].stencil_only_pipeline);
635 if (res != VK_SUCCESS)
636 goto fail;
637
638 res = create_depthstencil_pipeline(device,
639 VK_IMAGE_ASPECT_DEPTH_BIT |
640 VK_IMAGE_ASPECT_STENCIL_BIT, samples,
641 &state->clear[i].depthstencil_pipeline);
642 if (res != VK_SUCCESS)
643 goto fail;
644 }
645
646 return VK_SUCCESS;
647
648 fail:
649 anv_device_finish_meta_clear_state(device);
650 return res;
651 }
652
653 /**
654 * The parameters mean that same as those in vkCmdClearAttachments.
655 */
656 static void
657 emit_clear(struct anv_cmd_buffer *cmd_buffer,
658 const VkClearAttachment *clear_att,
659 const VkClearRect *clear_rect)
660 {
661 if (clear_att->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
662 emit_color_clear(cmd_buffer, clear_att, clear_rect);
663 } else {
664 assert(clear_att->aspectMask & (VK_IMAGE_ASPECT_DEPTH_BIT |
665 VK_IMAGE_ASPECT_STENCIL_BIT));
666 emit_depthstencil_clear(cmd_buffer, clear_att, clear_rect);
667 }
668 }
669
670 static bool
671 subpass_needs_clear(const struct anv_cmd_buffer *cmd_buffer)
672 {
673 const struct anv_cmd_state *cmd_state = &cmd_buffer->state;
674 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
675
676 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
677 uint32_t a = cmd_state->subpass->color_attachments[i];
678 if (cmd_state->attachments[a].pending_clear_aspects) {
679 return true;
680 }
681 }
682
683 if (ds != VK_ATTACHMENT_UNUSED &&
684 cmd_state->attachments[ds].pending_clear_aspects) {
685 return true;
686 }
687
688 return false;
689 }
690
691 /**
692 * Emit any pending attachment clears for the current subpass.
693 *
694 * @see anv_attachment_state::pending_clear_aspects
695 */
696 void
697 anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer *cmd_buffer)
698 {
699 struct anv_cmd_state *cmd_state = &cmd_buffer->state;
700 struct anv_framebuffer *fb = cmd_buffer->state.framebuffer;
701 struct anv_meta_saved_state saved_state;
702
703 if (!subpass_needs_clear(cmd_buffer))
704 return;
705
706 meta_clear_begin(&saved_state, cmd_buffer);
707
708 if (cmd_state->framebuffer->layers > 1)
709 anv_finishme("clearing multi-layer framebuffer");
710
711 VkClearRect clear_rect = {
712 .rect = {
713 .offset = { 0, 0 },
714 .extent = { fb->width, fb->height },
715 },
716 .baseArrayLayer = 0,
717 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
718 };
719
720 for (uint32_t i = 0; i < cmd_state->subpass->color_count; ++i) {
721 uint32_t a = cmd_state->subpass->color_attachments[i];
722
723 if (!cmd_state->attachments[a].pending_clear_aspects)
724 continue;
725
726 assert(cmd_state->attachments[a].pending_clear_aspects ==
727 VK_IMAGE_ASPECT_COLOR_BIT);
728
729 VkClearAttachment clear_att = {
730 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
731 .colorAttachment = i, /* Use attachment index relative to subpass */
732 .clearValue = cmd_state->attachments[a].clear_value,
733 };
734
735 emit_clear(cmd_buffer, &clear_att, &clear_rect);
736 cmd_state->attachments[a].pending_clear_aspects = 0;
737 }
738
739 uint32_t ds = cmd_state->subpass->depth_stencil_attachment;
740
741 if (ds != VK_ATTACHMENT_UNUSED &&
742 cmd_state->attachments[ds].pending_clear_aspects) {
743
744 VkClearAttachment clear_att = {
745 .aspectMask = cmd_state->attachments[ds].pending_clear_aspects,
746 .clearValue = cmd_state->attachments[ds].clear_value,
747 };
748
749 emit_clear(cmd_buffer, &clear_att, &clear_rect);
750 cmd_state->attachments[ds].pending_clear_aspects = 0;
751 }
752
753 meta_clear_end(&saved_state, cmd_buffer);
754 }
755
756 static void
757 anv_cmd_clear_image(struct anv_cmd_buffer *cmd_buffer,
758 struct anv_image *image,
759 VkImageLayout image_layout,
760 const VkClearValue *clear_value,
761 uint32_t range_count,
762 const VkImageSubresourceRange *ranges)
763 {
764 VkDevice device_h = anv_device_to_handle(cmd_buffer->device);
765
766 for (uint32_t r = 0; r < range_count; r++) {
767 const VkImageSubresourceRange *range = &ranges[r];
768
769 for (uint32_t l = 0; l < anv_get_levelCount(image, range); ++l) {
770 for (uint32_t s = 0; s < anv_get_layerCount(image, range); ++s) {
771 struct anv_image_view iview;
772 anv_image_view_init(&iview, cmd_buffer->device,
773 &(VkImageViewCreateInfo) {
774 .sType = VK_STRUCTURE_TYPE_IMAGE_VIEW_CREATE_INFO,
775 .image = anv_image_to_handle(image),
776 .viewType = anv_meta_get_view_type(image),
777 .format = image->vk_format,
778 .subresourceRange = {
779 .aspectMask = range->aspectMask,
780 .baseMipLevel = range->baseMipLevel + l,
781 .levelCount = 1,
782 .baseArrayLayer = range->baseArrayLayer + s,
783 .layerCount = 1
784 },
785 },
786 cmd_buffer, VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT);
787
788 VkFramebuffer fb;
789 anv_CreateFramebuffer(device_h,
790 &(VkFramebufferCreateInfo) {
791 .sType = VK_STRUCTURE_TYPE_FRAMEBUFFER_CREATE_INFO,
792 .attachmentCount = 1,
793 .pAttachments = (VkImageView[]) {
794 anv_image_view_to_handle(&iview),
795 },
796 .width = iview.extent.width,
797 .height = iview.extent.height,
798 .layers = 1
799 },
800 &cmd_buffer->pool->alloc,
801 &fb);
802
803 VkAttachmentDescription att_desc = {
804 .format = iview.vk_format,
805 .loadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
806 .storeOp = VK_ATTACHMENT_STORE_OP_STORE,
807 .stencilLoadOp = VK_ATTACHMENT_LOAD_OP_LOAD,
808 .stencilStoreOp = VK_ATTACHMENT_STORE_OP_STORE,
809 .initialLayout = image_layout,
810 .finalLayout = image_layout,
811 };
812
813 VkSubpassDescription subpass_desc = {
814 .pipelineBindPoint = VK_PIPELINE_BIND_POINT_GRAPHICS,
815 .inputAttachmentCount = 0,
816 .colorAttachmentCount = 0,
817 .pColorAttachments = NULL,
818 .pResolveAttachments = NULL,
819 .pDepthStencilAttachment = NULL,
820 .preserveAttachmentCount = 0,
821 .pPreserveAttachments = NULL,
822 };
823
824 const VkAttachmentReference att_ref = {
825 .attachment = 0,
826 .layout = image_layout,
827 };
828
829 if (range->aspectMask & VK_IMAGE_ASPECT_COLOR_BIT) {
830 subpass_desc.colorAttachmentCount = 1;
831 subpass_desc.pColorAttachments = &att_ref;
832 } else {
833 subpass_desc.pDepthStencilAttachment = &att_ref;
834 }
835
836 VkRenderPass pass;
837 anv_CreateRenderPass(device_h,
838 &(VkRenderPassCreateInfo) {
839 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_CREATE_INFO,
840 .attachmentCount = 1,
841 .pAttachments = &att_desc,
842 .subpassCount = 1,
843 .pSubpasses = &subpass_desc,
844 },
845 &cmd_buffer->pool->alloc,
846 &pass);
847
848 ANV_CALL(CmdBeginRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer),
849 &(VkRenderPassBeginInfo) {
850 .sType = VK_STRUCTURE_TYPE_RENDER_PASS_BEGIN_INFO,
851 .renderArea = {
852 .offset = { 0, 0, },
853 .extent = {
854 .width = iview.extent.width,
855 .height = iview.extent.height,
856 },
857 },
858 .renderPass = pass,
859 .framebuffer = fb,
860 .clearValueCount = 0,
861 .pClearValues = NULL,
862 },
863 VK_SUBPASS_CONTENTS_INLINE);
864
865 VkClearAttachment clear_att = {
866 .aspectMask = range->aspectMask,
867 .colorAttachment = 0,
868 .clearValue = *clear_value,
869 };
870
871 VkClearRect clear_rect = {
872 .rect = {
873 .offset = { 0, 0 },
874 .extent = { iview.extent.width, iview.extent.height },
875 },
876 .baseArrayLayer = range->baseArrayLayer,
877 .layerCount = 1, /* FINISHME: clear multi-layer framebuffer */
878 };
879
880 emit_clear(cmd_buffer, &clear_att, &clear_rect);
881
882 ANV_CALL(CmdEndRenderPass)(anv_cmd_buffer_to_handle(cmd_buffer));
883 ANV_CALL(DestroyRenderPass)(device_h, pass,
884 &cmd_buffer->pool->alloc);
885 ANV_CALL(DestroyFramebuffer)(device_h, fb,
886 &cmd_buffer->pool->alloc);
887 }
888 }
889 }
890 }
891
892 void anv_CmdClearColorImage(
893 VkCommandBuffer commandBuffer,
894 VkImage image_h,
895 VkImageLayout imageLayout,
896 const VkClearColorValue* pColor,
897 uint32_t rangeCount,
898 const VkImageSubresourceRange* pRanges)
899 {
900 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
901 ANV_FROM_HANDLE(anv_image, image, image_h);
902 struct anv_meta_saved_state saved_state;
903
904 meta_clear_begin(&saved_state, cmd_buffer);
905
906 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
907 (const VkClearValue *) pColor,
908 rangeCount, pRanges);
909
910 meta_clear_end(&saved_state, cmd_buffer);
911 }
912
913 void anv_CmdClearDepthStencilImage(
914 VkCommandBuffer commandBuffer,
915 VkImage image_h,
916 VkImageLayout imageLayout,
917 const VkClearDepthStencilValue* pDepthStencil,
918 uint32_t rangeCount,
919 const VkImageSubresourceRange* pRanges)
920 {
921 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
922 ANV_FROM_HANDLE(anv_image, image, image_h);
923 struct anv_meta_saved_state saved_state;
924
925 meta_clear_begin(&saved_state, cmd_buffer);
926
927 anv_cmd_clear_image(cmd_buffer, image, imageLayout,
928 (const VkClearValue *) pDepthStencil,
929 rangeCount, pRanges);
930
931 meta_clear_end(&saved_state, cmd_buffer);
932 }
933
934 void anv_CmdClearAttachments(
935 VkCommandBuffer commandBuffer,
936 uint32_t attachmentCount,
937 const VkClearAttachment* pAttachments,
938 uint32_t rectCount,
939 const VkClearRect* pRects)
940 {
941 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
942 struct anv_meta_saved_state saved_state;
943
944 meta_clear_begin(&saved_state, cmd_buffer);
945
946 /* FINISHME: We can do better than this dumb loop. It thrashes too much
947 * state.
948 */
949 for (uint32_t a = 0; a < attachmentCount; ++a) {
950 for (uint32_t r = 0; r < rectCount; ++r) {
951 emit_clear(cmd_buffer, &pAttachments[a], &pRects[r]);
952 }
953 }
954
955 meta_clear_end(&saved_state, cmd_buffer);
956 }
957
958 static void
959 do_buffer_fill(struct anv_cmd_buffer *cmd_buffer,
960 struct anv_bo *dest, uint64_t dest_offset,
961 int width, int height, VkFormat fill_format, uint32_t data)
962 {
963 VkDevice vk_device = anv_device_to_handle(cmd_buffer->device);
964
965 VkImageCreateInfo image_info = {
966 .sType = VK_STRUCTURE_TYPE_IMAGE_CREATE_INFO,
967 .imageType = VK_IMAGE_TYPE_2D,
968 .format = fill_format,
969 .extent = {
970 .width = width,
971 .height = height,
972 .depth = 1,
973 },
974 .mipLevels = 1,
975 .arrayLayers = 1,
976 .samples = 1,
977 .tiling = VK_IMAGE_TILING_LINEAR,
978 .usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT,
979 .flags = 0,
980 };
981
982 VkImage dest_image;
983 image_info.usage = VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT;
984 anv_CreateImage(vk_device, &image_info,
985 &cmd_buffer->pool->alloc, &dest_image);
986
987 /* We could use a vk call to bind memory, but that would require
988 * creating a dummy memory object etc. so there's really no point.
989 */
990 anv_image_from_handle(dest_image)->bo = dest;
991 anv_image_from_handle(dest_image)->offset = dest_offset;
992
993 const VkClearValue clear_value = {
994 .color = {
995 .uint32 = { data, data, data, data }
996 }
997 };
998
999 const VkImageSubresourceRange range = {
1000 .aspectMask = VK_IMAGE_ASPECT_COLOR_BIT,
1001 .baseMipLevel = 0,
1002 .levelCount = 1,
1003 .baseArrayLayer = 0,
1004 .layerCount = 1,
1005 };
1006
1007 anv_cmd_clear_image(cmd_buffer, anv_image_from_handle(dest_image),
1008 VK_IMAGE_LAYOUT_COLOR_ATTACHMENT_OPTIMAL,
1009 &clear_value, 1, &range);
1010 }
1011
1012 void anv_CmdFillBuffer(
1013 VkCommandBuffer commandBuffer,
1014 VkBuffer dstBuffer,
1015 VkDeviceSize dstOffset,
1016 VkDeviceSize fillSize,
1017 uint32_t data)
1018 {
1019 ANV_FROM_HANDLE(anv_cmd_buffer, cmd_buffer, commandBuffer);
1020 ANV_FROM_HANDLE(anv_buffer, dst_buffer, dstBuffer);
1021 struct anv_meta_saved_state saved_state;
1022
1023 meta_clear_begin(&saved_state, cmd_buffer);
1024
1025 VkFormat format;
1026 int bs;
1027 if ((fillSize & 15) == 0 && (dstOffset & 15) == 0) {
1028 format = VK_FORMAT_R32G32B32A32_UINT;
1029 bs = 16;
1030 } else if ((fillSize & 7) == 0 && (dstOffset & 15) == 0) {
1031 format = VK_FORMAT_R32G32_UINT;
1032 bs = 8;
1033 } else {
1034 assert((fillSize & 3) == 0 && (dstOffset & 3) == 0);
1035 format = VK_FORMAT_R32_UINT;
1036 bs = 4;
1037 }
1038
1039 /* This is maximum possible width/height our HW can handle */
1040 const uint64_t max_surface_dim = 1 << 14;
1041
1042 /* First, we make a bunch of max-sized copies */
1043 const uint64_t max_fill_size = max_surface_dim * max_surface_dim * bs;
1044 while (fillSize > max_fill_size) {
1045 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1046 dst_buffer->offset + dstOffset,
1047 max_surface_dim, max_surface_dim, format, data);
1048 fillSize -= max_fill_size;
1049 dstOffset += max_fill_size;
1050 }
1051
1052 uint64_t height = fillSize / (max_surface_dim * bs);
1053 assert(height < max_surface_dim);
1054 if (height != 0) {
1055 const uint64_t rect_fill_size = height * max_surface_dim * bs;
1056 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1057 dst_buffer->offset + dstOffset,
1058 max_surface_dim, height, format, data);
1059 fillSize -= rect_fill_size;
1060 dstOffset += rect_fill_size;
1061 }
1062
1063 if (fillSize != 0) {
1064 do_buffer_fill(cmd_buffer, dst_buffer->bo,
1065 dst_buffer->offset + dstOffset,
1066 fillSize / bs, 1, format, data);
1067 }
1068
1069 meta_clear_end(&saved_state, cmd_buffer);
1070 }