src/intel/vulkan/anv_pipeline_cache.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/blob.h"
  25 #include "util/hash_table.h"
  26 #include "util/debug.h"
  27 #include "util/disk_cache.h"
  28 #include "util/mesa-sha1.h"
  29 #include "nir/nir_serialize.h"
  30 #include "anv_private.h"
  31 #include "nir/nir_xfb_info.h"
  32
  33 struct anv_shader_bin *
  34 anv_shader_bin_create(struct anv_device *device,
  35                       gl_shader_stage stage,
  36                       const void *key_data, uint32_t key_size,
  37                       const void *kernel_data, uint32_t kernel_size,
  38                       const void *constant_data, uint32_t constant_data_size,
  39                       const struct brw_stage_prog_data *prog_data_in,
  40                       uint32_t prog_data_size,
  41                       const struct brw_compile_stats *stats, uint32_t num_stats,
  42                       const nir_xfb_info *xfb_info_in,
  43                       const struct anv_pipeline_bind_map *bind_map)
  44 {
  45    struct anv_shader_bin *shader;
  46    struct anv_shader_bin_key *key;
  47    struct brw_stage_prog_data *prog_data;
  48    uint32_t *prog_data_param;
  49    nir_xfb_info *xfb_info;
  50    struct anv_pipeline_binding *surface_to_descriptor, *sampler_to_descriptor;
  51
  52    ANV_MULTIALLOC(ma);
  53    anv_multialloc_add(&ma, &shader, 1);
  54    anv_multialloc_add_size(&ma, &key, sizeof(*key) + key_size);
  55    anv_multialloc_add_size(&ma, &prog_data, prog_data_size);
  56    anv_multialloc_add(&ma, &prog_data_param, prog_data_in->nr_params);
  57    if (xfb_info_in) {
  58       uint32_t xfb_info_size = nir_xfb_info_size(xfb_info_in->output_count);
  59       anv_multialloc_add_size(&ma, &xfb_info, xfb_info_size);
  60    }
  61    anv_multialloc_add(&ma, &surface_to_descriptor,
  62                            bind_map->surface_count);
  63    anv_multialloc_add(&ma, &sampler_to_descriptor,
  64                            bind_map->sampler_count);
  65
  66    if (!anv_multialloc_alloc(&ma, &device->vk.alloc,
  67                              VK_SYSTEM_ALLOCATION_SCOPE_DEVICE))
  68       return NULL;
  69
  70    shader->ref_cnt = 1;
  71
  72    shader->stage = stage;
  73
  74    key->size = key_size;
  75    memcpy(key->data, key_data, key_size);
  76    shader->key = key;
  77
  78    shader->kernel =
  79       anv_state_pool_alloc(&device->instruction_state_pool, kernel_size, 64);
  80    memcpy(shader->kernel.map, kernel_data, kernel_size);
  81    shader->kernel_size = kernel_size;
  82
  83    if (constant_data_size) {
  84       shader->constant_data =
  85          anv_state_pool_alloc(&device->dynamic_state_pool,
  86                               constant_data_size, 32);
  87       memcpy(shader->constant_data.map, constant_data, constant_data_size);
  88    } else {
  89       shader->constant_data = ANV_STATE_NULL;
  90    }
  91    shader->constant_data_size = constant_data_size;
  92
  93    memcpy(prog_data, prog_data_in, prog_data_size);
  94    memset(prog_data_param, 0,
  95           prog_data->nr_params * sizeof(*prog_data_param));
  96    prog_data->param = prog_data_param;
  97    shader->prog_data = prog_data;
  98    shader->prog_data_size = prog_data_size;
  99
 100    assert(num_stats <= ARRAY_SIZE(shader->stats));
 101    typed_memcpy(shader->stats, stats, num_stats);
 102    shader->num_stats = num_stats;
 103
 104    if (xfb_info_in) {
 105       *xfb_info = *xfb_info_in;
 106       typed_memcpy(xfb_info->outputs, xfb_info_in->outputs,
 107                    xfb_info_in->output_count);
 108       shader->xfb_info = xfb_info;
 109    } else {
 110       shader->xfb_info = NULL;
 111    }
 112
 113    shader->bind_map = *bind_map;
 114    typed_memcpy(surface_to_descriptor, bind_map->surface_to_descriptor,
 115                 bind_map->surface_count);
 116    shader->bind_map.surface_to_descriptor = surface_to_descriptor;
 117    typed_memcpy(sampler_to_descriptor, bind_map->sampler_to_descriptor,
 118                 bind_map->sampler_count);
 119    shader->bind_map.sampler_to_descriptor = sampler_to_descriptor;
 120
 121    return shader;
 122 }
 123
 124 void
 125 anv_shader_bin_destroy(struct anv_device *device,
 126                        struct anv_shader_bin *shader)
 127 {
 128    assert(shader->ref_cnt == 0);
 129    anv_state_pool_free(&device->instruction_state_pool, shader->kernel);
 130    anv_state_pool_free(&device->dynamic_state_pool, shader->constant_data);
 131    vk_free(&device->vk.alloc, shader);
 132 }
 133
 134 static bool
 135 anv_shader_bin_write_to_blob(const struct anv_shader_bin *shader,
 136                              struct blob *blob)
 137 {
 138    blob_write_uint32(blob, shader->stage);
 139
 140    blob_write_uint32(blob, shader->key->size);
 141    blob_write_bytes(blob, shader->key->data, shader->key->size);
 142
 143    blob_write_uint32(blob, shader->kernel_size);
 144    blob_write_bytes(blob, shader->kernel.map, shader->kernel_size);
 145
 146    blob_write_uint32(blob, shader->constant_data_size);
 147    blob_write_bytes(blob, shader->constant_data.map,
 148                     shader->constant_data_size);
 149
 150    blob_write_uint32(blob, shader->prog_data_size);
 151    blob_write_bytes(blob, shader->prog_data, shader->prog_data_size);
 152
 153    blob_write_uint32(blob, shader->num_stats);
 154    blob_write_bytes(blob, shader->stats,
 155                     shader->num_stats * sizeof(shader->stats[0]));
 156
 157    if (shader->xfb_info) {
 158       uint32_t xfb_info_size =
 159          nir_xfb_info_size(shader->xfb_info->output_count);
 160       blob_write_uint32(blob, xfb_info_size);
 161       blob_write_bytes(blob, shader->xfb_info, xfb_info_size);
 162    } else {
 163       blob_write_uint32(blob, 0);
 164    }
 165
 166    blob_write_bytes(blob, shader->bind_map.surface_sha1,
 167                     sizeof(shader->bind_map.surface_sha1));
 168    blob_write_bytes(blob, shader->bind_map.sampler_sha1,
 169                     sizeof(shader->bind_map.sampler_sha1));
 170    blob_write_bytes(blob, shader->bind_map.push_sha1,
 171                     sizeof(shader->bind_map.push_sha1));
 172    blob_write_uint32(blob, shader->bind_map.surface_count);
 173    blob_write_uint32(blob, shader->bind_map.sampler_count);
 174    blob_write_bytes(blob, shader->bind_map.surface_to_descriptor,
 175                     shader->bind_map.surface_count *
 176                     sizeof(*shader->bind_map.surface_to_descriptor));
 177    blob_write_bytes(blob, shader->bind_map.sampler_to_descriptor,
 178                     shader->bind_map.sampler_count *
 179                     sizeof(*shader->bind_map.sampler_to_descriptor));
 180    blob_write_bytes(blob, shader->bind_map.push_ranges,
 181                     sizeof(shader->bind_map.push_ranges));
 182
 183    return !blob->out_of_memory;
 184 }
 185
 186 static struct anv_shader_bin *
 187 anv_shader_bin_create_from_blob(struct anv_device *device,
 188                                 struct blob_reader *blob)
 189 {
 190    gl_shader_stage stage = blob_read_uint32(blob);
 191
 192    uint32_t key_size = blob_read_uint32(blob);
 193    const void *key_data = blob_read_bytes(blob, key_size);
 194
 195    uint32_t kernel_size = blob_read_uint32(blob);
 196    const void *kernel_data = blob_read_bytes(blob, kernel_size);
 197
 198    uint32_t constant_data_size = blob_read_uint32(blob);
 199    const void *constant_data = blob_read_bytes(blob, constant_data_size);
 200
 201    uint32_t prog_data_size = blob_read_uint32(blob);
 202    const struct brw_stage_prog_data *prog_data =
 203       blob_read_bytes(blob, prog_data_size);
 204    if (blob->overrun)
 205       return NULL;
 206
 207    uint32_t num_stats = blob_read_uint32(blob);
 208    const struct brw_compile_stats *stats =
 209       blob_read_bytes(blob, num_stats * sizeof(stats[0]));
 210
 211    const nir_xfb_info *xfb_info = NULL;
 212    uint32_t xfb_size = blob_read_uint32(blob);
 213    if (xfb_size)
 214       xfb_info = blob_read_bytes(blob, xfb_size);
 215
 216    struct anv_pipeline_bind_map bind_map;
 217    blob_copy_bytes(blob, bind_map.surface_sha1, sizeof(bind_map.surface_sha1));
 218    blob_copy_bytes(blob, bind_map.sampler_sha1, sizeof(bind_map.sampler_sha1));
 219    blob_copy_bytes(blob, bind_map.push_sha1, sizeof(bind_map.push_sha1));
 220    bind_map.surface_count = blob_read_uint32(blob);
 221    bind_map.sampler_count = blob_read_uint32(blob);
 222    bind_map.surface_to_descriptor = (void *)
 223       blob_read_bytes(blob, bind_map.surface_count *
 224                             sizeof(*bind_map.surface_to_descriptor));
 225    bind_map.sampler_to_descriptor = (void *)
 226       blob_read_bytes(blob, bind_map.sampler_count *
 227                             sizeof(*bind_map.sampler_to_descriptor));
 228    blob_copy_bytes(blob, bind_map.push_ranges, sizeof(bind_map.push_ranges));
 229
 230    if (blob->overrun)
 231       return NULL;
 232
 233    return anv_shader_bin_create(device, stage,
 234                                 key_data, key_size,
 235                                 kernel_data, kernel_size,
 236                                 constant_data, constant_data_size,
 237                                 prog_data, prog_data_size,
 238                                 stats, num_stats, xfb_info, &bind_map);
 239 }
 240
 241 /* Remaining work:
 242  *
 243  * - Compact binding table layout so it's tight and not dependent on
 244  *   descriptor set layout.
 245  *
 246  * - Review prog_data struct for size and cacheability: struct
 247  *   brw_stage_prog_data has binding_table which uses a lot of uint32_t for 8
 248  *   bit quantities etc; use bit fields for all bools, eg dual_src_blend.
 249  */
 250
 251 static uint32_t
 252 shader_bin_key_hash_func(const void *void_key)
 253 {
 254    const struct anv_shader_bin_key *key = void_key;
 255    return _mesa_hash_data(key->data, key->size);
 256 }
 257
 258 static bool
 259 shader_bin_key_compare_func(const void *void_a, const void *void_b)
 260 {
 261    const struct anv_shader_bin_key *a = void_a, *b = void_b;
 262    if (a->size != b->size)
 263       return false;
 264
 265    return memcmp(a->data, b->data, a->size) == 0;
 266 }
 267
 268 static uint32_t
 269 sha1_hash_func(const void *sha1)
 270 {
 271    return _mesa_hash_data(sha1, 20);
 272 }
 273
 274 static bool
 275 sha1_compare_func(const void *sha1_a, const void *sha1_b)
 276 {
 277    return memcmp(sha1_a, sha1_b, 20) == 0;
 278 }
 279
 280 void
 281 anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
 282                         struct anv_device *device,
 283                         bool cache_enabled)
 284 {
 285    vk_object_base_init(&device->vk, &cache->base,
 286                        VK_OBJECT_TYPE_PIPELINE_CACHE);
 287    cache->device = device;
 288    pthread_mutex_init(&cache->mutex, NULL);
 289
 290    if (cache_enabled) {
 291       cache->cache = _mesa_hash_table_create(NULL, shader_bin_key_hash_func,
 292                                              shader_bin_key_compare_func);
 293       cache->nir_cache = _mesa_hash_table_create(NULL, sha1_hash_func,
 294                                                  sha1_compare_func);
 295    } else {
 296       cache->cache = NULL;
 297       cache->nir_cache = NULL;
 298    }
 299 }
 300
 301 void
 302 anv_pipeline_cache_finish(struct anv_pipeline_cache *cache)
 303 {
 304    pthread_mutex_destroy(&cache->mutex);
 305
 306    if (cache->cache) {
 307       /* This is a bit unfortunate.  In order to keep things from randomly
 308        * going away, the shader cache has to hold a reference to all shader
 309        * binaries it contains.  We unref them when we destroy the cache.
 310        */
 311       hash_table_foreach(cache->cache, entry)
 312          anv_shader_bin_unref(cache->device, entry->data);
 313
 314       _mesa_hash_table_destroy(cache->cache, NULL);
 315    }
 316
 317    if (cache->nir_cache) {
 318       hash_table_foreach(cache->nir_cache, entry)
 319          ralloc_free(entry->data);
 320
 321       _mesa_hash_table_destroy(cache->nir_cache, NULL);
 322    }
 323
 324    vk_object_base_finish(&cache->base);
 325 }
 326
 327 static struct anv_shader_bin *
 328 anv_pipeline_cache_search_locked(struct anv_pipeline_cache *cache,
 329                                  const void *key_data, uint32_t key_size)
 330 {
 331    uint32_t vla[1 + DIV_ROUND_UP(key_size, sizeof(uint32_t))];
 332    struct anv_shader_bin_key *key = (void *)vla;
 333    key->size = key_size;
 334    memcpy(key->data, key_data, key_size);
 335
 336    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, key);
 337    if (entry)
 338       return entry->data;
 339    else
 340       return NULL;
 341 }
 342
 343 struct anv_shader_bin *
 344 anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
 345                           const void *key_data, uint32_t key_size)
 346 {
 347    if (!cache->cache)
 348       return NULL;
 349
 350    pthread_mutex_lock(&cache->mutex);
 351
 352    struct anv_shader_bin *shader =
 353       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 354
 355    pthread_mutex_unlock(&cache->mutex);
 356
 357    /* We increment refcount before handing it to the caller */
 358    if (shader)
 359       anv_shader_bin_ref(shader);
 360
 361    return shader;
 362 }
 363
 364 static void
 365 anv_pipeline_cache_add_shader_bin(struct anv_pipeline_cache *cache,
 366                                   struct anv_shader_bin *bin)
 367 {
 368    if (!cache->cache)
 369       return;
 370
 371    pthread_mutex_lock(&cache->mutex);
 372
 373    struct hash_entry *entry = _mesa_hash_table_search(cache->cache, bin->key);
 374    if (entry == NULL) {
 375       /* Take a reference for the cache */
 376       anv_shader_bin_ref(bin);
 377       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 378    }
 379
 380    pthread_mutex_unlock(&cache->mutex);
 381 }
 382
 383 static struct anv_shader_bin *
 384 anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
 385                                      gl_shader_stage stage,
 386                                      const void *key_data, uint32_t key_size,
 387                                      const void *kernel_data,
 388                                      uint32_t kernel_size,
 389                                      const void *constant_data,
 390                                      uint32_t constant_data_size,
 391                                      const struct brw_stage_prog_data *prog_data,
 392                                      uint32_t prog_data_size,
 393                                      const struct brw_compile_stats *stats,
 394                                      uint32_t num_stats,
 395                                      const nir_xfb_info *xfb_info,
 396                                      const struct anv_pipeline_bind_map *bind_map)
 397 {
 398    struct anv_shader_bin *shader =
 399       anv_pipeline_cache_search_locked(cache, key_data, key_size);
 400    if (shader)
 401       return shader;
 402
 403    struct anv_shader_bin *bin =
 404       anv_shader_bin_create(cache->device, stage,
 405                             key_data, key_size,
 406                             kernel_data, kernel_size,
 407                             constant_data, constant_data_size,
 408                             prog_data, prog_data_size,
 409                             stats, num_stats, xfb_info, bind_map);
 410    if (!bin)
 411       return NULL;
 412
 413    _mesa_hash_table_insert(cache->cache, bin->key, bin);
 414
 415    return bin;
 416 }
 417
 418 struct anv_shader_bin *
 419 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
 420                                  gl_shader_stage stage,
 421                                  const void *key_data, uint32_t key_size,
 422                                  const void *kernel_data, uint32_t kernel_size,
 423                                  const void *constant_data,
 424                                  uint32_t constant_data_size,
 425                                  const struct brw_stage_prog_data *prog_data,
 426                                  uint32_t prog_data_size,
 427                                  const struct brw_compile_stats *stats,
 428                                  uint32_t num_stats,
 429                                  const nir_xfb_info *xfb_info,
 430                                  const struct anv_pipeline_bind_map *bind_map)
 431 {
 432    if (cache->cache) {
 433       pthread_mutex_lock(&cache->mutex);
 434
 435       struct anv_shader_bin *bin =
 436          anv_pipeline_cache_add_shader_locked(cache, stage, key_data, key_size,
 437                                               kernel_data, kernel_size,
 438                                               constant_data, constant_data_size,
 439                                               prog_data, prog_data_size,
 440                                               stats, num_stats,
 441                                               xfb_info, bind_map);
 442
 443       pthread_mutex_unlock(&cache->mutex);
 444
 445       /* We increment refcount before handing it to the caller */
 446       if (bin)
 447          anv_shader_bin_ref(bin);
 448
 449       return bin;
 450    } else {
 451       /* In this case, we're not caching it so the caller owns it entirely */
 452       return anv_shader_bin_create(cache->device, stage,
 453                                    key_data, key_size,
 454                                    kernel_data, kernel_size,
 455                                    constant_data, constant_data_size,
 456                                    prog_data, prog_data_size,
 457                                    stats, num_stats,
 458                                    xfb_info, bind_map);
 459    }
 460 }
 461
 462 struct cache_header {
 463    uint32_t header_size;
 464    uint32_t header_version;
 465    uint32_t vendor_id;
 466    uint32_t device_id;
 467    uint8_t  uuid[VK_UUID_SIZE];
 468 };
 469
 470 static void
 471 anv_pipeline_cache_load(struct anv_pipeline_cache *cache,
 472                         const void *data, size_t size)
 473 {
 474    struct anv_device *device = cache->device;
 475    struct anv_physical_device *pdevice = device->physical;
 476
 477    if (cache->cache == NULL)
 478       return;
 479
 480    struct blob_reader blob;
 481    blob_reader_init(&blob, data, size);
 482
 483    struct cache_header header;
 484    blob_copy_bytes(&blob, &header, sizeof(header));
 485    uint32_t count = blob_read_uint32(&blob);
 486    if (blob.overrun)
 487       return;
 488
 489    if (header.header_size < sizeof(header))
 490       return;
 491    if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
 492       return;
 493    if (header.vendor_id != 0x8086)
 494       return;
 495    if (header.device_id != device->info.chipset_id)
 496       return;
 497    if (memcmp(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE) != 0)
 498       return;
 499
 500    for (uint32_t i = 0; i < count; i++) {
 501       struct anv_shader_bin *bin =
 502          anv_shader_bin_create_from_blob(device, &blob);
 503       if (!bin)
 504          break;
 505       _mesa_hash_table_insert(cache->cache, bin->key, bin);
 506    }
 507 }
 508
 509 VkResult anv_CreatePipelineCache(
 510     VkDevice                                    _device,
 511     const VkPipelineCacheCreateInfo*            pCreateInfo,
 512     const VkAllocationCallbacks*                pAllocator,
 513     VkPipelineCache*                            pPipelineCache)
 514 {
 515    ANV_FROM_HANDLE(anv_device, device, _device);
 516    struct anv_pipeline_cache *cache;
 517
 518    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
 519    assert(pCreateInfo->flags == 0);
 520
 521    cache = vk_alloc2(&device->vk.alloc, pAllocator,
 522                        sizeof(*cache), 8,
 523                        VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 524    if (cache == NULL)
 525       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 526
 527    anv_pipeline_cache_init(cache, device,
 528                            device->physical->instance->pipeline_cache_enabled);
 529
 530    if (pCreateInfo->initialDataSize > 0)
 531       anv_pipeline_cache_load(cache,
 532                               pCreateInfo->pInitialData,
 533                               pCreateInfo->initialDataSize);
 534
 535    *pPipelineCache = anv_pipeline_cache_to_handle(cache);
 536
 537    return VK_SUCCESS;
 538 }
 539
 540 void anv_DestroyPipelineCache(
 541     VkDevice                                    _device,
 542     VkPipelineCache                             _cache,
 543     const VkAllocationCallbacks*                pAllocator)
 544 {
 545    ANV_FROM_HANDLE(anv_device, device, _device);
 546    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 547
 548    if (!cache)
 549       return;
 550
 551    anv_pipeline_cache_finish(cache);
 552
 553    vk_free2(&device->vk.alloc, pAllocator, cache);
 554 }
 555
 556 VkResult anv_GetPipelineCacheData(
 557     VkDevice                                    _device,
 558     VkPipelineCache                             _cache,
 559     size_t*                                     pDataSize,
 560     void*                                       pData)
 561 {
 562    ANV_FROM_HANDLE(anv_device, device, _device);
 563    ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
 564
 565    struct blob blob;
 566    if (pData) {
 567       blob_init_fixed(&blob, pData, *pDataSize);
 568    } else {
 569       blob_init_fixed(&blob, NULL, SIZE_MAX);
 570    }
 571
 572    struct cache_header header = {
 573       .header_size = sizeof(struct cache_header),
 574       .header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE,
 575       .vendor_id = 0x8086,
 576       .device_id = device->info.chipset_id,
 577    };
 578    memcpy(header.uuid, device->physical->pipeline_cache_uuid, VK_UUID_SIZE);
 579    blob_write_bytes(&blob, &header, sizeof(header));
 580
 581    uint32_t count = 0;
 582    intptr_t count_offset = blob_reserve_uint32(&blob);
 583    if (count_offset < 0) {
 584       *pDataSize = 0;
 585       blob_finish(&blob);
 586       return VK_INCOMPLETE;
 587    }
 588
 589    VkResult result = VK_SUCCESS;
 590    if (cache->cache) {
 591       hash_table_foreach(cache->cache, entry) {
 592          struct anv_shader_bin *shader = entry->data;
 593
 594          size_t save_size = blob.size;
 595          if (!anv_shader_bin_write_to_blob(shader, &blob)) {
 596             /* If it fails reset to the previous size and bail */
 597             blob.size = save_size;
 598             result = VK_INCOMPLETE;
 599             break;
 600          }
 601
 602          count++;
 603       }
 604    }
 605
 606    blob_overwrite_uint32(&blob, count_offset, count);
 607
 608    *pDataSize = blob.size;
 609
 610    blob_finish(&blob);
 611
 612    return result;
 613 }
 614
 615 VkResult anv_MergePipelineCaches(
 616     VkDevice                                    _device,
 617     VkPipelineCache                             destCache,
 618     uint32_t                                    srcCacheCount,
 619     const VkPipelineCache*                      pSrcCaches)
 620 {
 621    ANV_FROM_HANDLE(anv_pipeline_cache, dst, destCache);
 622
 623    if (!dst->cache)
 624       return VK_SUCCESS;
 625
 626    for (uint32_t i = 0; i < srcCacheCount; i++) {
 627       ANV_FROM_HANDLE(anv_pipeline_cache, src, pSrcCaches[i]);
 628       if (!src->cache)
 629          continue;
 630
 631       hash_table_foreach(src->cache, entry) {
 632          struct anv_shader_bin *bin = entry->data;
 633          assert(bin);
 634
 635          if (_mesa_hash_table_search(dst->cache, bin->key))
 636             continue;
 637
 638          anv_shader_bin_ref(bin);
 639          _mesa_hash_table_insert(dst->cache, bin->key, bin);
 640       }
 641    }
 642
 643    return VK_SUCCESS;
 644 }
 645
 646 struct anv_shader_bin *
 647 anv_device_search_for_kernel(struct anv_device *device,
 648                              struct anv_pipeline_cache *cache,
 649                              const void *key_data, uint32_t key_size,
 650                              bool *user_cache_hit)
 651 {
 652    struct anv_shader_bin *bin;
 653
 654    *user_cache_hit = false;
 655
 656    if (cache) {
 657       bin = anv_pipeline_cache_search(cache, key_data, key_size);
 658       if (bin) {
 659          *user_cache_hit = cache != &device->default_pipeline_cache;
 660          return bin;
 661       }
 662    }
 663
 664 #ifdef ENABLE_SHADER_CACHE
 665    struct disk_cache *disk_cache = device->physical->disk_cache;
 666    if (disk_cache && device->physical->instance->pipeline_cache_enabled) {
 667       cache_key cache_key;
 668       disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 669
 670       size_t buffer_size;
 671       uint8_t *buffer = disk_cache_get(disk_cache, cache_key, &buffer_size);
 672       if (buffer) {
 673          struct blob_reader blob;
 674          blob_reader_init(&blob, buffer, buffer_size);
 675          bin = anv_shader_bin_create_from_blob(device, &blob);
 676          free(buffer);
 677
 678          if (bin) {
 679             if (cache)
 680                anv_pipeline_cache_add_shader_bin(cache, bin);
 681             return bin;
 682          }
 683       }
 684    }
 685 #endif
 686
 687    return NULL;
 688 }
 689
 690 struct anv_shader_bin *
 691 anv_device_upload_kernel(struct anv_device *device,
 692                          struct anv_pipeline_cache *cache,
 693                          gl_shader_stage stage,
 694                          const void *key_data, uint32_t key_size,
 695                          const void *kernel_data, uint32_t kernel_size,
 696                          const void *constant_data,
 697                          uint32_t constant_data_size,
 698                          const struct brw_stage_prog_data *prog_data,
 699                          uint32_t prog_data_size,
 700                          const struct brw_compile_stats *stats,
 701                          uint32_t num_stats,
 702                          const nir_xfb_info *xfb_info,
 703                          const struct anv_pipeline_bind_map *bind_map)
 704 {
 705    struct anv_shader_bin *bin;
 706    if (cache) {
 707       bin = anv_pipeline_cache_upload_kernel(cache, stage, key_data, key_size,
 708                                              kernel_data, kernel_size,
 709                                              constant_data, constant_data_size,
 710                                              prog_data, prog_data_size,
 711                                              stats, num_stats,
 712                                              xfb_info, bind_map);
 713    } else {
 714       bin = anv_shader_bin_create(device, stage, key_data, key_size,
 715                                   kernel_data, kernel_size,
 716                                   constant_data, constant_data_size,
 717                                   prog_data, prog_data_size,
 718                                   stats, num_stats,
 719                                   xfb_info, bind_map);
 720    }
 721
 722    if (bin == NULL)
 723       return NULL;
 724
 725 #ifdef ENABLE_SHADER_CACHE
 726    struct disk_cache *disk_cache = device->physical->disk_cache;
 727    if (disk_cache) {
 728       struct blob binary;
 729       blob_init(&binary);
 730       if (anv_shader_bin_write_to_blob(bin, &binary)) {
 731          cache_key cache_key;
 732          disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
 733
 734          disk_cache_put(disk_cache, cache_key, binary.data, binary.size, NULL);
 735       }
 736
 737       blob_finish(&binary);
 738    }
 739 #endif
 740
 741    return bin;
 742 }
 743
 744 struct serialized_nir {
 745    unsigned char sha1_key[20];
 746    size_t size;
 747    char data[0];
 748 };
 749
 750 struct nir_shader *
 751 anv_device_search_for_nir(struct anv_device *device,
 752                           struct anv_pipeline_cache *cache,
 753                           const nir_shader_compiler_options *nir_options,
 754                           unsigned char sha1_key[20],
 755                           void *mem_ctx)
 756 {
 757    if (cache && cache->nir_cache) {
 758       const struct serialized_nir *snir = NULL;
 759
 760       pthread_mutex_lock(&cache->mutex);
 761       struct hash_entry *entry =
 762          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 763       if (entry)
 764          snir = entry->data;
 765       pthread_mutex_unlock(&cache->mutex);
 766
 767       if (snir) {
 768          struct blob_reader blob;
 769          blob_reader_init(&blob, snir->data, snir->size);
 770
 771          nir_shader *nir = nir_deserialize(mem_ctx, nir_options, &blob);
 772          if (blob.overrun) {
 773             ralloc_free(nir);
 774          } else {
 775             return nir;
 776          }
 777       }
 778    }
 779
 780    return NULL;
 781 }
 782
 783 void
 784 anv_device_upload_nir(struct anv_device *device,
 785                       struct anv_pipeline_cache *cache,
 786                       const struct nir_shader *nir,
 787                       unsigned char sha1_key[20])
 788 {
 789    if (cache && cache->nir_cache) {
 790       pthread_mutex_lock(&cache->mutex);
 791       struct hash_entry *entry =
 792          _mesa_hash_table_search(cache->nir_cache, sha1_key);
 793       pthread_mutex_unlock(&cache->mutex);
 794       if (entry)
 795          return;
 796
 797       struct blob blob;
 798       blob_init(&blob);
 799
 800       nir_serialize(&blob, nir, false);
 801       if (blob.out_of_memory) {
 802          blob_finish(&blob);
 803          return;
 804       }
 805
 806       pthread_mutex_lock(&cache->mutex);
 807       /* Because ralloc isn't thread-safe, we have to do all this inside the
 808        * lock.  We could unlock for the big memcpy but it's probably not worth
 809        * the hassle.
 810        */
 811       entry = _mesa_hash_table_search(cache->nir_cache, sha1_key);
 812       if (entry) {
 813          blob_finish(&blob);
 814          pthread_mutex_unlock(&cache->mutex);
 815          return;
 816       }
 817
 818       struct serialized_nir *snir =
 819          ralloc_size(cache->nir_cache, sizeof(*snir) + blob.size);
 820       memcpy(snir->sha1_key, sha1_key, 20);
 821       snir->size = blob.size;
 822       memcpy(snir->data, blob.data, blob.size);
 823
 824       blob_finish(&blob);
 825
 826       _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir);
 827
 828       pthread_mutex_unlock(&cache->mutex);
 829    }
 830 }