anv: Pre-compute push ranges for graphics pipelines
[mesa.git] / src / intel / vulkan / anv_pipeline_cache.c
1 /*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "util/blob.h"
25 #include "util/hash_table.h"
26 #include "util/debug.h"
27 #include "util/disk_cache.h"
28 #include "util/mesa-sha1.h"
29 #include "nir/nir_serialize.h"
30 #include "anv_private.h"
31 #include "nir/nir_xfb_info.h"
32
33 struct anv_shader_bin *
34 anv_shader_bin_create(struct anv_device *device,
35 const void *key_data, uint32_t key_size,
36 const void *kernel_data, uint32_t kernel_size,
37 const void *constant_data, uint32_t constant_data_size,
38 const struct brw_stage_prog_data *prog_data_in,
39 uint32_t prog_data_size, const void *prog_data_param_in,
40 const struct brw_compile_stats *stats, uint32_t num_stats,
41 const nir_xfb_info *xfb_info_in,
42 const struct anv_pipeline_bind_map *bind_map)
43 {
44 struct anv_shader_bin *shader;
45 struct anv_shader_bin_key *key;
46 struct brw_stage_prog_data *prog_data;
47 uint32_t *prog_data_param;
48 nir_xfb_info *xfb_info;
49 struct anv_pipeline_binding *surface_to_descriptor, *sampler_to_descriptor;
50
51 ANV_MULTIALLOC(ma);
52 anv_multialloc_add(&ma, &shader, 1);
53 anv_multialloc_add_size(&ma, &key, sizeof(*key) + key_size);
54 anv_multialloc_add_size(&ma, &prog_data, prog_data_size);
55 anv_multialloc_add(&ma, &prog_data_param, prog_data_in->nr_params);
56 if (xfb_info_in) {
57 uint32_t xfb_info_size = nir_xfb_info_size(xfb_info_in->output_count);
58 anv_multialloc_add_size(&ma, &xfb_info, xfb_info_size);
59 }
60 anv_multialloc_add(&ma, &surface_to_descriptor,
61 bind_map->surface_count);
62 anv_multialloc_add(&ma, &sampler_to_descriptor,
63 bind_map->sampler_count);
64
65 if (!anv_multialloc_alloc(&ma, &device->alloc,
66 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE))
67 return NULL;
68
69 shader->ref_cnt = 1;
70
71 key->size = key_size;
72 memcpy(key->data, key_data, key_size);
73 shader->key = key;
74
75 shader->kernel =
76 anv_state_pool_alloc(&device->instruction_state_pool, kernel_size, 64);
77 memcpy(shader->kernel.map, kernel_data, kernel_size);
78 shader->kernel_size = kernel_size;
79
80 if (constant_data_size) {
81 shader->constant_data =
82 anv_state_pool_alloc(&device->dynamic_state_pool,
83 constant_data_size, 32);
84 memcpy(shader->constant_data.map, constant_data, constant_data_size);
85 } else {
86 shader->constant_data = ANV_STATE_NULL;
87 }
88 shader->constant_data_size = constant_data_size;
89
90 memcpy(prog_data, prog_data_in, prog_data_size);
91 memcpy(prog_data_param, prog_data_param_in,
92 prog_data->nr_params * sizeof(*prog_data_param));
93 prog_data->param = prog_data_param;
94 shader->prog_data = prog_data;
95 shader->prog_data_size = prog_data_size;
96
97 assert(num_stats <= ARRAY_SIZE(shader->stats));
98 typed_memcpy(shader->stats, stats, num_stats);
99 shader->num_stats = num_stats;
100
101 if (xfb_info_in) {
102 *xfb_info = *xfb_info_in;
103 typed_memcpy(xfb_info->outputs, xfb_info_in->outputs,
104 xfb_info_in->output_count);
105 shader->xfb_info = xfb_info;
106 } else {
107 shader->xfb_info = NULL;
108 }
109
110 shader->bind_map = *bind_map;
111 typed_memcpy(surface_to_descriptor, bind_map->surface_to_descriptor,
112 bind_map->surface_count);
113 shader->bind_map.surface_to_descriptor = surface_to_descriptor;
114 typed_memcpy(sampler_to_descriptor, bind_map->sampler_to_descriptor,
115 bind_map->sampler_count);
116 shader->bind_map.sampler_to_descriptor = sampler_to_descriptor;
117
118 return shader;
119 }
120
121 void
122 anv_shader_bin_destroy(struct anv_device *device,
123 struct anv_shader_bin *shader)
124 {
125 assert(shader->ref_cnt == 0);
126 anv_state_pool_free(&device->instruction_state_pool, shader->kernel);
127 anv_state_pool_free(&device->dynamic_state_pool, shader->constant_data);
128 vk_free(&device->alloc, shader);
129 }
130
131 static bool
132 anv_shader_bin_write_to_blob(const struct anv_shader_bin *shader,
133 struct blob *blob)
134 {
135 blob_write_uint32(blob, shader->key->size);
136 blob_write_bytes(blob, shader->key->data, shader->key->size);
137
138 blob_write_uint32(blob, shader->kernel_size);
139 blob_write_bytes(blob, shader->kernel.map, shader->kernel_size);
140
141 blob_write_uint32(blob, shader->constant_data_size);
142 blob_write_bytes(blob, shader->constant_data.map,
143 shader->constant_data_size);
144
145 blob_write_uint32(blob, shader->prog_data_size);
146 blob_write_bytes(blob, shader->prog_data, shader->prog_data_size);
147 blob_write_bytes(blob, shader->prog_data->param,
148 shader->prog_data->nr_params *
149 sizeof(*shader->prog_data->param));
150
151 blob_write_uint32(blob, shader->num_stats);
152 blob_write_bytes(blob, shader->stats,
153 shader->num_stats * sizeof(shader->stats[0]));
154
155 if (shader->xfb_info) {
156 uint32_t xfb_info_size =
157 nir_xfb_info_size(shader->xfb_info->output_count);
158 blob_write_uint32(blob, xfb_info_size);
159 blob_write_bytes(blob, shader->xfb_info, xfb_info_size);
160 } else {
161 blob_write_uint32(blob, 0);
162 }
163
164 blob_write_uint32(blob, shader->bind_map.surface_count);
165 blob_write_uint32(blob, shader->bind_map.sampler_count);
166 blob_write_bytes(blob, shader->bind_map.surface_to_descriptor,
167 shader->bind_map.surface_count *
168 sizeof(*shader->bind_map.surface_to_descriptor));
169 blob_write_bytes(blob, shader->bind_map.sampler_to_descriptor,
170 shader->bind_map.sampler_count *
171 sizeof(*shader->bind_map.sampler_to_descriptor));
172 blob_write_bytes(blob, shader->bind_map.push_ranges,
173 sizeof(shader->bind_map.push_ranges));
174
175 return !blob->out_of_memory;
176 }
177
178 static struct anv_shader_bin *
179 anv_shader_bin_create_from_blob(struct anv_device *device,
180 struct blob_reader *blob)
181 {
182 uint32_t key_size = blob_read_uint32(blob);
183 const void *key_data = blob_read_bytes(blob, key_size);
184
185 uint32_t kernel_size = blob_read_uint32(blob);
186 const void *kernel_data = blob_read_bytes(blob, kernel_size);
187
188 uint32_t constant_data_size = blob_read_uint32(blob);
189 const void *constant_data = blob_read_bytes(blob, constant_data_size);
190
191 uint32_t prog_data_size = blob_read_uint32(blob);
192 const struct brw_stage_prog_data *prog_data =
193 blob_read_bytes(blob, prog_data_size);
194 if (blob->overrun)
195 return NULL;
196 const void *prog_data_param =
197 blob_read_bytes(blob, prog_data->nr_params * sizeof(*prog_data->param));
198
199 uint32_t num_stats = blob_read_uint32(blob);
200 const struct brw_compile_stats *stats =
201 blob_read_bytes(blob, num_stats * sizeof(stats[0]));
202
203 const nir_xfb_info *xfb_info = NULL;
204 uint32_t xfb_size = blob_read_uint32(blob);
205 if (xfb_size)
206 xfb_info = blob_read_bytes(blob, xfb_size);
207
208 struct anv_pipeline_bind_map bind_map;
209 bind_map.surface_count = blob_read_uint32(blob);
210 bind_map.sampler_count = blob_read_uint32(blob);
211 bind_map.surface_to_descriptor = (void *)
212 blob_read_bytes(blob, bind_map.surface_count *
213 sizeof(*bind_map.surface_to_descriptor));
214 bind_map.sampler_to_descriptor = (void *)
215 blob_read_bytes(blob, bind_map.sampler_count *
216 sizeof(*bind_map.sampler_to_descriptor));
217 blob_copy_bytes(blob, bind_map.push_ranges, sizeof(bind_map.push_ranges));
218
219 if (blob->overrun)
220 return NULL;
221
222 return anv_shader_bin_create(device,
223 key_data, key_size,
224 kernel_data, kernel_size,
225 constant_data, constant_data_size,
226 prog_data, prog_data_size, prog_data_param,
227 stats, num_stats, xfb_info, &bind_map);
228 }
229
230 /* Remaining work:
231 *
232 * - Compact binding table layout so it's tight and not dependent on
233 * descriptor set layout.
234 *
235 * - Review prog_data struct for size and cacheability: struct
236 * brw_stage_prog_data has binding_table which uses a lot of uint32_t for 8
237 * bit quantities etc; use bit fields for all bools, eg dual_src_blend.
238 */
239
240 static uint32_t
241 shader_bin_key_hash_func(const void *void_key)
242 {
243 const struct anv_shader_bin_key *key = void_key;
244 return _mesa_hash_data(key->data, key->size);
245 }
246
247 static bool
248 shader_bin_key_compare_func(const void *void_a, const void *void_b)
249 {
250 const struct anv_shader_bin_key *a = void_a, *b = void_b;
251 if (a->size != b->size)
252 return false;
253
254 return memcmp(a->data, b->data, a->size) == 0;
255 }
256
257 static uint32_t
258 sha1_hash_func(const void *sha1)
259 {
260 return _mesa_hash_data(sha1, 20);
261 }
262
263 static bool
264 sha1_compare_func(const void *sha1_a, const void *sha1_b)
265 {
266 return memcmp(sha1_a, sha1_b, 20) == 0;
267 }
268
269 void
270 anv_pipeline_cache_init(struct anv_pipeline_cache *cache,
271 struct anv_device *device,
272 bool cache_enabled)
273 {
274 cache->device = device;
275 pthread_mutex_init(&cache->mutex, NULL);
276
277 if (cache_enabled) {
278 cache->cache = _mesa_hash_table_create(NULL, shader_bin_key_hash_func,
279 shader_bin_key_compare_func);
280 cache->nir_cache = _mesa_hash_table_create(NULL, sha1_hash_func,
281 sha1_compare_func);
282 } else {
283 cache->cache = NULL;
284 cache->nir_cache = NULL;
285 }
286 }
287
288 void
289 anv_pipeline_cache_finish(struct anv_pipeline_cache *cache)
290 {
291 pthread_mutex_destroy(&cache->mutex);
292
293 if (cache->cache) {
294 /* This is a bit unfortunate. In order to keep things from randomly
295 * going away, the shader cache has to hold a reference to all shader
296 * binaries it contains. We unref them when we destroy the cache.
297 */
298 hash_table_foreach(cache->cache, entry)
299 anv_shader_bin_unref(cache->device, entry->data);
300
301 _mesa_hash_table_destroy(cache->cache, NULL);
302 }
303
304 if (cache->nir_cache) {
305 hash_table_foreach(cache->nir_cache, entry)
306 ralloc_free(entry->data);
307
308 _mesa_hash_table_destroy(cache->nir_cache, NULL);
309 }
310 }
311
312 static struct anv_shader_bin *
313 anv_pipeline_cache_search_locked(struct anv_pipeline_cache *cache,
314 const void *key_data, uint32_t key_size)
315 {
316 uint32_t vla[1 + DIV_ROUND_UP(key_size, sizeof(uint32_t))];
317 struct anv_shader_bin_key *key = (void *)vla;
318 key->size = key_size;
319 memcpy(key->data, key_data, key_size);
320
321 struct hash_entry *entry = _mesa_hash_table_search(cache->cache, key);
322 if (entry)
323 return entry->data;
324 else
325 return NULL;
326 }
327
328 struct anv_shader_bin *
329 anv_pipeline_cache_search(struct anv_pipeline_cache *cache,
330 const void *key_data, uint32_t key_size)
331 {
332 if (!cache->cache)
333 return NULL;
334
335 pthread_mutex_lock(&cache->mutex);
336
337 struct anv_shader_bin *shader =
338 anv_pipeline_cache_search_locked(cache, key_data, key_size);
339
340 pthread_mutex_unlock(&cache->mutex);
341
342 /* We increment refcount before handing it to the caller */
343 if (shader)
344 anv_shader_bin_ref(shader);
345
346 return shader;
347 }
348
349 static void
350 anv_pipeline_cache_add_shader_bin(struct anv_pipeline_cache *cache,
351 struct anv_shader_bin *bin)
352 {
353 if (!cache->cache)
354 return;
355
356 pthread_mutex_lock(&cache->mutex);
357
358 struct hash_entry *entry = _mesa_hash_table_search(cache->cache, bin->key);
359 if (entry == NULL) {
360 /* Take a reference for the cache */
361 anv_shader_bin_ref(bin);
362 _mesa_hash_table_insert(cache->cache, bin->key, bin);
363 }
364
365 pthread_mutex_unlock(&cache->mutex);
366 }
367
368 static struct anv_shader_bin *
369 anv_pipeline_cache_add_shader_locked(struct anv_pipeline_cache *cache,
370 const void *key_data, uint32_t key_size,
371 const void *kernel_data,
372 uint32_t kernel_size,
373 const void *constant_data,
374 uint32_t constant_data_size,
375 const struct brw_stage_prog_data *prog_data,
376 uint32_t prog_data_size,
377 const void *prog_data_param,
378 const struct brw_compile_stats *stats,
379 uint32_t num_stats,
380 const nir_xfb_info *xfb_info,
381 const struct anv_pipeline_bind_map *bind_map)
382 {
383 struct anv_shader_bin *shader =
384 anv_pipeline_cache_search_locked(cache, key_data, key_size);
385 if (shader)
386 return shader;
387
388 struct anv_shader_bin *bin =
389 anv_shader_bin_create(cache->device, key_data, key_size,
390 kernel_data, kernel_size,
391 constant_data, constant_data_size,
392 prog_data, prog_data_size, prog_data_param,
393 stats, num_stats, xfb_info, bind_map);
394 if (!bin)
395 return NULL;
396
397 _mesa_hash_table_insert(cache->cache, bin->key, bin);
398
399 return bin;
400 }
401
402 struct anv_shader_bin *
403 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache *cache,
404 const void *key_data, uint32_t key_size,
405 const void *kernel_data, uint32_t kernel_size,
406 const void *constant_data,
407 uint32_t constant_data_size,
408 const struct brw_stage_prog_data *prog_data,
409 uint32_t prog_data_size,
410 const struct brw_compile_stats *stats,
411 uint32_t num_stats,
412 const nir_xfb_info *xfb_info,
413 const struct anv_pipeline_bind_map *bind_map)
414 {
415 if (cache->cache) {
416 pthread_mutex_lock(&cache->mutex);
417
418 struct anv_shader_bin *bin =
419 anv_pipeline_cache_add_shader_locked(cache, key_data, key_size,
420 kernel_data, kernel_size,
421 constant_data, constant_data_size,
422 prog_data, prog_data_size,
423 prog_data->param,
424 stats, num_stats,
425 xfb_info, bind_map);
426
427 pthread_mutex_unlock(&cache->mutex);
428
429 /* We increment refcount before handing it to the caller */
430 if (bin)
431 anv_shader_bin_ref(bin);
432
433 return bin;
434 } else {
435 /* In this case, we're not caching it so the caller owns it entirely */
436 return anv_shader_bin_create(cache->device, key_data, key_size,
437 kernel_data, kernel_size,
438 constant_data, constant_data_size,
439 prog_data, prog_data_size,
440 prog_data->param,
441 stats, num_stats,
442 xfb_info, bind_map);
443 }
444 }
445
446 struct cache_header {
447 uint32_t header_size;
448 uint32_t header_version;
449 uint32_t vendor_id;
450 uint32_t device_id;
451 uint8_t uuid[VK_UUID_SIZE];
452 };
453
454 static void
455 anv_pipeline_cache_load(struct anv_pipeline_cache *cache,
456 const void *data, size_t size)
457 {
458 struct anv_device *device = cache->device;
459 struct anv_physical_device *pdevice = &device->instance->physicalDevice;
460
461 if (cache->cache == NULL)
462 return;
463
464 struct blob_reader blob;
465 blob_reader_init(&blob, data, size);
466
467 struct cache_header header;
468 blob_copy_bytes(&blob, &header, sizeof(header));
469 uint32_t count = blob_read_uint32(&blob);
470 if (blob.overrun)
471 return;
472
473 if (header.header_size < sizeof(header))
474 return;
475 if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
476 return;
477 if (header.vendor_id != 0x8086)
478 return;
479 if (header.device_id != device->chipset_id)
480 return;
481 if (memcmp(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE) != 0)
482 return;
483
484 for (uint32_t i = 0; i < count; i++) {
485 struct anv_shader_bin *bin =
486 anv_shader_bin_create_from_blob(device, &blob);
487 if (!bin)
488 break;
489 _mesa_hash_table_insert(cache->cache, bin->key, bin);
490 }
491 }
492
493 VkResult anv_CreatePipelineCache(
494 VkDevice _device,
495 const VkPipelineCacheCreateInfo* pCreateInfo,
496 const VkAllocationCallbacks* pAllocator,
497 VkPipelineCache* pPipelineCache)
498 {
499 ANV_FROM_HANDLE(anv_device, device, _device);
500 struct anv_pipeline_cache *cache;
501
502 assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
503 assert(pCreateInfo->flags == 0);
504
505 cache = vk_alloc2(&device->alloc, pAllocator,
506 sizeof(*cache), 8,
507 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
508 if (cache == NULL)
509 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
510
511 anv_pipeline_cache_init(cache, device,
512 device->instance->pipeline_cache_enabled);
513
514 if (pCreateInfo->initialDataSize > 0)
515 anv_pipeline_cache_load(cache,
516 pCreateInfo->pInitialData,
517 pCreateInfo->initialDataSize);
518
519 *pPipelineCache = anv_pipeline_cache_to_handle(cache);
520
521 return VK_SUCCESS;
522 }
523
524 void anv_DestroyPipelineCache(
525 VkDevice _device,
526 VkPipelineCache _cache,
527 const VkAllocationCallbacks* pAllocator)
528 {
529 ANV_FROM_HANDLE(anv_device, device, _device);
530 ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
531
532 if (!cache)
533 return;
534
535 anv_pipeline_cache_finish(cache);
536
537 vk_free2(&device->alloc, pAllocator, cache);
538 }
539
540 VkResult anv_GetPipelineCacheData(
541 VkDevice _device,
542 VkPipelineCache _cache,
543 size_t* pDataSize,
544 void* pData)
545 {
546 ANV_FROM_HANDLE(anv_device, device, _device);
547 ANV_FROM_HANDLE(anv_pipeline_cache, cache, _cache);
548 struct anv_physical_device *pdevice = &device->instance->physicalDevice;
549
550 struct blob blob;
551 if (pData) {
552 blob_init_fixed(&blob, pData, *pDataSize);
553 } else {
554 blob_init_fixed(&blob, NULL, SIZE_MAX);
555 }
556
557 struct cache_header header = {
558 .header_size = sizeof(struct cache_header),
559 .header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE,
560 .vendor_id = 0x8086,
561 .device_id = device->chipset_id,
562 };
563 memcpy(header.uuid, pdevice->pipeline_cache_uuid, VK_UUID_SIZE);
564 blob_write_bytes(&blob, &header, sizeof(header));
565
566 uint32_t count = 0;
567 intptr_t count_offset = blob_reserve_uint32(&blob);
568 if (count_offset < 0) {
569 *pDataSize = 0;
570 blob_finish(&blob);
571 return VK_INCOMPLETE;
572 }
573
574 VkResult result = VK_SUCCESS;
575 if (cache->cache) {
576 hash_table_foreach(cache->cache, entry) {
577 struct anv_shader_bin *shader = entry->data;
578
579 size_t save_size = blob.size;
580 if (!anv_shader_bin_write_to_blob(shader, &blob)) {
581 /* If it fails reset to the previous size and bail */
582 blob.size = save_size;
583 result = VK_INCOMPLETE;
584 break;
585 }
586
587 count++;
588 }
589 }
590
591 blob_overwrite_uint32(&blob, count_offset, count);
592
593 *pDataSize = blob.size;
594
595 blob_finish(&blob);
596
597 return result;
598 }
599
600 VkResult anv_MergePipelineCaches(
601 VkDevice _device,
602 VkPipelineCache destCache,
603 uint32_t srcCacheCount,
604 const VkPipelineCache* pSrcCaches)
605 {
606 ANV_FROM_HANDLE(anv_pipeline_cache, dst, destCache);
607
608 if (!dst->cache)
609 return VK_SUCCESS;
610
611 for (uint32_t i = 0; i < srcCacheCount; i++) {
612 ANV_FROM_HANDLE(anv_pipeline_cache, src, pSrcCaches[i]);
613 if (!src->cache)
614 continue;
615
616 hash_table_foreach(src->cache, entry) {
617 struct anv_shader_bin *bin = entry->data;
618 assert(bin);
619
620 if (_mesa_hash_table_search(dst->cache, bin->key))
621 continue;
622
623 anv_shader_bin_ref(bin);
624 _mesa_hash_table_insert(dst->cache, bin->key, bin);
625 }
626 }
627
628 return VK_SUCCESS;
629 }
630
631 struct anv_shader_bin *
632 anv_device_search_for_kernel(struct anv_device *device,
633 struct anv_pipeline_cache *cache,
634 const void *key_data, uint32_t key_size,
635 bool *user_cache_hit)
636 {
637 struct anv_shader_bin *bin;
638
639 *user_cache_hit = false;
640
641 if (cache) {
642 bin = anv_pipeline_cache_search(cache, key_data, key_size);
643 if (bin) {
644 *user_cache_hit = cache != &device->default_pipeline_cache;
645 return bin;
646 }
647 }
648
649 #ifdef ENABLE_SHADER_CACHE
650 struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache;
651 if (disk_cache && device->instance->pipeline_cache_enabled) {
652 cache_key cache_key;
653 disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
654
655 size_t buffer_size;
656 uint8_t *buffer = disk_cache_get(disk_cache, cache_key, &buffer_size);
657 if (buffer) {
658 struct blob_reader blob;
659 blob_reader_init(&blob, buffer, buffer_size);
660 bin = anv_shader_bin_create_from_blob(device, &blob);
661 free(buffer);
662
663 if (bin) {
664 if (cache)
665 anv_pipeline_cache_add_shader_bin(cache, bin);
666 return bin;
667 }
668 }
669 }
670 #endif
671
672 return NULL;
673 }
674
675 struct anv_shader_bin *
676 anv_device_upload_kernel(struct anv_device *device,
677 struct anv_pipeline_cache *cache,
678 const void *key_data, uint32_t key_size,
679 const void *kernel_data, uint32_t kernel_size,
680 const void *constant_data,
681 uint32_t constant_data_size,
682 const struct brw_stage_prog_data *prog_data,
683 uint32_t prog_data_size,
684 const struct brw_compile_stats *stats,
685 uint32_t num_stats,
686 const nir_xfb_info *xfb_info,
687 const struct anv_pipeline_bind_map *bind_map)
688 {
689 struct anv_shader_bin *bin;
690 if (cache) {
691 bin = anv_pipeline_cache_upload_kernel(cache, key_data, key_size,
692 kernel_data, kernel_size,
693 constant_data, constant_data_size,
694 prog_data, prog_data_size,
695 stats, num_stats,
696 xfb_info, bind_map);
697 } else {
698 bin = anv_shader_bin_create(device, key_data, key_size,
699 kernel_data, kernel_size,
700 constant_data, constant_data_size,
701 prog_data, prog_data_size,
702 prog_data->param,
703 stats, num_stats,
704 xfb_info, bind_map);
705 }
706
707 if (bin == NULL)
708 return NULL;
709
710 #ifdef ENABLE_SHADER_CACHE
711 struct disk_cache *disk_cache = device->instance->physicalDevice.disk_cache;
712 if (disk_cache) {
713 struct blob binary;
714 blob_init(&binary);
715 if (anv_shader_bin_write_to_blob(bin, &binary)) {
716 cache_key cache_key;
717 disk_cache_compute_key(disk_cache, key_data, key_size, cache_key);
718
719 disk_cache_put(disk_cache, cache_key, binary.data, binary.size, NULL);
720 }
721
722 blob_finish(&binary);
723 }
724 #endif
725
726 return bin;
727 }
728
729 struct serialized_nir {
730 unsigned char sha1_key[20];
731 size_t size;
732 char data[0];
733 };
734
735 struct nir_shader *
736 anv_device_search_for_nir(struct anv_device *device,
737 struct anv_pipeline_cache *cache,
738 const nir_shader_compiler_options *nir_options,
739 unsigned char sha1_key[20],
740 void *mem_ctx)
741 {
742 if (cache && cache->nir_cache) {
743 const struct serialized_nir *snir = NULL;
744
745 pthread_mutex_lock(&cache->mutex);
746 struct hash_entry *entry =
747 _mesa_hash_table_search(cache->nir_cache, sha1_key);
748 if (entry)
749 snir = entry->data;
750 pthread_mutex_unlock(&cache->mutex);
751
752 if (snir) {
753 struct blob_reader blob;
754 blob_reader_init(&blob, snir->data, snir->size);
755
756 nir_shader *nir = nir_deserialize(mem_ctx, nir_options, &blob);
757 if (blob.overrun) {
758 ralloc_free(nir);
759 } else {
760 return nir;
761 }
762 }
763 }
764
765 return NULL;
766 }
767
768 void
769 anv_device_upload_nir(struct anv_device *device,
770 struct anv_pipeline_cache *cache,
771 const struct nir_shader *nir,
772 unsigned char sha1_key[20])
773 {
774 if (cache && cache->nir_cache) {
775 pthread_mutex_lock(&cache->mutex);
776 struct hash_entry *entry =
777 _mesa_hash_table_search(cache->nir_cache, sha1_key);
778 pthread_mutex_unlock(&cache->mutex);
779 if (entry)
780 return;
781
782 struct blob blob;
783 blob_init(&blob);
784
785 nir_serialize(&blob, nir, false);
786 if (blob.out_of_memory) {
787 blob_finish(&blob);
788 return;
789 }
790
791 pthread_mutex_lock(&cache->mutex);
792 /* Because ralloc isn't thread-safe, we have to do all this inside the
793 * lock. We could unlock for the big memcpy but it's probably not worth
794 * the hassle.
795 */
796 entry = _mesa_hash_table_search(cache->nir_cache, sha1_key);
797 if (entry) {
798 blob_finish(&blob);
799 pthread_mutex_unlock(&cache->mutex);
800 return;
801 }
802
803 struct serialized_nir *snir =
804 ralloc_size(cache->nir_cache, sizeof(*snir) + blob.size);
805 memcpy(snir->sha1_key, sha1_key, 20);
806 snir->size = blob.size;
807 memcpy(snir->data, blob.data, blob.size);
808
809 blob_finish(&blob);
810
811 _mesa_hash_table_insert(cache->nir_cache, snir->sha1_key, snir);
812
813 pthread_mutex_unlock(&cache->mutex);
814 }
815 }