2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
43 #include "brw_device_info.h"
44 #include "util/macros.h"
45 #include "util/list.h"
47 /* Pre-declarations needed for WSI entrypoints */
50 typedef struct xcb_connection_t xcb_connection_t
;
51 typedef uint32_t xcb_visualid_t
;
52 typedef uint32_t xcb_window_t
;
54 #define VK_USE_PLATFORM_XCB_KHR
55 #define VK_USE_PLATFORM_WAYLAND_KHR
58 #include <vulkan/vulkan.h>
59 #include <vulkan/vulkan_intel.h>
60 #include <vulkan/vk_icd.h>
62 #include "anv_entrypoints.h"
63 #include "brw_context.h"
73 #define MAX_VIEWPORTS 16
74 #define MAX_SCISSORS 16
75 #define MAX_PUSH_CONSTANTS_SIZE 128
76 #define MAX_DYNAMIC_BUFFERS 16
78 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
80 #define anv_noreturn __attribute__((__noreturn__))
81 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
83 #define MIN(a, b) ((a) < (b) ? (a) : (b))
84 #define MAX(a, b) ((a) > (b) ? (a) : (b))
86 static inline uint32_t
87 align_u32(uint32_t v
, uint32_t a
)
89 assert(a
!= 0 && a
== (a
& -a
));
90 return (v
+ a
- 1) & ~(a
- 1);
93 static inline uint64_t
94 align_u64(uint64_t v
, uint64_t a
)
96 assert(a
!= 0 && a
== (a
& -a
));
97 return (v
+ a
- 1) & ~(a
- 1);
100 static inline int32_t
101 align_i32(int32_t v
, int32_t a
)
103 assert(a
!= 0 && a
== (a
& -a
));
104 return (v
+ a
- 1) & ~(a
- 1);
107 /** Alignment must be a power of 2. */
109 anv_is_aligned(uintmax_t n
, uintmax_t a
)
111 assert(a
== (a
& -a
));
112 return (n
& (a
- 1)) == 0;
115 static inline uint32_t
116 anv_minify(uint32_t n
, uint32_t levels
)
118 if (unlikely(n
== 0))
121 return MAX(n
>> levels
, 1);
125 anv_clamp_f(float f
, float min
, float max
)
138 anv_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
140 if (*inout_mask
& clear_mask
) {
141 *inout_mask
&= ~clear_mask
;
148 #define for_each_bit(b, dword) \
149 for (uint32_t __dword = (dword); \
150 (b) = __builtin_ffs(__dword) - 1, __dword; \
151 __dword &= ~(1 << (b)))
153 #define typed_memcpy(dest, src, count) ({ \
154 static_assert(sizeof(*src) == sizeof(*dest), ""); \
155 memcpy((dest), (src), (count) * sizeof(*(src))); \
158 #define zero(x) (memset(&(x), 0, sizeof(x)))
160 /* Define no kernel as 1, since that's an illegal offset for a kernel */
164 VkStructureType sType
;
168 /* Whenever we generate an error, pass it through this function. Useful for
169 * debugging, where we can break on it. Only call at error site, not when
170 * propagating errors. Might be useful to plug in a stack trace here.
173 VkResult
__vk_errorf(VkResult error
, const char *file
, int line
, const char *format
, ...);
176 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
177 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
179 #define vk_error(error) error
180 #define vk_errorf(error, format, ...) error
183 void __anv_finishme(const char *file
, int line
, const char *format
, ...)
184 anv_printflike(3, 4);
185 void anv_loge(const char *format
, ...) anv_printflike(1, 2);
186 void anv_loge_v(const char *format
, va_list va
);
189 * Print a FINISHME message, including its source location.
191 #define anv_finishme(format, ...) \
192 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
194 /* A non-fatal assert. Useful for debugging. */
196 #define anv_assert(x) ({ \
197 if (unlikely(!(x))) \
198 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
201 #define anv_assert(x)
205 * If a block of code is annotated with anv_validate, then the block runs only
209 #define anv_validate if (1)
211 #define anv_validate if (0)
214 void anv_abortf(const char *format
, ...) anv_noreturn
anv_printflike(1, 2);
215 void anv_abortfv(const char *format
, va_list va
) anv_noreturn
;
217 #define stub_return(v) \
219 anv_finishme("stub %s", __func__); \
225 anv_finishme("stub %s", __func__); \
230 * A dynamically growable, circular buffer. Elements are added at head and
231 * removed from tail. head and tail are free-running uint32_t indices and we
232 * only compute the modulo with size when accessing the array. This way,
233 * number of bytes in the queue is always head - tail, even in case of
240 uint32_t element_size
;
245 int anv_vector_init(struct anv_vector
*queue
, uint32_t element_size
, uint32_t size
);
246 void *anv_vector_add(struct anv_vector
*queue
);
247 void *anv_vector_remove(struct anv_vector
*queue
);
250 anv_vector_length(struct anv_vector
*queue
)
252 return (queue
->head
- queue
->tail
) / queue
->element_size
;
256 anv_vector_head(struct anv_vector
*vector
)
258 assert(vector
->tail
< vector
->head
);
259 return (void *)((char *)vector
->data
+
260 ((vector
->head
- vector
->element_size
) &
261 (vector
->size
- 1)));
265 anv_vector_tail(struct anv_vector
*vector
)
267 return (void *)((char *)vector
->data
+ (vector
->tail
& (vector
->size
- 1)));
271 anv_vector_finish(struct anv_vector
*queue
)
276 #define anv_vector_foreach(elem, queue) \
277 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
278 for (uint32_t __anv_vector_offset = (queue)->tail; \
279 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
280 __anv_vector_offset += (queue)->element_size)
285 /* Index into the current validation list. This is used by the
286 * validation list building alrogithm to track which buffers are already
287 * in the validation list so that we can ensure uniqueness.
291 /* Last known offset. This value is provided by the kernel when we
292 * execbuf and is used as the presumed offset for the next bunch of
300 /* We need to set the WRITE flag on winsys bos so GEM will know we're
301 * writing to them and synchronize uses on other rings (eg if the display
302 * server uses the blitter ring).
307 /* Represents a lock-free linked list of "free" things. This is used by
308 * both the block pool and the state pools. Unfortunately, in order to
309 * solve the ABA problem, we can't use a single uint32_t head.
311 union anv_free_list
{
315 /* A simple count that is incremented every time the head changes. */
321 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
323 struct anv_block_state
{
333 struct anv_block_pool
{
334 struct anv_device
*device
;
338 /* The offset from the start of the bo to the "center" of the block
339 * pool. Pointers to allocated blocks are given by
340 * bo.map + center_bo_offset + offsets.
342 uint32_t center_bo_offset
;
344 /* Current memory map of the block pool. This pointer may or may not
345 * point to the actual beginning of the block pool memory. If
346 * anv_block_pool_alloc_back has ever been called, then this pointer
347 * will point to the "center" position of the buffer and all offsets
348 * (negative or positive) given out by the block pool alloc functions
349 * will be valid relative to this pointer.
351 * In particular, map == bo.map + center_offset
357 * Array of mmaps and gem handles owned by the block pool, reclaimed when
358 * the block pool is destroyed.
360 struct anv_vector mmap_cleanups
;
364 union anv_free_list free_list
;
365 struct anv_block_state state
;
367 union anv_free_list back_free_list
;
368 struct anv_block_state back_state
;
371 /* Block pools are backed by a fixed-size 2GB memfd */
372 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
374 /* The center of the block pool is also the middle of the memfd. This may
375 * change in the future if we decide differently for some reason.
377 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
379 static inline uint32_t
380 anv_block_pool_size(struct anv_block_pool
*pool
)
382 return pool
->state
.end
+ pool
->back_state
.end
;
391 struct anv_fixed_size_state_pool
{
393 union anv_free_list free_list
;
394 struct anv_block_state block
;
397 #define ANV_MIN_STATE_SIZE_LOG2 6
398 #define ANV_MAX_STATE_SIZE_LOG2 10
400 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
402 struct anv_state_pool
{
403 struct anv_block_pool
*block_pool
;
404 struct anv_fixed_size_state_pool buckets
[ANV_STATE_BUCKETS
];
407 struct anv_state_stream_block
;
409 struct anv_state_stream
{
410 struct anv_block_pool
*block_pool
;
412 /* The current working block */
413 struct anv_state_stream_block
*block
;
415 /* Offset at which the current block starts */
417 /* Offset at which to allocate the next state */
419 /* Offset at which the current block ends */
423 #define CACHELINE_SIZE 64
424 #define CACHELINE_MASK 63
427 anv_clflush_range(void *start
, size_t size
)
429 void *p
= (void *) (((uintptr_t) start
) & ~CACHELINE_MASK
);
430 void *end
= start
+ size
;
432 __builtin_ia32_mfence();
434 __builtin_ia32_clflush(p
);
440 anv_state_clflush(struct anv_state state
)
442 anv_clflush_range(state
.map
, state
.alloc_size
);
445 void anv_block_pool_init(struct anv_block_pool
*pool
,
446 struct anv_device
*device
, uint32_t block_size
);
447 void anv_block_pool_finish(struct anv_block_pool
*pool
);
448 int32_t anv_block_pool_alloc(struct anv_block_pool
*pool
);
449 int32_t anv_block_pool_alloc_back(struct anv_block_pool
*pool
);
450 void anv_block_pool_free(struct anv_block_pool
*pool
, int32_t offset
);
451 void anv_state_pool_init(struct anv_state_pool
*pool
,
452 struct anv_block_pool
*block_pool
);
453 void anv_state_pool_finish(struct anv_state_pool
*pool
);
454 struct anv_state
anv_state_pool_alloc(struct anv_state_pool
*pool
,
455 size_t state_size
, size_t alignment
);
456 void anv_state_pool_free(struct anv_state_pool
*pool
, struct anv_state state
);
457 void anv_state_stream_init(struct anv_state_stream
*stream
,
458 struct anv_block_pool
*block_pool
);
459 void anv_state_stream_finish(struct anv_state_stream
*stream
);
460 struct anv_state
anv_state_stream_alloc(struct anv_state_stream
*stream
,
461 uint32_t size
, uint32_t alignment
);
464 * Implements a pool of re-usable BOs. The interface is identical to that
465 * of block_pool except that each block is its own BO.
468 struct anv_device
*device
;
475 void anv_bo_pool_init(struct anv_bo_pool
*pool
,
476 struct anv_device
*device
, uint32_t block_size
);
477 void anv_bo_pool_finish(struct anv_bo_pool
*pool
);
478 VkResult
anv_bo_pool_alloc(struct anv_bo_pool
*pool
, struct anv_bo
*bo
);
479 void anv_bo_pool_free(struct anv_bo_pool
*pool
, const struct anv_bo
*bo
);
482 void *anv_resolve_entrypoint(uint32_t index
);
484 extern struct anv_dispatch_table dtable
;
486 #define ANV_CALL(func) ({ \
487 if (dtable.func == NULL) { \
488 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
489 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
495 anv_alloc(const VkAllocationCallbacks
*alloc
,
496 size_t size
, size_t align
,
497 VkSystemAllocationScope scope
)
499 return alloc
->pfnAllocation(alloc
->pUserData
, size
, align
, scope
);
503 anv_realloc(const VkAllocationCallbacks
*alloc
,
504 void *ptr
, size_t size
, size_t align
,
505 VkSystemAllocationScope scope
)
507 return alloc
->pfnReallocation(alloc
->pUserData
, ptr
, size
, align
, scope
);
511 anv_free(const VkAllocationCallbacks
*alloc
, void *data
)
513 alloc
->pfnFree(alloc
->pUserData
, data
);
517 anv_alloc2(const VkAllocationCallbacks
*parent_alloc
,
518 const VkAllocationCallbacks
*alloc
,
519 size_t size
, size_t align
,
520 VkSystemAllocationScope scope
)
523 return anv_alloc(alloc
, size
, align
, scope
);
525 return anv_alloc(parent_alloc
, size
, align
, scope
);
529 anv_free2(const VkAllocationCallbacks
*parent_alloc
,
530 const VkAllocationCallbacks
*alloc
,
534 anv_free(alloc
, data
);
536 anv_free(parent_alloc
, data
);
539 struct anv_physical_device
{
540 VK_LOADER_DATA _loader_data
;
542 struct anv_instance
* instance
;
546 const struct brw_device_info
* info
;
547 uint64_t aperture_size
;
548 struct brw_compiler
* compiler
;
549 struct isl_device isl_dev
;
552 struct anv_wsi_interaface
;
554 #define VK_ICD_WSI_PLATFORM_MAX 5
556 struct anv_instance
{
557 VK_LOADER_DATA _loader_data
;
559 VkAllocationCallbacks alloc
;
562 int physicalDeviceCount
;
563 struct anv_physical_device physicalDevice
;
565 struct anv_wsi_interface
* wsi
[VK_ICD_WSI_PLATFORM_MAX
];
568 VkResult
anv_init_wsi(struct anv_instance
*instance
);
569 void anv_finish_wsi(struct anv_instance
*instance
);
571 struct anv_meta_state
{
572 VkAllocationCallbacks alloc
;
574 VkDescriptorPool desc_pool
;
577 * Use array element `i` for images with `2^i` samples.
581 * Pipeline N is used to clear color attachment N of the current
584 * HACK: We use one pipeline per color attachment to work around the
585 * compiler's inability to dynamically set the render target index of
586 * the render target write message.
588 struct anv_pipeline
*color_pipelines
[MAX_RTS
];
590 struct anv_pipeline
*depth_only_pipeline
;
591 struct anv_pipeline
*stencil_only_pipeline
;
592 struct anv_pipeline
*depthstencil_pipeline
;
593 } clear
[1 + MAX_SAMPLES_LOG2
];
596 VkRenderPass render_pass
;
598 /** Pipeline that blits from a 1D image. */
599 VkPipeline pipeline_1d_src
;
601 /** Pipeline that blits from a 2D image. */
602 VkPipeline pipeline_2d_src
;
604 /** Pipeline that blits from a 3D image. */
605 VkPipeline pipeline_3d_src
;
607 VkPipelineLayout pipeline_layout
;
608 VkDescriptorSetLayout ds_layout
;
612 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
613 VkPipeline pipelines
[MAX_SAMPLES_LOG2
];
616 VkPipelineLayout pipeline_layout
;
617 VkDescriptorSetLayout ds_layout
;
622 VK_LOADER_DATA _loader_data
;
624 struct anv_device
* device
;
626 struct anv_state_pool
* pool
;
629 struct anv_pipeline_cache
{
630 struct anv_device
* device
;
631 struct anv_state_stream program_stream
;
632 pthread_mutex_t mutex
;
636 uint32_t kernel_count
;
640 void anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
641 struct anv_device
*device
);
642 void anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
);
643 uint32_t anv_pipeline_cache_search(struct anv_pipeline_cache
*cache
,
644 const unsigned char *sha1
, void *prog_data
);
645 uint32_t anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache
*cache
,
646 const unsigned char *sha1
,
649 const void *prog_data
,
650 size_t prog_data_size
);
653 VK_LOADER_DATA _loader_data
;
655 VkAllocationCallbacks alloc
;
657 struct anv_instance
* instance
;
659 struct brw_device_info info
;
660 struct isl_device isl_dev
;
664 struct anv_bo_pool batch_bo_pool
;
666 struct anv_block_pool dynamic_state_block_pool
;
667 struct anv_state_pool dynamic_state_pool
;
669 struct anv_block_pool instruction_block_pool
;
670 struct anv_pipeline_cache default_pipeline_cache
;
672 struct anv_block_pool surface_state_block_pool
;
673 struct anv_state_pool surface_state_pool
;
675 struct anv_bo workaround_bo
;
677 struct anv_meta_state meta_state
;
679 struct anv_state border_colors
;
681 struct anv_queue queue
;
683 struct anv_block_pool scratch_block_pool
;
685 pthread_mutex_t mutex
;
688 VkResult
gen7_init_device_state(struct anv_device
*device
);
689 VkResult
gen75_init_device_state(struct anv_device
*device
);
690 VkResult
gen8_init_device_state(struct anv_device
*device
);
691 VkResult
gen9_init_device_state(struct anv_device
*device
);
693 void anv_device_get_cache_uuid(void *uuid
);
696 void* anv_gem_mmap(struct anv_device
*device
,
697 uint32_t gem_handle
, uint64_t offset
, uint64_t size
, uint32_t flags
);
698 void anv_gem_munmap(void *p
, uint64_t size
);
699 uint32_t anv_gem_create(struct anv_device
*device
, size_t size
);
700 void anv_gem_close(struct anv_device
*device
, uint32_t gem_handle
);
701 uint32_t anv_gem_userptr(struct anv_device
*device
, void *mem
, size_t size
);
702 int anv_gem_wait(struct anv_device
*device
, uint32_t gem_handle
, int64_t *timeout_ns
);
703 int anv_gem_execbuffer(struct anv_device
*device
,
704 struct drm_i915_gem_execbuffer2
*execbuf
);
705 int anv_gem_set_tiling(struct anv_device
*device
, uint32_t gem_handle
,
706 uint32_t stride
, uint32_t tiling
);
707 int anv_gem_create_context(struct anv_device
*device
);
708 int anv_gem_destroy_context(struct anv_device
*device
, int context
);
709 int anv_gem_get_param(int fd
, uint32_t param
);
710 bool anv_gem_get_bit6_swizzle(int fd
, uint32_t tiling
);
711 int anv_gem_get_aperture(int fd
, uint64_t *size
);
712 int anv_gem_handle_to_fd(struct anv_device
*device
, uint32_t gem_handle
);
713 uint32_t anv_gem_fd_to_handle(struct anv_device
*device
, int fd
);
714 int anv_gem_set_caching(struct anv_device
*device
, uint32_t gem_handle
, uint32_t caching
);
715 int anv_gem_set_domain(struct anv_device
*device
, uint32_t gem_handle
,
716 uint32_t read_domains
, uint32_t write_domain
);
718 VkResult
anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
);
720 struct anv_reloc_list
{
723 struct drm_i915_gem_relocation_entry
* relocs
;
724 struct anv_bo
** reloc_bos
;
727 VkResult
anv_reloc_list_init(struct anv_reloc_list
*list
,
728 const VkAllocationCallbacks
*alloc
);
729 void anv_reloc_list_finish(struct anv_reloc_list
*list
,
730 const VkAllocationCallbacks
*alloc
);
732 uint64_t anv_reloc_list_add(struct anv_reloc_list
*list
,
733 const VkAllocationCallbacks
*alloc
,
734 uint32_t offset
, struct anv_bo
*target_bo
,
737 struct anv_batch_bo
{
738 /* Link in the anv_cmd_buffer.owned_batch_bos list */
739 struct list_head link
;
743 /* Bytes actually consumed in this batch BO */
746 /* Last seen surface state block pool bo offset */
747 uint32_t last_ss_pool_bo_offset
;
749 struct anv_reloc_list relocs
;
753 const VkAllocationCallbacks
* alloc
;
759 struct anv_reloc_list
* relocs
;
761 /* This callback is called (with the associated user data) in the event
762 * that the batch runs out of space.
764 VkResult (*extend_cb
)(struct anv_batch
*, void *);
768 void *anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
);
769 void anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
);
770 uint64_t anv_batch_emit_reloc(struct anv_batch
*batch
,
771 void *location
, struct anv_bo
*bo
, uint32_t offset
);
772 VkResult
anv_device_submit_simple_batch(struct anv_device
*device
,
773 struct anv_batch
*batch
);
780 #define __gen_address_type struct anv_address
781 #define __gen_user_data struct anv_batch
783 static inline uint64_t
784 __gen_combine_address(struct anv_batch
*batch
, void *location
,
785 const struct anv_address address
, uint32_t delta
)
787 if (address
.bo
== NULL
) {
788 return address
.offset
+ delta
;
790 assert(batch
->start
<= location
&& location
< batch
->end
);
792 return anv_batch_emit_reloc(batch
, location
, address
.bo
, address
.offset
+ delta
);
796 /* Wrapper macros needed to work around preprocessor argument issues. In
797 * particular, arguments don't get pre-evaluated if they are concatenated.
798 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
799 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
800 * We can work around this easily enough with these helpers.
802 #define __anv_cmd_length(cmd) cmd ## _length
803 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
804 #define __anv_cmd_header(cmd) cmd ## _header
805 #define __anv_cmd_pack(cmd) cmd ## _pack
807 #define anv_batch_emit(batch, cmd, ...) do { \
808 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
809 struct cmd __template = { \
810 __anv_cmd_header(cmd), \
813 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
814 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
817 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
818 void *__dst = anv_batch_emit_dwords(batch, n); \
819 struct cmd __template = { \
820 __anv_cmd_header(cmd), \
821 .DWordLength = n - __anv_cmd_length_bias(cmd), \
824 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
828 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
832 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
833 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
834 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
835 dw[i] = (dwords0)[i] | (dwords1)[i]; \
836 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
839 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
840 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
841 struct anv_state __state = \
842 anv_state_pool_alloc((pool), __size, align); \
843 struct cmd __template = { \
846 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
847 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
848 if (!(pool)->block_pool->device->info.has_llc) \
849 anv_state_clflush(__state); \
853 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
854 .GraphicsDataTypeGFDT = 0, \
855 .LLCCacheabilityControlLLCCC = 0, \
856 .L3CacheabilityControlL3CC = 1, \
859 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
860 .LLCeLLCCacheabilityControlLLCCC = 0, \
861 .L3CacheabilityControlL3CC = 1, \
864 #define GEN8_MOCS { \
865 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
866 .TargetCache = L3DefertoPATforLLCeLLCselection, \
870 /* Skylake: MOCS is now an index into an array of 62 different caching
871 * configurations programmed by the kernel.
874 #define GEN9_MOCS { \
875 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
876 .IndextoMOCSTables = 2 \
879 #define GEN9_MOCS_PTE { \
880 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
881 .IndextoMOCSTables = 1 \
884 struct anv_device_memory
{
887 VkDeviceSize map_size
;
892 * Header for Vertex URB Entry (VUE)
894 struct anv_vue_header
{
896 uint32_t RTAIndex
; /* RenderTargetArrayIndex */
897 uint32_t ViewportIndex
;
901 struct anv_descriptor_set_binding_layout
{
902 /* Number of array elements in this binding */
905 /* Index into the flattend descriptor set */
906 uint16_t descriptor_index
;
908 /* Index into the dynamic state array for a dynamic buffer */
909 int16_t dynamic_offset_index
;
911 /* Index into the descriptor set buffer views */
912 int16_t buffer_index
;
915 /* Index into the binding table for the associated surface */
916 int16_t surface_index
;
918 /* Index into the sampler table for the associated sampler */
919 int16_t sampler_index
;
921 /* Index into the image table for the associated image */
923 } stage
[MESA_SHADER_STAGES
];
925 /* Immutable samplers (or NULL if no immutable samplers) */
926 struct anv_sampler
**immutable_samplers
;
929 struct anv_descriptor_set_layout
{
930 /* Number of bindings in this descriptor set */
931 uint16_t binding_count
;
933 /* Total size of the descriptor set with room for all array entries */
936 /* Shader stages affected by this descriptor set */
937 uint16_t shader_stages
;
939 /* Number of buffers in this descriptor set */
940 uint16_t buffer_count
;
942 /* Number of dynamic offsets used by this descriptor set */
943 uint16_t dynamic_offset_count
;
945 /* Bindings in this descriptor set */
946 struct anv_descriptor_set_binding_layout binding
[0];
949 struct anv_descriptor
{
950 VkDescriptorType type
;
954 struct anv_image_view
*image_view
;
955 struct anv_sampler
*sampler
;
958 struct anv_buffer_view
*buffer_view
;
962 struct anv_descriptor_set
{
963 const struct anv_descriptor_set_layout
*layout
;
965 uint32_t buffer_count
;
966 struct anv_buffer_view
*buffer_views
;
967 struct anv_descriptor descriptors
[0];
970 struct anv_descriptor_pool
{
975 struct anv_state_stream surface_state_stream
;
976 void *surface_state_free_list
;
982 anv_descriptor_set_create(struct anv_device
*device
,
983 struct anv_descriptor_pool
*pool
,
984 const struct anv_descriptor_set_layout
*layout
,
985 struct anv_descriptor_set
**out_set
);
988 anv_descriptor_set_destroy(struct anv_device
*device
,
989 struct anv_descriptor_pool
*pool
,
990 struct anv_descriptor_set
*set
);
992 struct anv_pipeline_binding
{
993 /* The descriptor set this surface corresponds to */
996 /* Offset into the descriptor set */
1000 struct anv_pipeline_layout
{
1002 struct anv_descriptor_set_layout
*layout
;
1003 uint32_t dynamic_offset_start
;
1009 bool has_dynamic_offsets
;
1010 } stage
[MESA_SHADER_STAGES
];
1014 struct anv_device
* device
;
1017 VkBufferUsageFlags usage
;
1019 /* Set when bound */
1021 VkDeviceSize offset
;
1024 enum anv_cmd_dirty_bits
{
1025 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1026 ANV_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1027 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1028 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
= 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1029 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
= 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1030 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
= 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1031 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1032 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1033 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1034 ANV_CMD_DIRTY_DYNAMIC_ALL
= (1 << 9) - 1,
1035 ANV_CMD_DIRTY_PIPELINE
= 1 << 9,
1036 ANV_CMD_DIRTY_INDEX_BUFFER
= 1 << 10,
1037 ANV_CMD_DIRTY_RENDER_TARGETS
= 1 << 11,
1039 typedef uint32_t anv_cmd_dirty_mask_t
;
1041 struct anv_vertex_binding
{
1042 struct anv_buffer
* buffer
;
1043 VkDeviceSize offset
;
1046 struct anv_push_constants
{
1047 /* Current allocated size of this push constants data structure.
1048 * Because a decent chunk of it may not be used (images on SKL, for
1049 * instance), we won't actually allocate the entire structure up-front.
1053 /* Push constant data provided by the client through vkPushConstants */
1054 uint8_t client_data
[MAX_PUSH_CONSTANTS_SIZE
];
1056 /* Our hardware only provides zero-based vertex and instance id so, in
1057 * order to satisfy the vulkan requirements, we may have to push one or
1058 * both of these into the shader.
1060 uint32_t base_vertex
;
1061 uint32_t base_instance
;
1063 /* Offsets and ranges for dynamically bound buffers */
1067 } dynamic
[MAX_DYNAMIC_BUFFERS
];
1069 /* Image data for image_load_store on pre-SKL */
1070 struct brw_image_param images
[MAX_IMAGES
];
1073 struct anv_dynamic_state
{
1076 VkViewport viewports
[MAX_VIEWPORTS
];
1081 VkRect2D scissors
[MAX_SCISSORS
];
1092 float blend_constants
[4];
1102 } stencil_compare_mask
;
1107 } stencil_write_mask
;
1112 } stencil_reference
;
1115 extern const struct anv_dynamic_state default_dynamic_state
;
1117 void anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
1118 const struct anv_dynamic_state
*src
,
1119 uint32_t copy_mask
);
1122 * Attachment state when recording a renderpass instance.
1124 * The clear value is valid only if there exists a pending clear.
1126 struct anv_attachment_state
{
1127 VkImageAspectFlags pending_clear_aspects
;
1128 VkClearValue clear_value
;
1131 /** State required while building cmd buffer */
1132 struct anv_cmd_state
{
1133 /* PIPELINE_SELECT.PipelineSelection */
1134 uint32_t current_pipeline
;
1135 uint32_t current_l3_config
;
1137 anv_cmd_dirty_mask_t dirty
;
1138 anv_cmd_dirty_mask_t compute_dirty
;
1139 uint32_t num_workgroups_offset
;
1140 struct anv_bo
*num_workgroups_bo
;
1141 VkShaderStageFlags descriptors_dirty
;
1142 VkShaderStageFlags push_constants_dirty
;
1143 uint32_t scratch_size
;
1144 struct anv_pipeline
* pipeline
;
1145 struct anv_pipeline
* compute_pipeline
;
1146 struct anv_framebuffer
* framebuffer
;
1147 struct anv_render_pass
* pass
;
1148 struct anv_subpass
* subpass
;
1149 uint32_t restart_index
;
1150 struct anv_vertex_binding vertex_bindings
[MAX_VBS
];
1151 struct anv_descriptor_set
* descriptors
[MAX_SETS
];
1152 struct anv_push_constants
* push_constants
[MESA_SHADER_STAGES
];
1153 struct anv_state binding_tables
[MESA_SHADER_STAGES
];
1154 struct anv_state samplers
[MESA_SHADER_STAGES
];
1155 struct anv_dynamic_state dynamic
;
1159 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1160 * valid only when recording a render pass instance.
1162 struct anv_attachment_state
* attachments
;
1165 struct anv_buffer
* index_buffer
;
1166 uint32_t index_type
; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1167 uint32_t index_offset
;
1171 struct anv_cmd_pool
{
1172 VkAllocationCallbacks alloc
;
1173 struct list_head cmd_buffers
;
1176 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1178 enum anv_cmd_buffer_exec_mode
{
1179 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY
,
1180 ANV_CMD_BUFFER_EXEC_MODE_EMIT
,
1181 ANV_CMD_BUFFER_EXEC_MODE_CHAIN
,
1182 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN
,
1185 struct anv_cmd_buffer
{
1186 VK_LOADER_DATA _loader_data
;
1188 struct anv_device
* device
;
1190 struct anv_cmd_pool
* pool
;
1191 struct list_head pool_link
;
1193 struct anv_batch batch
;
1195 /* Fields required for the actual chain of anv_batch_bo's.
1197 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1199 struct list_head batch_bos
;
1200 enum anv_cmd_buffer_exec_mode exec_mode
;
1202 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1203 * referenced by this command buffer
1205 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1207 struct anv_vector seen_bbos
;
1209 /* A vector of int32_t's for every block of binding tables.
1211 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1213 struct anv_vector bt_blocks
;
1215 struct anv_reloc_list surface_relocs
;
1217 /* Information needed for execbuf
1219 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1222 struct drm_i915_gem_execbuffer2 execbuf
;
1224 struct drm_i915_gem_exec_object2
* objects
;
1226 struct anv_bo
** bos
;
1228 /* Allocated length of the 'objects' and 'bos' arrays */
1229 uint32_t array_length
;
1234 /* Serial for tracking buffer completion */
1237 /* Stream objects for storing temporary data */
1238 struct anv_state_stream surface_state_stream
;
1239 struct anv_state_stream dynamic_state_stream
;
1241 VkCommandBufferUsageFlags usage_flags
;
1242 VkCommandBufferLevel level
;
1244 struct anv_cmd_state state
;
1247 VkResult
anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1248 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1249 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1250 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer
*cmd_buffer
);
1251 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer
*primary
,
1252 struct anv_cmd_buffer
*secondary
);
1253 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer
*cmd_buffer
);
1255 VkResult
anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1256 unsigned stage
, struct anv_state
*bt_state
);
1257 VkResult
anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
1258 unsigned stage
, struct anv_state
*state
);
1259 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
);
1260 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer
*cmd_buffer
,
1263 struct anv_state
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1264 const void *data
, uint32_t size
, uint32_t alignment
);
1265 struct anv_state
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1266 uint32_t *a
, uint32_t *b
,
1267 uint32_t dwords
, uint32_t alignment
);
1270 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1272 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1273 uint32_t entries
, uint32_t *state_offset
);
1275 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
);
1277 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer
*cmd_buffer
,
1278 uint32_t size
, uint32_t alignment
);
1281 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer
*cmd_buffer
);
1283 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
);
1284 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer
*cmd_buffer
);
1286 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1287 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1288 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1289 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1291 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1293 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer
*cmd_buffer
,
1294 const VkRenderPassBeginInfo
*info
);
1296 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1297 struct anv_subpass
*subpass
);
1298 void gen75_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1299 struct anv_subpass
*subpass
);
1300 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1301 struct anv_subpass
*subpass
);
1302 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1303 struct anv_subpass
*subpass
);
1304 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1305 struct anv_subpass
*subpass
);
1307 void gen7_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1308 void gen75_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1309 void gen8_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1310 void gen9_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1312 void gen7_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1313 void gen75_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1314 void gen8_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1315 void gen9_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1317 void gen7_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1318 void gen75_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1319 void gen8_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1320 void gen9_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1323 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
1324 gl_shader_stage stage
);
1326 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
);
1328 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1329 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1331 const struct anv_image_view
*
1332 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
);
1334 void anv_cmd_buffer_dump(struct anv_cmd_buffer
*cmd_buffer
);
1338 struct drm_i915_gem_execbuffer2 execbuf
;
1339 struct drm_i915_gem_exec_object2 exec2_objects
[1];
1345 struct anv_state state
;
1350 struct anv_shader_module
{
1351 struct nir_shader
* nir
;
1353 unsigned char sha1
[20];
1358 void anv_hash_shader(unsigned char *hash
, const void *key
, size_t key_size
,
1359 struct anv_shader_module
*module
,
1360 const char *entrypoint
,
1361 const VkSpecializationInfo
*spec_info
);
1363 static inline gl_shader_stage
1364 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1366 assert(__builtin_popcount(vk_stage
) == 1);
1367 return ffs(vk_stage
) - 1;
1370 static inline VkShaderStageFlagBits
1371 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1373 return (1 << mesa_stage
);
1376 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1378 #define anv_foreach_stage(stage, stage_bits) \
1379 for (gl_shader_stage stage, \
1380 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1381 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1382 __tmp &= ~(1 << (stage)))
1384 struct anv_pipeline_bind_map
{
1385 uint32_t surface_count
;
1386 uint32_t sampler_count
;
1387 uint32_t image_count
;
1389 struct anv_pipeline_binding
* surface_to_descriptor
;
1390 struct anv_pipeline_binding
* sampler_to_descriptor
;
1393 struct anv_pipeline
{
1394 struct anv_device
* device
;
1395 struct anv_batch batch
;
1396 uint32_t batch_data
[512];
1397 struct anv_reloc_list batch_relocs
;
1398 uint32_t dynamic_state_mask
;
1399 struct anv_dynamic_state dynamic_state
;
1401 struct anv_pipeline_layout
* layout
;
1402 struct anv_pipeline_bind_map bindings
[MESA_SHADER_STAGES
];
1406 struct brw_vs_prog_data vs_prog_data
;
1407 struct brw_wm_prog_data wm_prog_data
;
1408 struct brw_gs_prog_data gs_prog_data
;
1409 struct brw_cs_prog_data cs_prog_data
;
1410 bool writes_point_size
;
1411 struct brw_stage_prog_data
* prog_data
[MESA_SHADER_STAGES
];
1412 uint32_t scratch_start
[MESA_SHADER_STAGES
];
1413 uint32_t total_scratch
;
1417 uint32_t nr_vs_entries
;
1420 uint32_t nr_gs_entries
;
1423 VkShaderStageFlags active_stages
;
1424 struct anv_state blend_state
;
1431 uint32_t ps_grf_start0
;
1432 uint32_t ps_grf_start2
;
1437 uint32_t binding_stride
[MAX_VBS
];
1438 bool instancing_enable
[MAX_VBS
];
1439 bool primitive_restart
;
1442 uint32_t cs_thread_width_max
;
1443 uint32_t cs_right_mask
;
1447 uint32_t depth_stencil_state
[3];
1453 uint32_t wm_depth_stencil
[3];
1457 uint32_t wm_depth_stencil
[4];
1461 struct anv_graphics_pipeline_create_info
{
1463 * If non-negative, overrides the color attachment count of the pipeline's
1466 int8_t color_attachment_count
;
1469 bool disable_viewport
;
1470 bool disable_scissor
;
1476 anv_pipeline_init(struct anv_pipeline
*pipeline
, struct anv_device
*device
,
1477 struct anv_pipeline_cache
*cache
,
1478 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1479 const struct anv_graphics_pipeline_create_info
*extra
,
1480 const VkAllocationCallbacks
*alloc
);
1483 anv_pipeline_compile_cs(struct anv_pipeline
*pipeline
,
1484 struct anv_pipeline_cache
*cache
,
1485 const VkComputePipelineCreateInfo
*info
,
1486 struct anv_shader_module
*module
,
1487 const char *entrypoint
,
1488 const VkSpecializationInfo
*spec_info
);
1491 anv_graphics_pipeline_create(VkDevice device
,
1492 VkPipelineCache cache
,
1493 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1494 const struct anv_graphics_pipeline_create_info
*extra
,
1495 const VkAllocationCallbacks
*alloc
,
1496 VkPipeline
*pPipeline
);
1499 gen7_graphics_pipeline_create(VkDevice _device
,
1500 struct anv_pipeline_cache
*cache
,
1501 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1502 const struct anv_graphics_pipeline_create_info
*extra
,
1503 const VkAllocationCallbacks
*alloc
,
1504 VkPipeline
*pPipeline
);
1507 gen75_graphics_pipeline_create(VkDevice _device
,
1508 struct anv_pipeline_cache
*cache
,
1509 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1510 const struct anv_graphics_pipeline_create_info
*extra
,
1511 const VkAllocationCallbacks
*alloc
,
1512 VkPipeline
*pPipeline
);
1515 gen8_graphics_pipeline_create(VkDevice _device
,
1516 struct anv_pipeline_cache
*cache
,
1517 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1518 const struct anv_graphics_pipeline_create_info
*extra
,
1519 const VkAllocationCallbacks
*alloc
,
1520 VkPipeline
*pPipeline
);
1522 gen9_graphics_pipeline_create(VkDevice _device
,
1523 struct anv_pipeline_cache
*cache
,
1524 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1525 const struct anv_graphics_pipeline_create_info
*extra
,
1526 const VkAllocationCallbacks
*alloc
,
1527 VkPipeline
*pPipeline
);
1529 gen7_compute_pipeline_create(VkDevice _device
,
1530 struct anv_pipeline_cache
*cache
,
1531 const VkComputePipelineCreateInfo
*pCreateInfo
,
1532 const VkAllocationCallbacks
*alloc
,
1533 VkPipeline
*pPipeline
);
1535 gen75_compute_pipeline_create(VkDevice _device
,
1536 struct anv_pipeline_cache
*cache
,
1537 const VkComputePipelineCreateInfo
*pCreateInfo
,
1538 const VkAllocationCallbacks
*alloc
,
1539 VkPipeline
*pPipeline
);
1542 gen8_compute_pipeline_create(VkDevice _device
,
1543 struct anv_pipeline_cache
*cache
,
1544 const VkComputePipelineCreateInfo
*pCreateInfo
,
1545 const VkAllocationCallbacks
*alloc
,
1546 VkPipeline
*pPipeline
);
1548 gen9_compute_pipeline_create(VkDevice _device
,
1549 struct anv_pipeline_cache
*cache
,
1550 const VkComputePipelineCreateInfo
*pCreateInfo
,
1551 const VkAllocationCallbacks
*alloc
,
1552 VkPipeline
*pPipeline
);
1554 struct anv_format_swizzle
{
1562 const VkFormat vk_format
;
1564 enum isl_format isl_format
; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1565 const struct isl_format_layout
*isl_layout
;
1566 struct anv_format_swizzle swizzle
;
1571 const struct anv_format
*
1572 anv_format_for_vk_format(VkFormat format
);
1575 anv_get_isl_format(VkFormat format
, VkImageAspectFlags aspect
,
1576 VkImageTiling tiling
, struct anv_format_swizzle
*swizzle
);
1579 anv_format_is_color(const struct anv_format
*format
)
1581 return !format
->has_depth
&& !format
->has_stencil
;
1585 anv_format_is_depth_or_stencil(const struct anv_format
*format
)
1587 return format
->has_depth
|| format
->has_stencil
;
1591 * Subsurface of an anv_image.
1593 struct anv_surface
{
1594 struct isl_surf isl
;
1597 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1604 /* The original VkFormat provided by the client. This may not match any
1605 * of the actual surface formats.
1608 const struct anv_format
*format
;
1611 uint32_t array_size
;
1612 uint32_t samples
; /**< VkImageCreateInfo::samples */
1613 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1614 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1619 /* Set when bound */
1621 VkDeviceSize offset
;
1626 * For each foo, anv_image::foo_surface is valid if and only if
1627 * anv_image::format has a foo aspect.
1629 * The hardware requires that the depth buffer and stencil buffer be
1630 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1631 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1632 * allocate the depth and stencil buffers as separate surfaces in the same
1636 struct anv_surface color_surface
;
1639 struct anv_surface depth_surface
;
1640 struct anv_surface stencil_surface
;
1645 struct anv_image_view
{
1646 const struct anv_image
*image
; /**< VkImageViewCreateInfo::image */
1648 uint32_t offset
; /**< Offset into bo. */
1650 VkImageAspectFlags aspect_mask
;
1652 VkComponentMapping swizzle
;
1653 enum isl_format format
;
1654 uint32_t base_layer
;
1656 VkExtent3D level_0_extent
; /**< Extent of ::image's level 0 adjusted for ::vk_format. */
1657 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1659 /** RENDER_SURFACE_STATE when using image as a color render target. */
1660 struct anv_state color_rt_surface_state
;
1662 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1663 struct anv_state sampler_surface_state
;
1665 /** RENDER_SURFACE_STATE when using image as a storage image. */
1666 struct anv_state storage_surface_state
;
1669 struct anv_image_create_info
{
1670 const VkImageCreateInfo
*vk_info
;
1671 isl_tiling_flags_t isl_tiling_flags
;
1675 VkResult
anv_image_create(VkDevice _device
,
1676 const struct anv_image_create_info
*info
,
1677 const VkAllocationCallbacks
* alloc
,
1680 struct anv_surface
*
1681 anv_image_get_surface_for_aspect_mask(struct anv_image
*image
,
1682 VkImageAspectFlags aspect_mask
);
1684 void anv_image_view_init(struct anv_image_view
*view
,
1685 struct anv_device
*device
,
1686 const VkImageViewCreateInfo
* pCreateInfo
,
1687 struct anv_cmd_buffer
*cmd_buffer
,
1691 anv_fill_image_surface_state(struct anv_device
*device
, struct anv_state state
,
1692 struct anv_image_view
*iview
,
1693 const VkImageViewCreateInfo
*pCreateInfo
,
1694 VkImageUsageFlagBits usage
);
1696 gen7_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1697 struct anv_image_view
*iview
,
1698 const VkImageViewCreateInfo
*pCreateInfo
,
1699 VkImageUsageFlagBits usage
);
1701 gen75_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1702 struct anv_image_view
*iview
,
1703 const VkImageViewCreateInfo
*pCreateInfo
,
1704 VkImageUsageFlagBits usage
);
1706 gen8_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1707 struct anv_image_view
*iview
,
1708 const VkImageViewCreateInfo
*pCreateInfo
,
1709 VkImageUsageFlagBits usage
);
1711 gen9_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1712 struct anv_image_view
*iview
,
1713 const VkImageViewCreateInfo
*pCreateInfo
,
1714 VkImageUsageFlagBits usage
);
1716 struct anv_buffer_view
{
1717 enum isl_format format
; /**< VkBufferViewCreateInfo::format */
1719 uint32_t offset
; /**< Offset into bo. */
1720 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1722 struct anv_state surface_state
;
1723 struct anv_state storage_surface_state
;
1726 const struct anv_format
*
1727 anv_format_for_descriptor_type(VkDescriptorType type
);
1729 void anv_fill_buffer_surface_state(struct anv_device
*device
,
1730 struct anv_state state
,
1731 enum isl_format format
,
1732 uint32_t offset
, uint32_t range
,
1735 void gen7_fill_buffer_surface_state(void *state
, enum isl_format format
,
1736 uint32_t offset
, uint32_t range
,
1738 void gen75_fill_buffer_surface_state(void *state
, enum isl_format format
,
1739 uint32_t offset
, uint32_t range
,
1741 void gen8_fill_buffer_surface_state(void *state
, enum isl_format format
,
1742 uint32_t offset
, uint32_t range
,
1744 void gen9_fill_buffer_surface_state(void *state
, enum isl_format format
,
1745 uint32_t offset
, uint32_t range
,
1748 void anv_image_view_fill_image_param(struct anv_device
*device
,
1749 struct anv_image_view
*view
,
1750 struct brw_image_param
*param
);
1751 void anv_buffer_view_fill_image_param(struct anv_device
*device
,
1752 struct anv_buffer_view
*view
,
1753 struct brw_image_param
*param
);
1755 struct anv_sampler
{
1759 struct anv_framebuffer
{
1764 uint32_t attachment_count
;
1765 struct anv_image_view
* attachments
[0];
1768 struct anv_subpass
{
1769 uint32_t input_count
;
1770 uint32_t * input_attachments
;
1771 uint32_t color_count
;
1772 uint32_t * color_attachments
;
1773 uint32_t * resolve_attachments
;
1774 uint32_t depth_stencil_attachment
;
1776 /** Subpass has at least one resolve attachment */
1780 struct anv_render_pass_attachment
{
1781 const struct anv_format
*format
;
1783 VkAttachmentLoadOp load_op
;
1784 VkAttachmentLoadOp stencil_load_op
;
1787 struct anv_render_pass
{
1788 uint32_t attachment_count
;
1789 uint32_t subpass_count
;
1790 uint32_t * subpass_attachments
;
1791 struct anv_render_pass_attachment
* attachments
;
1792 struct anv_subpass subpasses
[0];
1795 extern struct anv_render_pass anv_meta_dummy_renderpass
;
1797 struct anv_query_pool_slot
{
1803 struct anv_query_pool
{
1809 VkResult
anv_device_init_meta(struct anv_device
*device
);
1810 void anv_device_finish_meta(struct anv_device
*device
);
1812 void *anv_lookup_entrypoint(const char *name
);
1814 void anv_dump_image_to_ppm(struct anv_device
*device
,
1815 struct anv_image
*image
, unsigned miplevel
,
1816 unsigned array_layer
, const char *filename
);
1818 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1820 static inline struct __anv_type * \
1821 __anv_type ## _from_handle(__VkType _handle) \
1823 return (struct __anv_type *) _handle; \
1826 static inline __VkType \
1827 __anv_type ## _to_handle(struct __anv_type *_obj) \
1829 return (__VkType) _obj; \
1832 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1834 static inline struct __anv_type * \
1835 __anv_type ## _from_handle(__VkType _handle) \
1837 return (struct __anv_type *)(uintptr_t) _handle; \
1840 static inline __VkType \
1841 __anv_type ## _to_handle(struct __anv_type *_obj) \
1843 return (__VkType)(uintptr_t) _obj; \
1846 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1847 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1849 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer
, VkCommandBuffer
)
1850 ANV_DEFINE_HANDLE_CASTS(anv_device
, VkDevice
)
1851 ANV_DEFINE_HANDLE_CASTS(anv_instance
, VkInstance
)
1852 ANV_DEFINE_HANDLE_CASTS(anv_physical_device
, VkPhysicalDevice
)
1853 ANV_DEFINE_HANDLE_CASTS(anv_queue
, VkQueue
)
1855 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool
, VkCommandPool
)
1856 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer
, VkBuffer
)
1857 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view
, VkBufferView
)
1858 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool
, VkDescriptorPool
)
1859 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set
, VkDescriptorSet
)
1860 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout
, VkDescriptorSetLayout
)
1861 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory
, VkDeviceMemory
)
1862 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence
, VkFence
)
1863 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event
, VkEvent
)
1864 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer
, VkFramebuffer
)
1865 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image
, VkImage
)
1866 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view
, VkImageView
);
1867 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache
, VkPipelineCache
)
1868 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline
, VkPipeline
)
1869 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout
, VkPipelineLayout
)
1870 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool
, VkQueryPool
)
1871 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass
, VkRenderPass
)
1872 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler
, VkSampler
)
1873 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module
, VkShaderModule
)
1875 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1877 static inline const __VkType * \
1878 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1880 return (const __VkType *) __anv_obj; \
1883 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1884 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1886 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkMemoryBarrier
)
1887 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkBufferMemoryBarrier
)
1888 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkImageMemoryBarrier
)