2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
43 #include "brw_device_info.h"
44 #include "brw_compiler.h"
45 #include "util/macros.h"
46 #include "util/list.h"
48 /* Pre-declarations needed for WSI entrypoints */
51 typedef struct xcb_connection_t xcb_connection_t
;
52 typedef uint32_t xcb_visualid_t
;
53 typedef uint32_t xcb_window_t
;
55 #define VK_USE_PLATFORM_XCB_KHR
56 #define VK_USE_PLATFORM_WAYLAND_KHR
59 #include <vulkan/vulkan.h>
60 #include <vulkan/vulkan_intel.h>
61 #include <vulkan/vk_icd.h>
63 #include "anv_entrypoints.h"
64 #include "brw_context.h"
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
87 static inline uint32_t
88 align_u32(uint32_t v
, uint32_t a
)
90 assert(a
!= 0 && a
== (a
& -a
));
91 return (v
+ a
- 1) & ~(a
- 1);
94 static inline uint64_t
95 align_u64(uint64_t v
, uint64_t a
)
97 assert(a
!= 0 && a
== (a
& -a
));
98 return (v
+ a
- 1) & ~(a
- 1);
101 static inline int32_t
102 align_i32(int32_t v
, int32_t a
)
104 assert(a
!= 0 && a
== (a
& -a
));
105 return (v
+ a
- 1) & ~(a
- 1);
108 /** Alignment must be a power of 2. */
110 anv_is_aligned(uintmax_t n
, uintmax_t a
)
112 assert(a
== (a
& -a
));
113 return (n
& (a
- 1)) == 0;
116 static inline uint32_t
117 anv_minify(uint32_t n
, uint32_t levels
)
119 if (unlikely(n
== 0))
122 return MAX(n
>> levels
, 1);
126 anv_clamp_f(float f
, float min
, float max
)
139 anv_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
141 if (*inout_mask
& clear_mask
) {
142 *inout_mask
&= ~clear_mask
;
149 #define for_each_bit(b, dword) \
150 for (uint32_t __dword = (dword); \
151 (b) = __builtin_ffs(__dword) - 1, __dword; \
152 __dword &= ~(1 << (b)))
154 #define typed_memcpy(dest, src, count) ({ \
155 static_assert(sizeof(*src) == sizeof(*dest), ""); \
156 memcpy((dest), (src), (count) * sizeof(*(src))); \
159 #define zero(x) (memset(&(x), 0, sizeof(x)))
161 /* Define no kernel as 1, since that's an illegal offset for a kernel */
165 VkStructureType sType
;
169 /* Whenever we generate an error, pass it through this function. Useful for
170 * debugging, where we can break on it. Only call at error site, not when
171 * propagating errors. Might be useful to plug in a stack trace here.
174 VkResult
__vk_errorf(VkResult error
, const char *file
, int line
, const char *format
, ...);
177 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
178 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
180 #define vk_error(error) error
181 #define vk_errorf(error, format, ...) error
184 void __anv_finishme(const char *file
, int line
, const char *format
, ...)
185 anv_printflike(3, 4);
186 void anv_loge(const char *format
, ...) anv_printflike(1, 2);
187 void anv_loge_v(const char *format
, va_list va
);
190 * Print a FINISHME message, including its source location.
192 #define anv_finishme(format, ...) \
193 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
195 /* A non-fatal assert. Useful for debugging. */
197 #define anv_assert(x) ({ \
198 if (unlikely(!(x))) \
199 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
202 #define anv_assert(x)
206 * If a block of code is annotated with anv_validate, then the block runs only
210 #define anv_validate if (1)
212 #define anv_validate if (0)
215 void anv_abortf(const char *format
, ...) anv_noreturn
anv_printflike(1, 2);
216 void anv_abortfv(const char *format
, va_list va
) anv_noreturn
;
218 #define stub_return(v) \
220 anv_finishme("stub %s", __func__); \
226 anv_finishme("stub %s", __func__); \
231 * A dynamically growable, circular buffer. Elements are added at head and
232 * removed from tail. head and tail are free-running uint32_t indices and we
233 * only compute the modulo with size when accessing the array. This way,
234 * number of bytes in the queue is always head - tail, even in case of
241 uint32_t element_size
;
246 int anv_vector_init(struct anv_vector
*queue
, uint32_t element_size
, uint32_t size
);
247 void *anv_vector_add(struct anv_vector
*queue
);
248 void *anv_vector_remove(struct anv_vector
*queue
);
251 anv_vector_length(struct anv_vector
*queue
)
253 return (queue
->head
- queue
->tail
) / queue
->element_size
;
257 anv_vector_head(struct anv_vector
*vector
)
259 assert(vector
->tail
< vector
->head
);
260 return (void *)((char *)vector
->data
+
261 ((vector
->head
- vector
->element_size
) &
262 (vector
->size
- 1)));
266 anv_vector_tail(struct anv_vector
*vector
)
268 return (void *)((char *)vector
->data
+ (vector
->tail
& (vector
->size
- 1)));
272 anv_vector_finish(struct anv_vector
*queue
)
277 #define anv_vector_foreach(elem, queue) \
278 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
279 for (uint32_t __anv_vector_offset = (queue)->tail; \
280 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
281 __anv_vector_offset += (queue)->element_size)
286 /* Index into the current validation list. This is used by the
287 * validation list building alrogithm to track which buffers are already
288 * in the validation list so that we can ensure uniqueness.
292 /* Last known offset. This value is provided by the kernel when we
293 * execbuf and is used as the presumed offset for the next bunch of
301 /* We need to set the WRITE flag on winsys bos so GEM will know we're
302 * writing to them and synchronize uses on other rings (eg if the display
303 * server uses the blitter ring).
308 /* Represents a lock-free linked list of "free" things. This is used by
309 * both the block pool and the state pools. Unfortunately, in order to
310 * solve the ABA problem, we can't use a single uint32_t head.
312 union anv_free_list
{
316 /* A simple count that is incremented every time the head changes. */
322 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
324 struct anv_block_state
{
334 struct anv_block_pool
{
335 struct anv_device
*device
;
339 /* The offset from the start of the bo to the "center" of the block
340 * pool. Pointers to allocated blocks are given by
341 * bo.map + center_bo_offset + offsets.
343 uint32_t center_bo_offset
;
345 /* Current memory map of the block pool. This pointer may or may not
346 * point to the actual beginning of the block pool memory. If
347 * anv_block_pool_alloc_back has ever been called, then this pointer
348 * will point to the "center" position of the buffer and all offsets
349 * (negative or positive) given out by the block pool alloc functions
350 * will be valid relative to this pointer.
352 * In particular, map == bo.map + center_offset
358 * Array of mmaps and gem handles owned by the block pool, reclaimed when
359 * the block pool is destroyed.
361 struct anv_vector mmap_cleanups
;
365 union anv_free_list free_list
;
366 struct anv_block_state state
;
368 union anv_free_list back_free_list
;
369 struct anv_block_state back_state
;
372 /* Block pools are backed by a fixed-size 2GB memfd */
373 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
375 /* The center of the block pool is also the middle of the memfd. This may
376 * change in the future if we decide differently for some reason.
378 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
380 static inline uint32_t
381 anv_block_pool_size(struct anv_block_pool
*pool
)
383 return pool
->state
.end
+ pool
->back_state
.end
;
392 struct anv_fixed_size_state_pool
{
394 union anv_free_list free_list
;
395 struct anv_block_state block
;
398 #define ANV_MIN_STATE_SIZE_LOG2 6
399 #define ANV_MAX_STATE_SIZE_LOG2 10
401 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
403 struct anv_state_pool
{
404 struct anv_block_pool
*block_pool
;
405 struct anv_fixed_size_state_pool buckets
[ANV_STATE_BUCKETS
];
408 struct anv_state_stream_block
;
410 struct anv_state_stream
{
411 struct anv_block_pool
*block_pool
;
413 /* The current working block */
414 struct anv_state_stream_block
*block
;
416 /* Offset at which the current block starts */
418 /* Offset at which to allocate the next state */
420 /* Offset at which the current block ends */
424 #define CACHELINE_SIZE 64
425 #define CACHELINE_MASK 63
428 anv_clflush_range(void *start
, size_t size
)
430 void *p
= (void *) (((uintptr_t) start
) & ~CACHELINE_MASK
);
431 void *end
= start
+ size
;
433 __builtin_ia32_mfence();
435 __builtin_ia32_clflush(p
);
441 anv_state_clflush(struct anv_state state
)
443 anv_clflush_range(state
.map
, state
.alloc_size
);
446 void anv_block_pool_init(struct anv_block_pool
*pool
,
447 struct anv_device
*device
, uint32_t block_size
);
448 void anv_block_pool_finish(struct anv_block_pool
*pool
);
449 int32_t anv_block_pool_alloc(struct anv_block_pool
*pool
);
450 int32_t anv_block_pool_alloc_back(struct anv_block_pool
*pool
);
451 void anv_block_pool_free(struct anv_block_pool
*pool
, int32_t offset
);
452 void anv_state_pool_init(struct anv_state_pool
*pool
,
453 struct anv_block_pool
*block_pool
);
454 void anv_state_pool_finish(struct anv_state_pool
*pool
);
455 struct anv_state
anv_state_pool_alloc(struct anv_state_pool
*pool
,
456 size_t state_size
, size_t alignment
);
457 void anv_state_pool_free(struct anv_state_pool
*pool
, struct anv_state state
);
458 void anv_state_stream_init(struct anv_state_stream
*stream
,
459 struct anv_block_pool
*block_pool
);
460 void anv_state_stream_finish(struct anv_state_stream
*stream
);
461 struct anv_state
anv_state_stream_alloc(struct anv_state_stream
*stream
,
462 uint32_t size
, uint32_t alignment
);
465 * Implements a pool of re-usable BOs. The interface is identical to that
466 * of block_pool except that each block is its own BO.
469 struct anv_device
*device
;
476 void anv_bo_pool_init(struct anv_bo_pool
*pool
,
477 struct anv_device
*device
, uint32_t block_size
);
478 void anv_bo_pool_finish(struct anv_bo_pool
*pool
);
479 VkResult
anv_bo_pool_alloc(struct anv_bo_pool
*pool
, struct anv_bo
*bo
);
480 void anv_bo_pool_free(struct anv_bo_pool
*pool
, const struct anv_bo
*bo
);
483 void *anv_resolve_entrypoint(uint32_t index
);
485 extern struct anv_dispatch_table dtable
;
487 #define ANV_CALL(func) ({ \
488 if (dtable.func == NULL) { \
489 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
490 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
496 anv_alloc(const VkAllocationCallbacks
*alloc
,
497 size_t size
, size_t align
,
498 VkSystemAllocationScope scope
)
500 return alloc
->pfnAllocation(alloc
->pUserData
, size
, align
, scope
);
504 anv_realloc(const VkAllocationCallbacks
*alloc
,
505 void *ptr
, size_t size
, size_t align
,
506 VkSystemAllocationScope scope
)
508 return alloc
->pfnReallocation(alloc
->pUserData
, ptr
, size
, align
, scope
);
512 anv_free(const VkAllocationCallbacks
*alloc
, void *data
)
514 alloc
->pfnFree(alloc
->pUserData
, data
);
518 anv_alloc2(const VkAllocationCallbacks
*parent_alloc
,
519 const VkAllocationCallbacks
*alloc
,
520 size_t size
, size_t align
,
521 VkSystemAllocationScope scope
)
524 return anv_alloc(alloc
, size
, align
, scope
);
526 return anv_alloc(parent_alloc
, size
, align
, scope
);
530 anv_free2(const VkAllocationCallbacks
*parent_alloc
,
531 const VkAllocationCallbacks
*alloc
,
535 anv_free(alloc
, data
);
537 anv_free(parent_alloc
, data
);
540 struct anv_physical_device
{
541 VK_LOADER_DATA _loader_data
;
543 struct anv_instance
* instance
;
547 const struct brw_device_info
* info
;
548 uint64_t aperture_size
;
549 struct brw_compiler
* compiler
;
550 struct isl_device isl_dev
;
553 struct anv_wsi_interaface
;
555 #define VK_ICD_WSI_PLATFORM_MAX 5
557 struct anv_instance
{
558 VK_LOADER_DATA _loader_data
;
560 VkAllocationCallbacks alloc
;
563 int physicalDeviceCount
;
564 struct anv_physical_device physicalDevice
;
566 struct anv_wsi_interface
* wsi
[VK_ICD_WSI_PLATFORM_MAX
];
569 VkResult
anv_init_wsi(struct anv_instance
*instance
);
570 void anv_finish_wsi(struct anv_instance
*instance
);
572 struct anv_meta_state
{
573 VkAllocationCallbacks alloc
;
576 * Use array element `i` for images with `2^i` samples.
580 * Pipeline N is used to clear color attachment N of the current
583 * HACK: We use one pipeline per color attachment to work around the
584 * compiler's inability to dynamically set the render target index of
585 * the render target write message.
587 struct anv_pipeline
*color_pipelines
[MAX_RTS
];
589 struct anv_pipeline
*depth_only_pipeline
;
590 struct anv_pipeline
*stencil_only_pipeline
;
591 struct anv_pipeline
*depthstencil_pipeline
;
592 } clear
[1 + MAX_SAMPLES_LOG2
];
595 VkRenderPass render_pass
;
597 /** Pipeline that blits from a 1D image. */
598 VkPipeline pipeline_1d_src
;
600 /** Pipeline that blits from a 2D image. */
601 VkPipeline pipeline_2d_src
;
603 /** Pipeline that blits from a 3D image. */
604 VkPipeline pipeline_3d_src
;
606 VkPipelineLayout pipeline_layout
;
607 VkDescriptorSetLayout ds_layout
;
611 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
612 VkPipeline pipelines
[MAX_SAMPLES_LOG2
];
615 VkPipelineLayout pipeline_layout
;
616 VkDescriptorSetLayout ds_layout
;
621 VK_LOADER_DATA _loader_data
;
623 struct anv_device
* device
;
625 struct anv_state_pool
* pool
;
628 struct anv_pipeline_cache
{
629 struct anv_device
* device
;
630 struct anv_state_stream program_stream
;
631 pthread_mutex_t mutex
;
635 uint32_t kernel_count
;
636 uint32_t * hash_table
;
639 void anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
640 struct anv_device
*device
);
641 void anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
);
642 uint32_t anv_pipeline_cache_search(struct anv_pipeline_cache
*cache
,
643 const unsigned char *sha1
,
644 const struct brw_stage_prog_data
**prog_data
);
645 uint32_t anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache
*cache
,
646 const unsigned char *sha1
,
649 const struct brw_stage_prog_data
**prog_data
,
650 size_t prog_data_size
);
653 VK_LOADER_DATA _loader_data
;
655 VkAllocationCallbacks alloc
;
657 struct anv_instance
* instance
;
659 struct brw_device_info info
;
660 struct isl_device isl_dev
;
664 struct anv_bo_pool batch_bo_pool
;
666 struct anv_block_pool dynamic_state_block_pool
;
667 struct anv_state_pool dynamic_state_pool
;
669 struct anv_block_pool instruction_block_pool
;
670 struct anv_pipeline_cache default_pipeline_cache
;
672 struct anv_block_pool surface_state_block_pool
;
673 struct anv_state_pool surface_state_pool
;
675 struct anv_bo workaround_bo
;
677 struct anv_meta_state meta_state
;
679 struct anv_state border_colors
;
681 struct anv_queue queue
;
683 struct anv_block_pool scratch_block_pool
;
685 uint32_t default_mocs
;
687 pthread_mutex_t mutex
;
690 VkResult
gen7_init_device_state(struct anv_device
*device
);
691 VkResult
gen75_init_device_state(struct anv_device
*device
);
692 VkResult
gen8_init_device_state(struct anv_device
*device
);
693 VkResult
gen9_init_device_state(struct anv_device
*device
);
695 void anv_device_get_cache_uuid(void *uuid
);
698 void* anv_gem_mmap(struct anv_device
*device
,
699 uint32_t gem_handle
, uint64_t offset
, uint64_t size
, uint32_t flags
);
700 void anv_gem_munmap(void *p
, uint64_t size
);
701 uint32_t anv_gem_create(struct anv_device
*device
, size_t size
);
702 void anv_gem_close(struct anv_device
*device
, uint32_t gem_handle
);
703 uint32_t anv_gem_userptr(struct anv_device
*device
, void *mem
, size_t size
);
704 int anv_gem_wait(struct anv_device
*device
, uint32_t gem_handle
, int64_t *timeout_ns
);
705 int anv_gem_execbuffer(struct anv_device
*device
,
706 struct drm_i915_gem_execbuffer2
*execbuf
);
707 int anv_gem_set_tiling(struct anv_device
*device
, uint32_t gem_handle
,
708 uint32_t stride
, uint32_t tiling
);
709 int anv_gem_create_context(struct anv_device
*device
);
710 int anv_gem_destroy_context(struct anv_device
*device
, int context
);
711 int anv_gem_get_param(int fd
, uint32_t param
);
712 bool anv_gem_get_bit6_swizzle(int fd
, uint32_t tiling
);
713 int anv_gem_get_aperture(int fd
, uint64_t *size
);
714 int anv_gem_handle_to_fd(struct anv_device
*device
, uint32_t gem_handle
);
715 uint32_t anv_gem_fd_to_handle(struct anv_device
*device
, int fd
);
716 int anv_gem_set_caching(struct anv_device
*device
, uint32_t gem_handle
, uint32_t caching
);
717 int anv_gem_set_domain(struct anv_device
*device
, uint32_t gem_handle
,
718 uint32_t read_domains
, uint32_t write_domain
);
720 VkResult
anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
);
722 struct anv_reloc_list
{
725 struct drm_i915_gem_relocation_entry
* relocs
;
726 struct anv_bo
** reloc_bos
;
729 VkResult
anv_reloc_list_init(struct anv_reloc_list
*list
,
730 const VkAllocationCallbacks
*alloc
);
731 void anv_reloc_list_finish(struct anv_reloc_list
*list
,
732 const VkAllocationCallbacks
*alloc
);
734 uint64_t anv_reloc_list_add(struct anv_reloc_list
*list
,
735 const VkAllocationCallbacks
*alloc
,
736 uint32_t offset
, struct anv_bo
*target_bo
,
739 struct anv_batch_bo
{
740 /* Link in the anv_cmd_buffer.owned_batch_bos list */
741 struct list_head link
;
745 /* Bytes actually consumed in this batch BO */
748 /* Last seen surface state block pool bo offset */
749 uint32_t last_ss_pool_bo_offset
;
751 struct anv_reloc_list relocs
;
755 const VkAllocationCallbacks
* alloc
;
761 struct anv_reloc_list
* relocs
;
763 /* This callback is called (with the associated user data) in the event
764 * that the batch runs out of space.
766 VkResult (*extend_cb
)(struct anv_batch
*, void *);
770 void *anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
);
771 void anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
);
772 uint64_t anv_batch_emit_reloc(struct anv_batch
*batch
,
773 void *location
, struct anv_bo
*bo
, uint32_t offset
);
774 VkResult
anv_device_submit_simple_batch(struct anv_device
*device
,
775 struct anv_batch
*batch
);
782 #define __gen_address_type struct anv_address
783 #define __gen_user_data struct anv_batch
785 static inline uint64_t
786 __gen_combine_address(struct anv_batch
*batch
, void *location
,
787 const struct anv_address address
, uint32_t delta
)
789 if (address
.bo
== NULL
) {
790 return address
.offset
+ delta
;
792 assert(batch
->start
<= location
&& location
< batch
->end
);
794 return anv_batch_emit_reloc(batch
, location
, address
.bo
, address
.offset
+ delta
);
798 /* Wrapper macros needed to work around preprocessor argument issues. In
799 * particular, arguments don't get pre-evaluated if they are concatenated.
800 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
801 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
802 * We can work around this easily enough with these helpers.
804 #define __anv_cmd_length(cmd) cmd ## _length
805 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
806 #define __anv_cmd_header(cmd) cmd ## _header
807 #define __anv_cmd_pack(cmd) cmd ## _pack
809 #define anv_batch_emit(batch, cmd, ...) do { \
810 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
811 struct cmd __template = { \
812 __anv_cmd_header(cmd), \
815 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
816 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
819 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
820 void *__dst = anv_batch_emit_dwords(batch, n); \
821 struct cmd __template = { \
822 __anv_cmd_header(cmd), \
823 .DWordLength = n - __anv_cmd_length_bias(cmd), \
826 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
830 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
834 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
835 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
836 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
837 dw[i] = (dwords0)[i] | (dwords1)[i]; \
838 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
841 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
842 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
843 struct anv_state __state = \
844 anv_state_pool_alloc((pool), __size, align); \
845 struct cmd __template = { \
848 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
849 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
850 if (!(pool)->block_pool->device->info.has_llc) \
851 anv_state_clflush(__state); \
855 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
856 .GraphicsDataTypeGFDT = 0, \
857 .LLCCacheabilityControlLLCCC = 0, \
858 .L3CacheabilityControlL3CC = 1, \
861 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
862 .LLCeLLCCacheabilityControlLLCCC = 0, \
863 .L3CacheabilityControlL3CC = 1, \
866 #define GEN8_MOCS (struct GEN8_MEMORY_OBJECT_CONTROL_STATE) { \
867 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
868 .TargetCache = L3DefertoPATforLLCeLLCselection, \
872 /* Skylake: MOCS is now an index into an array of 62 different caching
873 * configurations programmed by the kernel.
876 #define GEN9_MOCS (struct GEN9_MEMORY_OBJECT_CONTROL_STATE) { \
877 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
878 .IndextoMOCSTables = 2 \
881 #define GEN9_MOCS_PTE { \
882 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
883 .IndextoMOCSTables = 1 \
886 struct anv_device_memory
{
889 VkDeviceSize map_size
;
894 * Header for Vertex URB Entry (VUE)
896 struct anv_vue_header
{
898 uint32_t RTAIndex
; /* RenderTargetArrayIndex */
899 uint32_t ViewportIndex
;
903 struct anv_descriptor_set_binding_layout
{
904 /* Number of array elements in this binding */
907 /* Index into the flattend descriptor set */
908 uint16_t descriptor_index
;
910 /* Index into the dynamic state array for a dynamic buffer */
911 int16_t dynamic_offset_index
;
913 /* Index into the descriptor set buffer views */
914 int16_t buffer_index
;
917 /* Index into the binding table for the associated surface */
918 int16_t surface_index
;
920 /* Index into the sampler table for the associated sampler */
921 int16_t sampler_index
;
923 /* Index into the image table for the associated image */
925 } stage
[MESA_SHADER_STAGES
];
927 /* Immutable samplers (or NULL if no immutable samplers) */
928 struct anv_sampler
**immutable_samplers
;
931 struct anv_descriptor_set_layout
{
932 /* Number of bindings in this descriptor set */
933 uint16_t binding_count
;
935 /* Total size of the descriptor set with room for all array entries */
938 /* Shader stages affected by this descriptor set */
939 uint16_t shader_stages
;
941 /* Number of buffers in this descriptor set */
942 uint16_t buffer_count
;
944 /* Number of dynamic offsets used by this descriptor set */
945 uint16_t dynamic_offset_count
;
947 /* Bindings in this descriptor set */
948 struct anv_descriptor_set_binding_layout binding
[0];
951 struct anv_descriptor
{
952 VkDescriptorType type
;
956 struct anv_image_view
*image_view
;
957 struct anv_sampler
*sampler
;
960 struct anv_buffer_view
*buffer_view
;
964 struct anv_descriptor_set
{
965 const struct anv_descriptor_set_layout
*layout
;
967 uint32_t buffer_count
;
968 struct anv_buffer_view
*buffer_views
;
969 struct anv_descriptor descriptors
[0];
972 struct anv_descriptor_pool
{
977 struct anv_state_stream surface_state_stream
;
978 void *surface_state_free_list
;
984 anv_descriptor_set_create(struct anv_device
*device
,
985 struct anv_descriptor_pool
*pool
,
986 const struct anv_descriptor_set_layout
*layout
,
987 struct anv_descriptor_set
**out_set
);
990 anv_descriptor_set_destroy(struct anv_device
*device
,
991 struct anv_descriptor_pool
*pool
,
992 struct anv_descriptor_set
*set
);
994 struct anv_pipeline_binding
{
995 /* The descriptor set this surface corresponds to */
998 /* Offset into the descriptor set */
1002 struct anv_pipeline_layout
{
1004 struct anv_descriptor_set_layout
*layout
;
1005 uint32_t dynamic_offset_start
;
1011 bool has_dynamic_offsets
;
1012 } stage
[MESA_SHADER_STAGES
];
1016 struct anv_device
* device
;
1019 VkBufferUsageFlags usage
;
1021 /* Set when bound */
1023 VkDeviceSize offset
;
1026 enum anv_cmd_dirty_bits
{
1027 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1028 ANV_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1029 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1030 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
= 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1031 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
= 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1032 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
= 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1033 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1034 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1035 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1036 ANV_CMD_DIRTY_DYNAMIC_ALL
= (1 << 9) - 1,
1037 ANV_CMD_DIRTY_PIPELINE
= 1 << 9,
1038 ANV_CMD_DIRTY_INDEX_BUFFER
= 1 << 10,
1039 ANV_CMD_DIRTY_RENDER_TARGETS
= 1 << 11,
1041 typedef uint32_t anv_cmd_dirty_mask_t
;
1043 struct anv_vertex_binding
{
1044 struct anv_buffer
* buffer
;
1045 VkDeviceSize offset
;
1048 struct anv_push_constants
{
1049 /* Current allocated size of this push constants data structure.
1050 * Because a decent chunk of it may not be used (images on SKL, for
1051 * instance), we won't actually allocate the entire structure up-front.
1055 /* Push constant data provided by the client through vkPushConstants */
1056 uint8_t client_data
[MAX_PUSH_CONSTANTS_SIZE
];
1058 /* Our hardware only provides zero-based vertex and instance id so, in
1059 * order to satisfy the vulkan requirements, we may have to push one or
1060 * both of these into the shader.
1062 uint32_t base_vertex
;
1063 uint32_t base_instance
;
1065 /* Offsets and ranges for dynamically bound buffers */
1069 } dynamic
[MAX_DYNAMIC_BUFFERS
];
1071 /* Image data for image_load_store on pre-SKL */
1072 struct brw_image_param images
[MAX_IMAGES
];
1075 struct anv_dynamic_state
{
1078 VkViewport viewports
[MAX_VIEWPORTS
];
1083 VkRect2D scissors
[MAX_SCISSORS
];
1094 float blend_constants
[4];
1104 } stencil_compare_mask
;
1109 } stencil_write_mask
;
1114 } stencil_reference
;
1117 extern const struct anv_dynamic_state default_dynamic_state
;
1119 void anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
1120 const struct anv_dynamic_state
*src
,
1121 uint32_t copy_mask
);
1124 * Attachment state when recording a renderpass instance.
1126 * The clear value is valid only if there exists a pending clear.
1128 struct anv_attachment_state
{
1129 VkImageAspectFlags pending_clear_aspects
;
1130 VkClearValue clear_value
;
1133 /** State required while building cmd buffer */
1134 struct anv_cmd_state
{
1135 /* PIPELINE_SELECT.PipelineSelection */
1136 uint32_t current_pipeline
;
1137 uint32_t current_l3_config
;
1139 anv_cmd_dirty_mask_t dirty
;
1140 anv_cmd_dirty_mask_t compute_dirty
;
1141 uint32_t num_workgroups_offset
;
1142 struct anv_bo
*num_workgroups_bo
;
1143 VkShaderStageFlags descriptors_dirty
;
1144 VkShaderStageFlags push_constants_dirty
;
1145 uint32_t scratch_size
;
1146 struct anv_pipeline
* pipeline
;
1147 struct anv_pipeline
* compute_pipeline
;
1148 struct anv_framebuffer
* framebuffer
;
1149 struct anv_render_pass
* pass
;
1150 struct anv_subpass
* subpass
;
1151 uint32_t restart_index
;
1152 struct anv_vertex_binding vertex_bindings
[MAX_VBS
];
1153 struct anv_descriptor_set
* descriptors
[MAX_SETS
];
1154 struct anv_push_constants
* push_constants
[MESA_SHADER_STAGES
];
1155 struct anv_state binding_tables
[MESA_SHADER_STAGES
];
1156 struct anv_state samplers
[MESA_SHADER_STAGES
];
1157 struct anv_dynamic_state dynamic
;
1161 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1162 * valid only when recording a render pass instance.
1164 struct anv_attachment_state
* attachments
;
1167 struct anv_buffer
* index_buffer
;
1168 uint32_t index_type
; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1169 uint32_t index_offset
;
1173 struct anv_cmd_pool
{
1174 VkAllocationCallbacks alloc
;
1175 struct list_head cmd_buffers
;
1178 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1180 enum anv_cmd_buffer_exec_mode
{
1181 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY
,
1182 ANV_CMD_BUFFER_EXEC_MODE_EMIT
,
1183 ANV_CMD_BUFFER_EXEC_MODE_CHAIN
,
1184 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN
,
1187 struct anv_cmd_buffer
{
1188 VK_LOADER_DATA _loader_data
;
1190 struct anv_device
* device
;
1192 struct anv_cmd_pool
* pool
;
1193 struct list_head pool_link
;
1195 struct anv_batch batch
;
1197 /* Fields required for the actual chain of anv_batch_bo's.
1199 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1201 struct list_head batch_bos
;
1202 enum anv_cmd_buffer_exec_mode exec_mode
;
1204 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1205 * referenced by this command buffer
1207 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1209 struct anv_vector seen_bbos
;
1211 /* A vector of int32_t's for every block of binding tables.
1213 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1215 struct anv_vector bt_blocks
;
1217 struct anv_reloc_list surface_relocs
;
1219 /* Information needed for execbuf
1221 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1224 struct drm_i915_gem_execbuffer2 execbuf
;
1226 struct drm_i915_gem_exec_object2
* objects
;
1228 struct anv_bo
** bos
;
1230 /* Allocated length of the 'objects' and 'bos' arrays */
1231 uint32_t array_length
;
1236 /* Serial for tracking buffer completion */
1239 /* Stream objects for storing temporary data */
1240 struct anv_state_stream surface_state_stream
;
1241 struct anv_state_stream dynamic_state_stream
;
1243 VkCommandBufferUsageFlags usage_flags
;
1244 VkCommandBufferLevel level
;
1246 struct anv_cmd_state state
;
1249 VkResult
anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1250 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1251 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1252 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer
*cmd_buffer
);
1253 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer
*primary
,
1254 struct anv_cmd_buffer
*secondary
);
1255 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer
*cmd_buffer
);
1257 VkResult
anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1258 unsigned stage
, struct anv_state
*bt_state
);
1259 VkResult
anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
1260 unsigned stage
, struct anv_state
*state
);
1261 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
);
1262 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer
*cmd_buffer
,
1265 struct anv_state
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1266 const void *data
, uint32_t size
, uint32_t alignment
);
1267 struct anv_state
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1268 uint32_t *a
, uint32_t *b
,
1269 uint32_t dwords
, uint32_t alignment
);
1272 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1274 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1275 uint32_t entries
, uint32_t *state_offset
);
1277 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
);
1279 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer
*cmd_buffer
,
1280 uint32_t size
, uint32_t alignment
);
1283 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer
*cmd_buffer
);
1285 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
);
1286 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer
*cmd_buffer
);
1288 void gen7_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1289 void gen75_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1290 void gen8_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1291 void gen9_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1293 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1295 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer
*cmd_buffer
,
1296 const VkRenderPassBeginInfo
*info
);
1298 void gen7_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1299 struct anv_subpass
*subpass
);
1300 void gen75_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1301 struct anv_subpass
*subpass
);
1302 void gen8_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1303 struct anv_subpass
*subpass
);
1304 void gen9_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1305 struct anv_subpass
*subpass
);
1306 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1307 struct anv_subpass
*subpass
);
1309 void gen7_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1310 void gen75_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1311 void gen8_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1312 void gen9_flush_pipeline_select_3d(struct anv_cmd_buffer
*cmd_buffer
);
1314 void gen7_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1315 void gen75_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1316 void gen8_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1317 void gen9_cmd_buffer_flush_state(struct anv_cmd_buffer
*cmd_buffer
);
1319 void gen7_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1320 void gen75_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1321 void gen8_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1322 void gen9_cmd_buffer_flush_compute_state(struct anv_cmd_buffer
*cmd_buffer
);
1325 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
1326 gl_shader_stage stage
);
1328 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
);
1330 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1331 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1333 const struct anv_image_view
*
1334 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
);
1336 void anv_cmd_buffer_dump(struct anv_cmd_buffer
*cmd_buffer
);
1340 struct drm_i915_gem_execbuffer2 execbuf
;
1341 struct drm_i915_gem_exec_object2 exec2_objects
[1];
1347 struct anv_state state
;
1352 struct anv_shader_module
{
1353 struct nir_shader
* nir
;
1355 unsigned char sha1
[20];
1360 void anv_hash_shader(unsigned char *hash
, const void *key
, size_t key_size
,
1361 struct anv_shader_module
*module
,
1362 const char *entrypoint
,
1363 const VkSpecializationInfo
*spec_info
);
1365 static inline gl_shader_stage
1366 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1368 assert(__builtin_popcount(vk_stage
) == 1);
1369 return ffs(vk_stage
) - 1;
1372 static inline VkShaderStageFlagBits
1373 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1375 return (1 << mesa_stage
);
1378 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1380 #define anv_foreach_stage(stage, stage_bits) \
1381 for (gl_shader_stage stage, \
1382 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1383 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1384 __tmp &= ~(1 << (stage)))
1386 struct anv_pipeline_bind_map
{
1387 uint32_t surface_count
;
1388 uint32_t sampler_count
;
1389 uint32_t image_count
;
1391 struct anv_pipeline_binding
* surface_to_descriptor
;
1392 struct anv_pipeline_binding
* sampler_to_descriptor
;
1395 struct anv_pipeline
{
1396 struct anv_device
* device
;
1397 struct anv_batch batch
;
1398 uint32_t batch_data
[512];
1399 struct anv_reloc_list batch_relocs
;
1400 uint32_t dynamic_state_mask
;
1401 struct anv_dynamic_state dynamic_state
;
1403 struct anv_pipeline_layout
* layout
;
1404 struct anv_pipeline_bind_map bindings
[MESA_SHADER_STAGES
];
1408 bool writes_point_size
;
1409 const struct brw_stage_prog_data
* prog_data
[MESA_SHADER_STAGES
];
1410 uint32_t scratch_start
[MESA_SHADER_STAGES
];
1411 uint32_t total_scratch
;
1413 uint8_t push_size
[MESA_SHADER_FRAGMENT
+ 1];
1414 uint32_t start
[MESA_SHADER_GEOMETRY
+ 1];
1415 uint32_t size
[MESA_SHADER_GEOMETRY
+ 1];
1416 uint32_t entries
[MESA_SHADER_GEOMETRY
+ 1];
1419 VkShaderStageFlags active_stages
;
1420 struct anv_state blend_state
;
1427 uint32_t ps_grf_start0
;
1428 uint32_t ps_grf_start2
;
1433 uint32_t binding_stride
[MAX_VBS
];
1434 bool instancing_enable
[MAX_VBS
];
1435 bool primitive_restart
;
1438 uint32_t cs_thread_width_max
;
1439 uint32_t cs_right_mask
;
1443 uint32_t depth_stencil_state
[3];
1449 uint32_t wm_depth_stencil
[3];
1453 uint32_t wm_depth_stencil
[4];
1457 static inline const struct brw_vs_prog_data
*
1458 get_vs_prog_data(struct anv_pipeline
*pipeline
)
1460 return (const struct brw_vs_prog_data
*) pipeline
->prog_data
[MESA_SHADER_VERTEX
];
1463 static inline const struct brw_gs_prog_data
*
1464 get_gs_prog_data(struct anv_pipeline
*pipeline
)
1466 return (const struct brw_gs_prog_data
*) pipeline
->prog_data
[MESA_SHADER_GEOMETRY
];
1469 static inline const struct brw_wm_prog_data
*
1470 get_wm_prog_data(struct anv_pipeline
*pipeline
)
1472 return (const struct brw_wm_prog_data
*) pipeline
->prog_data
[MESA_SHADER_FRAGMENT
];
1475 static inline const struct brw_cs_prog_data
*
1476 get_cs_prog_data(struct anv_pipeline
*pipeline
)
1478 return (const struct brw_cs_prog_data
*) pipeline
->prog_data
[MESA_SHADER_COMPUTE
];
1481 struct anv_graphics_pipeline_create_info
{
1483 * If non-negative, overrides the color attachment count of the pipeline's
1486 int8_t color_attachment_count
;
1489 bool disable_viewport
;
1490 bool disable_scissor
;
1496 anv_pipeline_init(struct anv_pipeline
*pipeline
, struct anv_device
*device
,
1497 struct anv_pipeline_cache
*cache
,
1498 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1499 const struct anv_graphics_pipeline_create_info
*extra
,
1500 const VkAllocationCallbacks
*alloc
);
1503 anv_pipeline_compile_cs(struct anv_pipeline
*pipeline
,
1504 struct anv_pipeline_cache
*cache
,
1505 const VkComputePipelineCreateInfo
*info
,
1506 struct anv_shader_module
*module
,
1507 const char *entrypoint
,
1508 const VkSpecializationInfo
*spec_info
);
1511 anv_graphics_pipeline_create(VkDevice device
,
1512 VkPipelineCache cache
,
1513 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1514 const struct anv_graphics_pipeline_create_info
*extra
,
1515 const VkAllocationCallbacks
*alloc
,
1516 VkPipeline
*pPipeline
);
1519 gen7_graphics_pipeline_create(VkDevice _device
,
1520 struct anv_pipeline_cache
*cache
,
1521 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1522 const struct anv_graphics_pipeline_create_info
*extra
,
1523 const VkAllocationCallbacks
*alloc
,
1524 VkPipeline
*pPipeline
);
1527 gen75_graphics_pipeline_create(VkDevice _device
,
1528 struct anv_pipeline_cache
*cache
,
1529 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1530 const struct anv_graphics_pipeline_create_info
*extra
,
1531 const VkAllocationCallbacks
*alloc
,
1532 VkPipeline
*pPipeline
);
1535 gen8_graphics_pipeline_create(VkDevice _device
,
1536 struct anv_pipeline_cache
*cache
,
1537 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1538 const struct anv_graphics_pipeline_create_info
*extra
,
1539 const VkAllocationCallbacks
*alloc
,
1540 VkPipeline
*pPipeline
);
1542 gen9_graphics_pipeline_create(VkDevice _device
,
1543 struct anv_pipeline_cache
*cache
,
1544 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1545 const struct anv_graphics_pipeline_create_info
*extra
,
1546 const VkAllocationCallbacks
*alloc
,
1547 VkPipeline
*pPipeline
);
1549 gen7_compute_pipeline_create(VkDevice _device
,
1550 struct anv_pipeline_cache
*cache
,
1551 const VkComputePipelineCreateInfo
*pCreateInfo
,
1552 const VkAllocationCallbacks
*alloc
,
1553 VkPipeline
*pPipeline
);
1555 gen75_compute_pipeline_create(VkDevice _device
,
1556 struct anv_pipeline_cache
*cache
,
1557 const VkComputePipelineCreateInfo
*pCreateInfo
,
1558 const VkAllocationCallbacks
*alloc
,
1559 VkPipeline
*pPipeline
);
1562 gen8_compute_pipeline_create(VkDevice _device
,
1563 struct anv_pipeline_cache
*cache
,
1564 const VkComputePipelineCreateInfo
*pCreateInfo
,
1565 const VkAllocationCallbacks
*alloc
,
1566 VkPipeline
*pPipeline
);
1568 gen9_compute_pipeline_create(VkDevice _device
,
1569 struct anv_pipeline_cache
*cache
,
1570 const VkComputePipelineCreateInfo
*pCreateInfo
,
1571 const VkAllocationCallbacks
*alloc
,
1572 VkPipeline
*pPipeline
);
1574 struct anv_format_swizzle
{
1582 const VkFormat vk_format
;
1584 enum isl_format isl_format
; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1585 const struct isl_format_layout
*isl_layout
;
1586 struct anv_format_swizzle swizzle
;
1591 const struct anv_format
*
1592 anv_format_for_vk_format(VkFormat format
);
1595 anv_get_isl_format(VkFormat format
, VkImageAspectFlags aspect
,
1596 VkImageTiling tiling
, struct anv_format_swizzle
*swizzle
);
1599 anv_format_is_color(const struct anv_format
*format
)
1601 return !format
->has_depth
&& !format
->has_stencil
;
1605 anv_format_is_depth_or_stencil(const struct anv_format
*format
)
1607 return format
->has_depth
|| format
->has_stencil
;
1611 * Subsurface of an anv_image.
1613 struct anv_surface
{
1614 struct isl_surf isl
;
1617 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1624 /* The original VkFormat provided by the client. This may not match any
1625 * of the actual surface formats.
1628 const struct anv_format
*format
;
1631 uint32_t array_size
;
1632 uint32_t samples
; /**< VkImageCreateInfo::samples */
1633 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1634 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1639 /* Set when bound */
1641 VkDeviceSize offset
;
1646 * For each foo, anv_image::foo_surface is valid if and only if
1647 * anv_image::format has a foo aspect.
1649 * The hardware requires that the depth buffer and stencil buffer be
1650 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1651 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1652 * allocate the depth and stencil buffers as separate surfaces in the same
1656 struct anv_surface color_surface
;
1659 struct anv_surface depth_surface
;
1660 struct anv_surface stencil_surface
;
1665 static inline uint32_t
1666 anv_get_layerCount(const struct anv_image
*image
,
1667 const VkImageSubresourceRange
*range
)
1669 return range
->layerCount
== VK_REMAINING_ARRAY_LAYERS
?
1670 image
->array_size
- range
->baseArrayLayer
: range
->layerCount
;
1673 static inline uint32_t
1674 anv_get_levelCount(const struct anv_image
*image
,
1675 const VkImageSubresourceRange
*range
)
1677 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
?
1678 image
->levels
- range
->baseMipLevel
: range
->levelCount
;
1682 struct anv_image_view
{
1683 const struct anv_image
*image
; /**< VkImageViewCreateInfo::image */
1685 uint32_t offset
; /**< Offset into bo. */
1687 VkImageAspectFlags aspect_mask
;
1689 uint32_t base_layer
;
1691 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1693 /** RENDER_SURFACE_STATE when using image as a color render target. */
1694 struct anv_state color_rt_surface_state
;
1696 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1697 struct anv_state sampler_surface_state
;
1699 /** RENDER_SURFACE_STATE when using image as a storage image. */
1700 struct anv_state storage_surface_state
;
1702 struct brw_image_param storage_image_param
;
1705 struct anv_image_create_info
{
1706 const VkImageCreateInfo
*vk_info
;
1707 isl_tiling_flags_t isl_tiling_flags
;
1711 VkResult
anv_image_create(VkDevice _device
,
1712 const struct anv_image_create_info
*info
,
1713 const VkAllocationCallbacks
* alloc
,
1716 struct anv_surface
*
1717 anv_image_get_surface_for_aspect_mask(struct anv_image
*image
,
1718 VkImageAspectFlags aspect_mask
);
1720 void anv_image_view_init(struct anv_image_view
*view
,
1721 struct anv_device
*device
,
1722 const VkImageViewCreateInfo
* pCreateInfo
,
1723 struct anv_cmd_buffer
*cmd_buffer
,
1725 VkImageUsageFlags usage_mask
);
1728 anv_fill_image_surface_state(struct anv_device
*device
, struct anv_state state
,
1729 struct anv_image_view
*iview
,
1730 const VkImageViewCreateInfo
*pCreateInfo
,
1731 VkImageUsageFlagBits usage
);
1733 gen7_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1734 struct anv_image_view
*iview
,
1735 const VkImageViewCreateInfo
*pCreateInfo
,
1736 VkImageUsageFlagBits usage
);
1738 gen75_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1739 struct anv_image_view
*iview
,
1740 const VkImageViewCreateInfo
*pCreateInfo
,
1741 VkImageUsageFlagBits usage
);
1743 gen8_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1744 struct anv_image_view
*iview
,
1745 const VkImageViewCreateInfo
*pCreateInfo
,
1746 VkImageUsageFlagBits usage
);
1748 gen9_fill_image_surface_state(struct anv_device
*device
, void *state_map
,
1749 struct anv_image_view
*iview
,
1750 const VkImageViewCreateInfo
*pCreateInfo
,
1751 VkImageUsageFlagBits usage
);
1753 struct anv_buffer_view
{
1754 enum isl_format format
; /**< VkBufferViewCreateInfo::format */
1756 uint32_t offset
; /**< Offset into bo. */
1757 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1759 struct anv_state surface_state
;
1760 struct anv_state storage_surface_state
;
1762 struct brw_image_param storage_image_param
;
1765 const struct anv_format
*
1766 anv_format_for_descriptor_type(VkDescriptorType type
);
1768 void anv_fill_buffer_surface_state(struct anv_device
*device
,
1769 struct anv_state state
,
1770 enum isl_format format
,
1771 uint32_t offset
, uint32_t range
,
1774 void gen7_fill_buffer_surface_state(void *state
, enum isl_format format
,
1775 uint32_t offset
, uint32_t range
,
1777 void gen75_fill_buffer_surface_state(void *state
, enum isl_format format
,
1778 uint32_t offset
, uint32_t range
,
1780 void gen8_fill_buffer_surface_state(void *state
, enum isl_format format
,
1781 uint32_t offset
, uint32_t range
,
1783 void gen9_fill_buffer_surface_state(void *state
, enum isl_format format
,
1784 uint32_t offset
, uint32_t range
,
1787 void anv_image_view_fill_image_param(struct anv_device
*device
,
1788 struct anv_image_view
*view
,
1789 struct brw_image_param
*param
);
1790 void anv_buffer_view_fill_image_param(struct anv_device
*device
,
1791 struct anv_buffer_view
*view
,
1792 struct brw_image_param
*param
);
1794 struct anv_sampler
{
1798 struct anv_framebuffer
{
1803 uint32_t attachment_count
;
1804 struct anv_image_view
* attachments
[0];
1807 struct anv_subpass
{
1808 uint32_t input_count
;
1809 uint32_t * input_attachments
;
1810 uint32_t color_count
;
1811 uint32_t * color_attachments
;
1812 uint32_t * resolve_attachments
;
1813 uint32_t depth_stencil_attachment
;
1815 /** Subpass has at least one resolve attachment */
1819 struct anv_render_pass_attachment
{
1820 const struct anv_format
*format
;
1822 VkAttachmentLoadOp load_op
;
1823 VkAttachmentLoadOp stencil_load_op
;
1826 struct anv_render_pass
{
1827 uint32_t attachment_count
;
1828 uint32_t subpass_count
;
1829 uint32_t * subpass_attachments
;
1830 struct anv_render_pass_attachment
* attachments
;
1831 struct anv_subpass subpasses
[0];
1834 extern struct anv_render_pass anv_meta_dummy_renderpass
;
1836 struct anv_query_pool_slot
{
1842 struct anv_query_pool
{
1848 VkResult
anv_device_init_meta(struct anv_device
*device
);
1849 void anv_device_finish_meta(struct anv_device
*device
);
1851 void *anv_lookup_entrypoint(const char *name
);
1853 void anv_dump_image_to_ppm(struct anv_device
*device
,
1854 struct anv_image
*image
, unsigned miplevel
,
1855 unsigned array_layer
, const char *filename
);
1857 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1859 static inline struct __anv_type * \
1860 __anv_type ## _from_handle(__VkType _handle) \
1862 return (struct __anv_type *) _handle; \
1865 static inline __VkType \
1866 __anv_type ## _to_handle(struct __anv_type *_obj) \
1868 return (__VkType) _obj; \
1871 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1873 static inline struct __anv_type * \
1874 __anv_type ## _from_handle(__VkType _handle) \
1876 return (struct __anv_type *)(uintptr_t) _handle; \
1879 static inline __VkType \
1880 __anv_type ## _to_handle(struct __anv_type *_obj) \
1882 return (__VkType)(uintptr_t) _obj; \
1885 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1886 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1888 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer
, VkCommandBuffer
)
1889 ANV_DEFINE_HANDLE_CASTS(anv_device
, VkDevice
)
1890 ANV_DEFINE_HANDLE_CASTS(anv_instance
, VkInstance
)
1891 ANV_DEFINE_HANDLE_CASTS(anv_physical_device
, VkPhysicalDevice
)
1892 ANV_DEFINE_HANDLE_CASTS(anv_queue
, VkQueue
)
1894 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool
, VkCommandPool
)
1895 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer
, VkBuffer
)
1896 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view
, VkBufferView
)
1897 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool
, VkDescriptorPool
)
1898 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set
, VkDescriptorSet
)
1899 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout
, VkDescriptorSetLayout
)
1900 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory
, VkDeviceMemory
)
1901 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence
, VkFence
)
1902 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event
, VkEvent
)
1903 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer
, VkFramebuffer
)
1904 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image
, VkImage
)
1905 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view
, VkImageView
);
1906 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache
, VkPipelineCache
)
1907 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline
, VkPipeline
)
1908 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout
, VkPipelineLayout
)
1909 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool
, VkQueryPool
)
1910 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass
, VkRenderPass
)
1911 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler
, VkSampler
)
1912 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module
, VkShaderModule
)
1914 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1916 static inline const __VkType * \
1917 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1919 return (const __VkType *) __anv_obj; \
1922 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1923 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1925 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkMemoryBarrier
)
1926 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkBufferMemoryBarrier
)
1927 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkImageMemoryBarrier
)