2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
38 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
43 #include "brw_device_info.h"
44 #include "brw_compiler.h"
45 #include "util/macros.h"
46 #include "util/list.h"
48 /* Pre-declarations needed for WSI entrypoints */
51 typedef struct xcb_connection_t xcb_connection_t
;
52 typedef uint32_t xcb_visualid_t
;
53 typedef uint32_t xcb_window_t
;
55 #define VK_USE_PLATFORM_XCB_KHR
56 #define VK_USE_PLATFORM_WAYLAND_KHR
59 #include <vulkan/vulkan.h>
60 #include <vulkan/vulkan_intel.h>
61 #include <vulkan/vk_icd.h>
63 #include "anv_entrypoints.h"
64 #include "brw_context.h"
74 #define MAX_VIEWPORTS 16
75 #define MAX_SCISSORS 16
76 #define MAX_PUSH_CONSTANTS_SIZE 128
77 #define MAX_DYNAMIC_BUFFERS 16
79 #define MAX_SAMPLES_LOG2 4 /* SKL supports 16 samples */
81 #define anv_noreturn __attribute__((__noreturn__))
82 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
84 #define MIN(a, b) ((a) < (b) ? (a) : (b))
85 #define MAX(a, b) ((a) > (b) ? (a) : (b))
87 static inline uint32_t
88 align_u32(uint32_t v
, uint32_t a
)
90 assert(a
!= 0 && a
== (a
& -a
));
91 return (v
+ a
- 1) & ~(a
- 1);
94 static inline uint64_t
95 align_u64(uint64_t v
, uint64_t a
)
97 assert(a
!= 0 && a
== (a
& -a
));
98 return (v
+ a
- 1) & ~(a
- 1);
101 static inline int32_t
102 align_i32(int32_t v
, int32_t a
)
104 assert(a
!= 0 && a
== (a
& -a
));
105 return (v
+ a
- 1) & ~(a
- 1);
108 /** Alignment must be a power of 2. */
110 anv_is_aligned(uintmax_t n
, uintmax_t a
)
112 assert(a
== (a
& -a
));
113 return (n
& (a
- 1)) == 0;
116 static inline uint32_t
117 anv_minify(uint32_t n
, uint32_t levels
)
119 if (unlikely(n
== 0))
122 return MAX(n
>> levels
, 1);
126 anv_clamp_f(float f
, float min
, float max
)
139 anv_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
141 if (*inout_mask
& clear_mask
) {
142 *inout_mask
&= ~clear_mask
;
149 #define for_each_bit(b, dword) \
150 for (uint32_t __dword = (dword); \
151 (b) = __builtin_ffs(__dword) - 1, __dword; \
152 __dword &= ~(1 << (b)))
154 #define typed_memcpy(dest, src, count) ({ \
155 static_assert(sizeof(*src) == sizeof(*dest), ""); \
156 memcpy((dest), (src), (count) * sizeof(*(src))); \
159 #define zero(x) (memset(&(x), 0, sizeof(x)))
161 /* Define no kernel as 1, since that's an illegal offset for a kernel */
165 VkStructureType sType
;
169 /* Whenever we generate an error, pass it through this function. Useful for
170 * debugging, where we can break on it. Only call at error site, not when
171 * propagating errors. Might be useful to plug in a stack trace here.
174 VkResult
__vk_errorf(VkResult error
, const char *file
, int line
, const char *format
, ...);
177 #define vk_error(error) __vk_errorf(error, __FILE__, __LINE__, NULL);
178 #define vk_errorf(error, format, ...) __vk_errorf(error, __FILE__, __LINE__, format, ## __VA_ARGS__);
180 #define vk_error(error) error
181 #define vk_errorf(error, format, ...) error
184 void __anv_finishme(const char *file
, int line
, const char *format
, ...)
185 anv_printflike(3, 4);
186 void anv_loge(const char *format
, ...) anv_printflike(1, 2);
187 void anv_loge_v(const char *format
, va_list va
);
190 * Print a FINISHME message, including its source location.
192 #define anv_finishme(format, ...) \
193 __anv_finishme(__FILE__, __LINE__, format, ##__VA_ARGS__);
195 /* A non-fatal assert. Useful for debugging. */
197 #define anv_assert(x) ({ \
198 if (unlikely(!(x))) \
199 fprintf(stderr, "%s:%d ASSERT: %s\n", __FILE__, __LINE__, #x); \
202 #define anv_assert(x)
206 * If a block of code is annotated with anv_validate, then the block runs only
210 #define anv_validate if (1)
212 #define anv_validate if (0)
215 void anv_abortf(const char *format
, ...) anv_noreturn
anv_printflike(1, 2);
216 void anv_abortfv(const char *format
, va_list va
) anv_noreturn
;
218 #define stub_return(v) \
220 anv_finishme("stub %s", __func__); \
226 anv_finishme("stub %s", __func__); \
231 * A dynamically growable, circular buffer. Elements are added at head and
232 * removed from tail. head and tail are free-running uint32_t indices and we
233 * only compute the modulo with size when accessing the array. This way,
234 * number of bytes in the queue is always head - tail, even in case of
241 uint32_t element_size
;
246 int anv_vector_init(struct anv_vector
*queue
, uint32_t element_size
, uint32_t size
);
247 void *anv_vector_add(struct anv_vector
*queue
);
248 void *anv_vector_remove(struct anv_vector
*queue
);
251 anv_vector_length(struct anv_vector
*queue
)
253 return (queue
->head
- queue
->tail
) / queue
->element_size
;
257 anv_vector_head(struct anv_vector
*vector
)
259 assert(vector
->tail
< vector
->head
);
260 return (void *)((char *)vector
->data
+
261 ((vector
->head
- vector
->element_size
) &
262 (vector
->size
- 1)));
266 anv_vector_tail(struct anv_vector
*vector
)
268 return (void *)((char *)vector
->data
+ (vector
->tail
& (vector
->size
- 1)));
272 anv_vector_finish(struct anv_vector
*queue
)
277 #define anv_vector_foreach(elem, queue) \
278 static_assert(__builtin_types_compatible_p(__typeof__(queue), struct anv_vector *), ""); \
279 for (uint32_t __anv_vector_offset = (queue)->tail; \
280 elem = (queue)->data + (__anv_vector_offset & ((queue)->size - 1)), __anv_vector_offset < (queue)->head; \
281 __anv_vector_offset += (queue)->element_size)
286 /* Index into the current validation list. This is used by the
287 * validation list building alrogithm to track which buffers are already
288 * in the validation list so that we can ensure uniqueness.
292 /* Last known offset. This value is provided by the kernel when we
293 * execbuf and is used as the presumed offset for the next bunch of
301 /* We need to set the WRITE flag on winsys bos so GEM will know we're
302 * writing to them and synchronize uses on other rings (eg if the display
303 * server uses the blitter ring).
308 /* Represents a lock-free linked list of "free" things. This is used by
309 * both the block pool and the state pools. Unfortunately, in order to
310 * solve the ABA problem, we can't use a single uint32_t head.
312 union anv_free_list
{
316 /* A simple count that is incremented every time the head changes. */
322 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
324 struct anv_block_state
{
334 struct anv_block_pool
{
335 struct anv_device
*device
;
339 /* The offset from the start of the bo to the "center" of the block
340 * pool. Pointers to allocated blocks are given by
341 * bo.map + center_bo_offset + offsets.
343 uint32_t center_bo_offset
;
345 /* Current memory map of the block pool. This pointer may or may not
346 * point to the actual beginning of the block pool memory. If
347 * anv_block_pool_alloc_back has ever been called, then this pointer
348 * will point to the "center" position of the buffer and all offsets
349 * (negative or positive) given out by the block pool alloc functions
350 * will be valid relative to this pointer.
352 * In particular, map == bo.map + center_offset
358 * Array of mmaps and gem handles owned by the block pool, reclaimed when
359 * the block pool is destroyed.
361 struct anv_vector mmap_cleanups
;
365 union anv_free_list free_list
;
366 struct anv_block_state state
;
368 union anv_free_list back_free_list
;
369 struct anv_block_state back_state
;
372 /* Block pools are backed by a fixed-size 2GB memfd */
373 #define BLOCK_POOL_MEMFD_SIZE (1ull << 32)
375 /* The center of the block pool is also the middle of the memfd. This may
376 * change in the future if we decide differently for some reason.
378 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
380 static inline uint32_t
381 anv_block_pool_size(struct anv_block_pool
*pool
)
383 return pool
->state
.end
+ pool
->back_state
.end
;
392 struct anv_fixed_size_state_pool
{
394 union anv_free_list free_list
;
395 struct anv_block_state block
;
398 #define ANV_MIN_STATE_SIZE_LOG2 6
399 #define ANV_MAX_STATE_SIZE_LOG2 10
401 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2)
403 struct anv_state_pool
{
404 struct anv_block_pool
*block_pool
;
405 struct anv_fixed_size_state_pool buckets
[ANV_STATE_BUCKETS
];
408 struct anv_state_stream_block
;
410 struct anv_state_stream
{
411 struct anv_block_pool
*block_pool
;
413 /* The current working block */
414 struct anv_state_stream_block
*block
;
416 /* Offset at which the current block starts */
418 /* Offset at which to allocate the next state */
420 /* Offset at which the current block ends */
424 #define CACHELINE_SIZE 64
425 #define CACHELINE_MASK 63
428 anv_clflush_range(void *start
, size_t size
)
430 void *p
= (void *) (((uintptr_t) start
) & ~CACHELINE_MASK
);
431 void *end
= start
+ size
;
433 __builtin_ia32_mfence();
435 __builtin_ia32_clflush(p
);
441 anv_state_clflush(struct anv_state state
)
443 anv_clflush_range(state
.map
, state
.alloc_size
);
446 void anv_block_pool_init(struct anv_block_pool
*pool
,
447 struct anv_device
*device
, uint32_t block_size
);
448 void anv_block_pool_finish(struct anv_block_pool
*pool
);
449 int32_t anv_block_pool_alloc(struct anv_block_pool
*pool
);
450 int32_t anv_block_pool_alloc_back(struct anv_block_pool
*pool
);
451 void anv_block_pool_free(struct anv_block_pool
*pool
, int32_t offset
);
452 void anv_state_pool_init(struct anv_state_pool
*pool
,
453 struct anv_block_pool
*block_pool
);
454 void anv_state_pool_finish(struct anv_state_pool
*pool
);
455 struct anv_state
anv_state_pool_alloc(struct anv_state_pool
*pool
,
456 size_t state_size
, size_t alignment
);
457 void anv_state_pool_free(struct anv_state_pool
*pool
, struct anv_state state
);
458 void anv_state_stream_init(struct anv_state_stream
*stream
,
459 struct anv_block_pool
*block_pool
);
460 void anv_state_stream_finish(struct anv_state_stream
*stream
);
461 struct anv_state
anv_state_stream_alloc(struct anv_state_stream
*stream
,
462 uint32_t size
, uint32_t alignment
);
465 * Implements a pool of re-usable BOs. The interface is identical to that
466 * of block_pool except that each block is its own BO.
469 struct anv_device
*device
;
474 void anv_bo_pool_init(struct anv_bo_pool
*pool
, struct anv_device
*device
);
475 void anv_bo_pool_finish(struct anv_bo_pool
*pool
);
476 VkResult
anv_bo_pool_alloc(struct anv_bo_pool
*pool
, struct anv_bo
*bo
,
478 void anv_bo_pool_free(struct anv_bo_pool
*pool
, const struct anv_bo
*bo
);
481 void *anv_resolve_entrypoint(uint32_t index
);
483 extern struct anv_dispatch_table dtable
;
485 #define ANV_CALL(func) ({ \
486 if (dtable.func == NULL) { \
487 size_t idx = offsetof(struct anv_dispatch_table, func) / sizeof(void *); \
488 dtable.entrypoints[idx] = anv_resolve_entrypoint(idx); \
494 anv_alloc(const VkAllocationCallbacks
*alloc
,
495 size_t size
, size_t align
,
496 VkSystemAllocationScope scope
)
498 return alloc
->pfnAllocation(alloc
->pUserData
, size
, align
, scope
);
502 anv_realloc(const VkAllocationCallbacks
*alloc
,
503 void *ptr
, size_t size
, size_t align
,
504 VkSystemAllocationScope scope
)
506 return alloc
->pfnReallocation(alloc
->pUserData
, ptr
, size
, align
, scope
);
510 anv_free(const VkAllocationCallbacks
*alloc
, void *data
)
512 alloc
->pfnFree(alloc
->pUserData
, data
);
516 anv_alloc2(const VkAllocationCallbacks
*parent_alloc
,
517 const VkAllocationCallbacks
*alloc
,
518 size_t size
, size_t align
,
519 VkSystemAllocationScope scope
)
522 return anv_alloc(alloc
, size
, align
, scope
);
524 return anv_alloc(parent_alloc
, size
, align
, scope
);
528 anv_free2(const VkAllocationCallbacks
*parent_alloc
,
529 const VkAllocationCallbacks
*alloc
,
533 anv_free(alloc
, data
);
535 anv_free(parent_alloc
, data
);
538 struct anv_physical_device
{
539 VK_LOADER_DATA _loader_data
;
541 struct anv_instance
* instance
;
545 const struct brw_device_info
* info
;
546 uint64_t aperture_size
;
547 struct brw_compiler
* compiler
;
548 struct isl_device isl_dev
;
551 struct anv_wsi_interaface
;
553 #define VK_ICD_WSI_PLATFORM_MAX 5
555 struct anv_instance
{
556 VK_LOADER_DATA _loader_data
;
558 VkAllocationCallbacks alloc
;
561 int physicalDeviceCount
;
562 struct anv_physical_device physicalDevice
;
564 struct anv_wsi_interface
* wsi
[VK_ICD_WSI_PLATFORM_MAX
];
567 VkResult
anv_init_wsi(struct anv_instance
*instance
);
568 void anv_finish_wsi(struct anv_instance
*instance
);
570 struct anv_meta_state
{
571 VkAllocationCallbacks alloc
;
574 * Use array element `i` for images with `2^i` samples.
578 * Pipeline N is used to clear color attachment N of the current
581 * HACK: We use one pipeline per color attachment to work around the
582 * compiler's inability to dynamically set the render target index of
583 * the render target write message.
585 struct anv_pipeline
*color_pipelines
[MAX_RTS
];
587 struct anv_pipeline
*depth_only_pipeline
;
588 struct anv_pipeline
*stencil_only_pipeline
;
589 struct anv_pipeline
*depthstencil_pipeline
;
590 } clear
[1 + MAX_SAMPLES_LOG2
];
593 VkRenderPass render_pass
;
595 /** Pipeline that blits from a 1D image. */
596 VkPipeline pipeline_1d_src
;
598 /** Pipeline that blits from a 2D image. */
599 VkPipeline pipeline_2d_src
;
601 /** Pipeline that blits from a 3D image. */
602 VkPipeline pipeline_3d_src
;
604 VkPipelineLayout pipeline_layout
;
605 VkDescriptorSetLayout ds_layout
;
609 VkRenderPass render_pass
;
611 /** Pipeline that copies from a 2D image. */
612 VkPipeline pipeline_2d_src
;
614 VkPipelineLayout pipeline_layout
;
615 VkDescriptorSetLayout ds_layout
;
619 /** Pipeline [i] resolves an image with 2^(i+1) samples. */
620 VkPipeline pipelines
[MAX_SAMPLES_LOG2
];
623 VkPipelineLayout pipeline_layout
;
624 VkDescriptorSetLayout ds_layout
;
629 VK_LOADER_DATA _loader_data
;
631 struct anv_device
* device
;
633 struct anv_state_pool
* pool
;
636 struct anv_pipeline_cache
{
637 struct anv_device
* device
;
638 struct anv_state_stream program_stream
;
639 pthread_mutex_t mutex
;
643 uint32_t kernel_count
;
644 uint32_t * hash_table
;
647 struct anv_pipeline_bind_map
;
649 void anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
650 struct anv_device
*device
);
651 void anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
);
652 uint32_t anv_pipeline_cache_search(struct anv_pipeline_cache
*cache
,
653 const unsigned char *sha1
,
654 const struct brw_stage_prog_data
**prog_data
,
655 struct anv_pipeline_bind_map
*map
);
656 uint32_t anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache
*cache
,
657 const unsigned char *sha1
,
660 const struct brw_stage_prog_data
**prog_data
,
661 size_t prog_data_size
,
662 struct anv_pipeline_bind_map
*map
);
665 VK_LOADER_DATA _loader_data
;
667 VkAllocationCallbacks alloc
;
669 struct anv_instance
* instance
;
671 struct brw_device_info info
;
672 struct isl_device isl_dev
;
675 bool can_chain_batches
;
677 struct anv_bo_pool batch_bo_pool
;
679 struct anv_block_pool dynamic_state_block_pool
;
680 struct anv_state_pool dynamic_state_pool
;
682 struct anv_block_pool instruction_block_pool
;
683 struct anv_pipeline_cache default_pipeline_cache
;
685 struct anv_block_pool surface_state_block_pool
;
686 struct anv_state_pool surface_state_pool
;
688 struct anv_bo workaround_bo
;
690 struct anv_meta_state meta_state
;
692 struct anv_state border_colors
;
694 struct anv_queue queue
;
696 struct anv_block_pool scratch_block_pool
;
698 uint32_t default_mocs
;
700 pthread_mutex_t mutex
;
703 void anv_device_get_cache_uuid(void *uuid
);
706 void* anv_gem_mmap(struct anv_device
*device
,
707 uint32_t gem_handle
, uint64_t offset
, uint64_t size
, uint32_t flags
);
708 void anv_gem_munmap(void *p
, uint64_t size
);
709 uint32_t anv_gem_create(struct anv_device
*device
, size_t size
);
710 void anv_gem_close(struct anv_device
*device
, uint32_t gem_handle
);
711 uint32_t anv_gem_userptr(struct anv_device
*device
, void *mem
, size_t size
);
712 int anv_gem_wait(struct anv_device
*device
, uint32_t gem_handle
, int64_t *timeout_ns
);
713 int anv_gem_execbuffer(struct anv_device
*device
,
714 struct drm_i915_gem_execbuffer2
*execbuf
);
715 int anv_gem_set_tiling(struct anv_device
*device
, uint32_t gem_handle
,
716 uint32_t stride
, uint32_t tiling
);
717 int anv_gem_create_context(struct anv_device
*device
);
718 int anv_gem_destroy_context(struct anv_device
*device
, int context
);
719 int anv_gem_get_param(int fd
, uint32_t param
);
720 bool anv_gem_get_bit6_swizzle(int fd
, uint32_t tiling
);
721 int anv_gem_get_aperture(int fd
, uint64_t *size
);
722 int anv_gem_handle_to_fd(struct anv_device
*device
, uint32_t gem_handle
);
723 uint32_t anv_gem_fd_to_handle(struct anv_device
*device
, int fd
);
724 int anv_gem_set_caching(struct anv_device
*device
, uint32_t gem_handle
, uint32_t caching
);
725 int anv_gem_set_domain(struct anv_device
*device
, uint32_t gem_handle
,
726 uint32_t read_domains
, uint32_t write_domain
);
728 VkResult
anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
);
730 struct anv_reloc_list
{
733 struct drm_i915_gem_relocation_entry
* relocs
;
734 struct anv_bo
** reloc_bos
;
737 VkResult
anv_reloc_list_init(struct anv_reloc_list
*list
,
738 const VkAllocationCallbacks
*alloc
);
739 void anv_reloc_list_finish(struct anv_reloc_list
*list
,
740 const VkAllocationCallbacks
*alloc
);
742 uint64_t anv_reloc_list_add(struct anv_reloc_list
*list
,
743 const VkAllocationCallbacks
*alloc
,
744 uint32_t offset
, struct anv_bo
*target_bo
,
747 struct anv_batch_bo
{
748 /* Link in the anv_cmd_buffer.owned_batch_bos list */
749 struct list_head link
;
753 /* Bytes actually consumed in this batch BO */
756 /* Last seen surface state block pool bo offset */
757 uint32_t last_ss_pool_bo_offset
;
759 struct anv_reloc_list relocs
;
763 const VkAllocationCallbacks
* alloc
;
769 struct anv_reloc_list
* relocs
;
771 /* This callback is called (with the associated user data) in the event
772 * that the batch runs out of space.
774 VkResult (*extend_cb
)(struct anv_batch
*, void *);
778 void *anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
);
779 void anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
);
780 uint64_t anv_batch_emit_reloc(struct anv_batch
*batch
,
781 void *location
, struct anv_bo
*bo
, uint32_t offset
);
782 VkResult
anv_device_submit_simple_batch(struct anv_device
*device
,
783 struct anv_batch
*batch
);
790 #define __gen_address_type struct anv_address
791 #define __gen_user_data struct anv_batch
793 static inline uint64_t
794 __gen_combine_address(struct anv_batch
*batch
, void *location
,
795 const struct anv_address address
, uint32_t delta
)
797 if (address
.bo
== NULL
) {
798 return address
.offset
+ delta
;
800 assert(batch
->start
<= location
&& location
< batch
->end
);
802 return anv_batch_emit_reloc(batch
, location
, address
.bo
, address
.offset
+ delta
);
806 /* Wrapper macros needed to work around preprocessor argument issues. In
807 * particular, arguments don't get pre-evaluated if they are concatenated.
808 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
809 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
810 * We can work around this easily enough with these helpers.
812 #define __anv_cmd_length(cmd) cmd ## _length
813 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
814 #define __anv_cmd_header(cmd) cmd ## _header
815 #define __anv_cmd_pack(cmd) cmd ## _pack
817 #define anv_batch_emit(batch, cmd, ...) do { \
818 void *__dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
819 struct cmd __template = { \
820 __anv_cmd_header(cmd), \
823 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
824 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__dst, __anv_cmd_length(cmd) * 4)); \
827 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
828 void *__dst = anv_batch_emit_dwords(batch, n); \
829 struct cmd __template = { \
830 __anv_cmd_header(cmd), \
831 .DWordLength = n - __anv_cmd_length_bias(cmd), \
834 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
838 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
842 static_assert(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1), "mismatch merge"); \
843 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
844 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
845 dw[i] = (dwords0)[i] | (dwords1)[i]; \
846 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
849 #define anv_state_pool_emit(pool, cmd, align, ...) ({ \
850 const uint32_t __size = __anv_cmd_length(cmd) * 4; \
851 struct anv_state __state = \
852 anv_state_pool_alloc((pool), __size, align); \
853 struct cmd __template = { \
856 __anv_cmd_pack(cmd)(NULL, __state.map, &__template); \
857 VG(VALGRIND_CHECK_MEM_IS_DEFINED(__state.map, __anv_cmd_length(cmd) * 4)); \
858 if (!(pool)->block_pool->device->info.has_llc) \
859 anv_state_clflush(__state); \
863 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
864 .GraphicsDataTypeGFDT = 0, \
865 .LLCCacheabilityControlLLCCC = 0, \
866 .L3CacheabilityControlL3CC = 1, \
869 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
870 .LLCeLLCCacheabilityControlLLCCC = 0, \
871 .L3CacheabilityControlL3CC = 1, \
874 #define GEN8_MOCS (struct GEN8_MEMORY_OBJECT_CONTROL_STATE) { \
875 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
876 .TargetCache = L3DefertoPATforLLCeLLCselection, \
880 /* Skylake: MOCS is now an index into an array of 62 different caching
881 * configurations programmed by the kernel.
884 #define GEN9_MOCS (struct GEN9_MEMORY_OBJECT_CONTROL_STATE) { \
885 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
886 .IndextoMOCSTables = 2 \
889 #define GEN9_MOCS_PTE { \
890 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
891 .IndextoMOCSTables = 1 \
894 struct anv_device_memory
{
897 VkDeviceSize map_size
;
902 * Header for Vertex URB Entry (VUE)
904 struct anv_vue_header
{
906 uint32_t RTAIndex
; /* RenderTargetArrayIndex */
907 uint32_t ViewportIndex
;
911 struct anv_descriptor_set_binding_layout
{
912 /* Number of array elements in this binding */
915 /* Index into the flattend descriptor set */
916 uint16_t descriptor_index
;
918 /* Index into the dynamic state array for a dynamic buffer */
919 int16_t dynamic_offset_index
;
921 /* Index into the descriptor set buffer views */
922 int16_t buffer_index
;
925 /* Index into the binding table for the associated surface */
926 int16_t surface_index
;
928 /* Index into the sampler table for the associated sampler */
929 int16_t sampler_index
;
931 /* Index into the image table for the associated image */
933 } stage
[MESA_SHADER_STAGES
];
935 /* Immutable samplers (or NULL if no immutable samplers) */
936 struct anv_sampler
**immutable_samplers
;
939 struct anv_descriptor_set_layout
{
940 /* Number of bindings in this descriptor set */
941 uint16_t binding_count
;
943 /* Total size of the descriptor set with room for all array entries */
946 /* Shader stages affected by this descriptor set */
947 uint16_t shader_stages
;
949 /* Number of buffers in this descriptor set */
950 uint16_t buffer_count
;
952 /* Number of dynamic offsets used by this descriptor set */
953 uint16_t dynamic_offset_count
;
955 /* Bindings in this descriptor set */
956 struct anv_descriptor_set_binding_layout binding
[0];
959 struct anv_descriptor
{
960 VkDescriptorType type
;
964 struct anv_image_view
*image_view
;
965 struct anv_sampler
*sampler
;
968 struct anv_buffer_view
*buffer_view
;
972 struct anv_descriptor_set
{
973 const struct anv_descriptor_set_layout
*layout
;
975 uint32_t buffer_count
;
976 struct anv_buffer_view
*buffer_views
;
977 struct anv_descriptor descriptors
[0];
980 struct anv_descriptor_pool
{
985 struct anv_state_stream surface_state_stream
;
986 void *surface_state_free_list
;
992 anv_descriptor_set_create(struct anv_device
*device
,
993 struct anv_descriptor_pool
*pool
,
994 const struct anv_descriptor_set_layout
*layout
,
995 struct anv_descriptor_set
**out_set
);
998 anv_descriptor_set_destroy(struct anv_device
*device
,
999 struct anv_descriptor_pool
*pool
,
1000 struct anv_descriptor_set
*set
);
1002 #define ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS UINT16_MAX
1004 struct anv_pipeline_binding
{
1005 /* The descriptor set this surface corresponds to. The special value of
1006 * ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS indicates that the offset refers
1007 * to a color attachment and not a regular descriptor.
1011 /* Offset into the descriptor set or attachment list. */
1015 struct anv_pipeline_layout
{
1017 struct anv_descriptor_set_layout
*layout
;
1018 uint32_t dynamic_offset_start
;
1024 bool has_dynamic_offsets
;
1025 } stage
[MESA_SHADER_STAGES
];
1029 struct anv_device
* device
;
1032 VkBufferUsageFlags usage
;
1034 /* Set when bound */
1036 VkDeviceSize offset
;
1039 enum anv_cmd_dirty_bits
{
1040 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1041 ANV_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1042 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1043 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
= 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1044 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
= 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1045 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
= 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1046 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1047 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1048 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1049 ANV_CMD_DIRTY_DYNAMIC_ALL
= (1 << 9) - 1,
1050 ANV_CMD_DIRTY_PIPELINE
= 1 << 9,
1051 ANV_CMD_DIRTY_INDEX_BUFFER
= 1 << 10,
1052 ANV_CMD_DIRTY_RENDER_TARGETS
= 1 << 11,
1054 typedef uint32_t anv_cmd_dirty_mask_t
;
1056 struct anv_vertex_binding
{
1057 struct anv_buffer
* buffer
;
1058 VkDeviceSize offset
;
1061 struct anv_push_constants
{
1062 /* Current allocated size of this push constants data structure.
1063 * Because a decent chunk of it may not be used (images on SKL, for
1064 * instance), we won't actually allocate the entire structure up-front.
1068 /* Push constant data provided by the client through vkPushConstants */
1069 uint8_t client_data
[MAX_PUSH_CONSTANTS_SIZE
];
1071 /* Our hardware only provides zero-based vertex and instance id so, in
1072 * order to satisfy the vulkan requirements, we may have to push one or
1073 * both of these into the shader.
1075 uint32_t base_vertex
;
1076 uint32_t base_instance
;
1078 /* Offsets and ranges for dynamically bound buffers */
1082 } dynamic
[MAX_DYNAMIC_BUFFERS
];
1084 /* Image data for image_load_store on pre-SKL */
1085 struct brw_image_param images
[MAX_IMAGES
];
1088 struct anv_dynamic_state
{
1091 VkViewport viewports
[MAX_VIEWPORTS
];
1096 VkRect2D scissors
[MAX_SCISSORS
];
1107 float blend_constants
[4];
1117 } stencil_compare_mask
;
1122 } stencil_write_mask
;
1127 } stencil_reference
;
1130 extern const struct anv_dynamic_state default_dynamic_state
;
1132 void anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
1133 const struct anv_dynamic_state
*src
,
1134 uint32_t copy_mask
);
1137 * Attachment state when recording a renderpass instance.
1139 * The clear value is valid only if there exists a pending clear.
1141 struct anv_attachment_state
{
1142 VkImageAspectFlags pending_clear_aspects
;
1143 VkClearValue clear_value
;
1146 /** State required while building cmd buffer */
1147 struct anv_cmd_state
{
1148 /* PIPELINE_SELECT.PipelineSelection */
1149 uint32_t current_pipeline
;
1150 uint32_t current_l3_config
;
1152 anv_cmd_dirty_mask_t dirty
;
1153 anv_cmd_dirty_mask_t compute_dirty
;
1154 uint32_t num_workgroups_offset
;
1155 struct anv_bo
*num_workgroups_bo
;
1156 VkShaderStageFlags descriptors_dirty
;
1157 VkShaderStageFlags push_constants_dirty
;
1158 uint32_t scratch_size
;
1159 struct anv_pipeline
* pipeline
;
1160 struct anv_pipeline
* compute_pipeline
;
1161 struct anv_framebuffer
* framebuffer
;
1162 struct anv_render_pass
* pass
;
1163 struct anv_subpass
* subpass
;
1164 uint32_t restart_index
;
1165 struct anv_vertex_binding vertex_bindings
[MAX_VBS
];
1166 struct anv_descriptor_set
* descriptors
[MAX_SETS
];
1167 struct anv_push_constants
* push_constants
[MESA_SHADER_STAGES
];
1168 struct anv_state binding_tables
[MESA_SHADER_STAGES
];
1169 struct anv_state samplers
[MESA_SHADER_STAGES
];
1170 struct anv_dynamic_state dynamic
;
1174 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1175 * valid only when recording a render pass instance.
1177 struct anv_attachment_state
* attachments
;
1180 struct anv_buffer
* index_buffer
;
1181 uint32_t index_type
; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1182 uint32_t index_offset
;
1186 struct anv_cmd_pool
{
1187 VkAllocationCallbacks alloc
;
1188 struct list_head cmd_buffers
;
1191 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1193 enum anv_cmd_buffer_exec_mode
{
1194 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY
,
1195 ANV_CMD_BUFFER_EXEC_MODE_EMIT
,
1196 ANV_CMD_BUFFER_EXEC_MODE_GROW_AND_EMIT
,
1197 ANV_CMD_BUFFER_EXEC_MODE_CHAIN
,
1198 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN
,
1201 struct anv_cmd_buffer
{
1202 VK_LOADER_DATA _loader_data
;
1204 struct anv_device
* device
;
1206 struct anv_cmd_pool
* pool
;
1207 struct list_head pool_link
;
1209 struct anv_batch batch
;
1211 /* Fields required for the actual chain of anv_batch_bo's.
1213 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1215 struct list_head batch_bos
;
1216 enum anv_cmd_buffer_exec_mode exec_mode
;
1218 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1219 * referenced by this command buffer
1221 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1223 struct anv_vector seen_bbos
;
1225 /* A vector of int32_t's for every block of binding tables.
1227 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1229 struct anv_vector bt_blocks
;
1231 struct anv_reloc_list surface_relocs
;
1233 /* Information needed for execbuf
1235 * These fields are generated by anv_cmd_buffer_prepare_execbuf().
1238 struct drm_i915_gem_execbuffer2 execbuf
;
1240 struct drm_i915_gem_exec_object2
* objects
;
1242 struct anv_bo
** bos
;
1244 /* Allocated length of the 'objects' and 'bos' arrays */
1245 uint32_t array_length
;
1250 /* Serial for tracking buffer completion */
1253 /* Stream objects for storing temporary data */
1254 struct anv_state_stream surface_state_stream
;
1255 struct anv_state_stream dynamic_state_stream
;
1257 VkCommandBufferUsageFlags usage_flags
;
1258 VkCommandBufferLevel level
;
1260 struct anv_cmd_state state
;
1263 VkResult
anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1264 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1265 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1266 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer
*cmd_buffer
);
1267 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer
*primary
,
1268 struct anv_cmd_buffer
*secondary
);
1269 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer
*cmd_buffer
);
1271 VkResult
anv_cmd_buffer_emit_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1272 unsigned stage
, struct anv_state
*bt_state
);
1273 VkResult
anv_cmd_buffer_emit_samplers(struct anv_cmd_buffer
*cmd_buffer
,
1274 unsigned stage
, struct anv_state
*state
);
1275 uint32_t gen7_cmd_buffer_flush_descriptor_sets(struct anv_cmd_buffer
*cmd_buffer
);
1276 void gen7_cmd_buffer_emit_descriptor_pointers(struct anv_cmd_buffer
*cmd_buffer
,
1279 struct anv_state
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1280 const void *data
, uint32_t size
, uint32_t alignment
);
1281 struct anv_state
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1282 uint32_t *a
, uint32_t *b
,
1283 uint32_t dwords
, uint32_t alignment
);
1286 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1288 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1289 uint32_t entries
, uint32_t *state_offset
);
1291 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
);
1293 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer
*cmd_buffer
,
1294 uint32_t size
, uint32_t alignment
);
1297 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer
*cmd_buffer
);
1299 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
);
1300 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer
*cmd_buffer
);
1302 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1304 void anv_cmd_state_setup_attachments(struct anv_cmd_buffer
*cmd_buffer
,
1305 const VkRenderPassBeginInfo
*info
);
1307 void anv_cmd_buffer_set_subpass(struct anv_cmd_buffer
*cmd_buffer
,
1308 struct anv_subpass
*subpass
);
1311 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
1312 gl_shader_stage stage
);
1314 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
);
1316 void anv_cmd_buffer_clear_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1317 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1319 const struct anv_image_view
*
1320 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
);
1322 void anv_cmd_buffer_dump(struct anv_cmd_buffer
*cmd_buffer
);
1326 struct drm_i915_gem_execbuffer2 execbuf
;
1327 struct drm_i915_gem_exec_object2 exec2_objects
[1];
1333 struct anv_state state
;
1338 struct anv_shader_module
{
1339 struct nir_shader
* nir
;
1341 unsigned char sha1
[20];
1346 void anv_hash_shader(unsigned char *hash
, const void *key
, size_t key_size
,
1347 struct anv_shader_module
*module
,
1348 const char *entrypoint
,
1349 const VkSpecializationInfo
*spec_info
);
1351 static inline gl_shader_stage
1352 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
1354 assert(__builtin_popcount(vk_stage
) == 1);
1355 return ffs(vk_stage
) - 1;
1358 static inline VkShaderStageFlagBits
1359 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
1361 return (1 << mesa_stage
);
1364 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
1366 #define anv_foreach_stage(stage, stage_bits) \
1367 for (gl_shader_stage stage, \
1368 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
1369 stage = __builtin_ffs(__tmp) - 1, __tmp; \
1370 __tmp &= ~(1 << (stage)))
1372 struct anv_pipeline_bind_map
{
1373 uint32_t surface_count
;
1374 uint32_t sampler_count
;
1375 uint32_t image_count
;
1376 uint32_t attachment_count
;
1378 struct anv_pipeline_binding
* surface_to_descriptor
;
1379 struct anv_pipeline_binding
* sampler_to_descriptor
;
1380 uint32_t * surface_to_attachment
;
1383 struct anv_pipeline
{
1384 struct anv_device
* device
;
1385 struct anv_batch batch
;
1386 uint32_t batch_data
[512];
1387 struct anv_reloc_list batch_relocs
;
1388 uint32_t dynamic_state_mask
;
1389 struct anv_dynamic_state dynamic_state
;
1391 struct anv_pipeline_layout
* layout
;
1392 struct anv_pipeline_bind_map bindings
[MESA_SHADER_STAGES
];
1396 const struct brw_stage_prog_data
* prog_data
[MESA_SHADER_STAGES
];
1397 uint32_t scratch_start
[MESA_SHADER_STAGES
];
1398 uint32_t total_scratch
;
1400 uint8_t push_size
[MESA_SHADER_FRAGMENT
+ 1];
1401 uint32_t start
[MESA_SHADER_GEOMETRY
+ 1];
1402 uint32_t size
[MESA_SHADER_GEOMETRY
+ 1];
1403 uint32_t entries
[MESA_SHADER_GEOMETRY
+ 1];
1406 VkShaderStageFlags active_stages
;
1407 struct anv_state blend_state
;
1414 uint32_t ps_grf_start0
;
1415 uint32_t ps_grf_start2
;
1420 uint32_t binding_stride
[MAX_VBS
];
1421 bool instancing_enable
[MAX_VBS
];
1422 bool primitive_restart
;
1425 uint32_t cs_thread_width_max
;
1426 uint32_t cs_right_mask
;
1430 uint32_t depth_stencil_state
[3];
1436 uint32_t wm_depth_stencil
[3];
1440 uint32_t wm_depth_stencil
[4];
1444 static inline const struct brw_vs_prog_data
*
1445 get_vs_prog_data(struct anv_pipeline
*pipeline
)
1447 return (const struct brw_vs_prog_data
*) pipeline
->prog_data
[MESA_SHADER_VERTEX
];
1450 static inline const struct brw_gs_prog_data
*
1451 get_gs_prog_data(struct anv_pipeline
*pipeline
)
1453 return (const struct brw_gs_prog_data
*) pipeline
->prog_data
[MESA_SHADER_GEOMETRY
];
1456 static inline const struct brw_wm_prog_data
*
1457 get_wm_prog_data(struct anv_pipeline
*pipeline
)
1459 return (const struct brw_wm_prog_data
*) pipeline
->prog_data
[MESA_SHADER_FRAGMENT
];
1462 static inline const struct brw_cs_prog_data
*
1463 get_cs_prog_data(struct anv_pipeline
*pipeline
)
1465 return (const struct brw_cs_prog_data
*) pipeline
->prog_data
[MESA_SHADER_COMPUTE
];
1468 struct anv_graphics_pipeline_create_info
{
1470 * If non-negative, overrides the color attachment count of the pipeline's
1473 int8_t color_attachment_count
;
1476 bool disable_viewport
;
1477 bool disable_scissor
;
1483 anv_pipeline_init(struct anv_pipeline
*pipeline
, struct anv_device
*device
,
1484 struct anv_pipeline_cache
*cache
,
1485 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1486 const struct anv_graphics_pipeline_create_info
*extra
,
1487 const VkAllocationCallbacks
*alloc
);
1490 anv_pipeline_compile_cs(struct anv_pipeline
*pipeline
,
1491 struct anv_pipeline_cache
*cache
,
1492 const VkComputePipelineCreateInfo
*info
,
1493 struct anv_shader_module
*module
,
1494 const char *entrypoint
,
1495 const VkSpecializationInfo
*spec_info
);
1498 anv_graphics_pipeline_create(VkDevice device
,
1499 VkPipelineCache cache
,
1500 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
1501 const struct anv_graphics_pipeline_create_info
*extra
,
1502 const VkAllocationCallbacks
*alloc
,
1503 VkPipeline
*pPipeline
);
1505 struct anv_format_swizzle
{
1513 const VkFormat vk_format
;
1515 enum isl_format isl_format
; /**< RENDER_SURFACE_STATE.SurfaceFormat */
1516 const struct isl_format_layout
*isl_layout
;
1517 struct anv_format_swizzle swizzle
;
1522 const struct anv_format
*
1523 anv_format_for_vk_format(VkFormat format
);
1526 anv_get_isl_format(VkFormat format
, VkImageAspectFlags aspect
,
1527 VkImageTiling tiling
, struct anv_format_swizzle
*swizzle
);
1530 anv_format_is_color(const struct anv_format
*format
)
1532 return !format
->has_depth
&& !format
->has_stencil
;
1536 anv_format_is_depth_or_stencil(const struct anv_format
*format
)
1538 return format
->has_depth
|| format
->has_stencil
;
1542 * Subsurface of an anv_image.
1544 struct anv_surface
{
1545 struct isl_surf isl
;
1548 * Offset from VkImage's base address, as bound by vkBindImageMemory().
1555 /* The original VkFormat provided by the client. This may not match any
1556 * of the actual surface formats.
1559 const struct anv_format
*format
;
1562 uint32_t array_size
;
1563 uint32_t samples
; /**< VkImageCreateInfo::samples */
1564 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
1565 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
1570 /* Set when bound */
1572 VkDeviceSize offset
;
1577 * For each foo, anv_image::foo_surface is valid if and only if
1578 * anv_image::format has a foo aspect.
1580 * The hardware requires that the depth buffer and stencil buffer be
1581 * separate surfaces. From Vulkan's perspective, though, depth and stencil
1582 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
1583 * allocate the depth and stencil buffers as separate surfaces in the same
1587 struct anv_surface color_surface
;
1590 struct anv_surface depth_surface
;
1591 struct anv_surface stencil_surface
;
1596 static inline uint32_t
1597 anv_get_layerCount(const struct anv_image
*image
,
1598 const VkImageSubresourceRange
*range
)
1600 return range
->layerCount
== VK_REMAINING_ARRAY_LAYERS
?
1601 image
->array_size
- range
->baseArrayLayer
: range
->layerCount
;
1604 static inline uint32_t
1605 anv_get_levelCount(const struct anv_image
*image
,
1606 const VkImageSubresourceRange
*range
)
1608 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
?
1609 image
->levels
- range
->baseMipLevel
: range
->levelCount
;
1613 struct anv_image_view
{
1614 const struct anv_image
*image
; /**< VkImageViewCreateInfo::image */
1616 uint32_t offset
; /**< Offset into bo. */
1618 VkImageAspectFlags aspect_mask
;
1620 uint32_t base_layer
;
1622 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
1624 /** RENDER_SURFACE_STATE when using image as a color render target. */
1625 struct anv_state color_rt_surface_state
;
1627 /** RENDER_SURFACE_STATE when using image as a sampler surface. */
1628 struct anv_state sampler_surface_state
;
1630 /** RENDER_SURFACE_STATE when using image as a storage image. */
1631 struct anv_state storage_surface_state
;
1633 struct brw_image_param storage_image_param
;
1636 struct anv_image_create_info
{
1637 const VkImageCreateInfo
*vk_info
;
1638 isl_tiling_flags_t isl_tiling_flags
;
1642 VkResult
anv_image_create(VkDevice _device
,
1643 const struct anv_image_create_info
*info
,
1644 const VkAllocationCallbacks
* alloc
,
1647 struct anv_surface
*
1648 anv_image_get_surface_for_aspect_mask(struct anv_image
*image
,
1649 VkImageAspectFlags aspect_mask
);
1651 void anv_image_view_init(struct anv_image_view
*view
,
1652 struct anv_device
*device
,
1653 const VkImageViewCreateInfo
* pCreateInfo
,
1654 struct anv_cmd_buffer
*cmd_buffer
,
1656 VkImageUsageFlags usage_mask
);
1658 struct anv_buffer_view
{
1659 enum isl_format format
; /**< VkBufferViewCreateInfo::format */
1661 uint32_t offset
; /**< Offset into bo. */
1662 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1664 struct anv_state surface_state
;
1665 struct anv_state storage_surface_state
;
1667 struct brw_image_param storage_image_param
;
1670 const struct anv_format
*
1671 anv_format_for_descriptor_type(VkDescriptorType type
);
1673 void anv_fill_buffer_surface_state(struct anv_device
*device
,
1674 struct anv_state state
,
1675 enum isl_format format
,
1676 uint32_t offset
, uint32_t range
,
1679 void anv_image_view_fill_image_param(struct anv_device
*device
,
1680 struct anv_image_view
*view
,
1681 struct brw_image_param
*param
);
1682 void anv_buffer_view_fill_image_param(struct anv_device
*device
,
1683 struct anv_buffer_view
*view
,
1684 struct brw_image_param
*param
);
1686 struct anv_sampler
{
1690 struct anv_framebuffer
{
1695 uint32_t attachment_count
;
1696 struct anv_image_view
* attachments
[0];
1699 struct anv_subpass
{
1700 uint32_t input_count
;
1701 uint32_t * input_attachments
;
1702 uint32_t color_count
;
1703 uint32_t * color_attachments
;
1704 uint32_t * resolve_attachments
;
1705 uint32_t depth_stencil_attachment
;
1707 /** Subpass has at least one resolve attachment */
1711 struct anv_render_pass_attachment
{
1712 const struct anv_format
*format
;
1714 VkAttachmentLoadOp load_op
;
1715 VkAttachmentLoadOp stencil_load_op
;
1718 struct anv_render_pass
{
1719 uint32_t attachment_count
;
1720 uint32_t subpass_count
;
1721 uint32_t * subpass_attachments
;
1722 struct anv_render_pass_attachment
* attachments
;
1723 struct anv_subpass subpasses
[0];
1726 extern struct anv_render_pass anv_meta_dummy_renderpass
;
1728 struct anv_query_pool_slot
{
1734 struct anv_query_pool
{
1740 VkResult
anv_device_init_meta(struct anv_device
*device
);
1741 void anv_device_finish_meta(struct anv_device
*device
);
1743 void *anv_lookup_entrypoint(const char *name
);
1745 void anv_dump_image_to_ppm(struct anv_device
*device
,
1746 struct anv_image
*image
, unsigned miplevel
,
1747 unsigned array_layer
, const char *filename
);
1749 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
1751 static inline struct __anv_type * \
1752 __anv_type ## _from_handle(__VkType _handle) \
1754 return (struct __anv_type *) _handle; \
1757 static inline __VkType \
1758 __anv_type ## _to_handle(struct __anv_type *_obj) \
1760 return (__VkType) _obj; \
1763 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
1765 static inline struct __anv_type * \
1766 __anv_type ## _from_handle(__VkType _handle) \
1768 return (struct __anv_type *)(uintptr_t) _handle; \
1771 static inline __VkType \
1772 __anv_type ## _to_handle(struct __anv_type *_obj) \
1774 return (__VkType)(uintptr_t) _obj; \
1777 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
1778 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
1780 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer
, VkCommandBuffer
)
1781 ANV_DEFINE_HANDLE_CASTS(anv_device
, VkDevice
)
1782 ANV_DEFINE_HANDLE_CASTS(anv_instance
, VkInstance
)
1783 ANV_DEFINE_HANDLE_CASTS(anv_physical_device
, VkPhysicalDevice
)
1784 ANV_DEFINE_HANDLE_CASTS(anv_queue
, VkQueue
)
1786 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool
, VkCommandPool
)
1787 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer
, VkBuffer
)
1788 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view
, VkBufferView
)
1789 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool
, VkDescriptorPool
)
1790 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set
, VkDescriptorSet
)
1791 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout
, VkDescriptorSetLayout
)
1792 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory
, VkDeviceMemory
)
1793 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence
, VkFence
)
1794 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event
, VkEvent
)
1795 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer
, VkFramebuffer
)
1796 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image
, VkImage
)
1797 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view
, VkImageView
);
1798 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache
, VkPipelineCache
)
1799 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline
, VkPipeline
)
1800 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout
, VkPipelineLayout
)
1801 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool
, VkQueryPool
)
1802 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass
, VkRenderPass
)
1803 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler
, VkSampler
)
1804 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module
, VkShaderModule
)
1806 #define ANV_DEFINE_STRUCT_CASTS(__anv_type, __VkType) \
1808 static inline const __VkType * \
1809 __anv_type ## _to_ ## __VkType(const struct __anv_type *__anv_obj) \
1811 return (const __VkType *) __anv_obj; \
1814 #define ANV_COMMON_TO_STRUCT(__VkType, __vk_name, __common_name) \
1815 const __VkType *__vk_name = anv_common_to_ ## __VkType(__common_name)
1817 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkMemoryBarrier
)
1818 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkBufferMemoryBarrier
)
1819 ANV_DEFINE_STRUCT_CASTS(anv_common
, VkImageMemoryBarrier
)
1821 /* Gen-specific function declarations */
1823 # include "anv_genX.h"
1825 # define genX(x) gen7_##x
1826 # include "anv_genX.h"
1828 # define genX(x) gen75_##x
1829 # include "anv_genX.h"
1831 # define genX(x) gen8_##x
1832 # include "anv_genX.h"
1834 # define genX(x) gen9_##x
1835 # include "anv_genX.h"