2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
39 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
44 #include "common/gen_clflush.h"
45 #include "dev/gen_device_info.h"
46 #include "blorp/blorp.h"
47 #include "compiler/brw_compiler.h"
48 #include "util/macros.h"
49 #include "util/list.h"
50 #include "util/u_atomic.h"
51 #include "util/u_vector.h"
53 #include "vk_debug_report.h"
55 /* Pre-declarations needed for WSI entrypoints */
58 typedef struct xcb_connection_t xcb_connection_t
;
59 typedef uint32_t xcb_visualid_t
;
60 typedef uint32_t xcb_window_t
;
63 struct anv_buffer_view
;
64 struct anv_image_view
;
69 #include <vulkan/vulkan.h>
70 #include <vulkan/vulkan_intel.h>
71 #include <vulkan/vk_icd.h>
72 #include <vulkan/vk_android_native_buffer.h>
74 #include "anv_entrypoints.h"
75 #include "anv_extensions.h"
78 #include "common/gen_debug.h"
79 #include "common/intel_log.h"
80 #include "wsi_common.h"
82 /* Allowing different clear colors requires us to perform a depth resolve at
83 * the end of certain render passes. This is because while slow clears store
84 * the clear color in the HiZ buffer, fast clears (without a resolve) don't.
85 * See the PRMs for examples describing when additional resolves would be
86 * necessary. To enable fast clears without requiring extra resolves, we set
87 * the clear value to a globally-defined one. We could allow different values
88 * if the user doesn't expect coherent data during or after a render passes
89 * (VK_ATTACHMENT_STORE_OP_DONT_CARE), but such users (aside from the CTS)
90 * don't seem to exist yet. In almost all Vulkan applications tested thus far,
91 * 1.0f seems to be the only value used. The only application that doesn't set
92 * this value does so through the usage of an seemingly uninitialized clear
95 #define ANV_HZ_FC_VAL 1.0f
100 #define MAX_VIEWPORTS 16
101 #define MAX_SCISSORS 16
102 #define MAX_PUSH_CONSTANTS_SIZE 128
103 #define MAX_DYNAMIC_BUFFERS 16
105 #define MAX_PUSH_DESCRIPTORS 32 /* Minimum requirement */
107 /* The kernel relocation API has a limitation of a 32-bit delta value
108 * applied to the address before it is written which, in spite of it being
109 * unsigned, is treated as signed . Because of the way that this maps to
110 * the Vulkan API, we cannot handle an offset into a buffer that does not
111 * fit into a signed 32 bits. The only mechanism we have for dealing with
112 * this at the moment is to limit all VkDeviceMemory objects to a maximum
113 * of 2GB each. The Vulkan spec allows us to do this:
115 * "Some platforms may have a limit on the maximum size of a single
116 * allocation. For example, certain systems may fail to create
117 * allocations with a size greater than or equal to 4GB. Such a limit is
118 * implementation-dependent, and if such a failure occurs then the error
119 * VK_ERROR_OUT_OF_DEVICE_MEMORY should be returned."
121 * We don't use vk_error here because it's not an error so much as an
122 * indication to the application that the allocation is too large.
124 #define MAX_MEMORY_ALLOCATION_SIZE (1ull << 31)
126 #define ANV_SVGS_VB_INDEX MAX_VBS
127 #define ANV_DRAWID_VB_INDEX (MAX_VBS + 1)
129 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
131 static inline uint32_t
132 align_down_npot_u32(uint32_t v
, uint32_t a
)
137 static inline uint32_t
138 align_u32(uint32_t v
, uint32_t a
)
140 assert(a
!= 0 && a
== (a
& -a
));
141 return (v
+ a
- 1) & ~(a
- 1);
144 static inline uint64_t
145 align_u64(uint64_t v
, uint64_t a
)
147 assert(a
!= 0 && a
== (a
& -a
));
148 return (v
+ a
- 1) & ~(a
- 1);
151 static inline int32_t
152 align_i32(int32_t v
, int32_t a
)
154 assert(a
!= 0 && a
== (a
& -a
));
155 return (v
+ a
- 1) & ~(a
- 1);
158 /** Alignment must be a power of 2. */
160 anv_is_aligned(uintmax_t n
, uintmax_t a
)
162 assert(a
== (a
& -a
));
163 return (n
& (a
- 1)) == 0;
166 static inline uint32_t
167 anv_minify(uint32_t n
, uint32_t levels
)
169 if (unlikely(n
== 0))
172 return MAX2(n
>> levels
, 1);
176 anv_clamp_f(float f
, float min
, float max
)
189 anv_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
191 if (*inout_mask
& clear_mask
) {
192 *inout_mask
&= ~clear_mask
;
199 static inline union isl_color_value
200 vk_to_isl_color(VkClearColorValue color
)
202 return (union isl_color_value
) {
212 #define for_each_bit(b, dword) \
213 for (uint32_t __dword = (dword); \
214 (b) = __builtin_ffs(__dword) - 1, __dword; \
215 __dword &= ~(1 << (b)))
217 #define typed_memcpy(dest, src, count) ({ \
218 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
219 memcpy((dest), (src), (count) * sizeof(*(src))); \
222 /* Mapping from anv object to VkDebugReportObjectTypeEXT. New types need
223 * to be added here in order to utilize mapping in debug/error/perf macros.
225 #define REPORT_OBJECT_TYPE(o) \
226 __builtin_choose_expr ( \
227 __builtin_types_compatible_p (__typeof (o), struct anv_instance*), \
228 VK_DEBUG_REPORT_OBJECT_TYPE_INSTANCE_EXT, \
229 __builtin_choose_expr ( \
230 __builtin_types_compatible_p (__typeof (o), struct anv_physical_device*), \
231 VK_DEBUG_REPORT_OBJECT_TYPE_PHYSICAL_DEVICE_EXT, \
232 __builtin_choose_expr ( \
233 __builtin_types_compatible_p (__typeof (o), struct anv_device*), \
234 VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_EXT, \
235 __builtin_choose_expr ( \
236 __builtin_types_compatible_p (__typeof (o), const struct anv_device*), \
237 VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_EXT, \
238 __builtin_choose_expr ( \
239 __builtin_types_compatible_p (__typeof (o), struct anv_queue*), \
240 VK_DEBUG_REPORT_OBJECT_TYPE_QUEUE_EXT, \
241 __builtin_choose_expr ( \
242 __builtin_types_compatible_p (__typeof (o), struct anv_semaphore*), \
243 VK_DEBUG_REPORT_OBJECT_TYPE_SEMAPHORE_EXT, \
244 __builtin_choose_expr ( \
245 __builtin_types_compatible_p (__typeof (o), struct anv_cmd_buffer*), \
246 VK_DEBUG_REPORT_OBJECT_TYPE_COMMAND_BUFFER_EXT, \
247 __builtin_choose_expr ( \
248 __builtin_types_compatible_p (__typeof (o), struct anv_fence*), \
249 VK_DEBUG_REPORT_OBJECT_TYPE_FENCE_EXT, \
250 __builtin_choose_expr ( \
251 __builtin_types_compatible_p (__typeof (o), struct anv_device_memory*), \
252 VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_MEMORY_EXT, \
253 __builtin_choose_expr ( \
254 __builtin_types_compatible_p (__typeof (o), struct anv_buffer*), \
255 VK_DEBUG_REPORT_OBJECT_TYPE_BUFFER_EXT, \
256 __builtin_choose_expr ( \
257 __builtin_types_compatible_p (__typeof (o), struct anv_image*), \
258 VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_EXT, \
259 __builtin_choose_expr ( \
260 __builtin_types_compatible_p (__typeof (o), const struct anv_image*), \
261 VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_EXT, \
262 __builtin_choose_expr ( \
263 __builtin_types_compatible_p (__typeof (o), struct anv_event*), \
264 VK_DEBUG_REPORT_OBJECT_TYPE_EVENT_EXT, \
265 __builtin_choose_expr ( \
266 __builtin_types_compatible_p (__typeof (o), struct anv_query_pool*), \
267 VK_DEBUG_REPORT_OBJECT_TYPE_QUERY_POOL_EXT, \
268 __builtin_choose_expr ( \
269 __builtin_types_compatible_p (__typeof (o), struct anv_buffer_view*), \
270 VK_DEBUG_REPORT_OBJECT_TYPE_BUFFER_VIEW_EXT, \
271 __builtin_choose_expr ( \
272 __builtin_types_compatible_p (__typeof (o), struct anv_image_view*), \
273 VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_VIEW_EXT, \
274 __builtin_choose_expr ( \
275 __builtin_types_compatible_p (__typeof (o), struct anv_shader_module*), \
276 VK_DEBUG_REPORT_OBJECT_TYPE_SHADER_MODULE_EXT, \
277 __builtin_choose_expr ( \
278 __builtin_types_compatible_p (__typeof (o), struct anv_pipeline_cache*), \
279 VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_CACHE_EXT, \
280 __builtin_choose_expr ( \
281 __builtin_types_compatible_p (__typeof (o), struct anv_pipeline_layout*), \
282 VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_LAYOUT_EXT, \
283 __builtin_choose_expr ( \
284 __builtin_types_compatible_p (__typeof (o), struct anv_render_pass*), \
285 VK_DEBUG_REPORT_OBJECT_TYPE_RENDER_PASS_EXT, \
286 __builtin_choose_expr ( \
287 __builtin_types_compatible_p (__typeof (o), struct anv_pipeline*), \
288 VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_EXT, \
289 __builtin_choose_expr ( \
290 __builtin_types_compatible_p (__typeof (o), struct anv_descriptor_set_layout*), \
291 VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT_EXT, \
292 __builtin_choose_expr ( \
293 __builtin_types_compatible_p (__typeof (o), struct anv_sampler*), \
294 VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_EXT, \
295 __builtin_choose_expr ( \
296 __builtin_types_compatible_p (__typeof (o), struct anv_descriptor_pool*), \
297 VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_POOL_EXT, \
298 __builtin_choose_expr ( \
299 __builtin_types_compatible_p (__typeof (o), struct anv_descriptor_set*), \
300 VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_SET_EXT, \
301 __builtin_choose_expr ( \
302 __builtin_types_compatible_p (__typeof (o), struct anv_framebuffer*), \
303 VK_DEBUG_REPORT_OBJECT_TYPE_FRAMEBUFFER_EXT, \
304 __builtin_choose_expr ( \
305 __builtin_types_compatible_p (__typeof (o), struct anv_cmd_pool*), \
306 VK_DEBUG_REPORT_OBJECT_TYPE_COMMAND_POOL_EXT, \
307 __builtin_choose_expr ( \
308 __builtin_types_compatible_p (__typeof (o), struct anv_surface*), \
309 VK_DEBUG_REPORT_OBJECT_TYPE_SURFACE_KHR_EXT, \
310 __builtin_choose_expr ( \
311 __builtin_types_compatible_p (__typeof (o), struct wsi_swapchain*), \
312 VK_DEBUG_REPORT_OBJECT_TYPE_SWAPCHAIN_KHR_EXT, \
313 __builtin_choose_expr ( \
314 __builtin_types_compatible_p (__typeof (o), struct vk_debug_callback*), \
315 VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT, \
316 __builtin_choose_expr ( \
317 __builtin_types_compatible_p (__typeof (o), void*), \
318 VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT, \
319 /* The void expression results in a compile-time error \
320 when assigning the result to something. */ \
321 (void)0)))))))))))))))))))))))))))))))
323 /* Whenever we generate an error, pass it through this function. Useful for
324 * debugging, where we can break on it. Only call at error site, not when
325 * propagating errors. Might be useful to plug in a stack trace here.
328 VkResult
__vk_errorf(struct anv_instance
*instance
, const void *object
,
329 VkDebugReportObjectTypeEXT type
, VkResult error
,
330 const char *file
, int line
, const char *format
, ...);
333 #define vk_error(error) __vk_errorf(NULL, NULL,\
334 VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT,\
335 error, __FILE__, __LINE__, NULL)
336 #define vk_errorf(instance, obj, error, format, ...)\
337 __vk_errorf(instance, obj, REPORT_OBJECT_TYPE(obj), error,\
338 __FILE__, __LINE__, format, ## __VA_ARGS__)
340 #define vk_error(error) error
341 #define vk_errorf(instance, obj, error, format, ...) error
345 * Warn on ignored extension structs.
347 * The Vulkan spec requires us to ignore unsupported or unknown structs in
348 * a pNext chain. In debug mode, emitting warnings for ignored structs may
349 * help us discover structs that we should not have ignored.
352 * From the Vulkan 1.0.38 spec:
354 * Any component of the implementation (the loader, any enabled layers,
355 * and drivers) must skip over, without processing (other than reading the
356 * sType and pNext members) any chained structures with sType values not
357 * defined by extensions supported by that component.
359 #define anv_debug_ignored_stype(sType) \
360 intel_logd("%s: ignored VkStructureType %u\n", __func__, (sType))
362 void __anv_perf_warn(struct anv_instance
*instance
, const void *object
,
363 VkDebugReportObjectTypeEXT type
, const char *file
,
364 int line
, const char *format
, ...)
365 anv_printflike(6, 7);
366 void anv_loge(const char *format
, ...) anv_printflike(1, 2);
367 void anv_loge_v(const char *format
, va_list va
);
370 * Print a FINISHME message, including its source location.
372 #define anv_finishme(format, ...) \
374 static bool reported = false; \
376 intel_logw("%s:%d: FINISHME: " format, __FILE__, __LINE__, \
383 * Print a perf warning message. Set INTEL_DEBUG=perf to see these.
385 #define anv_perf_warn(instance, obj, format, ...) \
387 static bool reported = false; \
388 if (!reported && unlikely(INTEL_DEBUG & DEBUG_PERF)) { \
389 __anv_perf_warn(instance, obj, REPORT_OBJECT_TYPE(obj), __FILE__, __LINE__,\
390 format, ##__VA_ARGS__); \
395 /* A non-fatal assert. Useful for debugging. */
397 #define anv_assert(x) ({ \
398 if (unlikely(!(x))) \
399 intel_loge("%s:%d ASSERT: %s", __FILE__, __LINE__, #x); \
402 #define anv_assert(x)
405 /* A multi-pointer allocator
407 * When copying data structures from the user (such as a render pass), it's
408 * common to need to allocate data for a bunch of different things. Instead
409 * of doing several allocations and having to handle all of the error checking
410 * that entails, it can be easier to do a single allocation. This struct
411 * helps facilitate that. The intended usage looks like this:
414 * anv_multialloc_add(&ma, &main_ptr, 1);
415 * anv_multialloc_add(&ma, &substruct1, substruct1Count);
416 * anv_multialloc_add(&ma, &substruct2, substruct2Count);
418 * if (!anv_multialloc_alloc(&ma, pAllocator, VK_ALLOCATION_SCOPE_FOO))
419 * return vk_error(VK_ERROR_OUT_OF_HOST_MEORY);
421 struct anv_multialloc
{
429 #define ANV_MULTIALLOC_INIT \
430 ((struct anv_multialloc) { 0, })
432 #define ANV_MULTIALLOC(_name) \
433 struct anv_multialloc _name = ANV_MULTIALLOC_INIT
435 __attribute__((always_inline
))
437 _anv_multialloc_add(struct anv_multialloc
*ma
,
438 void **ptr
, size_t size
, size_t align
)
440 size_t offset
= align_u64(ma
->size
, align
);
441 ma
->size
= offset
+ size
;
442 ma
->align
= MAX2(ma
->align
, align
);
444 /* Store the offset in the pointer. */
445 *ptr
= (void *)(uintptr_t)offset
;
447 assert(ma
->ptr_count
< ARRAY_SIZE(ma
->ptrs
));
448 ma
->ptrs
[ma
->ptr_count
++] = ptr
;
451 #define anv_multialloc_add_size(_ma, _ptr, _size) \
452 _anv_multialloc_add((_ma), (void **)(_ptr), (_size), __alignof__(**(_ptr)))
454 #define anv_multialloc_add(_ma, _ptr, _count) \
455 anv_multialloc_add_size(_ma, _ptr, (_count) * sizeof(**(_ptr)));
457 __attribute__((always_inline
))
459 anv_multialloc_alloc(struct anv_multialloc
*ma
,
460 const VkAllocationCallbacks
*alloc
,
461 VkSystemAllocationScope scope
)
463 void *ptr
= vk_alloc(alloc
, ma
->size
, ma
->align
, scope
);
467 /* Fill out each of the pointers with their final value.
469 * for (uint32_t i = 0; i < ma->ptr_count; i++)
470 * *ma->ptrs[i] = ptr + (uintptr_t)*ma->ptrs[i];
472 * Unfortunately, even though ma->ptr_count is basically guaranteed to be a
473 * constant, GCC is incapable of figuring this out and unrolling the loop
474 * so we have to give it a little help.
476 STATIC_ASSERT(ARRAY_SIZE(ma
->ptrs
) == 8);
477 #define _ANV_MULTIALLOC_UPDATE_POINTER(_i) \
478 if ((_i) < ma->ptr_count) \
479 *ma->ptrs[_i] = ptr + (uintptr_t)*ma->ptrs[_i]
480 _ANV_MULTIALLOC_UPDATE_POINTER(0);
481 _ANV_MULTIALLOC_UPDATE_POINTER(1);
482 _ANV_MULTIALLOC_UPDATE_POINTER(2);
483 _ANV_MULTIALLOC_UPDATE_POINTER(3);
484 _ANV_MULTIALLOC_UPDATE_POINTER(4);
485 _ANV_MULTIALLOC_UPDATE_POINTER(5);
486 _ANV_MULTIALLOC_UPDATE_POINTER(6);
487 _ANV_MULTIALLOC_UPDATE_POINTER(7);
488 #undef _ANV_MULTIALLOC_UPDATE_POINTER
493 __attribute__((always_inline
))
495 anv_multialloc_alloc2(struct anv_multialloc
*ma
,
496 const VkAllocationCallbacks
*parent_alloc
,
497 const VkAllocationCallbacks
*alloc
,
498 VkSystemAllocationScope scope
)
500 return anv_multialloc_alloc(ma
, alloc
? alloc
: parent_alloc
, scope
);
506 /* Index into the current validation list. This is used by the
507 * validation list building alrogithm to track which buffers are already
508 * in the validation list so that we can ensure uniqueness.
512 /* Last known offset. This value is provided by the kernel when we
513 * execbuf and is used as the presumed offset for the next bunch of
521 /** Flags to pass to the kernel through drm_i915_exec_object2::flags */
526 anv_bo_init(struct anv_bo
*bo
, uint32_t gem_handle
, uint64_t size
)
528 bo
->gem_handle
= gem_handle
;
536 /* Represents a lock-free linked list of "free" things. This is used by
537 * both the block pool and the state pools. Unfortunately, in order to
538 * solve the ABA problem, we can't use a single uint32_t head.
540 union anv_free_list
{
544 /* A simple count that is incremented every time the head changes. */
550 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
552 struct anv_block_state
{
562 struct anv_block_pool
{
563 struct anv_device
*device
;
569 /* The offset from the start of the bo to the "center" of the block
570 * pool. Pointers to allocated blocks are given by
571 * bo.map + center_bo_offset + offsets.
573 uint32_t center_bo_offset
;
575 /* Current memory map of the block pool. This pointer may or may not
576 * point to the actual beginning of the block pool memory. If
577 * anv_block_pool_alloc_back has ever been called, then this pointer
578 * will point to the "center" position of the buffer and all offsets
579 * (negative or positive) given out by the block pool alloc functions
580 * will be valid relative to this pointer.
582 * In particular, map == bo.map + center_offset
588 * Array of mmaps and gem handles owned by the block pool, reclaimed when
589 * the block pool is destroyed.
591 struct u_vector mmap_cleanups
;
593 struct anv_block_state state
;
595 struct anv_block_state back_state
;
598 /* Block pools are backed by a fixed-size 1GB memfd */
599 #define BLOCK_POOL_MEMFD_SIZE (1ul << 30)
601 /* The center of the block pool is also the middle of the memfd. This may
602 * change in the future if we decide differently for some reason.
604 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
606 static inline uint32_t
607 anv_block_pool_size(struct anv_block_pool
*pool
)
609 return pool
->state
.end
+ pool
->back_state
.end
;
618 #define ANV_STATE_NULL ((struct anv_state) { .alloc_size = 0 })
620 struct anv_fixed_size_state_pool
{
621 union anv_free_list free_list
;
622 struct anv_block_state block
;
625 #define ANV_MIN_STATE_SIZE_LOG2 6
626 #define ANV_MAX_STATE_SIZE_LOG2 20
628 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2 + 1)
630 struct anv_state_pool
{
631 struct anv_block_pool block_pool
;
633 /* The size of blocks which will be allocated from the block pool */
636 /** Free list for "back" allocations */
637 union anv_free_list back_alloc_free_list
;
639 struct anv_fixed_size_state_pool buckets
[ANV_STATE_BUCKETS
];
642 struct anv_state_stream_block
;
644 struct anv_state_stream
{
645 struct anv_state_pool
*state_pool
;
647 /* The size of blocks to allocate from the state pool */
650 /* Current block we're allocating from */
651 struct anv_state block
;
653 /* Offset into the current block at which to allocate the next state */
656 /* List of all blocks allocated from this pool */
657 struct anv_state_stream_block
*block_list
;
660 /* The block_pool functions exported for testing only. The block pool should
661 * only be used via a state pool (see below).
663 VkResult
anv_block_pool_init(struct anv_block_pool
*pool
,
664 struct anv_device
*device
,
665 uint32_t initial_size
,
667 void anv_block_pool_finish(struct anv_block_pool
*pool
);
668 int32_t anv_block_pool_alloc(struct anv_block_pool
*pool
,
669 uint32_t block_size
);
670 int32_t anv_block_pool_alloc_back(struct anv_block_pool
*pool
,
671 uint32_t block_size
);
673 VkResult
anv_state_pool_init(struct anv_state_pool
*pool
,
674 struct anv_device
*device
,
677 void anv_state_pool_finish(struct anv_state_pool
*pool
);
678 struct anv_state
anv_state_pool_alloc(struct anv_state_pool
*pool
,
679 uint32_t state_size
, uint32_t alignment
);
680 struct anv_state
anv_state_pool_alloc_back(struct anv_state_pool
*pool
);
681 void anv_state_pool_free(struct anv_state_pool
*pool
, struct anv_state state
);
682 void anv_state_stream_init(struct anv_state_stream
*stream
,
683 struct anv_state_pool
*state_pool
,
684 uint32_t block_size
);
685 void anv_state_stream_finish(struct anv_state_stream
*stream
);
686 struct anv_state
anv_state_stream_alloc(struct anv_state_stream
*stream
,
687 uint32_t size
, uint32_t alignment
);
690 * Implements a pool of re-usable BOs. The interface is identical to that
691 * of block_pool except that each block is its own BO.
694 struct anv_device
*device
;
701 void anv_bo_pool_init(struct anv_bo_pool
*pool
, struct anv_device
*device
,
703 void anv_bo_pool_finish(struct anv_bo_pool
*pool
);
704 VkResult
anv_bo_pool_alloc(struct anv_bo_pool
*pool
, struct anv_bo
*bo
,
706 void anv_bo_pool_free(struct anv_bo_pool
*pool
, const struct anv_bo
*bo
);
708 struct anv_scratch_bo
{
713 struct anv_scratch_pool
{
714 /* Indexed by Per-Thread Scratch Space number (the hardware value) and stage */
715 struct anv_scratch_bo bos
[16][MESA_SHADER_STAGES
];
718 void anv_scratch_pool_init(struct anv_device
*device
,
719 struct anv_scratch_pool
*pool
);
720 void anv_scratch_pool_finish(struct anv_device
*device
,
721 struct anv_scratch_pool
*pool
);
722 struct anv_bo
*anv_scratch_pool_alloc(struct anv_device
*device
,
723 struct anv_scratch_pool
*pool
,
724 gl_shader_stage stage
,
725 unsigned per_thread_scratch
);
727 /** Implements a BO cache that ensures a 1-1 mapping of GEM BOs to anv_bos */
728 struct anv_bo_cache
{
729 struct hash_table
*bo_map
;
730 pthread_mutex_t mutex
;
733 VkResult
anv_bo_cache_init(struct anv_bo_cache
*cache
);
734 void anv_bo_cache_finish(struct anv_bo_cache
*cache
);
735 VkResult
anv_bo_cache_alloc(struct anv_device
*device
,
736 struct anv_bo_cache
*cache
,
737 uint64_t size
, struct anv_bo
**bo
);
738 VkResult
anv_bo_cache_import(struct anv_device
*device
,
739 struct anv_bo_cache
*cache
,
740 int fd
, struct anv_bo
**bo
);
741 VkResult
anv_bo_cache_export(struct anv_device
*device
,
742 struct anv_bo_cache
*cache
,
743 struct anv_bo
*bo_in
, int *fd_out
);
744 void anv_bo_cache_release(struct anv_device
*device
,
745 struct anv_bo_cache
*cache
,
748 struct anv_memory_type
{
749 /* Standard bits passed on to the client */
750 VkMemoryPropertyFlags propertyFlags
;
753 /* Driver-internal book-keeping */
754 VkBufferUsageFlags valid_buffer_usage
;
757 struct anv_memory_heap
{
758 /* Standard bits passed on to the client */
760 VkMemoryHeapFlags flags
;
762 /* Driver-internal book-keeping */
763 bool supports_48bit_addresses
;
766 struct anv_physical_device
{
767 VK_LOADER_DATA _loader_data
;
769 struct anv_instance
* instance
;
774 struct gen_device_info info
;
775 /** Amount of "GPU memory" we want to advertise
777 * Clearly, this value is bogus since Intel is a UMA architecture. On
778 * gen7 platforms, we are limited by GTT size unless we want to implement
779 * fine-grained tracking and GTT splitting. On Broadwell and above we are
780 * practically unlimited. However, we will never report more than 3/4 of
781 * the total system ram to try and avoid running out of RAM.
783 bool supports_48bit_addresses
;
784 struct brw_compiler
* compiler
;
785 struct isl_device isl_dev
;
786 int cmd_parser_version
;
788 bool has_exec_capture
;
791 bool has_syncobj_wait
;
792 bool has_context_priority
;
794 struct anv_device_extension_table supported_extensions
;
797 uint32_t subslice_total
;
801 struct anv_memory_type types
[VK_MAX_MEMORY_TYPES
];
803 struct anv_memory_heap heaps
[VK_MAX_MEMORY_HEAPS
];
806 uint8_t pipeline_cache_uuid
[VK_UUID_SIZE
];
807 uint8_t driver_uuid
[VK_UUID_SIZE
];
808 uint8_t device_uuid
[VK_UUID_SIZE
];
810 struct wsi_device wsi_device
;
814 struct anv_instance
{
815 VK_LOADER_DATA _loader_data
;
817 VkAllocationCallbacks alloc
;
820 struct anv_instance_extension_table enabled_extensions
;
821 struct anv_dispatch_table dispatch
;
823 int physicalDeviceCount
;
824 struct anv_physical_device physicalDevice
;
826 struct vk_debug_report_instance debug_report_callbacks
;
829 VkResult
anv_init_wsi(struct anv_physical_device
*physical_device
);
830 void anv_finish_wsi(struct anv_physical_device
*physical_device
);
832 uint32_t anv_physical_device_api_version(struct anv_physical_device
*dev
);
833 bool anv_physical_device_extension_supported(struct anv_physical_device
*dev
,
837 VK_LOADER_DATA _loader_data
;
839 struct anv_device
* device
;
841 struct anv_state_pool
* pool
;
843 VkDeviceQueueCreateFlags flags
;
846 struct anv_pipeline_cache
{
847 struct anv_device
* device
;
848 pthread_mutex_t mutex
;
850 struct hash_table
* cache
;
853 struct anv_pipeline_bind_map
;
855 void anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
856 struct anv_device
*device
,
858 void anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
);
860 struct anv_shader_bin
*
861 anv_pipeline_cache_search(struct anv_pipeline_cache
*cache
,
862 const void *key
, uint32_t key_size
);
863 struct anv_shader_bin
*
864 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache
*cache
,
865 const void *key_data
, uint32_t key_size
,
866 const void *kernel_data
, uint32_t kernel_size
,
867 const struct brw_stage_prog_data
*prog_data
,
868 uint32_t prog_data_size
,
869 const struct anv_pipeline_bind_map
*bind_map
);
872 VK_LOADER_DATA _loader_data
;
874 VkAllocationCallbacks alloc
;
876 struct anv_instance
* instance
;
879 struct gen_device_info info
;
880 struct isl_device isl_dev
;
883 bool can_chain_batches
;
884 bool robust_buffer_access
;
885 struct anv_device_extension_table enabled_extensions
;
886 struct anv_dispatch_table dispatch
;
888 struct anv_bo_pool batch_bo_pool
;
890 struct anv_bo_cache bo_cache
;
892 struct anv_state_pool dynamic_state_pool
;
893 struct anv_state_pool instruction_state_pool
;
894 struct anv_state_pool surface_state_pool
;
896 struct anv_bo workaround_bo
;
897 struct anv_bo trivial_batch_bo
;
899 struct anv_pipeline_cache blorp_shader_cache
;
900 struct blorp_context blorp
;
902 struct anv_state border_colors
;
904 struct anv_queue queue
;
906 struct anv_scratch_pool scratch_pool
;
908 uint32_t default_mocs
;
910 pthread_mutex_t mutex
;
911 pthread_cond_t queue_submit
;
916 anv_state_flush(struct anv_device
*device
, struct anv_state state
)
918 if (device
->info
.has_llc
)
921 gen_flush_range(state
.map
, state
.alloc_size
);
924 void anv_device_init_blorp(struct anv_device
*device
);
925 void anv_device_finish_blorp(struct anv_device
*device
);
927 VkResult
anv_device_execbuf(struct anv_device
*device
,
928 struct drm_i915_gem_execbuffer2
*execbuf
,
929 struct anv_bo
**execbuf_bos
);
930 VkResult
anv_device_query_status(struct anv_device
*device
);
931 VkResult
anv_device_bo_busy(struct anv_device
*device
, struct anv_bo
*bo
);
932 VkResult
anv_device_wait(struct anv_device
*device
, struct anv_bo
*bo
,
935 void* anv_gem_mmap(struct anv_device
*device
,
936 uint32_t gem_handle
, uint64_t offset
, uint64_t size
, uint32_t flags
);
937 void anv_gem_munmap(void *p
, uint64_t size
);
938 uint32_t anv_gem_create(struct anv_device
*device
, uint64_t size
);
939 void anv_gem_close(struct anv_device
*device
, uint32_t gem_handle
);
940 uint32_t anv_gem_userptr(struct anv_device
*device
, void *mem
, size_t size
);
941 int anv_gem_busy(struct anv_device
*device
, uint32_t gem_handle
);
942 int anv_gem_wait(struct anv_device
*device
, uint32_t gem_handle
, int64_t *timeout_ns
);
943 int anv_gem_execbuffer(struct anv_device
*device
,
944 struct drm_i915_gem_execbuffer2
*execbuf
);
945 int anv_gem_set_tiling(struct anv_device
*device
, uint32_t gem_handle
,
946 uint32_t stride
, uint32_t tiling
);
947 int anv_gem_create_context(struct anv_device
*device
);
948 bool anv_gem_has_context_priority(int fd
);
949 int anv_gem_destroy_context(struct anv_device
*device
, int context
);
950 int anv_gem_set_context_param(int fd
, int context
, uint32_t param
,
952 int anv_gem_get_context_param(int fd
, int context
, uint32_t param
,
954 int anv_gem_get_param(int fd
, uint32_t param
);
955 int anv_gem_get_tiling(struct anv_device
*device
, uint32_t gem_handle
);
956 bool anv_gem_get_bit6_swizzle(int fd
, uint32_t tiling
);
957 int anv_gem_get_aperture(int fd
, uint64_t *size
);
958 bool anv_gem_supports_48b_addresses(int fd
);
959 int anv_gem_gpu_get_reset_stats(struct anv_device
*device
,
960 uint32_t *active
, uint32_t *pending
);
961 int anv_gem_handle_to_fd(struct anv_device
*device
, uint32_t gem_handle
);
962 uint32_t anv_gem_fd_to_handle(struct anv_device
*device
, int fd
);
963 int anv_gem_set_caching(struct anv_device
*device
, uint32_t gem_handle
, uint32_t caching
);
964 int anv_gem_set_domain(struct anv_device
*device
, uint32_t gem_handle
,
965 uint32_t read_domains
, uint32_t write_domain
);
966 int anv_gem_sync_file_merge(struct anv_device
*device
, int fd1
, int fd2
);
967 uint32_t anv_gem_syncobj_create(struct anv_device
*device
, uint32_t flags
);
968 void anv_gem_syncobj_destroy(struct anv_device
*device
, uint32_t handle
);
969 int anv_gem_syncobj_handle_to_fd(struct anv_device
*device
, uint32_t handle
);
970 uint32_t anv_gem_syncobj_fd_to_handle(struct anv_device
*device
, int fd
);
971 int anv_gem_syncobj_export_sync_file(struct anv_device
*device
,
973 int anv_gem_syncobj_import_sync_file(struct anv_device
*device
,
974 uint32_t handle
, int fd
);
975 void anv_gem_syncobj_reset(struct anv_device
*device
, uint32_t handle
);
976 bool anv_gem_supports_syncobj_wait(int fd
);
977 int anv_gem_syncobj_wait(struct anv_device
*device
,
978 uint32_t *handles
, uint32_t num_handles
,
979 int64_t abs_timeout_ns
, bool wait_all
);
981 VkResult
anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
);
983 struct anv_reloc_list
{
985 uint32_t array_length
;
986 struct drm_i915_gem_relocation_entry
* relocs
;
987 struct anv_bo
** reloc_bos
;
990 VkResult
anv_reloc_list_init(struct anv_reloc_list
*list
,
991 const VkAllocationCallbacks
*alloc
);
992 void anv_reloc_list_finish(struct anv_reloc_list
*list
,
993 const VkAllocationCallbacks
*alloc
);
995 VkResult
anv_reloc_list_add(struct anv_reloc_list
*list
,
996 const VkAllocationCallbacks
*alloc
,
997 uint32_t offset
, struct anv_bo
*target_bo
,
1000 struct anv_batch_bo
{
1001 /* Link in the anv_cmd_buffer.owned_batch_bos list */
1002 struct list_head link
;
1006 /* Bytes actually consumed in this batch BO */
1009 struct anv_reloc_list relocs
;
1013 const VkAllocationCallbacks
* alloc
;
1019 struct anv_reloc_list
* relocs
;
1021 /* This callback is called (with the associated user data) in the event
1022 * that the batch runs out of space.
1024 VkResult (*extend_cb
)(struct anv_batch
*, void *);
1028 * Current error status of the command buffer. Used to track inconsistent
1029 * or incomplete command buffer states that are the consequence of run-time
1030 * errors such as out of memory scenarios. We want to track this in the
1031 * batch because the command buffer object is not visible to some parts
1037 void *anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
);
1038 void anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
);
1039 uint64_t anv_batch_emit_reloc(struct anv_batch
*batch
,
1040 void *location
, struct anv_bo
*bo
, uint32_t offset
);
1041 VkResult
anv_device_submit_simple_batch(struct anv_device
*device
,
1042 struct anv_batch
*batch
);
1044 static inline VkResult
1045 anv_batch_set_error(struct anv_batch
*batch
, VkResult error
)
1047 assert(error
!= VK_SUCCESS
);
1048 if (batch
->status
== VK_SUCCESS
)
1049 batch
->status
= error
;
1050 return batch
->status
;
1054 anv_batch_has_error(struct anv_batch
*batch
)
1056 return batch
->status
!= VK_SUCCESS
;
1059 struct anv_address
{
1064 static inline uint64_t
1065 _anv_combine_address(struct anv_batch
*batch
, void *location
,
1066 const struct anv_address address
, uint32_t delta
)
1068 if (address
.bo
== NULL
) {
1069 return address
.offset
+ delta
;
1071 assert(batch
->start
<= location
&& location
< batch
->end
);
1073 return anv_batch_emit_reloc(batch
, location
, address
.bo
, address
.offset
+ delta
);
1077 #define __gen_address_type struct anv_address
1078 #define __gen_user_data struct anv_batch
1079 #define __gen_combine_address _anv_combine_address
1081 /* Wrapper macros needed to work around preprocessor argument issues. In
1082 * particular, arguments don't get pre-evaluated if they are concatenated.
1083 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
1084 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
1085 * We can work around this easily enough with these helpers.
1087 #define __anv_cmd_length(cmd) cmd ## _length
1088 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
1089 #define __anv_cmd_header(cmd) cmd ## _header
1090 #define __anv_cmd_pack(cmd) cmd ## _pack
1091 #define __anv_reg_num(reg) reg ## _num
1093 #define anv_pack_struct(dst, struc, ...) do { \
1094 struct struc __template = { \
1097 __anv_cmd_pack(struc)(NULL, dst, &__template); \
1098 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dst, __anv_cmd_length(struc) * 4)); \
1101 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
1102 void *__dst = anv_batch_emit_dwords(batch, n); \
1104 struct cmd __template = { \
1105 __anv_cmd_header(cmd), \
1106 .DWordLength = n - __anv_cmd_length_bias(cmd), \
1109 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
1114 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
1118 STATIC_ASSERT(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \
1119 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
1122 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
1123 dw[i] = (dwords0)[i] | (dwords1)[i]; \
1124 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
1127 #define anv_batch_emit(batch, cmd, name) \
1128 for (struct cmd name = { __anv_cmd_header(cmd) }, \
1129 *_dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
1130 __builtin_expect(_dst != NULL, 1); \
1131 ({ __anv_cmd_pack(cmd)(batch, _dst, &name); \
1132 VG(VALGRIND_CHECK_MEM_IS_DEFINED(_dst, __anv_cmd_length(cmd) * 4)); \
1136 #define GEN7_MOCS (struct GEN7_MEMORY_OBJECT_CONTROL_STATE) { \
1137 .GraphicsDataTypeGFDT = 0, \
1138 .LLCCacheabilityControlLLCCC = 0, \
1139 .L3CacheabilityControlL3CC = 1, \
1142 #define GEN75_MOCS (struct GEN75_MEMORY_OBJECT_CONTROL_STATE) { \
1143 .LLCeLLCCacheabilityControlLLCCC = 0, \
1144 .L3CacheabilityControlL3CC = 1, \
1147 #define GEN8_MOCS (struct GEN8_MEMORY_OBJECT_CONTROL_STATE) { \
1148 .MemoryTypeLLCeLLCCacheabilityControl = WB, \
1149 .TargetCache = L3DefertoPATforLLCeLLCselection, \
1150 .AgeforQUADLRU = 0 \
1153 /* Skylake: MOCS is now an index into an array of 62 different caching
1154 * configurations programmed by the kernel.
1157 #define GEN9_MOCS (struct GEN9_MEMORY_OBJECT_CONTROL_STATE) { \
1158 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
1159 .IndextoMOCSTables = 2 \
1162 #define GEN9_MOCS_PTE { \
1163 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
1164 .IndextoMOCSTables = 1 \
1167 /* Cannonlake MOCS defines are duplicates of Skylake MOCS defines. */
1168 #define GEN10_MOCS (struct GEN10_MEMORY_OBJECT_CONTROL_STATE) { \
1169 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
1170 .IndextoMOCSTables = 2 \
1173 #define GEN10_MOCS_PTE { \
1174 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
1175 .IndextoMOCSTables = 1 \
1178 /* Ice Lake MOCS defines are duplicates of Skylake MOCS defines. */
1179 #define GEN11_MOCS (struct GEN11_MEMORY_OBJECT_CONTROL_STATE) { \
1180 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
1181 .IndextoMOCSTables = 2 \
1184 #define GEN11_MOCS_PTE { \
1185 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */ \
1186 .IndextoMOCSTables = 1 \
1189 struct anv_device_memory
{
1191 struct anv_memory_type
* type
;
1192 VkDeviceSize map_size
;
1197 * Header for Vertex URB Entry (VUE)
1199 struct anv_vue_header
{
1201 uint32_t RTAIndex
; /* RenderTargetArrayIndex */
1202 uint32_t ViewportIndex
;
1206 struct anv_descriptor_set_binding_layout
{
1208 /* The type of the descriptors in this binding */
1209 VkDescriptorType type
;
1212 /* Number of array elements in this binding */
1213 uint16_t array_size
;
1215 /* Index into the flattend descriptor set */
1216 uint16_t descriptor_index
;
1218 /* Index into the dynamic state array for a dynamic buffer */
1219 int16_t dynamic_offset_index
;
1221 /* Index into the descriptor set buffer views */
1222 int16_t buffer_index
;
1225 /* Index into the binding table for the associated surface */
1226 int16_t surface_index
;
1228 /* Index into the sampler table for the associated sampler */
1229 int16_t sampler_index
;
1231 /* Index into the image table for the associated image */
1232 int16_t image_index
;
1233 } stage
[MESA_SHADER_STAGES
];
1235 /* Immutable samplers (or NULL if no immutable samplers) */
1236 struct anv_sampler
**immutable_samplers
;
1239 struct anv_descriptor_set_layout
{
1240 /* Descriptor set layouts can be destroyed at almost any time */
1243 /* Number of bindings in this descriptor set */
1244 uint16_t binding_count
;
1246 /* Total size of the descriptor set with room for all array entries */
1249 /* Shader stages affected by this descriptor set */
1250 uint16_t shader_stages
;
1252 /* Number of buffers in this descriptor set */
1253 uint16_t buffer_count
;
1255 /* Number of dynamic offsets used by this descriptor set */
1256 uint16_t dynamic_offset_count
;
1258 /* Bindings in this descriptor set */
1259 struct anv_descriptor_set_binding_layout binding
[0];
1263 anv_descriptor_set_layout_ref(struct anv_descriptor_set_layout
*layout
)
1265 assert(layout
&& layout
->ref_cnt
>= 1);
1266 p_atomic_inc(&layout
->ref_cnt
);
1270 anv_descriptor_set_layout_unref(struct anv_device
*device
,
1271 struct anv_descriptor_set_layout
*layout
)
1273 assert(layout
&& layout
->ref_cnt
>= 1);
1274 if (p_atomic_dec_zero(&layout
->ref_cnt
))
1275 vk_free(&device
->alloc
, layout
);
1278 struct anv_descriptor
{
1279 VkDescriptorType type
;
1283 VkImageLayout layout
;
1284 struct anv_image_view
*image_view
;
1285 struct anv_sampler
*sampler
;
1289 struct anv_buffer
*buffer
;
1294 struct anv_buffer_view
*buffer_view
;
1298 struct anv_descriptor_set
{
1299 struct anv_descriptor_set_layout
*layout
;
1301 uint32_t buffer_count
;
1302 struct anv_buffer_view
*buffer_views
;
1303 struct anv_descriptor descriptors
[0];
1306 struct anv_buffer_view
{
1307 enum isl_format format
; /**< VkBufferViewCreateInfo::format */
1309 uint32_t offset
; /**< Offset into bo. */
1310 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1312 struct anv_state surface_state
;
1313 struct anv_state storage_surface_state
;
1314 struct anv_state writeonly_storage_surface_state
;
1316 struct brw_image_param storage_image_param
;
1319 struct anv_push_descriptor_set
{
1320 struct anv_descriptor_set set
;
1322 /* Put this field right behind anv_descriptor_set so it fills up the
1323 * descriptors[0] field. */
1324 struct anv_descriptor descriptors
[MAX_PUSH_DESCRIPTORS
];
1325 struct anv_buffer_view buffer_views
[MAX_PUSH_DESCRIPTORS
];
1328 struct anv_descriptor_pool
{
1333 struct anv_state_stream surface_state_stream
;
1334 void *surface_state_free_list
;
1339 enum anv_descriptor_template_entry_type
{
1340 ANV_DESCRIPTOR_TEMPLATE_ENTRY_TYPE_IMAGE
,
1341 ANV_DESCRIPTOR_TEMPLATE_ENTRY_TYPE_BUFFER
,
1342 ANV_DESCRIPTOR_TEMPLATE_ENTRY_TYPE_BUFFER_VIEW
1345 struct anv_descriptor_template_entry
{
1346 /* The type of descriptor in this entry */
1347 VkDescriptorType type
;
1349 /* Binding in the descriptor set */
1352 /* Offset at which to write into the descriptor set binding */
1353 uint32_t array_element
;
1355 /* Number of elements to write into the descriptor set binding */
1356 uint32_t array_count
;
1358 /* Offset into the user provided data */
1361 /* Stride between elements into the user provided data */
1365 struct anv_descriptor_update_template
{
1366 VkPipelineBindPoint bind_point
;
1368 /* The descriptor set this template corresponds to. This value is only
1369 * valid if the template was created with the templateType
1370 * VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET_KHR.
1374 /* Number of entries in this template */
1375 uint32_t entry_count
;
1377 /* Entries of the template */
1378 struct anv_descriptor_template_entry entries
[0];
1382 anv_descriptor_set_binding_layout_get_hw_size(const struct anv_descriptor_set_binding_layout
*binding
);
1385 anv_descriptor_set_layout_size(const struct anv_descriptor_set_layout
*layout
);
1388 anv_descriptor_set_write_image_view(struct anv_descriptor_set
*set
,
1389 const struct gen_device_info
* const devinfo
,
1390 const VkDescriptorImageInfo
* const info
,
1391 VkDescriptorType type
,
1396 anv_descriptor_set_write_buffer_view(struct anv_descriptor_set
*set
,
1397 VkDescriptorType type
,
1398 struct anv_buffer_view
*buffer_view
,
1403 anv_descriptor_set_write_buffer(struct anv_descriptor_set
*set
,
1404 struct anv_device
*device
,
1405 struct anv_state_stream
*alloc_stream
,
1406 VkDescriptorType type
,
1407 struct anv_buffer
*buffer
,
1410 VkDeviceSize offset
,
1411 VkDeviceSize range
);
1414 anv_descriptor_set_write_template(struct anv_descriptor_set
*set
,
1415 struct anv_device
*device
,
1416 struct anv_state_stream
*alloc_stream
,
1417 const struct anv_descriptor_update_template
*template,
1421 anv_descriptor_set_create(struct anv_device
*device
,
1422 struct anv_descriptor_pool
*pool
,
1423 struct anv_descriptor_set_layout
*layout
,
1424 struct anv_descriptor_set
**out_set
);
1427 anv_descriptor_set_destroy(struct anv_device
*device
,
1428 struct anv_descriptor_pool
*pool
,
1429 struct anv_descriptor_set
*set
);
1431 #define ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS UINT8_MAX
1433 struct anv_pipeline_binding
{
1434 /* The descriptor set this surface corresponds to. The special value of
1435 * ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS indicates that the offset refers
1436 * to a color attachment and not a regular descriptor.
1440 /* Binding in the descriptor set */
1443 /* Index in the binding */
1446 /* Plane in the binding index */
1449 /* Input attachment index (relative to the subpass) */
1450 uint8_t input_attachment_index
;
1452 /* For a storage image, whether it is write-only */
1456 struct anv_pipeline_layout
{
1458 struct anv_descriptor_set_layout
*layout
;
1459 uint32_t dynamic_offset_start
;
1465 bool has_dynamic_offsets
;
1466 } stage
[MESA_SHADER_STAGES
];
1468 unsigned char sha1
[20];
1472 struct anv_device
* device
;
1475 VkBufferUsageFlags usage
;
1477 /* Set when bound */
1479 VkDeviceSize offset
;
1482 static inline uint64_t
1483 anv_buffer_get_range(struct anv_buffer
*buffer
, uint64_t offset
, uint64_t range
)
1485 assert(offset
<= buffer
->size
);
1486 if (range
== VK_WHOLE_SIZE
) {
1487 return buffer
->size
- offset
;
1489 assert(range
<= buffer
->size
);
1494 enum anv_cmd_dirty_bits
{
1495 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1496 ANV_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1497 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1498 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
= 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1499 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
= 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1500 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
= 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1501 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1502 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1503 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1504 ANV_CMD_DIRTY_DYNAMIC_ALL
= (1 << 9) - 1,
1505 ANV_CMD_DIRTY_PIPELINE
= 1 << 9,
1506 ANV_CMD_DIRTY_INDEX_BUFFER
= 1 << 10,
1507 ANV_CMD_DIRTY_RENDER_TARGETS
= 1 << 11,
1509 typedef uint32_t anv_cmd_dirty_mask_t
;
1511 enum anv_pipe_bits
{
1512 ANV_PIPE_DEPTH_CACHE_FLUSH_BIT
= (1 << 0),
1513 ANV_PIPE_STALL_AT_SCOREBOARD_BIT
= (1 << 1),
1514 ANV_PIPE_STATE_CACHE_INVALIDATE_BIT
= (1 << 2),
1515 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT
= (1 << 3),
1516 ANV_PIPE_VF_CACHE_INVALIDATE_BIT
= (1 << 4),
1517 ANV_PIPE_DATA_CACHE_FLUSH_BIT
= (1 << 5),
1518 ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT
= (1 << 10),
1519 ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT
= (1 << 11),
1520 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
= (1 << 12),
1521 ANV_PIPE_DEPTH_STALL_BIT
= (1 << 13),
1522 ANV_PIPE_CS_STALL_BIT
= (1 << 20),
1524 /* This bit does not exist directly in PIPE_CONTROL. Instead it means that
1525 * a flush has happened but not a CS stall. The next time we do any sort
1526 * of invalidation we need to insert a CS stall at that time. Otherwise,
1527 * we would have to CS stall on every flush which could be bad.
1529 ANV_PIPE_NEEDS_CS_STALL_BIT
= (1 << 21),
1532 #define ANV_PIPE_FLUSH_BITS ( \
1533 ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | \
1534 ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
1535 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT)
1537 #define ANV_PIPE_STALL_BITS ( \
1538 ANV_PIPE_STALL_AT_SCOREBOARD_BIT | \
1539 ANV_PIPE_DEPTH_STALL_BIT | \
1540 ANV_PIPE_CS_STALL_BIT)
1542 #define ANV_PIPE_INVALIDATE_BITS ( \
1543 ANV_PIPE_STATE_CACHE_INVALIDATE_BIT | \
1544 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT | \
1545 ANV_PIPE_VF_CACHE_INVALIDATE_BIT | \
1546 ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
1547 ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT | \
1548 ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT)
1550 static inline enum anv_pipe_bits
1551 anv_pipe_flush_bits_for_access_flags(VkAccessFlags flags
)
1553 enum anv_pipe_bits pipe_bits
= 0;
1556 for_each_bit(b
, flags
) {
1557 switch ((VkAccessFlagBits
)(1 << b
)) {
1558 case VK_ACCESS_SHADER_WRITE_BIT
:
1559 pipe_bits
|= ANV_PIPE_DATA_CACHE_FLUSH_BIT
;
1561 case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
:
1562 pipe_bits
|= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
;
1564 case VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
:
1565 pipe_bits
|= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT
;
1567 case VK_ACCESS_TRANSFER_WRITE_BIT
:
1568 pipe_bits
|= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
;
1569 pipe_bits
|= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT
;
1572 break; /* Nothing to do */
1579 static inline enum anv_pipe_bits
1580 anv_pipe_invalidate_bits_for_access_flags(VkAccessFlags flags
)
1582 enum anv_pipe_bits pipe_bits
= 0;
1585 for_each_bit(b
, flags
) {
1586 switch ((VkAccessFlagBits
)(1 << b
)) {
1587 case VK_ACCESS_INDIRECT_COMMAND_READ_BIT
:
1588 case VK_ACCESS_INDEX_READ_BIT
:
1589 case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT
:
1590 pipe_bits
|= ANV_PIPE_VF_CACHE_INVALIDATE_BIT
;
1592 case VK_ACCESS_UNIFORM_READ_BIT
:
1593 pipe_bits
|= ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT
;
1594 pipe_bits
|= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT
;
1596 case VK_ACCESS_SHADER_READ_BIT
:
1597 case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT
:
1598 case VK_ACCESS_TRANSFER_READ_BIT
:
1599 pipe_bits
|= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT
;
1602 break; /* Nothing to do */
1609 #define VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV ( \
1610 VK_IMAGE_ASPECT_COLOR_BIT | \
1611 VK_IMAGE_ASPECT_PLANE_0_BIT | \
1612 VK_IMAGE_ASPECT_PLANE_1_BIT | \
1613 VK_IMAGE_ASPECT_PLANE_2_BIT)
1614 #define VK_IMAGE_ASPECT_PLANES_BITS_ANV ( \
1615 VK_IMAGE_ASPECT_PLANE_0_BIT | \
1616 VK_IMAGE_ASPECT_PLANE_1_BIT | \
1617 VK_IMAGE_ASPECT_PLANE_2_BIT)
1619 struct anv_vertex_binding
{
1620 struct anv_buffer
* buffer
;
1621 VkDeviceSize offset
;
1624 #define ANV_PARAM_PUSH(offset) ((1 << 16) | (uint32_t)(offset))
1625 #define ANV_PARAM_PUSH_OFFSET(param) ((param) & 0xffff)
1627 struct anv_push_constants
{
1628 /* Current allocated size of this push constants data structure.
1629 * Because a decent chunk of it may not be used (images on SKL, for
1630 * instance), we won't actually allocate the entire structure up-front.
1634 /* Push constant data provided by the client through vkPushConstants */
1635 uint8_t client_data
[MAX_PUSH_CONSTANTS_SIZE
];
1637 /* Used for vkCmdDispatchBase */
1638 uint32_t base_work_group_id
[3];
1640 /* Image data for image_load_store on pre-SKL */
1641 struct brw_image_param images
[MAX_IMAGES
];
1644 struct anv_dynamic_state
{
1647 VkViewport viewports
[MAX_VIEWPORTS
];
1652 VkRect2D scissors
[MAX_SCISSORS
];
1663 float blend_constants
[4];
1673 } stencil_compare_mask
;
1678 } stencil_write_mask
;
1683 } stencil_reference
;
1686 extern const struct anv_dynamic_state default_dynamic_state
;
1688 void anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
1689 const struct anv_dynamic_state
*src
,
1690 uint32_t copy_mask
);
1692 struct anv_surface_state
{
1693 struct anv_state state
;
1694 /** Address of the surface referred to by this state
1696 * This address is relative to the start of the BO.
1699 /* Address of the aux surface, if any
1701 * This field is 0 if and only if no aux surface exists.
1703 * This address is relative to the start of the BO. On gen7, the bottom 12
1704 * bits of this address include extra aux information.
1706 uint64_t aux_address
;
1710 * Attachment state when recording a renderpass instance.
1712 * The clear value is valid only if there exists a pending clear.
1714 struct anv_attachment_state
{
1715 enum isl_aux_usage aux_usage
;
1716 enum isl_aux_usage input_aux_usage
;
1717 struct anv_surface_state color
;
1718 struct anv_surface_state input
;
1720 VkImageLayout current_layout
;
1721 VkImageAspectFlags pending_clear_aspects
;
1722 VkImageAspectFlags pending_load_aspects
;
1724 VkClearValue clear_value
;
1725 bool clear_color_is_zero_one
;
1726 bool clear_color_is_zero
;
1729 /** State tracking for particular pipeline bind point
1731 * This struct is the base struct for anv_cmd_graphics_state and
1732 * anv_cmd_compute_state. These are used to track state which is bound to a
1733 * particular type of pipeline. Generic state that applies per-stage such as
1734 * binding table offsets and push constants is tracked generically with a
1735 * per-stage array in anv_cmd_state.
1737 struct anv_cmd_pipeline_state
{
1738 struct anv_pipeline
*pipeline
;
1739 struct anv_pipeline_layout
*layout
;
1741 struct anv_descriptor_set
*descriptors
[MAX_SETS
];
1742 uint32_t dynamic_offsets
[MAX_DYNAMIC_BUFFERS
];
1744 struct anv_push_descriptor_set
*push_descriptors
[MAX_SETS
];
1747 /** State tracking for graphics pipeline
1749 * This has anv_cmd_pipeline_state as a base struct to track things which get
1750 * bound to a graphics pipeline. Along with general pipeline bind point state
1751 * which is in the anv_cmd_pipeline_state base struct, it also contains other
1752 * state which is graphics-specific.
1754 struct anv_cmd_graphics_state
{
1755 struct anv_cmd_pipeline_state base
;
1757 anv_cmd_dirty_mask_t dirty
;
1760 struct anv_dynamic_state dynamic
;
1763 struct anv_buffer
*index_buffer
;
1764 uint32_t index_type
; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
1765 uint32_t index_offset
;
1769 /** State tracking for compute pipeline
1771 * This has anv_cmd_pipeline_state as a base struct to track things which get
1772 * bound to a compute pipeline. Along with general pipeline bind point state
1773 * which is in the anv_cmd_pipeline_state base struct, it also contains other
1774 * state which is compute-specific.
1776 struct anv_cmd_compute_state
{
1777 struct anv_cmd_pipeline_state base
;
1779 bool pipeline_dirty
;
1781 struct anv_address num_workgroups
;
1784 /** State required while building cmd buffer */
1785 struct anv_cmd_state
{
1786 /* PIPELINE_SELECT.PipelineSelection */
1787 uint32_t current_pipeline
;
1788 const struct gen_l3_config
* current_l3_config
;
1790 struct anv_cmd_graphics_state gfx
;
1791 struct anv_cmd_compute_state compute
;
1793 enum anv_pipe_bits pending_pipe_bits
;
1794 VkShaderStageFlags descriptors_dirty
;
1795 VkShaderStageFlags push_constants_dirty
;
1797 struct anv_framebuffer
* framebuffer
;
1798 struct anv_render_pass
* pass
;
1799 struct anv_subpass
* subpass
;
1800 VkRect2D render_area
;
1801 uint32_t restart_index
;
1802 struct anv_vertex_binding vertex_bindings
[MAX_VBS
];
1803 VkShaderStageFlags push_constant_stages
;
1804 struct anv_push_constants
* push_constants
[MESA_SHADER_STAGES
];
1805 struct anv_state binding_tables
[MESA_SHADER_STAGES
];
1806 struct anv_state samplers
[MESA_SHADER_STAGES
];
1809 * Whether or not the gen8 PMA fix is enabled. We ensure that, at the top
1810 * of any command buffer it is disabled by disabling it in EndCommandBuffer
1811 * and before invoking the secondary in ExecuteCommands.
1813 bool pma_fix_enabled
;
1816 * Whether or not we know for certain that HiZ is enabled for the current
1817 * subpass. If, for whatever reason, we are unsure as to whether HiZ is
1818 * enabled or not, this will be false.
1823 * Array length is anv_cmd_state::pass::attachment_count. Array content is
1824 * valid only when recording a render pass instance.
1826 struct anv_attachment_state
* attachments
;
1829 * Surface states for color render targets. These are stored in a single
1830 * flat array. For depth-stencil attachments, the surface state is simply
1833 struct anv_state render_pass_states
;
1836 * A null surface state of the right size to match the framebuffer. This
1837 * is one of the states in render_pass_states.
1839 struct anv_state null_surface_state
;
1842 struct anv_cmd_pool
{
1843 VkAllocationCallbacks alloc
;
1844 struct list_head cmd_buffers
;
1847 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
1849 enum anv_cmd_buffer_exec_mode
{
1850 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY
,
1851 ANV_CMD_BUFFER_EXEC_MODE_EMIT
,
1852 ANV_CMD_BUFFER_EXEC_MODE_GROW_AND_EMIT
,
1853 ANV_CMD_BUFFER_EXEC_MODE_CHAIN
,
1854 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN
,
1857 struct anv_cmd_buffer
{
1858 VK_LOADER_DATA _loader_data
;
1860 struct anv_device
* device
;
1862 struct anv_cmd_pool
* pool
;
1863 struct list_head pool_link
;
1865 struct anv_batch batch
;
1867 /* Fields required for the actual chain of anv_batch_bo's.
1869 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
1871 struct list_head batch_bos
;
1872 enum anv_cmd_buffer_exec_mode exec_mode
;
1874 /* A vector of anv_batch_bo pointers for every batch or surface buffer
1875 * referenced by this command buffer
1877 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1879 struct u_vector seen_bbos
;
1881 /* A vector of int32_t's for every block of binding tables.
1883 * initialized by anv_cmd_buffer_init_batch_bo_chain()
1885 struct u_vector bt_block_states
;
1888 struct anv_reloc_list surface_relocs
;
1889 /** Last seen surface state block pool center bo offset */
1890 uint32_t last_ss_pool_center
;
1892 /* Serial for tracking buffer completion */
1895 /* Stream objects for storing temporary data */
1896 struct anv_state_stream surface_state_stream
;
1897 struct anv_state_stream dynamic_state_stream
;
1899 VkCommandBufferUsageFlags usage_flags
;
1900 VkCommandBufferLevel level
;
1902 struct anv_cmd_state state
;
1905 VkResult
anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1906 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1907 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
1908 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer
*cmd_buffer
);
1909 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer
*primary
,
1910 struct anv_cmd_buffer
*secondary
);
1911 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer
*cmd_buffer
);
1912 VkResult
anv_cmd_buffer_execbuf(struct anv_device
*device
,
1913 struct anv_cmd_buffer
*cmd_buffer
,
1914 const VkSemaphore
*in_semaphores
,
1915 uint32_t num_in_semaphores
,
1916 const VkSemaphore
*out_semaphores
,
1917 uint32_t num_out_semaphores
,
1920 VkResult
anv_cmd_buffer_reset(struct anv_cmd_buffer
*cmd_buffer
);
1923 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer
*cmd_buffer
,
1924 gl_shader_stage stage
, uint32_t size
);
1925 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
1926 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
1927 (offsetof(struct anv_push_constants, field) + \
1928 sizeof(cmd_buffer->state.push_constants[0]->field)))
1930 struct anv_state
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1931 const void *data
, uint32_t size
, uint32_t alignment
);
1932 struct anv_state
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
1933 uint32_t *a
, uint32_t *b
,
1934 uint32_t dwords
, uint32_t alignment
);
1937 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1939 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1940 uint32_t entries
, uint32_t *state_offset
);
1942 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
);
1944 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer
*cmd_buffer
,
1945 uint32_t size
, uint32_t alignment
);
1948 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer
*cmd_buffer
);
1950 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
);
1951 void gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer
*cmd_buffer
,
1952 bool depth_clamp_enable
);
1953 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer
*cmd_buffer
);
1955 void anv_cmd_buffer_setup_attachments(struct anv_cmd_buffer
*cmd_buffer
,
1956 struct anv_render_pass
*pass
,
1957 struct anv_framebuffer
*framebuffer
,
1958 const VkClearValue
*clear_values
);
1960 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
1963 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
1964 gl_shader_stage stage
);
1966 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
);
1968 void anv_cmd_buffer_resolve_subpass(struct anv_cmd_buffer
*cmd_buffer
);
1970 const struct anv_image_view
*
1971 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
);
1974 anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
1975 uint32_t num_entries
,
1976 uint32_t *state_offset
,
1977 struct anv_state
*bt_state
);
1979 void anv_cmd_buffer_dump(struct anv_cmd_buffer
*cmd_buffer
);
1981 enum anv_fence_type
{
1982 ANV_FENCE_TYPE_NONE
= 0,
1984 ANV_FENCE_TYPE_SYNCOBJ
,
1987 enum anv_bo_fence_state
{
1988 /** Indicates that this is a new (or newly reset fence) */
1989 ANV_BO_FENCE_STATE_RESET
,
1991 /** Indicates that this fence has been submitted to the GPU but is still
1992 * (as far as we know) in use by the GPU.
1994 ANV_BO_FENCE_STATE_SUBMITTED
,
1996 ANV_BO_FENCE_STATE_SIGNALED
,
1999 struct anv_fence_impl
{
2000 enum anv_fence_type type
;
2003 /** Fence implementation for BO fences
2005 * These fences use a BO and a set of CPU-tracked state flags. The BO
2006 * is added to the object list of the last execbuf call in a QueueSubmit
2007 * and is marked EXEC_WRITE. The state flags track when the BO has been
2008 * submitted to the kernel. We need to do this because Vulkan lets you
2009 * wait on a fence that has not yet been submitted and I915_GEM_BUSY
2010 * will say it's idle in this case.
2014 enum anv_bo_fence_state state
;
2017 /** DRM syncobj handle for syncobj-based fences */
2023 /* Permanent fence state. Every fence has some form of permanent state
2024 * (type != ANV_SEMAPHORE_TYPE_NONE). This may be a BO to fence on (for
2025 * cross-process fences) or it could just be a dummy for use internally.
2027 struct anv_fence_impl permanent
;
2029 /* Temporary fence state. A fence *may* have temporary state. That state
2030 * is added to the fence by an import operation and is reset back to
2031 * ANV_SEMAPHORE_TYPE_NONE when the fence is reset. A fence with temporary
2032 * state cannot be signaled because the fence must already be signaled
2033 * before the temporary state can be exported from the fence in the other
2034 * process and imported here.
2036 struct anv_fence_impl temporary
;
2041 struct anv_state state
;
2044 enum anv_semaphore_type
{
2045 ANV_SEMAPHORE_TYPE_NONE
= 0,
2046 ANV_SEMAPHORE_TYPE_DUMMY
,
2047 ANV_SEMAPHORE_TYPE_BO
,
2048 ANV_SEMAPHORE_TYPE_SYNC_FILE
,
2049 ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ
,
2052 struct anv_semaphore_impl
{
2053 enum anv_semaphore_type type
;
2056 /* A BO representing this semaphore when type == ANV_SEMAPHORE_TYPE_BO.
2057 * This BO will be added to the object list on any execbuf2 calls for
2058 * which this semaphore is used as a wait or signal fence. When used as
2059 * a signal fence, the EXEC_OBJECT_WRITE flag will be set.
2063 /* The sync file descriptor when type == ANV_SEMAPHORE_TYPE_SYNC_FILE.
2064 * If the semaphore is in the unsignaled state due to either just being
2065 * created or because it has been used for a wait, fd will be -1.
2069 /* Sync object handle when type == ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ.
2070 * Unlike GEM BOs, DRM sync objects aren't deduplicated by the kernel on
2071 * import so we don't need to bother with a userspace cache.
2077 struct anv_semaphore
{
2078 /* Permanent semaphore state. Every semaphore has some form of permanent
2079 * state (type != ANV_SEMAPHORE_TYPE_NONE). This may be a BO to fence on
2080 * (for cross-process semaphores0 or it could just be a dummy for use
2083 struct anv_semaphore_impl permanent
;
2085 /* Temporary semaphore state. A semaphore *may* have temporary state.
2086 * That state is added to the semaphore by an import operation and is reset
2087 * back to ANV_SEMAPHORE_TYPE_NONE when the semaphore is waited on. A
2088 * semaphore with temporary state cannot be signaled because the semaphore
2089 * must already be signaled before the temporary state can be exported from
2090 * the semaphore in the other process and imported here.
2092 struct anv_semaphore_impl temporary
;
2095 void anv_semaphore_reset_temporary(struct anv_device
*device
,
2096 struct anv_semaphore
*semaphore
);
2098 struct anv_shader_module
{
2099 unsigned char sha1
[20];
2104 static inline gl_shader_stage
2105 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
2107 assert(__builtin_popcount(vk_stage
) == 1);
2108 return ffs(vk_stage
) - 1;
2111 static inline VkShaderStageFlagBits
2112 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
2114 return (1 << mesa_stage
);
2117 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
2119 #define anv_foreach_stage(stage, stage_bits) \
2120 for (gl_shader_stage stage, \
2121 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
2122 stage = __builtin_ffs(__tmp) - 1, __tmp; \
2123 __tmp &= ~(1 << (stage)))
2125 struct anv_pipeline_bind_map
{
2126 uint32_t surface_count
;
2127 uint32_t sampler_count
;
2128 uint32_t image_count
;
2130 struct anv_pipeline_binding
* surface_to_descriptor
;
2131 struct anv_pipeline_binding
* sampler_to_descriptor
;
2134 struct anv_shader_bin_key
{
2139 struct anv_shader_bin
{
2142 const struct anv_shader_bin_key
*key
;
2144 struct anv_state kernel
;
2145 uint32_t kernel_size
;
2147 const struct brw_stage_prog_data
*prog_data
;
2148 uint32_t prog_data_size
;
2150 struct anv_pipeline_bind_map bind_map
;
2153 struct anv_shader_bin
*
2154 anv_shader_bin_create(struct anv_device
*device
,
2155 const void *key
, uint32_t key_size
,
2156 const void *kernel
, uint32_t kernel_size
,
2157 const struct brw_stage_prog_data
*prog_data
,
2158 uint32_t prog_data_size
, const void *prog_data_param
,
2159 const struct anv_pipeline_bind_map
*bind_map
);
2162 anv_shader_bin_destroy(struct anv_device
*device
, struct anv_shader_bin
*shader
);
2165 anv_shader_bin_ref(struct anv_shader_bin
*shader
)
2167 assert(shader
&& shader
->ref_cnt
>= 1);
2168 p_atomic_inc(&shader
->ref_cnt
);
2172 anv_shader_bin_unref(struct anv_device
*device
, struct anv_shader_bin
*shader
)
2174 assert(shader
&& shader
->ref_cnt
>= 1);
2175 if (p_atomic_dec_zero(&shader
->ref_cnt
))
2176 anv_shader_bin_destroy(device
, shader
);
2179 struct anv_pipeline
{
2180 struct anv_device
* device
;
2181 struct anv_batch batch
;
2182 uint32_t batch_data
[512];
2183 struct anv_reloc_list batch_relocs
;
2184 uint32_t dynamic_state_mask
;
2185 struct anv_dynamic_state dynamic_state
;
2187 struct anv_subpass
* subpass
;
2189 bool needs_data_cache
;
2191 struct anv_shader_bin
* shaders
[MESA_SHADER_STAGES
];
2194 const struct gen_l3_config
* l3_config
;
2195 uint32_t total_size
;
2198 VkShaderStageFlags active_stages
;
2199 struct anv_state blend_state
;
2202 uint32_t binding_stride
[MAX_VBS
];
2203 bool instancing_enable
[MAX_VBS
];
2204 bool primitive_restart
;
2207 uint32_t cs_right_mask
;
2210 bool depth_test_enable
;
2211 bool writes_stencil
;
2212 bool stencil_test_enable
;
2213 bool depth_clamp_enable
;
2214 bool sample_shading_enable
;
2219 uint32_t depth_stencil_state
[3];
2225 uint32_t wm_depth_stencil
[3];
2229 uint32_t wm_depth_stencil
[4];
2232 uint32_t interface_descriptor_data
[8];
2236 anv_pipeline_has_stage(const struct anv_pipeline
*pipeline
,
2237 gl_shader_stage stage
)
2239 return (pipeline
->active_stages
& mesa_to_vk_shader_stage(stage
)) != 0;
2242 #define ANV_DECL_GET_PROG_DATA_FUNC(prefix, stage) \
2243 static inline const struct brw_##prefix##_prog_data * \
2244 get_##prefix##_prog_data(const struct anv_pipeline *pipeline) \
2246 if (anv_pipeline_has_stage(pipeline, stage)) { \
2247 return (const struct brw_##prefix##_prog_data *) \
2248 pipeline->shaders[stage]->prog_data; \
2254 ANV_DECL_GET_PROG_DATA_FUNC(vs
, MESA_SHADER_VERTEX
)
2255 ANV_DECL_GET_PROG_DATA_FUNC(tcs
, MESA_SHADER_TESS_CTRL
)
2256 ANV_DECL_GET_PROG_DATA_FUNC(tes
, MESA_SHADER_TESS_EVAL
)
2257 ANV_DECL_GET_PROG_DATA_FUNC(gs
, MESA_SHADER_GEOMETRY
)
2258 ANV_DECL_GET_PROG_DATA_FUNC(wm
, MESA_SHADER_FRAGMENT
)
2259 ANV_DECL_GET_PROG_DATA_FUNC(cs
, MESA_SHADER_COMPUTE
)
2261 static inline const struct brw_vue_prog_data
*
2262 anv_pipeline_get_last_vue_prog_data(const struct anv_pipeline
*pipeline
)
2264 if (anv_pipeline_has_stage(pipeline
, MESA_SHADER_GEOMETRY
))
2265 return &get_gs_prog_data(pipeline
)->base
;
2266 else if (anv_pipeline_has_stage(pipeline
, MESA_SHADER_TESS_EVAL
))
2267 return &get_tes_prog_data(pipeline
)->base
;
2269 return &get_vs_prog_data(pipeline
)->base
;
2273 anv_pipeline_init(struct anv_pipeline
*pipeline
, struct anv_device
*device
,
2274 struct anv_pipeline_cache
*cache
,
2275 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
2276 const VkAllocationCallbacks
*alloc
);
2279 anv_pipeline_compile_cs(struct anv_pipeline
*pipeline
,
2280 struct anv_pipeline_cache
*cache
,
2281 const VkComputePipelineCreateInfo
*info
,
2282 struct anv_shader_module
*module
,
2283 const char *entrypoint
,
2284 const VkSpecializationInfo
*spec_info
);
2286 struct anv_format_plane
{
2287 enum isl_format isl_format
:16;
2288 struct isl_swizzle swizzle
;
2290 /* Whether this plane contains chroma channels */
2293 /* For downscaling of YUV planes */
2294 uint8_t denominator_scales
[2];
2296 /* How to map sampled ycbcr planes to a single 4 component element. */
2297 struct isl_swizzle ycbcr_swizzle
;
2302 struct anv_format_plane planes
[3];
2307 static inline uint32_t
2308 anv_image_aspect_to_plane(VkImageAspectFlags image_aspects
,
2309 VkImageAspectFlags aspect_mask
)
2311 switch (aspect_mask
) {
2312 case VK_IMAGE_ASPECT_COLOR_BIT
:
2313 case VK_IMAGE_ASPECT_DEPTH_BIT
:
2314 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
2316 case VK_IMAGE_ASPECT_STENCIL_BIT
:
2317 if ((image_aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) == 0)
2320 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
2322 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
2325 /* Purposefully assert with depth/stencil aspects. */
2326 unreachable("invalid image aspect");
2330 static inline uint32_t
2331 anv_image_aspect_get_planes(VkImageAspectFlags aspect_mask
)
2333 uint32_t planes
= 0;
2335 if (aspect_mask
& (VK_IMAGE_ASPECT_COLOR_BIT
|
2336 VK_IMAGE_ASPECT_DEPTH_BIT
|
2337 VK_IMAGE_ASPECT_STENCIL_BIT
|
2338 VK_IMAGE_ASPECT_PLANE_0_BIT
))
2340 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_1_BIT
)
2342 if (aspect_mask
& VK_IMAGE_ASPECT_PLANE_2_BIT
)
2348 static inline VkImageAspectFlags
2349 anv_plane_to_aspect(VkImageAspectFlags image_aspects
,
2352 if (image_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
2353 if (_mesa_bitcount(image_aspects
) > 1)
2354 return VK_IMAGE_ASPECT_PLANE_0_BIT
<< plane
;
2355 return VK_IMAGE_ASPECT_COLOR_BIT
;
2357 if (image_aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
)
2358 return VK_IMAGE_ASPECT_DEPTH_BIT
<< plane
;
2359 assert(image_aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
2360 return VK_IMAGE_ASPECT_STENCIL_BIT
;
2363 #define anv_foreach_image_aspect_bit(b, image, aspects) \
2364 for_each_bit(b, anv_image_expand_aspects(image, aspects))
2366 const struct anv_format
*
2367 anv_get_format(VkFormat format
);
2369 static inline uint32_t
2370 anv_get_format_planes(VkFormat vk_format
)
2372 const struct anv_format
*format
= anv_get_format(vk_format
);
2374 return format
!= NULL
? format
->n_planes
: 0;
2377 struct anv_format_plane
2378 anv_get_format_plane(const struct gen_device_info
*devinfo
, VkFormat vk_format
,
2379 VkImageAspectFlagBits aspect
, VkImageTiling tiling
);
2381 static inline enum isl_format
2382 anv_get_isl_format(const struct gen_device_info
*devinfo
, VkFormat vk_format
,
2383 VkImageAspectFlags aspect
, VkImageTiling tiling
)
2385 return anv_get_format_plane(devinfo
, vk_format
, aspect
, tiling
).isl_format
;
2388 static inline struct isl_swizzle
2389 anv_swizzle_for_render(struct isl_swizzle swizzle
)
2391 /* Sometimes the swizzle will have alpha map to one. We do this to fake
2392 * RGB as RGBA for texturing
2394 assert(swizzle
.a
== ISL_CHANNEL_SELECT_ONE
||
2395 swizzle
.a
== ISL_CHANNEL_SELECT_ALPHA
);
2397 /* But it doesn't matter what we render to that channel */
2398 swizzle
.a
= ISL_CHANNEL_SELECT_ALPHA
;
2404 anv_pipeline_setup_l3_config(struct anv_pipeline
*pipeline
, bool needs_slm
);
2407 * Subsurface of an anv_image.
2409 struct anv_surface
{
2410 /** Valid only if isl_surf::size > 0. */
2411 struct isl_surf isl
;
2414 * Offset from VkImage's base address, as bound by vkBindImageMemory().
2421 /* The original VkFormat provided by the client. This may not match any
2422 * of the actual surface formats.
2425 const struct anv_format
*format
;
2427 VkImageAspectFlags aspects
;
2430 uint32_t array_size
;
2431 uint32_t samples
; /**< VkImageCreateInfo::samples */
2433 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
2434 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
2436 /** True if this is needs to be bound to an appropriately tiled BO.
2438 * When not using modifiers, consumers such as X11, Wayland, and KMS need
2439 * the tiling passed via I915_GEM_SET_TILING. When exporting these buffers
2440 * we require a dedicated allocation so that we can know to allocate a
2443 bool needs_set_tiling
;
2446 * Must be DRM_FORMAT_MOD_INVALID unless tiling is
2447 * VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.
2449 uint64_t drm_format_mod
;
2454 /* Whether the image is made of several underlying buffer objects rather a
2455 * single one with different offsets.
2462 * For each foo, anv_image::planes[x].surface is valid if and only if
2463 * anv_image::aspects has a x aspect. Refer to anv_image_aspect_to_plane()
2464 * to figure the number associated with a given aspect.
2466 * The hardware requires that the depth buffer and stencil buffer be
2467 * separate surfaces. From Vulkan's perspective, though, depth and stencil
2468 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
2469 * allocate the depth and stencil buffers as separate surfaces in the same
2474 * -----------------------
2476 * ----------------------- |
2477 * | shadow surface0 | |
2478 * ----------------------- | Plane 0
2479 * | aux surface0 | |
2480 * ----------------------- |
2481 * | fast clear colors0 | \|/
2482 * -----------------------
2484 * ----------------------- |
2485 * | shadow surface1 | |
2486 * ----------------------- | Plane 1
2487 * | aux surface1 | |
2488 * ----------------------- |
2489 * | fast clear colors1 | \|/
2490 * -----------------------
2493 * -----------------------
2497 * Offset of the entire plane (whenever the image is disjoint this is
2505 struct anv_surface surface
;
2508 * A surface which shadows the main surface and may have different
2509 * tiling. This is used for sampling using a tiling that isn't supported
2510 * for other operations.
2512 struct anv_surface shadow_surface
;
2515 * For color images, this is the aux usage for this image when not used
2516 * as a color attachment.
2518 * For depth/stencil images, this is set to ISL_AUX_USAGE_HIZ if the
2519 * image has a HiZ buffer.
2521 enum isl_aux_usage aux_usage
;
2523 struct anv_surface aux_surface
;
2526 * Offset of the fast clear state (used to compute the
2527 * fast_clear_state_offset of the following planes).
2529 uint32_t fast_clear_state_offset
;
2532 * BO associated with this plane, set when bound.
2535 VkDeviceSize bo_offset
;
2538 * When destroying the image, also free the bo.
2544 /* The ordering of this enum is important */
2545 enum anv_fast_clear_type
{
2546 /** Image does not have/support any fast-clear blocks */
2547 ANV_FAST_CLEAR_NONE
= 0,
2548 /** Image has/supports fast-clear but only to the default value */
2549 ANV_FAST_CLEAR_DEFAULT_VALUE
= 1,
2550 /** Image has/supports fast-clear with an arbitrary fast-clear value */
2551 ANV_FAST_CLEAR_ANY
= 2,
2554 /* Returns the number of auxiliary buffer levels attached to an image. */
2555 static inline uint8_t
2556 anv_image_aux_levels(const struct anv_image
* const image
,
2557 VkImageAspectFlagBits aspect
)
2559 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2560 return image
->planes
[plane
].aux_surface
.isl
.size
> 0 ?
2561 image
->planes
[plane
].aux_surface
.isl
.levels
: 0;
2564 /* Returns the number of auxiliary buffer layers attached to an image. */
2565 static inline uint32_t
2566 anv_image_aux_layers(const struct anv_image
* const image
,
2567 VkImageAspectFlagBits aspect
,
2568 const uint8_t miplevel
)
2572 /* The miplevel must exist in the main buffer. */
2573 assert(miplevel
< image
->levels
);
2575 if (miplevel
>= anv_image_aux_levels(image
, aspect
)) {
2576 /* There are no layers with auxiliary data because the miplevel has no
2581 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2582 return MAX2(image
->planes
[plane
].aux_surface
.isl
.logical_level0_px
.array_len
,
2583 image
->planes
[plane
].aux_surface
.isl
.logical_level0_px
.depth
>> miplevel
);
2587 static inline struct anv_address
2588 anv_image_get_clear_color_addr(const struct anv_device
*device
,
2589 const struct anv_image
*image
,
2590 VkImageAspectFlagBits aspect
)
2592 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
2594 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2595 return (struct anv_address
) {
2596 .bo
= image
->planes
[plane
].bo
,
2597 .offset
= image
->planes
[plane
].bo_offset
+
2598 image
->planes
[plane
].fast_clear_state_offset
,
2602 static inline struct anv_address
2603 anv_image_get_fast_clear_type_addr(const struct anv_device
*device
,
2604 const struct anv_image
*image
,
2605 VkImageAspectFlagBits aspect
)
2607 struct anv_address addr
=
2608 anv_image_get_clear_color_addr(device
, image
, aspect
);
2609 addr
.offset
+= device
->isl_dev
.ss
.clear_value_size
;
2613 static inline struct anv_address
2614 anv_image_get_compression_state_addr(const struct anv_device
*device
,
2615 const struct anv_image
*image
,
2616 VkImageAspectFlagBits aspect
,
2617 uint32_t level
, uint32_t array_layer
)
2619 assert(level
< anv_image_aux_levels(image
, aspect
));
2620 assert(array_layer
< anv_image_aux_layers(image
, aspect
, level
));
2621 UNUSED
uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2622 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
);
2624 struct anv_address addr
=
2625 anv_image_get_fast_clear_type_addr(device
, image
, aspect
);
2626 addr
.offset
+= 4; /* Go past the fast clear type */
2628 if (image
->type
== VK_IMAGE_TYPE_3D
) {
2629 for (uint32_t l
= 0; l
< level
; l
++)
2630 addr
.offset
+= anv_minify(image
->extent
.depth
, l
) * 4;
2632 addr
.offset
+= level
* image
->array_size
* 4;
2634 addr
.offset
+= array_layer
* 4;
2639 /* Returns true if a HiZ-enabled depth buffer can be sampled from. */
2641 anv_can_sample_with_hiz(const struct gen_device_info
* const devinfo
,
2642 const struct anv_image
*image
)
2644 if (!(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
))
2647 if (devinfo
->gen
< 8)
2650 return image
->samples
== 1;
2654 anv_cmd_buffer_mark_image_written(struct anv_cmd_buffer
*cmd_buffer
,
2655 const struct anv_image
*image
,
2656 VkImageAspectFlagBits aspect
,
2657 enum isl_aux_usage aux_usage
,
2659 uint32_t base_layer
,
2660 uint32_t layer_count
);
2663 anv_image_clear_color(struct anv_cmd_buffer
*cmd_buffer
,
2664 const struct anv_image
*image
,
2665 VkImageAspectFlagBits aspect
,
2666 enum isl_aux_usage aux_usage
,
2667 enum isl_format format
, struct isl_swizzle swizzle
,
2668 uint32_t level
, uint32_t base_layer
, uint32_t layer_count
,
2669 VkRect2D area
, union isl_color_value clear_color
);
2671 anv_image_clear_depth_stencil(struct anv_cmd_buffer
*cmd_buffer
,
2672 const struct anv_image
*image
,
2673 VkImageAspectFlags aspects
,
2674 enum isl_aux_usage depth_aux_usage
,
2676 uint32_t base_layer
, uint32_t layer_count
,
2678 float depth_value
, uint8_t stencil_value
);
2680 anv_image_hiz_op(struct anv_cmd_buffer
*cmd_buffer
,
2681 const struct anv_image
*image
,
2682 VkImageAspectFlagBits aspect
, uint32_t level
,
2683 uint32_t base_layer
, uint32_t layer_count
,
2684 enum isl_aux_op hiz_op
);
2686 anv_image_hiz_clear(struct anv_cmd_buffer
*cmd_buffer
,
2687 const struct anv_image
*image
,
2688 VkImageAspectFlags aspects
,
2690 uint32_t base_layer
, uint32_t layer_count
,
2691 VkRect2D area
, uint8_t stencil_value
);
2693 anv_image_mcs_op(struct anv_cmd_buffer
*cmd_buffer
,
2694 const struct anv_image
*image
,
2695 VkImageAspectFlagBits aspect
,
2696 uint32_t base_layer
, uint32_t layer_count
,
2697 enum isl_aux_op mcs_op
, bool predicate
);
2699 anv_image_ccs_op(struct anv_cmd_buffer
*cmd_buffer
,
2700 const struct anv_image
*image
,
2701 VkImageAspectFlagBits aspect
, uint32_t level
,
2702 uint32_t base_layer
, uint32_t layer_count
,
2703 enum isl_aux_op ccs_op
, bool predicate
);
2706 anv_image_copy_to_shadow(struct anv_cmd_buffer
*cmd_buffer
,
2707 const struct anv_image
*image
,
2708 uint32_t base_level
, uint32_t level_count
,
2709 uint32_t base_layer
, uint32_t layer_count
);
2712 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
2713 const struct anv_image
*image
,
2714 const VkImageAspectFlagBits aspect
,
2715 const VkImageLayout layout
);
2717 enum anv_fast_clear_type
2718 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
2719 const struct anv_image
* const image
,
2720 const VkImageAspectFlagBits aspect
,
2721 const VkImageLayout layout
);
2723 /* This is defined as a macro so that it works for both
2724 * VkImageSubresourceRange and VkImageSubresourceLayers
2726 #define anv_get_layerCount(_image, _range) \
2727 ((_range)->layerCount == VK_REMAINING_ARRAY_LAYERS ? \
2728 (_image)->array_size - (_range)->baseArrayLayer : (_range)->layerCount)
2730 static inline uint32_t
2731 anv_get_levelCount(const struct anv_image
*image
,
2732 const VkImageSubresourceRange
*range
)
2734 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
?
2735 image
->levels
- range
->baseMipLevel
: range
->levelCount
;
2738 static inline VkImageAspectFlags
2739 anv_image_expand_aspects(const struct anv_image
*image
,
2740 VkImageAspectFlags aspects
)
2742 /* If the underlying image has color plane aspects and
2743 * VK_IMAGE_ASPECT_COLOR_BIT has been requested, then return the aspects of
2744 * the underlying image. */
2745 if ((image
->aspects
& VK_IMAGE_ASPECT_PLANES_BITS_ANV
) != 0 &&
2746 aspects
== VK_IMAGE_ASPECT_COLOR_BIT
)
2747 return image
->aspects
;
2753 anv_image_aspects_compatible(VkImageAspectFlags aspects1
,
2754 VkImageAspectFlags aspects2
)
2756 if (aspects1
== aspects2
)
2759 /* Only 1 color aspects are compatibles. */
2760 if ((aspects1
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) != 0 &&
2761 (aspects2
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) != 0 &&
2762 _mesa_bitcount(aspects1
) == _mesa_bitcount(aspects2
))
2768 struct anv_image_view
{
2769 const struct anv_image
*image
; /**< VkImageViewCreateInfo::image */
2771 VkImageAspectFlags aspect_mask
;
2773 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
2777 uint32_t image_plane
;
2779 struct isl_view isl
;
2782 * RENDER_SURFACE_STATE when using image as a sampler surface with an
2783 * image layout of SHADER_READ_ONLY_OPTIMAL or
2784 * DEPTH_STENCIL_READ_ONLY_OPTIMAL.
2786 struct anv_surface_state optimal_sampler_surface_state
;
2789 * RENDER_SURFACE_STATE when using image as a sampler surface with an
2790 * image layout of GENERAL.
2792 struct anv_surface_state general_sampler_surface_state
;
2795 * RENDER_SURFACE_STATE when using image as a storage image. Separate
2796 * states for write-only and readable, using the real format for
2797 * write-only and the lowered format for readable.
2799 struct anv_surface_state storage_surface_state
;
2800 struct anv_surface_state writeonly_storage_surface_state
;
2802 struct brw_image_param storage_image_param
;
2806 enum anv_image_view_state_flags
{
2807 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
= (1 << 0),
2808 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
= (1 << 1),
2811 void anv_image_fill_surface_state(struct anv_device
*device
,
2812 const struct anv_image
*image
,
2813 VkImageAspectFlagBits aspect
,
2814 const struct isl_view
*view
,
2815 isl_surf_usage_flags_t view_usage
,
2816 enum isl_aux_usage aux_usage
,
2817 const union isl_color_value
*clear_color
,
2818 enum anv_image_view_state_flags flags
,
2819 struct anv_surface_state
*state_inout
,
2820 struct brw_image_param
*image_param_out
);
2822 struct anv_image_create_info
{
2823 const VkImageCreateInfo
*vk_info
;
2825 /** An opt-in bitmask which filters an ISL-mapping of the Vulkan tiling. */
2826 isl_tiling_flags_t isl_tiling_flags
;
2828 /** These flags will be added to any derived from VkImageCreateInfo. */
2829 isl_surf_usage_flags_t isl_extra_usage_flags
;
2834 VkResult
anv_image_create(VkDevice _device
,
2835 const struct anv_image_create_info
*info
,
2836 const VkAllocationCallbacks
* alloc
,
2840 VkResult
anv_image_from_gralloc(VkDevice device_h
,
2841 const VkImageCreateInfo
*base_info
,
2842 const VkNativeBufferANDROID
*gralloc_info
,
2843 const VkAllocationCallbacks
*alloc
,
2847 const struct anv_surface
*
2848 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
2849 VkImageAspectFlags aspect_mask
);
2852 anv_isl_format_for_descriptor_type(VkDescriptorType type
);
2854 static inline struct VkExtent3D
2855 anv_sanitize_image_extent(const VkImageType imageType
,
2856 const struct VkExtent3D imageExtent
)
2858 switch (imageType
) {
2859 case VK_IMAGE_TYPE_1D
:
2860 return (VkExtent3D
) { imageExtent
.width
, 1, 1 };
2861 case VK_IMAGE_TYPE_2D
:
2862 return (VkExtent3D
) { imageExtent
.width
, imageExtent
.height
, 1 };
2863 case VK_IMAGE_TYPE_3D
:
2866 unreachable("invalid image type");
2870 static inline struct VkOffset3D
2871 anv_sanitize_image_offset(const VkImageType imageType
,
2872 const struct VkOffset3D imageOffset
)
2874 switch (imageType
) {
2875 case VK_IMAGE_TYPE_1D
:
2876 return (VkOffset3D
) { imageOffset
.x
, 0, 0 };
2877 case VK_IMAGE_TYPE_2D
:
2878 return (VkOffset3D
) { imageOffset
.x
, imageOffset
.y
, 0 };
2879 case VK_IMAGE_TYPE_3D
:
2882 unreachable("invalid image type");
2887 void anv_fill_buffer_surface_state(struct anv_device
*device
,
2888 struct anv_state state
,
2889 enum isl_format format
,
2890 uint32_t offset
, uint32_t range
,
2894 struct anv_ycbcr_conversion
{
2895 const struct anv_format
* format
;
2896 VkSamplerYcbcrModelConversion ycbcr_model
;
2897 VkSamplerYcbcrRange ycbcr_range
;
2898 VkComponentSwizzle mapping
[4];
2899 VkChromaLocation chroma_offsets
[2];
2900 VkFilter chroma_filter
;
2901 bool chroma_reconstruction
;
2904 struct anv_sampler
{
2905 uint32_t state
[3][4];
2907 struct anv_ycbcr_conversion
*conversion
;
2910 struct anv_framebuffer
{
2915 uint32_t attachment_count
;
2916 struct anv_image_view
* attachments
[0];
2919 struct anv_subpass_attachment
{
2920 VkImageUsageFlagBits usage
;
2921 uint32_t attachment
;
2922 VkImageLayout layout
;
2925 struct anv_subpass
{
2926 uint32_t attachment_count
;
2929 * A pointer to all attachment references used in this subpass.
2930 * Only valid if ::attachment_count > 0.
2932 struct anv_subpass_attachment
* attachments
;
2933 uint32_t input_count
;
2934 struct anv_subpass_attachment
* input_attachments
;
2935 uint32_t color_count
;
2936 struct anv_subpass_attachment
* color_attachments
;
2937 struct anv_subpass_attachment
* resolve_attachments
;
2939 struct anv_subpass_attachment depth_stencil_attachment
;
2943 /** Subpass has a depth/stencil self-dependency */
2944 bool has_ds_self_dep
;
2946 /** Subpass has at least one resolve attachment */
2950 static inline unsigned
2951 anv_subpass_view_count(const struct anv_subpass
*subpass
)
2953 return MAX2(1, _mesa_bitcount(subpass
->view_mask
));
2956 struct anv_render_pass_attachment
{
2957 /* TODO: Consider using VkAttachmentDescription instead of storing each of
2958 * its members individually.
2962 VkImageUsageFlags usage
;
2963 VkAttachmentLoadOp load_op
;
2964 VkAttachmentStoreOp store_op
;
2965 VkAttachmentLoadOp stencil_load_op
;
2966 VkImageLayout initial_layout
;
2967 VkImageLayout final_layout
;
2968 VkImageLayout first_subpass_layout
;
2970 /* The subpass id in which the attachment will be used last. */
2971 uint32_t last_subpass_idx
;
2974 struct anv_render_pass
{
2975 uint32_t attachment_count
;
2976 uint32_t subpass_count
;
2977 /* An array of subpass_count+1 flushes, one per subpass boundary */
2978 enum anv_pipe_bits
* subpass_flushes
;
2979 struct anv_render_pass_attachment
* attachments
;
2980 struct anv_subpass subpasses
[0];
2983 #define ANV_PIPELINE_STATISTICS_MASK 0x000007ff
2985 struct anv_query_pool
{
2987 VkQueryPipelineStatisticFlags pipeline_statistics
;
2988 /** Stride between slots, in bytes */
2990 /** Number of slots in this query pool */
2995 int anv_get_entrypoint_index(const char *name
);
2998 anv_entrypoint_is_enabled(int index
, uint32_t core_version
,
2999 const struct anv_instance_extension_table
*instance
,
3000 const struct anv_device_extension_table
*device
);
3002 void *anv_lookup_entrypoint(const struct gen_device_info
*devinfo
,
3005 void anv_dump_image_to_ppm(struct anv_device
*device
,
3006 struct anv_image
*image
, unsigned miplevel
,
3007 unsigned array_layer
, VkImageAspectFlagBits aspect
,
3008 const char *filename
);
3010 enum anv_dump_action
{
3011 ANV_DUMP_FRAMEBUFFERS_BIT
= 0x1,
3014 void anv_dump_start(struct anv_device
*device
, enum anv_dump_action actions
);
3015 void anv_dump_finish(void);
3017 void anv_dump_add_framebuffer(struct anv_cmd_buffer
*cmd_buffer
,
3018 struct anv_framebuffer
*fb
);
3020 static inline uint32_t
3021 anv_get_subpass_id(const struct anv_cmd_state
* const cmd_state
)
3023 /* This function must be called from within a subpass. */
3024 assert(cmd_state
->pass
&& cmd_state
->subpass
);
3026 const uint32_t subpass_id
= cmd_state
->subpass
- cmd_state
->pass
->subpasses
;
3028 /* The id of this subpass shouldn't exceed the number of subpasses in this
3029 * render pass minus 1.
3031 assert(subpass_id
< cmd_state
->pass
->subpass_count
);
3035 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
3037 static inline struct __anv_type * \
3038 __anv_type ## _from_handle(__VkType _handle) \
3040 return (struct __anv_type *) _handle; \
3043 static inline __VkType \
3044 __anv_type ## _to_handle(struct __anv_type *_obj) \
3046 return (__VkType) _obj; \
3049 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
3051 static inline struct __anv_type * \
3052 __anv_type ## _from_handle(__VkType _handle) \
3054 return (struct __anv_type *)(uintptr_t) _handle; \
3057 static inline __VkType \
3058 __anv_type ## _to_handle(struct __anv_type *_obj) \
3060 return (__VkType)(uintptr_t) _obj; \
3063 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
3064 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
3066 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer
, VkCommandBuffer
)
3067 ANV_DEFINE_HANDLE_CASTS(anv_device
, VkDevice
)
3068 ANV_DEFINE_HANDLE_CASTS(anv_instance
, VkInstance
)
3069 ANV_DEFINE_HANDLE_CASTS(anv_physical_device
, VkPhysicalDevice
)
3070 ANV_DEFINE_HANDLE_CASTS(anv_queue
, VkQueue
)
3072 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool
, VkCommandPool
)
3073 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer
, VkBuffer
)
3074 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view
, VkBufferView
)
3075 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool
, VkDescriptorPool
)
3076 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set
, VkDescriptorSet
)
3077 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout
, VkDescriptorSetLayout
)
3078 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_update_template
, VkDescriptorUpdateTemplateKHR
)
3079 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory
, VkDeviceMemory
)
3080 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence
, VkFence
)
3081 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event
, VkEvent
)
3082 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer
, VkFramebuffer
)
3083 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image
, VkImage
)
3084 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view
, VkImageView
);
3085 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache
, VkPipelineCache
)
3086 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline
, VkPipeline
)
3087 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout
, VkPipelineLayout
)
3088 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool
, VkQueryPool
)
3089 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass
, VkRenderPass
)
3090 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler
, VkSampler
)
3091 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_semaphore
, VkSemaphore
)
3092 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module
, VkShaderModule
)
3093 ANV_DEFINE_NONDISP_HANDLE_CASTS(vk_debug_report_callback
, VkDebugReportCallbackEXT
)
3094 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_ycbcr_conversion
, VkSamplerYcbcrConversion
)
3096 /* Gen-specific function declarations */
3098 # include "anv_genX.h"
3100 # define genX(x) gen7_##x
3101 # include "anv_genX.h"
3103 # define genX(x) gen75_##x
3104 # include "anv_genX.h"
3106 # define genX(x) gen8_##x
3107 # include "anv_genX.h"
3109 # define genX(x) gen9_##x
3110 # include "anv_genX.h"
3112 # define genX(x) gen10_##x
3113 # include "anv_genX.h"
3115 # define genX(x) gen11_##x
3116 # include "anv_genX.h"
3120 #endif /* ANV_PRIVATE_H */