2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
40 #define __gen_validate_value(x) VALGRIND_CHECK_MEM_IS_DEFINED(&(x), sizeof(x))
46 #include "common/gen_clflush.h"
47 #include "common/gen_gem.h"
48 #include "dev/gen_device_info.h"
49 #include "blorp/blorp.h"
50 #include "compiler/brw_compiler.h"
51 #include "util/macros.h"
52 #include "util/hash_table.h"
53 #include "util/list.h"
55 #include "util/u_atomic.h"
56 #include "util/u_vector.h"
57 #include "util/u_math.h"
60 #include "vk_debug_report.h"
62 /* Pre-declarations needed for WSI entrypoints */
65 typedef struct xcb_connection_t xcb_connection_t
;
66 typedef uint32_t xcb_visualid_t
;
67 typedef uint32_t xcb_window_t
;
70 struct anv_buffer_view
;
71 struct anv_image_view
;
76 #include <vulkan/vulkan.h>
77 #include <vulkan/vulkan_intel.h>
78 #include <vulkan/vk_icd.h>
80 #include "anv_android.h"
81 #include "anv_entrypoints.h"
82 #include "anv_extensions.h"
85 #include "common/gen_debug.h"
86 #include "common/intel_log.h"
87 #include "wsi_common.h"
89 /* anv Virtual Memory Layout
90 * =========================
92 * When the anv driver is determining the virtual graphics addresses of memory
93 * objects itself using the softpin mechanism, the following memory ranges
96 * Three special considerations to notice:
98 * (1) the dynamic state pool is located within the same 4 GiB as the low
99 * heap. This is to work around a VF cache issue described in a comment in
100 * anv_physical_device_init_heaps.
102 * (2) the binding table pool is located at lower addresses than the surface
103 * state pool, within a 4 GiB range. This allows surface state base addresses
104 * to cover both binding tables (16 bit offsets) and surface states (32 bit
107 * (3) the last 4 GiB of the address space is withheld from the high
108 * heap. Various hardware units will read past the end of an object for
109 * various reasons. This healthy margin prevents reads from wrapping around
112 #define LOW_HEAP_MIN_ADDRESS 0x000000001000ULL /* 4 KiB */
113 #define LOW_HEAP_MAX_ADDRESS 0x0000bfffffffULL
114 #define DYNAMIC_STATE_POOL_MIN_ADDRESS 0x0000c0000000ULL /* 3 GiB */
115 #define DYNAMIC_STATE_POOL_MAX_ADDRESS 0x0000ffffffffULL
116 #define BINDING_TABLE_POOL_MIN_ADDRESS 0x000100000000ULL /* 4 GiB */
117 #define BINDING_TABLE_POOL_MAX_ADDRESS 0x00013fffffffULL
118 #define SURFACE_STATE_POOL_MIN_ADDRESS 0x000140000000ULL /* 5 GiB */
119 #define SURFACE_STATE_POOL_MAX_ADDRESS 0x00017fffffffULL
120 #define INSTRUCTION_STATE_POOL_MIN_ADDRESS 0x000180000000ULL /* 6 GiB */
121 #define INSTRUCTION_STATE_POOL_MAX_ADDRESS 0x0001bfffffffULL
122 #define HIGH_HEAP_MIN_ADDRESS 0x0001c0000000ULL /* 7 GiB */
123 #define HIGH_HEAP_MAX_ADDRESS 0xfffeffffffffULL
125 #define LOW_HEAP_SIZE \
126 (LOW_HEAP_MAX_ADDRESS - LOW_HEAP_MIN_ADDRESS + 1)
127 #define HIGH_HEAP_SIZE \
128 (HIGH_HEAP_MAX_ADDRESS - HIGH_HEAP_MIN_ADDRESS + 1)
129 #define DYNAMIC_STATE_POOL_SIZE \
130 (DYNAMIC_STATE_POOL_MAX_ADDRESS - DYNAMIC_STATE_POOL_MIN_ADDRESS + 1)
131 #define BINDING_TABLE_POOL_SIZE \
132 (BINDING_TABLE_POOL_MAX_ADDRESS - BINDING_TABLE_POOL_MIN_ADDRESS + 1)
133 #define SURFACE_STATE_POOL_SIZE \
134 (SURFACE_STATE_POOL_MAX_ADDRESS - SURFACE_STATE_POOL_MIN_ADDRESS + 1)
135 #define INSTRUCTION_STATE_POOL_SIZE \
136 (INSTRUCTION_STATE_POOL_MAX_ADDRESS - INSTRUCTION_STATE_POOL_MIN_ADDRESS + 1)
138 /* Allowing different clear colors requires us to perform a depth resolve at
139 * the end of certain render passes. This is because while slow clears store
140 * the clear color in the HiZ buffer, fast clears (without a resolve) don't.
141 * See the PRMs for examples describing when additional resolves would be
142 * necessary. To enable fast clears without requiring extra resolves, we set
143 * the clear value to a globally-defined one. We could allow different values
144 * if the user doesn't expect coherent data during or after a render passes
145 * (VK_ATTACHMENT_STORE_OP_DONT_CARE), but such users (aside from the CTS)
146 * don't seem to exist yet. In almost all Vulkan applications tested thus far,
147 * 1.0f seems to be the only value used. The only application that doesn't set
148 * this value does so through the usage of an seemingly uninitialized clear
151 #define ANV_HZ_FC_VAL 1.0f
156 #define MAX_VIEWPORTS 16
157 #define MAX_SCISSORS 16
158 #define MAX_PUSH_CONSTANTS_SIZE 128
159 #define MAX_DYNAMIC_BUFFERS 16
160 #define MAX_IMAGES 64
161 #define MAX_GEN8_IMAGES 8
162 #define MAX_PUSH_DESCRIPTORS 32 /* Minimum requirement */
164 /* The kernel relocation API has a limitation of a 32-bit delta value
165 * applied to the address before it is written which, in spite of it being
166 * unsigned, is treated as signed . Because of the way that this maps to
167 * the Vulkan API, we cannot handle an offset into a buffer that does not
168 * fit into a signed 32 bits. The only mechanism we have for dealing with
169 * this at the moment is to limit all VkDeviceMemory objects to a maximum
170 * of 2GB each. The Vulkan spec allows us to do this:
172 * "Some platforms may have a limit on the maximum size of a single
173 * allocation. For example, certain systems may fail to create
174 * allocations with a size greater than or equal to 4GB. Such a limit is
175 * implementation-dependent, and if such a failure occurs then the error
176 * VK_ERROR_OUT_OF_DEVICE_MEMORY should be returned."
178 * We don't use vk_error here because it's not an error so much as an
179 * indication to the application that the allocation is too large.
181 #define MAX_MEMORY_ALLOCATION_SIZE (1ull << 31)
183 #define ANV_SVGS_VB_INDEX MAX_VBS
184 #define ANV_DRAWID_VB_INDEX (MAX_VBS + 1)
186 #define anv_printflike(a, b) __attribute__((__format__(__printf__, a, b)))
188 static inline uint32_t
189 align_down_npot_u32(uint32_t v
, uint32_t a
)
194 static inline uint32_t
195 align_u32(uint32_t v
, uint32_t a
)
197 assert(a
!= 0 && a
== (a
& -a
));
198 return (v
+ a
- 1) & ~(a
- 1);
201 static inline uint64_t
202 align_u64(uint64_t v
, uint64_t a
)
204 assert(a
!= 0 && a
== (a
& -a
));
205 return (v
+ a
- 1) & ~(a
- 1);
208 static inline int32_t
209 align_i32(int32_t v
, int32_t a
)
211 assert(a
!= 0 && a
== (a
& -a
));
212 return (v
+ a
- 1) & ~(a
- 1);
215 /** Alignment must be a power of 2. */
217 anv_is_aligned(uintmax_t n
, uintmax_t a
)
219 assert(a
== (a
& -a
));
220 return (n
& (a
- 1)) == 0;
223 static inline uint32_t
224 anv_minify(uint32_t n
, uint32_t levels
)
226 if (unlikely(n
== 0))
229 return MAX2(n
>> levels
, 1);
233 anv_clamp_f(float f
, float min
, float max
)
246 anv_clear_mask(uint32_t *inout_mask
, uint32_t clear_mask
)
248 if (*inout_mask
& clear_mask
) {
249 *inout_mask
&= ~clear_mask
;
256 static inline union isl_color_value
257 vk_to_isl_color(VkClearColorValue color
)
259 return (union isl_color_value
) {
269 #define for_each_bit(b, dword) \
270 for (uint32_t __dword = (dword); \
271 (b) = __builtin_ffs(__dword) - 1, __dword; \
272 __dword &= ~(1 << (b)))
274 #define typed_memcpy(dest, src, count) ({ \
275 STATIC_ASSERT(sizeof(*src) == sizeof(*dest)); \
276 memcpy((dest), (src), (count) * sizeof(*(src))); \
279 /* Mapping from anv object to VkDebugReportObjectTypeEXT. New types need
280 * to be added here in order to utilize mapping in debug/error/perf macros.
282 #define REPORT_OBJECT_TYPE(o) \
283 __builtin_choose_expr ( \
284 __builtin_types_compatible_p (__typeof (o), struct anv_instance*), \
285 VK_DEBUG_REPORT_OBJECT_TYPE_INSTANCE_EXT, \
286 __builtin_choose_expr ( \
287 __builtin_types_compatible_p (__typeof (o), struct anv_physical_device*), \
288 VK_DEBUG_REPORT_OBJECT_TYPE_PHYSICAL_DEVICE_EXT, \
289 __builtin_choose_expr ( \
290 __builtin_types_compatible_p (__typeof (o), struct anv_device*), \
291 VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_EXT, \
292 __builtin_choose_expr ( \
293 __builtin_types_compatible_p (__typeof (o), const struct anv_device*), \
294 VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_EXT, \
295 __builtin_choose_expr ( \
296 __builtin_types_compatible_p (__typeof (o), struct anv_queue*), \
297 VK_DEBUG_REPORT_OBJECT_TYPE_QUEUE_EXT, \
298 __builtin_choose_expr ( \
299 __builtin_types_compatible_p (__typeof (o), struct anv_semaphore*), \
300 VK_DEBUG_REPORT_OBJECT_TYPE_SEMAPHORE_EXT, \
301 __builtin_choose_expr ( \
302 __builtin_types_compatible_p (__typeof (o), struct anv_cmd_buffer*), \
303 VK_DEBUG_REPORT_OBJECT_TYPE_COMMAND_BUFFER_EXT, \
304 __builtin_choose_expr ( \
305 __builtin_types_compatible_p (__typeof (o), struct anv_fence*), \
306 VK_DEBUG_REPORT_OBJECT_TYPE_FENCE_EXT, \
307 __builtin_choose_expr ( \
308 __builtin_types_compatible_p (__typeof (o), struct anv_device_memory*), \
309 VK_DEBUG_REPORT_OBJECT_TYPE_DEVICE_MEMORY_EXT, \
310 __builtin_choose_expr ( \
311 __builtin_types_compatible_p (__typeof (o), struct anv_buffer*), \
312 VK_DEBUG_REPORT_OBJECT_TYPE_BUFFER_EXT, \
313 __builtin_choose_expr ( \
314 __builtin_types_compatible_p (__typeof (o), struct anv_image*), \
315 VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_EXT, \
316 __builtin_choose_expr ( \
317 __builtin_types_compatible_p (__typeof (o), const struct anv_image*), \
318 VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_EXT, \
319 __builtin_choose_expr ( \
320 __builtin_types_compatible_p (__typeof (o), struct anv_event*), \
321 VK_DEBUG_REPORT_OBJECT_TYPE_EVENT_EXT, \
322 __builtin_choose_expr ( \
323 __builtin_types_compatible_p (__typeof (o), struct anv_query_pool*), \
324 VK_DEBUG_REPORT_OBJECT_TYPE_QUERY_POOL_EXT, \
325 __builtin_choose_expr ( \
326 __builtin_types_compatible_p (__typeof (o), struct anv_buffer_view*), \
327 VK_DEBUG_REPORT_OBJECT_TYPE_BUFFER_VIEW_EXT, \
328 __builtin_choose_expr ( \
329 __builtin_types_compatible_p (__typeof (o), struct anv_image_view*), \
330 VK_DEBUG_REPORT_OBJECT_TYPE_IMAGE_VIEW_EXT, \
331 __builtin_choose_expr ( \
332 __builtin_types_compatible_p (__typeof (o), struct anv_shader_module*), \
333 VK_DEBUG_REPORT_OBJECT_TYPE_SHADER_MODULE_EXT, \
334 __builtin_choose_expr ( \
335 __builtin_types_compatible_p (__typeof (o), struct anv_pipeline_cache*), \
336 VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_CACHE_EXT, \
337 __builtin_choose_expr ( \
338 __builtin_types_compatible_p (__typeof (o), struct anv_pipeline_layout*), \
339 VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_LAYOUT_EXT, \
340 __builtin_choose_expr ( \
341 __builtin_types_compatible_p (__typeof (o), struct anv_render_pass*), \
342 VK_DEBUG_REPORT_OBJECT_TYPE_RENDER_PASS_EXT, \
343 __builtin_choose_expr ( \
344 __builtin_types_compatible_p (__typeof (o), struct anv_pipeline*), \
345 VK_DEBUG_REPORT_OBJECT_TYPE_PIPELINE_EXT, \
346 __builtin_choose_expr ( \
347 __builtin_types_compatible_p (__typeof (o), struct anv_descriptor_set_layout*), \
348 VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_SET_LAYOUT_EXT, \
349 __builtin_choose_expr ( \
350 __builtin_types_compatible_p (__typeof (o), struct anv_sampler*), \
351 VK_DEBUG_REPORT_OBJECT_TYPE_SAMPLER_EXT, \
352 __builtin_choose_expr ( \
353 __builtin_types_compatible_p (__typeof (o), struct anv_descriptor_pool*), \
354 VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_POOL_EXT, \
355 __builtin_choose_expr ( \
356 __builtin_types_compatible_p (__typeof (o), struct anv_descriptor_set*), \
357 VK_DEBUG_REPORT_OBJECT_TYPE_DESCRIPTOR_SET_EXT, \
358 __builtin_choose_expr ( \
359 __builtin_types_compatible_p (__typeof (o), struct anv_framebuffer*), \
360 VK_DEBUG_REPORT_OBJECT_TYPE_FRAMEBUFFER_EXT, \
361 __builtin_choose_expr ( \
362 __builtin_types_compatible_p (__typeof (o), struct anv_cmd_pool*), \
363 VK_DEBUG_REPORT_OBJECT_TYPE_COMMAND_POOL_EXT, \
364 __builtin_choose_expr ( \
365 __builtin_types_compatible_p (__typeof (o), struct anv_surface*), \
366 VK_DEBUG_REPORT_OBJECT_TYPE_SURFACE_KHR_EXT, \
367 __builtin_choose_expr ( \
368 __builtin_types_compatible_p (__typeof (o), struct wsi_swapchain*), \
369 VK_DEBUG_REPORT_OBJECT_TYPE_SWAPCHAIN_KHR_EXT, \
370 __builtin_choose_expr ( \
371 __builtin_types_compatible_p (__typeof (o), struct vk_debug_callback*), \
372 VK_DEBUG_REPORT_OBJECT_TYPE_DEBUG_REPORT_CALLBACK_EXT_EXT, \
373 __builtin_choose_expr ( \
374 __builtin_types_compatible_p (__typeof (o), void*), \
375 VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT, \
376 /* The void expression results in a compile-time error \
377 when assigning the result to something. */ \
378 (void)0)))))))))))))))))))))))))))))))
380 /* Whenever we generate an error, pass it through this function. Useful for
381 * debugging, where we can break on it. Only call at error site, not when
382 * propagating errors. Might be useful to plug in a stack trace here.
385 VkResult
__vk_errorv(struct anv_instance
*instance
, const void *object
,
386 VkDebugReportObjectTypeEXT type
, VkResult error
,
387 const char *file
, int line
, const char *format
,
390 VkResult
__vk_errorf(struct anv_instance
*instance
, const void *object
,
391 VkDebugReportObjectTypeEXT type
, VkResult error
,
392 const char *file
, int line
, const char *format
, ...);
395 #define vk_error(error) __vk_errorf(NULL, NULL,\
396 VK_DEBUG_REPORT_OBJECT_TYPE_UNKNOWN_EXT,\
397 error, __FILE__, __LINE__, NULL)
398 #define vk_errorv(instance, obj, error, format, args)\
399 __vk_errorv(instance, obj, REPORT_OBJECT_TYPE(obj), error,\
400 __FILE__, __LINE__, format, args)
401 #define vk_errorf(instance, obj, error, format, ...)\
402 __vk_errorf(instance, obj, REPORT_OBJECT_TYPE(obj), error,\
403 __FILE__, __LINE__, format, ## __VA_ARGS__)
405 #define vk_error(error) error
406 #define vk_errorf(instance, obj, error, format, ...) error
410 * Warn on ignored extension structs.
412 * The Vulkan spec requires us to ignore unsupported or unknown structs in
413 * a pNext chain. In debug mode, emitting warnings for ignored structs may
414 * help us discover structs that we should not have ignored.
417 * From the Vulkan 1.0.38 spec:
419 * Any component of the implementation (the loader, any enabled layers,
420 * and drivers) must skip over, without processing (other than reading the
421 * sType and pNext members) any chained structures with sType values not
422 * defined by extensions supported by that component.
424 #define anv_debug_ignored_stype(sType) \
425 intel_logd("%s: ignored VkStructureType %u\n", __func__, (sType))
427 void __anv_perf_warn(struct anv_instance
*instance
, const void *object
,
428 VkDebugReportObjectTypeEXT type
, const char *file
,
429 int line
, const char *format
, ...)
430 anv_printflike(6, 7);
431 void anv_loge(const char *format
, ...) anv_printflike(1, 2);
432 void anv_loge_v(const char *format
, va_list va
);
435 * Print a FINISHME message, including its source location.
437 #define anv_finishme(format, ...) \
439 static bool reported = false; \
441 intel_logw("%s:%d: FINISHME: " format, __FILE__, __LINE__, \
448 * Print a perf warning message. Set INTEL_DEBUG=perf to see these.
450 #define anv_perf_warn(instance, obj, format, ...) \
452 static bool reported = false; \
453 if (!reported && unlikely(INTEL_DEBUG & DEBUG_PERF)) { \
454 __anv_perf_warn(instance, obj, REPORT_OBJECT_TYPE(obj), __FILE__, __LINE__,\
455 format, ##__VA_ARGS__); \
460 /* A non-fatal assert. Useful for debugging. */
462 #define anv_assert(x) ({ \
463 if (unlikely(!(x))) \
464 intel_loge("%s:%d ASSERT: %s", __FILE__, __LINE__, #x); \
467 #define anv_assert(x)
470 /* A multi-pointer allocator
472 * When copying data structures from the user (such as a render pass), it's
473 * common to need to allocate data for a bunch of different things. Instead
474 * of doing several allocations and having to handle all of the error checking
475 * that entails, it can be easier to do a single allocation. This struct
476 * helps facilitate that. The intended usage looks like this:
479 * anv_multialloc_add(&ma, &main_ptr, 1);
480 * anv_multialloc_add(&ma, &substruct1, substruct1Count);
481 * anv_multialloc_add(&ma, &substruct2, substruct2Count);
483 * if (!anv_multialloc_alloc(&ma, pAllocator, VK_ALLOCATION_SCOPE_FOO))
484 * return vk_error(VK_ERROR_OUT_OF_HOST_MEORY);
486 struct anv_multialloc
{
494 #define ANV_MULTIALLOC_INIT \
495 ((struct anv_multialloc) { 0, })
497 #define ANV_MULTIALLOC(_name) \
498 struct anv_multialloc _name = ANV_MULTIALLOC_INIT
500 __attribute__((always_inline
))
502 _anv_multialloc_add(struct anv_multialloc
*ma
,
503 void **ptr
, size_t size
, size_t align
)
505 size_t offset
= align_u64(ma
->size
, align
);
506 ma
->size
= offset
+ size
;
507 ma
->align
= MAX2(ma
->align
, align
);
509 /* Store the offset in the pointer. */
510 *ptr
= (void *)(uintptr_t)offset
;
512 assert(ma
->ptr_count
< ARRAY_SIZE(ma
->ptrs
));
513 ma
->ptrs
[ma
->ptr_count
++] = ptr
;
516 #define anv_multialloc_add_size(_ma, _ptr, _size) \
517 _anv_multialloc_add((_ma), (void **)(_ptr), (_size), __alignof__(**(_ptr)))
519 #define anv_multialloc_add(_ma, _ptr, _count) \
520 anv_multialloc_add_size(_ma, _ptr, (_count) * sizeof(**(_ptr)));
522 __attribute__((always_inline
))
524 anv_multialloc_alloc(struct anv_multialloc
*ma
,
525 const VkAllocationCallbacks
*alloc
,
526 VkSystemAllocationScope scope
)
528 void *ptr
= vk_alloc(alloc
, ma
->size
, ma
->align
, scope
);
532 /* Fill out each of the pointers with their final value.
534 * for (uint32_t i = 0; i < ma->ptr_count; i++)
535 * *ma->ptrs[i] = ptr + (uintptr_t)*ma->ptrs[i];
537 * Unfortunately, even though ma->ptr_count is basically guaranteed to be a
538 * constant, GCC is incapable of figuring this out and unrolling the loop
539 * so we have to give it a little help.
541 STATIC_ASSERT(ARRAY_SIZE(ma
->ptrs
) == 8);
542 #define _ANV_MULTIALLOC_UPDATE_POINTER(_i) \
543 if ((_i) < ma->ptr_count) \
544 *ma->ptrs[_i] = ptr + (uintptr_t)*ma->ptrs[_i]
545 _ANV_MULTIALLOC_UPDATE_POINTER(0);
546 _ANV_MULTIALLOC_UPDATE_POINTER(1);
547 _ANV_MULTIALLOC_UPDATE_POINTER(2);
548 _ANV_MULTIALLOC_UPDATE_POINTER(3);
549 _ANV_MULTIALLOC_UPDATE_POINTER(4);
550 _ANV_MULTIALLOC_UPDATE_POINTER(5);
551 _ANV_MULTIALLOC_UPDATE_POINTER(6);
552 _ANV_MULTIALLOC_UPDATE_POINTER(7);
553 #undef _ANV_MULTIALLOC_UPDATE_POINTER
558 __attribute__((always_inline
))
560 anv_multialloc_alloc2(struct anv_multialloc
*ma
,
561 const VkAllocationCallbacks
*parent_alloc
,
562 const VkAllocationCallbacks
*alloc
,
563 VkSystemAllocationScope scope
)
565 return anv_multialloc_alloc(ma
, alloc
? alloc
: parent_alloc
, scope
);
568 /* Extra ANV-defined BO flags which won't be passed to the kernel */
569 #define ANV_BO_EXTERNAL (1ull << 31)
570 #define ANV_BO_FLAG_MASK (1ull << 31)
575 /* Index into the current validation list. This is used by the
576 * validation list building alrogithm to track which buffers are already
577 * in the validation list so that we can ensure uniqueness.
581 /* Last known offset. This value is provided by the kernel when we
582 * execbuf and is used as the presumed offset for the next bunch of
590 /** Flags to pass to the kernel through drm_i915_exec_object2::flags */
595 anv_bo_init(struct anv_bo
*bo
, uint32_t gem_handle
, uint64_t size
)
597 bo
->gem_handle
= gem_handle
;
605 /* Represents a lock-free linked list of "free" things. This is used by
606 * both the block pool and the state pools. Unfortunately, in order to
607 * solve the ABA problem, we can't use a single uint32_t head.
609 union anv_free_list
{
613 /* A simple count that is incremented every time the head changes. */
619 union anv_free_list2
{
623 /* A simple count that is incremented every time the head changes. */
629 #define ANV_FREE_LIST_EMPTY ((union anv_free_list) { { 1, 0 } })
630 #define ANV_FREE_LIST2_EMPTY ((union anv_free_list2) { { UINT32_MAX, 0 } })
632 struct anv_block_state
{
642 struct anv_block_pool
{
643 struct anv_device
*device
;
649 /* The address where the start of the pool is pinned. The various bos that
650 * are created as the pool grows will have addresses in the range
651 * [start_address, start_address + BLOCK_POOL_MEMFD_SIZE).
653 uint64_t start_address
;
655 /* The offset from the start of the bo to the "center" of the block
656 * pool. Pointers to allocated blocks are given by
657 * bo.map + center_bo_offset + offsets.
659 uint32_t center_bo_offset
;
661 /* Current memory map of the block pool. This pointer may or may not
662 * point to the actual beginning of the block pool memory. If
663 * anv_block_pool_alloc_back has ever been called, then this pointer
664 * will point to the "center" position of the buffer and all offsets
665 * (negative or positive) given out by the block pool alloc functions
666 * will be valid relative to this pointer.
668 * In particular, map == bo.map + center_offset
674 * Array of mmaps and gem handles owned by the block pool, reclaimed when
675 * the block pool is destroyed.
677 struct u_vector mmap_cleanups
;
679 struct anv_block_state state
;
681 struct anv_block_state back_state
;
684 /* Block pools are backed by a fixed-size 1GB memfd */
685 #define BLOCK_POOL_MEMFD_SIZE (1ul << 30)
687 /* The center of the block pool is also the middle of the memfd. This may
688 * change in the future if we decide differently for some reason.
690 #define BLOCK_POOL_MEMFD_CENTER (BLOCK_POOL_MEMFD_SIZE / 2)
692 static inline uint32_t
693 anv_block_pool_size(struct anv_block_pool
*pool
)
695 return pool
->state
.end
+ pool
->back_state
.end
;
705 #define ANV_STATE_NULL ((struct anv_state) { .alloc_size = 0 })
707 struct anv_fixed_size_state_pool
{
708 union anv_free_list free_list
;
709 struct anv_block_state block
;
712 #define ANV_MIN_STATE_SIZE_LOG2 6
713 #define ANV_MAX_STATE_SIZE_LOG2 20
715 #define ANV_STATE_BUCKETS (ANV_MAX_STATE_SIZE_LOG2 - ANV_MIN_STATE_SIZE_LOG2 + 1)
717 struct anv_free_entry
{
719 struct anv_state state
;
722 struct anv_state_table
{
723 struct anv_device
*device
;
725 struct anv_free_entry
*map
;
727 struct anv_block_state state
;
728 struct u_vector mmap_cleanups
;
731 struct anv_state_pool
{
732 struct anv_block_pool block_pool
;
734 /* The size of blocks which will be allocated from the block pool */
737 /** Free list for "back" allocations */
738 union anv_free_list back_alloc_free_list
;
740 struct anv_fixed_size_state_pool buckets
[ANV_STATE_BUCKETS
];
743 struct anv_state_stream_block
;
745 struct anv_state_stream
{
746 struct anv_state_pool
*state_pool
;
748 /* The size of blocks to allocate from the state pool */
751 /* Current block we're allocating from */
752 struct anv_state block
;
754 /* Offset into the current block at which to allocate the next state */
757 /* List of all blocks allocated from this pool */
758 struct anv_state_stream_block
*block_list
;
761 /* The block_pool functions exported for testing only. The block pool should
762 * only be used via a state pool (see below).
764 VkResult
anv_block_pool_init(struct anv_block_pool
*pool
,
765 struct anv_device
*device
,
766 uint64_t start_address
,
767 uint32_t initial_size
,
769 void anv_block_pool_finish(struct anv_block_pool
*pool
);
770 int32_t anv_block_pool_alloc(struct anv_block_pool
*pool
,
771 uint32_t block_size
);
772 int32_t anv_block_pool_alloc_back(struct anv_block_pool
*pool
,
773 uint32_t block_size
);
774 void* anv_block_pool_map(struct anv_block_pool
*pool
, int32_t offset
);
776 VkResult
anv_state_pool_init(struct anv_state_pool
*pool
,
777 struct anv_device
*device
,
778 uint64_t start_address
,
781 void anv_state_pool_finish(struct anv_state_pool
*pool
);
782 struct anv_state
anv_state_pool_alloc(struct anv_state_pool
*pool
,
783 uint32_t state_size
, uint32_t alignment
);
784 struct anv_state
anv_state_pool_alloc_back(struct anv_state_pool
*pool
);
785 void anv_state_pool_free(struct anv_state_pool
*pool
, struct anv_state state
);
786 void anv_state_stream_init(struct anv_state_stream
*stream
,
787 struct anv_state_pool
*state_pool
,
788 uint32_t block_size
);
789 void anv_state_stream_finish(struct anv_state_stream
*stream
);
790 struct anv_state
anv_state_stream_alloc(struct anv_state_stream
*stream
,
791 uint32_t size
, uint32_t alignment
);
793 VkResult
anv_state_table_init(struct anv_state_table
*table
,
794 struct anv_device
*device
,
795 uint32_t initial_entries
);
796 void anv_state_table_finish(struct anv_state_table
*table
);
797 VkResult
anv_state_table_add(struct anv_state_table
*table
, uint32_t *idx
,
799 void anv_free_list_push2(union anv_free_list2
*list
,
800 struct anv_state_table
*table
,
801 uint32_t idx
, uint32_t count
);
802 struct anv_state
* anv_free_list_pop2(union anv_free_list2
*list
,
803 struct anv_state_table
*table
);
806 static inline struct anv_state
*
807 anv_state_table_get(struct anv_state_table
*table
, uint32_t idx
)
809 return &table
->map
[idx
].state
;
812 * Implements a pool of re-usable BOs. The interface is identical to that
813 * of block_pool except that each block is its own BO.
816 struct anv_device
*device
;
823 void anv_bo_pool_init(struct anv_bo_pool
*pool
, struct anv_device
*device
,
825 void anv_bo_pool_finish(struct anv_bo_pool
*pool
);
826 VkResult
anv_bo_pool_alloc(struct anv_bo_pool
*pool
, struct anv_bo
*bo
,
828 void anv_bo_pool_free(struct anv_bo_pool
*pool
, const struct anv_bo
*bo
);
830 struct anv_scratch_bo
{
835 struct anv_scratch_pool
{
836 /* Indexed by Per-Thread Scratch Space number (the hardware value) and stage */
837 struct anv_scratch_bo bos
[16][MESA_SHADER_STAGES
];
840 void anv_scratch_pool_init(struct anv_device
*device
,
841 struct anv_scratch_pool
*pool
);
842 void anv_scratch_pool_finish(struct anv_device
*device
,
843 struct anv_scratch_pool
*pool
);
844 struct anv_bo
*anv_scratch_pool_alloc(struct anv_device
*device
,
845 struct anv_scratch_pool
*pool
,
846 gl_shader_stage stage
,
847 unsigned per_thread_scratch
);
849 /** Implements a BO cache that ensures a 1-1 mapping of GEM BOs to anv_bos */
850 struct anv_bo_cache
{
851 struct hash_table
*bo_map
;
852 pthread_mutex_t mutex
;
855 VkResult
anv_bo_cache_init(struct anv_bo_cache
*cache
);
856 void anv_bo_cache_finish(struct anv_bo_cache
*cache
);
857 VkResult
anv_bo_cache_alloc(struct anv_device
*device
,
858 struct anv_bo_cache
*cache
,
859 uint64_t size
, uint64_t bo_flags
,
861 VkResult
anv_bo_cache_import(struct anv_device
*device
,
862 struct anv_bo_cache
*cache
,
863 int fd
, uint64_t bo_flags
,
865 VkResult
anv_bo_cache_export(struct anv_device
*device
,
866 struct anv_bo_cache
*cache
,
867 struct anv_bo
*bo_in
, int *fd_out
);
868 void anv_bo_cache_release(struct anv_device
*device
,
869 struct anv_bo_cache
*cache
,
872 struct anv_memory_type
{
873 /* Standard bits passed on to the client */
874 VkMemoryPropertyFlags propertyFlags
;
877 /* Driver-internal book-keeping */
878 VkBufferUsageFlags valid_buffer_usage
;
881 struct anv_memory_heap
{
882 /* Standard bits passed on to the client */
884 VkMemoryHeapFlags flags
;
886 /* Driver-internal book-keeping */
887 bool supports_48bit_addresses
;
890 struct anv_physical_device
{
891 VK_LOADER_DATA _loader_data
;
893 struct anv_instance
* instance
;
904 struct gen_device_info info
;
905 /** Amount of "GPU memory" we want to advertise
907 * Clearly, this value is bogus since Intel is a UMA architecture. On
908 * gen7 platforms, we are limited by GTT size unless we want to implement
909 * fine-grained tracking and GTT splitting. On Broadwell and above we are
910 * practically unlimited. However, we will never report more than 3/4 of
911 * the total system ram to try and avoid running out of RAM.
913 bool supports_48bit_addresses
;
914 struct brw_compiler
* compiler
;
915 struct isl_device isl_dev
;
916 int cmd_parser_version
;
918 bool has_exec_capture
;
921 bool has_syncobj_wait
;
922 bool has_context_priority
;
924 bool has_context_isolation
;
926 struct anv_device_extension_table supported_extensions
;
929 uint32_t subslice_total
;
933 struct anv_memory_type types
[VK_MAX_MEMORY_TYPES
];
935 struct anv_memory_heap heaps
[VK_MAX_MEMORY_HEAPS
];
938 uint8_t driver_build_sha1
[20];
939 uint8_t pipeline_cache_uuid
[VK_UUID_SIZE
];
940 uint8_t driver_uuid
[VK_UUID_SIZE
];
941 uint8_t device_uuid
[VK_UUID_SIZE
];
943 struct disk_cache
* disk_cache
;
945 struct wsi_device wsi_device
;
950 struct anv_app_info
{
951 const char* app_name
;
952 uint32_t app_version
;
953 const char* engine_name
;
954 uint32_t engine_version
;
955 uint32_t api_version
;
958 struct anv_instance
{
959 VK_LOADER_DATA _loader_data
;
961 VkAllocationCallbacks alloc
;
963 struct anv_app_info app_info
;
965 struct anv_instance_extension_table enabled_extensions
;
966 struct anv_instance_dispatch_table dispatch
;
967 struct anv_device_dispatch_table device_dispatch
;
969 int physicalDeviceCount
;
970 struct anv_physical_device physicalDevice
;
972 bool pipeline_cache_enabled
;
974 struct vk_debug_report_instance debug_report_callbacks
;
977 VkResult
anv_init_wsi(struct anv_physical_device
*physical_device
);
978 void anv_finish_wsi(struct anv_physical_device
*physical_device
);
980 uint32_t anv_physical_device_api_version(struct anv_physical_device
*dev
);
981 bool anv_physical_device_extension_supported(struct anv_physical_device
*dev
,
985 VK_LOADER_DATA _loader_data
;
987 struct anv_device
* device
;
989 VkDeviceQueueCreateFlags flags
;
992 struct anv_pipeline_cache
{
993 struct anv_device
* device
;
994 pthread_mutex_t mutex
;
996 struct hash_table
* nir_cache
;
998 struct hash_table
* cache
;
1001 struct anv_pipeline_bind_map
;
1003 void anv_pipeline_cache_init(struct anv_pipeline_cache
*cache
,
1004 struct anv_device
*device
,
1005 bool cache_enabled
);
1006 void anv_pipeline_cache_finish(struct anv_pipeline_cache
*cache
);
1008 struct anv_shader_bin
*
1009 anv_pipeline_cache_search(struct anv_pipeline_cache
*cache
,
1010 const void *key
, uint32_t key_size
);
1011 struct anv_shader_bin
*
1012 anv_pipeline_cache_upload_kernel(struct anv_pipeline_cache
*cache
,
1013 const void *key_data
, uint32_t key_size
,
1014 const void *kernel_data
, uint32_t kernel_size
,
1015 const void *constant_data
,
1016 uint32_t constant_data_size
,
1017 const struct brw_stage_prog_data
*prog_data
,
1018 uint32_t prog_data_size
,
1019 const struct anv_pipeline_bind_map
*bind_map
);
1021 struct anv_shader_bin
*
1022 anv_device_search_for_kernel(struct anv_device
*device
,
1023 struct anv_pipeline_cache
*cache
,
1024 const void *key_data
, uint32_t key_size
);
1026 struct anv_shader_bin
*
1027 anv_device_upload_kernel(struct anv_device
*device
,
1028 struct anv_pipeline_cache
*cache
,
1029 const void *key_data
, uint32_t key_size
,
1030 const void *kernel_data
, uint32_t kernel_size
,
1031 const void *constant_data
,
1032 uint32_t constant_data_size
,
1033 const struct brw_stage_prog_data
*prog_data
,
1034 uint32_t prog_data_size
,
1035 const struct anv_pipeline_bind_map
*bind_map
);
1038 struct nir_shader_compiler_options
;
1041 anv_device_search_for_nir(struct anv_device
*device
,
1042 struct anv_pipeline_cache
*cache
,
1043 const struct nir_shader_compiler_options
*nir_options
,
1044 unsigned char sha1_key
[20],
1048 anv_device_upload_nir(struct anv_device
*device
,
1049 struct anv_pipeline_cache
*cache
,
1050 const struct nir_shader
*nir
,
1051 unsigned char sha1_key
[20]);
1054 VK_LOADER_DATA _loader_data
;
1056 VkAllocationCallbacks alloc
;
1058 struct anv_instance
* instance
;
1059 uint32_t chipset_id
;
1061 struct gen_device_info info
;
1062 struct isl_device isl_dev
;
1065 bool can_chain_batches
;
1066 bool robust_buffer_access
;
1067 struct anv_device_extension_table enabled_extensions
;
1068 struct anv_device_dispatch_table dispatch
;
1070 pthread_mutex_t vma_mutex
;
1071 struct util_vma_heap vma_lo
;
1072 struct util_vma_heap vma_hi
;
1073 uint64_t vma_lo_available
;
1074 uint64_t vma_hi_available
;
1076 struct anv_bo_pool batch_bo_pool
;
1078 struct anv_bo_cache bo_cache
;
1080 struct anv_state_pool dynamic_state_pool
;
1081 struct anv_state_pool instruction_state_pool
;
1082 struct anv_state_pool binding_table_pool
;
1083 struct anv_state_pool surface_state_pool
;
1085 struct anv_bo workaround_bo
;
1086 struct anv_bo trivial_batch_bo
;
1087 struct anv_bo hiz_clear_bo
;
1089 struct anv_pipeline_cache default_pipeline_cache
;
1090 struct blorp_context blorp
;
1092 struct anv_state border_colors
;
1094 struct anv_queue queue
;
1096 struct anv_scratch_pool scratch_pool
;
1098 uint32_t default_mocs
;
1099 uint32_t external_mocs
;
1101 pthread_mutex_t mutex
;
1102 pthread_cond_t queue_submit
;
1106 static inline struct anv_state_pool
*
1107 anv_binding_table_pool(struct anv_device
*device
)
1109 if (device
->instance
->physicalDevice
.use_softpin
)
1110 return &device
->binding_table_pool
;
1112 return &device
->surface_state_pool
;
1115 static inline struct anv_state
1116 anv_binding_table_pool_alloc(struct anv_device
*device
) {
1117 if (device
->instance
->physicalDevice
.use_softpin
)
1118 return anv_state_pool_alloc(&device
->binding_table_pool
,
1119 device
->binding_table_pool
.block_size
, 0);
1121 return anv_state_pool_alloc_back(&device
->surface_state_pool
);
1125 anv_binding_table_pool_free(struct anv_device
*device
, struct anv_state state
) {
1126 anv_state_pool_free(anv_binding_table_pool(device
), state
);
1129 static inline uint32_t
1130 anv_mocs_for_bo(const struct anv_device
*device
, const struct anv_bo
*bo
)
1132 if (bo
->flags
& ANV_BO_EXTERNAL
)
1133 return device
->external_mocs
;
1135 return device
->default_mocs
;
1139 anv_state_flush(struct anv_device
*device
, struct anv_state state
)
1141 if (device
->info
.has_llc
)
1144 gen_flush_range(state
.map
, state
.alloc_size
);
1147 void anv_device_init_blorp(struct anv_device
*device
);
1148 void anv_device_finish_blorp(struct anv_device
*device
);
1150 VkResult
_anv_device_set_lost(struct anv_device
*device
,
1151 const char *file
, int line
,
1152 const char *msg
, ...);
1153 #define anv_device_set_lost(dev, ...) \
1154 _anv_device_set_lost(dev, __FILE__, __LINE__, __VA_ARGS__)
1157 anv_device_is_lost(struct anv_device
*device
)
1159 return unlikely(device
->_lost
);
1162 VkResult
anv_device_execbuf(struct anv_device
*device
,
1163 struct drm_i915_gem_execbuffer2
*execbuf
,
1164 struct anv_bo
**execbuf_bos
);
1165 VkResult
anv_device_query_status(struct anv_device
*device
);
1166 VkResult
anv_device_bo_busy(struct anv_device
*device
, struct anv_bo
*bo
);
1167 VkResult
anv_device_wait(struct anv_device
*device
, struct anv_bo
*bo
,
1170 void* anv_gem_mmap(struct anv_device
*device
,
1171 uint32_t gem_handle
, uint64_t offset
, uint64_t size
, uint32_t flags
);
1172 void anv_gem_munmap(void *p
, uint64_t size
);
1173 uint32_t anv_gem_create(struct anv_device
*device
, uint64_t size
);
1174 void anv_gem_close(struct anv_device
*device
, uint32_t gem_handle
);
1175 uint32_t anv_gem_userptr(struct anv_device
*device
, void *mem
, size_t size
);
1176 int anv_gem_busy(struct anv_device
*device
, uint32_t gem_handle
);
1177 int anv_gem_wait(struct anv_device
*device
, uint32_t gem_handle
, int64_t *timeout_ns
);
1178 int anv_gem_execbuffer(struct anv_device
*device
,
1179 struct drm_i915_gem_execbuffer2
*execbuf
);
1180 int anv_gem_set_tiling(struct anv_device
*device
, uint32_t gem_handle
,
1181 uint32_t stride
, uint32_t tiling
);
1182 int anv_gem_create_context(struct anv_device
*device
);
1183 bool anv_gem_has_context_priority(int fd
);
1184 int anv_gem_destroy_context(struct anv_device
*device
, int context
);
1185 int anv_gem_set_context_param(int fd
, int context
, uint32_t param
,
1187 int anv_gem_get_context_param(int fd
, int context
, uint32_t param
,
1189 int anv_gem_get_param(int fd
, uint32_t param
);
1190 int anv_gem_get_tiling(struct anv_device
*device
, uint32_t gem_handle
);
1191 bool anv_gem_get_bit6_swizzle(int fd
, uint32_t tiling
);
1192 int anv_gem_get_aperture(int fd
, uint64_t *size
);
1193 int anv_gem_gpu_get_reset_stats(struct anv_device
*device
,
1194 uint32_t *active
, uint32_t *pending
);
1195 int anv_gem_handle_to_fd(struct anv_device
*device
, uint32_t gem_handle
);
1196 int anv_gem_reg_read(struct anv_device
*device
,
1197 uint32_t offset
, uint64_t *result
);
1198 uint32_t anv_gem_fd_to_handle(struct anv_device
*device
, int fd
);
1199 int anv_gem_set_caching(struct anv_device
*device
, uint32_t gem_handle
, uint32_t caching
);
1200 int anv_gem_set_domain(struct anv_device
*device
, uint32_t gem_handle
,
1201 uint32_t read_domains
, uint32_t write_domain
);
1202 int anv_gem_sync_file_merge(struct anv_device
*device
, int fd1
, int fd2
);
1203 uint32_t anv_gem_syncobj_create(struct anv_device
*device
, uint32_t flags
);
1204 void anv_gem_syncobj_destroy(struct anv_device
*device
, uint32_t handle
);
1205 int anv_gem_syncobj_handle_to_fd(struct anv_device
*device
, uint32_t handle
);
1206 uint32_t anv_gem_syncobj_fd_to_handle(struct anv_device
*device
, int fd
);
1207 int anv_gem_syncobj_export_sync_file(struct anv_device
*device
,
1209 int anv_gem_syncobj_import_sync_file(struct anv_device
*device
,
1210 uint32_t handle
, int fd
);
1211 void anv_gem_syncobj_reset(struct anv_device
*device
, uint32_t handle
);
1212 bool anv_gem_supports_syncobj_wait(int fd
);
1213 int anv_gem_syncobj_wait(struct anv_device
*device
,
1214 uint32_t *handles
, uint32_t num_handles
,
1215 int64_t abs_timeout_ns
, bool wait_all
);
1217 bool anv_vma_alloc(struct anv_device
*device
, struct anv_bo
*bo
);
1218 void anv_vma_free(struct anv_device
*device
, struct anv_bo
*bo
);
1220 VkResult
anv_bo_init_new(struct anv_bo
*bo
, struct anv_device
*device
, uint64_t size
);
1222 struct anv_reloc_list
{
1223 uint32_t num_relocs
;
1224 uint32_t array_length
;
1225 struct drm_i915_gem_relocation_entry
* relocs
;
1226 struct anv_bo
** reloc_bos
;
1230 VkResult
anv_reloc_list_init(struct anv_reloc_list
*list
,
1231 const VkAllocationCallbacks
*alloc
);
1232 void anv_reloc_list_finish(struct anv_reloc_list
*list
,
1233 const VkAllocationCallbacks
*alloc
);
1235 VkResult
anv_reloc_list_add(struct anv_reloc_list
*list
,
1236 const VkAllocationCallbacks
*alloc
,
1237 uint32_t offset
, struct anv_bo
*target_bo
,
1240 struct anv_batch_bo
{
1241 /* Link in the anv_cmd_buffer.owned_batch_bos list */
1242 struct list_head link
;
1246 /* Bytes actually consumed in this batch BO */
1249 struct anv_reloc_list relocs
;
1253 const VkAllocationCallbacks
* alloc
;
1259 struct anv_reloc_list
* relocs
;
1261 /* This callback is called (with the associated user data) in the event
1262 * that the batch runs out of space.
1264 VkResult (*extend_cb
)(struct anv_batch
*, void *);
1268 * Current error status of the command buffer. Used to track inconsistent
1269 * or incomplete command buffer states that are the consequence of run-time
1270 * errors such as out of memory scenarios. We want to track this in the
1271 * batch because the command buffer object is not visible to some parts
1277 void *anv_batch_emit_dwords(struct anv_batch
*batch
, int num_dwords
);
1278 void anv_batch_emit_batch(struct anv_batch
*batch
, struct anv_batch
*other
);
1279 uint64_t anv_batch_emit_reloc(struct anv_batch
*batch
,
1280 void *location
, struct anv_bo
*bo
, uint32_t offset
);
1281 VkResult
anv_device_submit_simple_batch(struct anv_device
*device
,
1282 struct anv_batch
*batch
);
1284 static inline VkResult
1285 anv_batch_set_error(struct anv_batch
*batch
, VkResult error
)
1287 assert(error
!= VK_SUCCESS
);
1288 if (batch
->status
== VK_SUCCESS
)
1289 batch
->status
= error
;
1290 return batch
->status
;
1294 anv_batch_has_error(struct anv_batch
*batch
)
1296 return batch
->status
!= VK_SUCCESS
;
1299 struct anv_address
{
1304 #define ANV_NULL_ADDRESS ((struct anv_address) { NULL, 0 })
1307 anv_address_is_null(struct anv_address addr
)
1309 return addr
.bo
== NULL
&& addr
.offset
== 0;
1312 static inline uint64_t
1313 anv_address_physical(struct anv_address addr
)
1315 if (addr
.bo
&& (addr
.bo
->flags
& EXEC_OBJECT_PINNED
))
1316 return gen_canonical_address(addr
.bo
->offset
+ addr
.offset
);
1318 return gen_canonical_address(addr
.offset
);
1321 static inline struct anv_address
1322 anv_address_add(struct anv_address addr
, uint64_t offset
)
1324 addr
.offset
+= offset
;
1329 write_reloc(const struct anv_device
*device
, void *p
, uint64_t v
, bool flush
)
1331 unsigned reloc_size
= 0;
1332 if (device
->info
.gen
>= 8) {
1333 reloc_size
= sizeof(uint64_t);
1334 *(uint64_t *)p
= gen_canonical_address(v
);
1336 reloc_size
= sizeof(uint32_t);
1340 if (flush
&& !device
->info
.has_llc
)
1341 gen_flush_range(p
, reloc_size
);
1344 static inline uint64_t
1345 _anv_combine_address(struct anv_batch
*batch
, void *location
,
1346 const struct anv_address address
, uint32_t delta
)
1348 if (address
.bo
== NULL
) {
1349 return address
.offset
+ delta
;
1351 assert(batch
->start
<= location
&& location
< batch
->end
);
1353 return anv_batch_emit_reloc(batch
, location
, address
.bo
, address
.offset
+ delta
);
1357 #define __gen_address_type struct anv_address
1358 #define __gen_user_data struct anv_batch
1359 #define __gen_combine_address _anv_combine_address
1361 /* Wrapper macros needed to work around preprocessor argument issues. In
1362 * particular, arguments don't get pre-evaluated if they are concatenated.
1363 * This means that, if you pass GENX(3DSTATE_PS) into the emit macro, the
1364 * GENX macro won't get evaluated if the emit macro contains "cmd ## foo".
1365 * We can work around this easily enough with these helpers.
1367 #define __anv_cmd_length(cmd) cmd ## _length
1368 #define __anv_cmd_length_bias(cmd) cmd ## _length_bias
1369 #define __anv_cmd_header(cmd) cmd ## _header
1370 #define __anv_cmd_pack(cmd) cmd ## _pack
1371 #define __anv_reg_num(reg) reg ## _num
1373 #define anv_pack_struct(dst, struc, ...) do { \
1374 struct struc __template = { \
1377 __anv_cmd_pack(struc)(NULL, dst, &__template); \
1378 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dst, __anv_cmd_length(struc) * 4)); \
1381 #define anv_batch_emitn(batch, n, cmd, ...) ({ \
1382 void *__dst = anv_batch_emit_dwords(batch, n); \
1384 struct cmd __template = { \
1385 __anv_cmd_header(cmd), \
1386 .DWordLength = n - __anv_cmd_length_bias(cmd), \
1389 __anv_cmd_pack(cmd)(batch, __dst, &__template); \
1394 #define anv_batch_emit_merge(batch, dwords0, dwords1) \
1398 STATIC_ASSERT(ARRAY_SIZE(dwords0) == ARRAY_SIZE(dwords1)); \
1399 dw = anv_batch_emit_dwords((batch), ARRAY_SIZE(dwords0)); \
1402 for (uint32_t i = 0; i < ARRAY_SIZE(dwords0); i++) \
1403 dw[i] = (dwords0)[i] | (dwords1)[i]; \
1404 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, ARRAY_SIZE(dwords0) * 4));\
1407 #define anv_batch_emit(batch, cmd, name) \
1408 for (struct cmd name = { __anv_cmd_header(cmd) }, \
1409 *_dst = anv_batch_emit_dwords(batch, __anv_cmd_length(cmd)); \
1410 __builtin_expect(_dst != NULL, 1); \
1411 ({ __anv_cmd_pack(cmd)(batch, _dst, &name); \
1412 VG(VALGRIND_CHECK_MEM_IS_DEFINED(_dst, __anv_cmd_length(cmd) * 4)); \
1416 /* MEMORY_OBJECT_CONTROL_STATE:
1417 * .GraphicsDataTypeGFDT = 0,
1418 * .LLCCacheabilityControlLLCCC = 0,
1419 * .L3CacheabilityControlL3CC = 1,
1423 /* MEMORY_OBJECT_CONTROL_STATE:
1424 * .LLCeLLCCacheabilityControlLLCCC = 0,
1425 * .L3CacheabilityControlL3CC = 1,
1427 #define GEN75_MOCS 1
1429 /* MEMORY_OBJECT_CONTROL_STATE:
1430 * .MemoryTypeLLCeLLCCacheabilityControl = WB,
1431 * .TargetCache = L3DefertoPATforLLCeLLCselection,
1432 * .AgeforQUADLRU = 0
1434 #define GEN8_MOCS 0x78
1436 /* MEMORY_OBJECT_CONTROL_STATE:
1437 * .MemoryTypeLLCeLLCCacheabilityControl = UCwithFenceifcoherentcycle,
1438 * .TargetCache = L3DefertoPATforLLCeLLCselection,
1439 * .AgeforQUADLRU = 0
1441 #define GEN8_EXTERNAL_MOCS 0x18
1443 /* Skylake: MOCS is now an index into an array of 62 different caching
1444 * configurations programmed by the kernel.
1447 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
1450 /* TC=LLC/eLLC, LeCC=WB, LRUM=3, L3CC=WB */
1451 #define GEN9_EXTERNAL_MOCS 1
1453 /* Cannonlake MOCS defines are duplicates of Skylake MOCS defines. */
1454 #define GEN10_MOCS GEN9_MOCS
1455 #define GEN10_EXTERNAL_MOCS GEN9_EXTERNAL_MOCS
1457 /* Ice Lake MOCS defines are duplicates of Skylake MOCS defines. */
1458 #define GEN11_MOCS GEN9_MOCS
1459 #define GEN11_EXTERNAL_MOCS GEN9_EXTERNAL_MOCS
1461 struct anv_device_memory
{
1463 struct anv_memory_type
* type
;
1464 VkDeviceSize map_size
;
1467 /* If set, we are holding reference to AHardwareBuffer
1468 * which we must release when memory is freed.
1470 struct AHardwareBuffer
* ahw
;
1474 * Header for Vertex URB Entry (VUE)
1476 struct anv_vue_header
{
1478 uint32_t RTAIndex
; /* RenderTargetArrayIndex */
1479 uint32_t ViewportIndex
;
1483 struct anv_descriptor_set_binding_layout
{
1485 /* The type of the descriptors in this binding */
1486 VkDescriptorType type
;
1489 /* Number of array elements in this binding */
1490 uint16_t array_size
;
1492 /* Index into the flattend descriptor set */
1493 uint16_t descriptor_index
;
1495 /* Index into the dynamic state array for a dynamic buffer */
1496 int16_t dynamic_offset_index
;
1498 /* Index into the descriptor set buffer views */
1499 int16_t buffer_index
;
1502 /* Index into the binding table for the associated surface */
1503 int16_t surface_index
;
1505 /* Index into the sampler table for the associated sampler */
1506 int16_t sampler_index
;
1508 /* Index into the image table for the associated image */
1509 int16_t image_index
;
1510 } stage
[MESA_SHADER_STAGES
];
1512 /* Immutable samplers (or NULL if no immutable samplers) */
1513 struct anv_sampler
**immutable_samplers
;
1516 struct anv_descriptor_set_layout
{
1517 /* Descriptor set layouts can be destroyed at almost any time */
1520 /* Number of bindings in this descriptor set */
1521 uint16_t binding_count
;
1523 /* Total size of the descriptor set with room for all array entries */
1526 /* Shader stages affected by this descriptor set */
1527 uint16_t shader_stages
;
1529 /* Number of buffers in this descriptor set */
1530 uint16_t buffer_count
;
1532 /* Number of dynamic offsets used by this descriptor set */
1533 uint16_t dynamic_offset_count
;
1535 /* Bindings in this descriptor set */
1536 struct anv_descriptor_set_binding_layout binding
[0];
1540 anv_descriptor_set_layout_ref(struct anv_descriptor_set_layout
*layout
)
1542 assert(layout
&& layout
->ref_cnt
>= 1);
1543 p_atomic_inc(&layout
->ref_cnt
);
1547 anv_descriptor_set_layout_unref(struct anv_device
*device
,
1548 struct anv_descriptor_set_layout
*layout
)
1550 assert(layout
&& layout
->ref_cnt
>= 1);
1551 if (p_atomic_dec_zero(&layout
->ref_cnt
))
1552 vk_free(&device
->alloc
, layout
);
1555 struct anv_descriptor
{
1556 VkDescriptorType type
;
1560 VkImageLayout layout
;
1561 struct anv_image_view
*image_view
;
1562 struct anv_sampler
*sampler
;
1566 struct anv_buffer
*buffer
;
1571 struct anv_buffer_view
*buffer_view
;
1575 struct anv_descriptor_set
{
1576 struct anv_descriptor_set_layout
*layout
;
1578 uint32_t buffer_count
;
1579 struct anv_buffer_view
*buffer_views
;
1580 struct anv_descriptor descriptors
[0];
1583 struct anv_buffer_view
{
1584 enum isl_format format
; /**< VkBufferViewCreateInfo::format */
1585 uint64_t range
; /**< VkBufferViewCreateInfo::range */
1587 struct anv_address address
;
1589 struct anv_state surface_state
;
1590 struct anv_state storage_surface_state
;
1591 struct anv_state writeonly_storage_surface_state
;
1593 struct brw_image_param storage_image_param
;
1596 struct anv_push_descriptor_set
{
1597 struct anv_descriptor_set set
;
1599 /* Put this field right behind anv_descriptor_set so it fills up the
1600 * descriptors[0] field. */
1601 struct anv_descriptor descriptors
[MAX_PUSH_DESCRIPTORS
];
1602 struct anv_buffer_view buffer_views
[MAX_PUSH_DESCRIPTORS
];
1605 struct anv_descriptor_pool
{
1610 struct anv_state_stream surface_state_stream
;
1611 void *surface_state_free_list
;
1616 enum anv_descriptor_template_entry_type
{
1617 ANV_DESCRIPTOR_TEMPLATE_ENTRY_TYPE_IMAGE
,
1618 ANV_DESCRIPTOR_TEMPLATE_ENTRY_TYPE_BUFFER
,
1619 ANV_DESCRIPTOR_TEMPLATE_ENTRY_TYPE_BUFFER_VIEW
1622 struct anv_descriptor_template_entry
{
1623 /* The type of descriptor in this entry */
1624 VkDescriptorType type
;
1626 /* Binding in the descriptor set */
1629 /* Offset at which to write into the descriptor set binding */
1630 uint32_t array_element
;
1632 /* Number of elements to write into the descriptor set binding */
1633 uint32_t array_count
;
1635 /* Offset into the user provided data */
1638 /* Stride between elements into the user provided data */
1642 struct anv_descriptor_update_template
{
1643 VkPipelineBindPoint bind_point
;
1645 /* The descriptor set this template corresponds to. This value is only
1646 * valid if the template was created with the templateType
1647 * VK_DESCRIPTOR_UPDATE_TEMPLATE_TYPE_DESCRIPTOR_SET.
1651 /* Number of entries in this template */
1652 uint32_t entry_count
;
1654 /* Entries of the template */
1655 struct anv_descriptor_template_entry entries
[0];
1659 anv_descriptor_set_layout_size(const struct anv_descriptor_set_layout
*layout
);
1662 anv_descriptor_set_write_image_view(struct anv_descriptor_set
*set
,
1663 const struct gen_device_info
* const devinfo
,
1664 const VkDescriptorImageInfo
* const info
,
1665 VkDescriptorType type
,
1670 anv_descriptor_set_write_buffer_view(struct anv_descriptor_set
*set
,
1671 VkDescriptorType type
,
1672 struct anv_buffer_view
*buffer_view
,
1677 anv_descriptor_set_write_buffer(struct anv_descriptor_set
*set
,
1678 struct anv_device
*device
,
1679 struct anv_state_stream
*alloc_stream
,
1680 VkDescriptorType type
,
1681 struct anv_buffer
*buffer
,
1684 VkDeviceSize offset
,
1685 VkDeviceSize range
);
1688 anv_descriptor_set_write_template(struct anv_descriptor_set
*set
,
1689 struct anv_device
*device
,
1690 struct anv_state_stream
*alloc_stream
,
1691 const struct anv_descriptor_update_template
*template,
1695 anv_descriptor_set_create(struct anv_device
*device
,
1696 struct anv_descriptor_pool
*pool
,
1697 struct anv_descriptor_set_layout
*layout
,
1698 struct anv_descriptor_set
**out_set
);
1701 anv_descriptor_set_destroy(struct anv_device
*device
,
1702 struct anv_descriptor_pool
*pool
,
1703 struct anv_descriptor_set
*set
);
1705 #define ANV_DESCRIPTOR_SET_SHADER_CONSTANTS (UINT8_MAX - 1)
1706 #define ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS UINT8_MAX
1708 struct anv_pipeline_binding
{
1709 /* The descriptor set this surface corresponds to. The special value of
1710 * ANV_DESCRIPTOR_SET_COLOR_ATTACHMENTS indicates that the offset refers
1711 * to a color attachment and not a regular descriptor.
1715 /* Binding in the descriptor set */
1718 /* Index in the binding */
1721 /* Plane in the binding index */
1724 /* Input attachment index (relative to the subpass) */
1725 uint8_t input_attachment_index
;
1727 /* For a storage image, whether it is write-only */
1731 struct anv_pipeline_layout
{
1733 struct anv_descriptor_set_layout
*layout
;
1734 uint32_t dynamic_offset_start
;
1740 bool has_dynamic_offsets
;
1741 } stage
[MESA_SHADER_STAGES
];
1743 unsigned char sha1
[20];
1747 struct anv_device
* device
;
1750 VkBufferUsageFlags usage
;
1752 /* Set when bound */
1753 struct anv_address address
;
1756 static inline uint64_t
1757 anv_buffer_get_range(struct anv_buffer
*buffer
, uint64_t offset
, uint64_t range
)
1759 assert(offset
<= buffer
->size
);
1760 if (range
== VK_WHOLE_SIZE
) {
1761 return buffer
->size
- offset
;
1763 assert(range
+ offset
>= range
);
1764 assert(range
+ offset
<= buffer
->size
);
1769 enum anv_cmd_dirty_bits
{
1770 ANV_CMD_DIRTY_DYNAMIC_VIEWPORT
= 1 << 0, /* VK_DYNAMIC_STATE_VIEWPORT */
1771 ANV_CMD_DIRTY_DYNAMIC_SCISSOR
= 1 << 1, /* VK_DYNAMIC_STATE_SCISSOR */
1772 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
= 1 << 2, /* VK_DYNAMIC_STATE_LINE_WIDTH */
1773 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
= 1 << 3, /* VK_DYNAMIC_STATE_DEPTH_BIAS */
1774 ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
= 1 << 4, /* VK_DYNAMIC_STATE_BLEND_CONSTANTS */
1775 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BOUNDS
= 1 << 5, /* VK_DYNAMIC_STATE_DEPTH_BOUNDS */
1776 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
= 1 << 6, /* VK_DYNAMIC_STATE_STENCIL_COMPARE_MASK */
1777 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
= 1 << 7, /* VK_DYNAMIC_STATE_STENCIL_WRITE_MASK */
1778 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
= 1 << 8, /* VK_DYNAMIC_STATE_STENCIL_REFERENCE */
1779 ANV_CMD_DIRTY_DYNAMIC_ALL
= (1 << 9) - 1,
1780 ANV_CMD_DIRTY_PIPELINE
= 1 << 9,
1781 ANV_CMD_DIRTY_INDEX_BUFFER
= 1 << 10,
1782 ANV_CMD_DIRTY_RENDER_TARGETS
= 1 << 11,
1784 typedef uint32_t anv_cmd_dirty_mask_t
;
1786 enum anv_pipe_bits
{
1787 ANV_PIPE_DEPTH_CACHE_FLUSH_BIT
= (1 << 0),
1788 ANV_PIPE_STALL_AT_SCOREBOARD_BIT
= (1 << 1),
1789 ANV_PIPE_STATE_CACHE_INVALIDATE_BIT
= (1 << 2),
1790 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT
= (1 << 3),
1791 ANV_PIPE_VF_CACHE_INVALIDATE_BIT
= (1 << 4),
1792 ANV_PIPE_DATA_CACHE_FLUSH_BIT
= (1 << 5),
1793 ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT
= (1 << 10),
1794 ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT
= (1 << 11),
1795 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
= (1 << 12),
1796 ANV_PIPE_DEPTH_STALL_BIT
= (1 << 13),
1797 ANV_PIPE_CS_STALL_BIT
= (1 << 20),
1799 /* This bit does not exist directly in PIPE_CONTROL. Instead it means that
1800 * a flush has happened but not a CS stall. The next time we do any sort
1801 * of invalidation we need to insert a CS stall at that time. Otherwise,
1802 * we would have to CS stall on every flush which could be bad.
1804 ANV_PIPE_NEEDS_CS_STALL_BIT
= (1 << 21),
1806 /* This bit does not exist directly in PIPE_CONTROL. It means that render
1807 * target operations are ongoing. Some operations like copies on the
1808 * command streamer might need to be aware of this to trigger the
1809 * appropriate stall before they can proceed with the copy.
1811 ANV_PIPE_RENDER_TARGET_WRITES
= (1 << 22),
1814 #define ANV_PIPE_FLUSH_BITS ( \
1815 ANV_PIPE_DEPTH_CACHE_FLUSH_BIT | \
1816 ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
1817 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT)
1819 #define ANV_PIPE_STALL_BITS ( \
1820 ANV_PIPE_STALL_AT_SCOREBOARD_BIT | \
1821 ANV_PIPE_DEPTH_STALL_BIT | \
1822 ANV_PIPE_CS_STALL_BIT)
1824 #define ANV_PIPE_INVALIDATE_BITS ( \
1825 ANV_PIPE_STATE_CACHE_INVALIDATE_BIT | \
1826 ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT | \
1827 ANV_PIPE_VF_CACHE_INVALIDATE_BIT | \
1828 ANV_PIPE_DATA_CACHE_FLUSH_BIT | \
1829 ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT | \
1830 ANV_PIPE_INSTRUCTION_CACHE_INVALIDATE_BIT)
1832 static inline enum anv_pipe_bits
1833 anv_pipe_flush_bits_for_access_flags(VkAccessFlags flags
)
1835 enum anv_pipe_bits pipe_bits
= 0;
1838 for_each_bit(b
, flags
) {
1839 switch ((VkAccessFlagBits
)(1 << b
)) {
1840 case VK_ACCESS_SHADER_WRITE_BIT
:
1841 pipe_bits
|= ANV_PIPE_DATA_CACHE_FLUSH_BIT
;
1843 case VK_ACCESS_COLOR_ATTACHMENT_WRITE_BIT
:
1844 pipe_bits
|= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
;
1846 case VK_ACCESS_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT
:
1847 pipe_bits
|= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT
;
1849 case VK_ACCESS_TRANSFER_WRITE_BIT
:
1850 pipe_bits
|= ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
;
1851 pipe_bits
|= ANV_PIPE_DEPTH_CACHE_FLUSH_BIT
;
1853 case VK_ACCESS_MEMORY_WRITE_BIT
:
1854 pipe_bits
|= ANV_PIPE_FLUSH_BITS
;
1857 break; /* Nothing to do */
1864 static inline enum anv_pipe_bits
1865 anv_pipe_invalidate_bits_for_access_flags(VkAccessFlags flags
)
1867 enum anv_pipe_bits pipe_bits
= 0;
1870 for_each_bit(b
, flags
) {
1871 switch ((VkAccessFlagBits
)(1 << b
)) {
1872 case VK_ACCESS_INDIRECT_COMMAND_READ_BIT
:
1873 case VK_ACCESS_INDEX_READ_BIT
:
1874 case VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT
:
1875 pipe_bits
|= ANV_PIPE_VF_CACHE_INVALIDATE_BIT
;
1877 case VK_ACCESS_UNIFORM_READ_BIT
:
1878 pipe_bits
|= ANV_PIPE_CONSTANT_CACHE_INVALIDATE_BIT
;
1879 pipe_bits
|= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT
;
1881 case VK_ACCESS_SHADER_READ_BIT
:
1882 case VK_ACCESS_INPUT_ATTACHMENT_READ_BIT
:
1883 case VK_ACCESS_TRANSFER_READ_BIT
:
1884 pipe_bits
|= ANV_PIPE_TEXTURE_CACHE_INVALIDATE_BIT
;
1886 case VK_ACCESS_MEMORY_READ_BIT
:
1887 pipe_bits
|= ANV_PIPE_INVALIDATE_BITS
;
1889 case VK_ACCESS_MEMORY_WRITE_BIT
:
1890 pipe_bits
|= ANV_PIPE_FLUSH_BITS
;
1893 break; /* Nothing to do */
1900 #define VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV ( \
1901 VK_IMAGE_ASPECT_COLOR_BIT | \
1902 VK_IMAGE_ASPECT_PLANE_0_BIT | \
1903 VK_IMAGE_ASPECT_PLANE_1_BIT | \
1904 VK_IMAGE_ASPECT_PLANE_2_BIT)
1905 #define VK_IMAGE_ASPECT_PLANES_BITS_ANV ( \
1906 VK_IMAGE_ASPECT_PLANE_0_BIT | \
1907 VK_IMAGE_ASPECT_PLANE_1_BIT | \
1908 VK_IMAGE_ASPECT_PLANE_2_BIT)
1910 struct anv_vertex_binding
{
1911 struct anv_buffer
* buffer
;
1912 VkDeviceSize offset
;
1915 #define ANV_PARAM_PUSH(offset) ((1 << 16) | (uint32_t)(offset))
1916 #define ANV_PARAM_PUSH_OFFSET(param) ((param) & 0xffff)
1918 struct anv_push_constants
{
1919 /* Current allocated size of this push constants data structure.
1920 * Because a decent chunk of it may not be used (images on SKL, for
1921 * instance), we won't actually allocate the entire structure up-front.
1925 /* Push constant data provided by the client through vkPushConstants */
1926 uint8_t client_data
[MAX_PUSH_CONSTANTS_SIZE
];
1928 /* Used for vkCmdDispatchBase */
1929 uint32_t base_work_group_id
[3];
1931 /* Image data for image_load_store on pre-SKL */
1932 struct brw_image_param images
[MAX_GEN8_IMAGES
];
1935 struct anv_dynamic_state
{
1938 VkViewport viewports
[MAX_VIEWPORTS
];
1943 VkRect2D scissors
[MAX_SCISSORS
];
1954 float blend_constants
[4];
1964 } stencil_compare_mask
;
1969 } stencil_write_mask
;
1974 } stencil_reference
;
1977 extern const struct anv_dynamic_state default_dynamic_state
;
1979 void anv_dynamic_state_copy(struct anv_dynamic_state
*dest
,
1980 const struct anv_dynamic_state
*src
,
1981 uint32_t copy_mask
);
1983 struct anv_surface_state
{
1984 struct anv_state state
;
1985 /** Address of the surface referred to by this state
1987 * This address is relative to the start of the BO.
1989 struct anv_address address
;
1990 /* Address of the aux surface, if any
1992 * This field is ANV_NULL_ADDRESS if and only if no aux surface exists.
1994 * With the exception of gen8, the bottom 12 bits of this address' offset
1995 * include extra aux information.
1997 struct anv_address aux_address
;
1998 /* Address of the clear color, if any
2000 * This address is relative to the start of the BO.
2002 struct anv_address clear_address
;
2006 * Attachment state when recording a renderpass instance.
2008 * The clear value is valid only if there exists a pending clear.
2010 struct anv_attachment_state
{
2011 enum isl_aux_usage aux_usage
;
2012 enum isl_aux_usage input_aux_usage
;
2013 struct anv_surface_state color
;
2014 struct anv_surface_state input
;
2016 VkImageLayout current_layout
;
2017 VkImageAspectFlags pending_clear_aspects
;
2018 VkImageAspectFlags pending_load_aspects
;
2020 VkClearValue clear_value
;
2021 bool clear_color_is_zero_one
;
2022 bool clear_color_is_zero
;
2024 /* When multiview is active, attachments with a renderpass clear
2025 * operation have their respective layers cleared on the first
2026 * subpass that uses them, and only in that subpass. We keep track
2027 * of this using a bitfield to indicate which layers of an attachment
2028 * have not been cleared yet when multiview is active.
2030 uint32_t pending_clear_views
;
2033 /** State tracking for particular pipeline bind point
2035 * This struct is the base struct for anv_cmd_graphics_state and
2036 * anv_cmd_compute_state. These are used to track state which is bound to a
2037 * particular type of pipeline. Generic state that applies per-stage such as
2038 * binding table offsets and push constants is tracked generically with a
2039 * per-stage array in anv_cmd_state.
2041 struct anv_cmd_pipeline_state
{
2042 struct anv_pipeline
*pipeline
;
2043 struct anv_pipeline_layout
*layout
;
2045 struct anv_descriptor_set
*descriptors
[MAX_SETS
];
2046 uint32_t dynamic_offsets
[MAX_DYNAMIC_BUFFERS
];
2048 struct anv_push_descriptor_set
*push_descriptors
[MAX_SETS
];
2051 /** State tracking for graphics pipeline
2053 * This has anv_cmd_pipeline_state as a base struct to track things which get
2054 * bound to a graphics pipeline. Along with general pipeline bind point state
2055 * which is in the anv_cmd_pipeline_state base struct, it also contains other
2056 * state which is graphics-specific.
2058 struct anv_cmd_graphics_state
{
2059 struct anv_cmd_pipeline_state base
;
2061 anv_cmd_dirty_mask_t dirty
;
2064 struct anv_dynamic_state dynamic
;
2067 struct anv_buffer
*index_buffer
;
2068 uint32_t index_type
; /**< 3DSTATE_INDEX_BUFFER.IndexFormat */
2069 uint32_t index_offset
;
2073 /** State tracking for compute pipeline
2075 * This has anv_cmd_pipeline_state as a base struct to track things which get
2076 * bound to a compute pipeline. Along with general pipeline bind point state
2077 * which is in the anv_cmd_pipeline_state base struct, it also contains other
2078 * state which is compute-specific.
2080 struct anv_cmd_compute_state
{
2081 struct anv_cmd_pipeline_state base
;
2083 bool pipeline_dirty
;
2085 struct anv_address num_workgroups
;
2088 /** State required while building cmd buffer */
2089 struct anv_cmd_state
{
2090 /* PIPELINE_SELECT.PipelineSelection */
2091 uint32_t current_pipeline
;
2092 const struct gen_l3_config
* current_l3_config
;
2094 struct anv_cmd_graphics_state gfx
;
2095 struct anv_cmd_compute_state compute
;
2097 enum anv_pipe_bits pending_pipe_bits
;
2098 VkShaderStageFlags descriptors_dirty
;
2099 VkShaderStageFlags push_constants_dirty
;
2101 struct anv_framebuffer
* framebuffer
;
2102 struct anv_render_pass
* pass
;
2103 struct anv_subpass
* subpass
;
2104 VkRect2D render_area
;
2105 uint32_t restart_index
;
2106 struct anv_vertex_binding vertex_bindings
[MAX_VBS
];
2107 VkShaderStageFlags push_constant_stages
;
2108 struct anv_push_constants
* push_constants
[MESA_SHADER_STAGES
];
2109 struct anv_state binding_tables
[MESA_SHADER_STAGES
];
2110 struct anv_state samplers
[MESA_SHADER_STAGES
];
2113 * Whether or not the gen8 PMA fix is enabled. We ensure that, at the top
2114 * of any command buffer it is disabled by disabling it in EndCommandBuffer
2115 * and before invoking the secondary in ExecuteCommands.
2117 bool pma_fix_enabled
;
2120 * Whether or not we know for certain that HiZ is enabled for the current
2121 * subpass. If, for whatever reason, we are unsure as to whether HiZ is
2122 * enabled or not, this will be false.
2127 * Array length is anv_cmd_state::pass::attachment_count. Array content is
2128 * valid only when recording a render pass instance.
2130 struct anv_attachment_state
* attachments
;
2133 * Surface states for color render targets. These are stored in a single
2134 * flat array. For depth-stencil attachments, the surface state is simply
2137 struct anv_state render_pass_states
;
2140 * A null surface state of the right size to match the framebuffer. This
2141 * is one of the states in render_pass_states.
2143 struct anv_state null_surface_state
;
2146 struct anv_cmd_pool
{
2147 VkAllocationCallbacks alloc
;
2148 struct list_head cmd_buffers
;
2151 #define ANV_CMD_BUFFER_BATCH_SIZE 8192
2153 enum anv_cmd_buffer_exec_mode
{
2154 ANV_CMD_BUFFER_EXEC_MODE_PRIMARY
,
2155 ANV_CMD_BUFFER_EXEC_MODE_EMIT
,
2156 ANV_CMD_BUFFER_EXEC_MODE_GROW_AND_EMIT
,
2157 ANV_CMD_BUFFER_EXEC_MODE_CHAIN
,
2158 ANV_CMD_BUFFER_EXEC_MODE_COPY_AND_CHAIN
,
2161 struct anv_cmd_buffer
{
2162 VK_LOADER_DATA _loader_data
;
2164 struct anv_device
* device
;
2166 struct anv_cmd_pool
* pool
;
2167 struct list_head pool_link
;
2169 struct anv_batch batch
;
2171 /* Fields required for the actual chain of anv_batch_bo's.
2173 * These fields are initialized by anv_cmd_buffer_init_batch_bo_chain().
2175 struct list_head batch_bos
;
2176 enum anv_cmd_buffer_exec_mode exec_mode
;
2178 /* A vector of anv_batch_bo pointers for every batch or surface buffer
2179 * referenced by this command buffer
2181 * initialized by anv_cmd_buffer_init_batch_bo_chain()
2183 struct u_vector seen_bbos
;
2185 /* A vector of int32_t's for every block of binding tables.
2187 * initialized by anv_cmd_buffer_init_batch_bo_chain()
2189 struct u_vector bt_block_states
;
2192 struct anv_reloc_list surface_relocs
;
2193 /** Last seen surface state block pool center bo offset */
2194 uint32_t last_ss_pool_center
;
2196 /* Serial for tracking buffer completion */
2199 /* Stream objects for storing temporary data */
2200 struct anv_state_stream surface_state_stream
;
2201 struct anv_state_stream dynamic_state_stream
;
2203 VkCommandBufferUsageFlags usage_flags
;
2204 VkCommandBufferLevel level
;
2206 struct anv_cmd_state state
;
2209 VkResult
anv_cmd_buffer_init_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
2210 void anv_cmd_buffer_fini_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
2211 void anv_cmd_buffer_reset_batch_bo_chain(struct anv_cmd_buffer
*cmd_buffer
);
2212 void anv_cmd_buffer_end_batch_buffer(struct anv_cmd_buffer
*cmd_buffer
);
2213 void anv_cmd_buffer_add_secondary(struct anv_cmd_buffer
*primary
,
2214 struct anv_cmd_buffer
*secondary
);
2215 void anv_cmd_buffer_prepare_execbuf(struct anv_cmd_buffer
*cmd_buffer
);
2216 VkResult
anv_cmd_buffer_execbuf(struct anv_device
*device
,
2217 struct anv_cmd_buffer
*cmd_buffer
,
2218 const VkSemaphore
*in_semaphores
,
2219 uint32_t num_in_semaphores
,
2220 const VkSemaphore
*out_semaphores
,
2221 uint32_t num_out_semaphores
,
2224 VkResult
anv_cmd_buffer_reset(struct anv_cmd_buffer
*cmd_buffer
);
2227 anv_cmd_buffer_ensure_push_constants_size(struct anv_cmd_buffer
*cmd_buffer
,
2228 gl_shader_stage stage
, uint32_t size
);
2229 #define anv_cmd_buffer_ensure_push_constant_field(cmd_buffer, stage, field) \
2230 anv_cmd_buffer_ensure_push_constants_size(cmd_buffer, stage, \
2231 (offsetof(struct anv_push_constants, field) + \
2232 sizeof(cmd_buffer->state.push_constants[0]->field)))
2234 struct anv_state
anv_cmd_buffer_emit_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
2235 const void *data
, uint32_t size
, uint32_t alignment
);
2236 struct anv_state
anv_cmd_buffer_merge_dynamic(struct anv_cmd_buffer
*cmd_buffer
,
2237 uint32_t *a
, uint32_t *b
,
2238 uint32_t dwords
, uint32_t alignment
);
2241 anv_cmd_buffer_surface_base_address(struct anv_cmd_buffer
*cmd_buffer
);
2243 anv_cmd_buffer_alloc_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
2244 uint32_t entries
, uint32_t *state_offset
);
2246 anv_cmd_buffer_alloc_surface_state(struct anv_cmd_buffer
*cmd_buffer
);
2248 anv_cmd_buffer_alloc_dynamic_state(struct anv_cmd_buffer
*cmd_buffer
,
2249 uint32_t size
, uint32_t alignment
);
2252 anv_cmd_buffer_new_binding_table_block(struct anv_cmd_buffer
*cmd_buffer
);
2254 void gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
);
2255 void gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer
*cmd_buffer
,
2256 bool depth_clamp_enable
);
2257 void gen7_cmd_buffer_emit_scissor(struct anv_cmd_buffer
*cmd_buffer
);
2259 void anv_cmd_buffer_setup_attachments(struct anv_cmd_buffer
*cmd_buffer
,
2260 struct anv_render_pass
*pass
,
2261 struct anv_framebuffer
*framebuffer
,
2262 const VkClearValue
*clear_values
);
2264 void anv_cmd_buffer_emit_state_base_address(struct anv_cmd_buffer
*cmd_buffer
);
2267 anv_cmd_buffer_push_constants(struct anv_cmd_buffer
*cmd_buffer
,
2268 gl_shader_stage stage
);
2270 anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer
*cmd_buffer
);
2272 const struct anv_image_view
*
2273 anv_cmd_buffer_get_depth_stencil_view(const struct anv_cmd_buffer
*cmd_buffer
);
2276 anv_cmd_buffer_alloc_blorp_binding_table(struct anv_cmd_buffer
*cmd_buffer
,
2277 uint32_t num_entries
,
2278 uint32_t *state_offset
,
2279 struct anv_state
*bt_state
);
2281 void anv_cmd_buffer_dump(struct anv_cmd_buffer
*cmd_buffer
);
2283 enum anv_fence_type
{
2284 ANV_FENCE_TYPE_NONE
= 0,
2286 ANV_FENCE_TYPE_SYNCOBJ
,
2290 enum anv_bo_fence_state
{
2291 /** Indicates that this is a new (or newly reset fence) */
2292 ANV_BO_FENCE_STATE_RESET
,
2294 /** Indicates that this fence has been submitted to the GPU but is still
2295 * (as far as we know) in use by the GPU.
2297 ANV_BO_FENCE_STATE_SUBMITTED
,
2299 ANV_BO_FENCE_STATE_SIGNALED
,
2302 struct anv_fence_impl
{
2303 enum anv_fence_type type
;
2306 /** Fence implementation for BO fences
2308 * These fences use a BO and a set of CPU-tracked state flags. The BO
2309 * is added to the object list of the last execbuf call in a QueueSubmit
2310 * and is marked EXEC_WRITE. The state flags track when the BO has been
2311 * submitted to the kernel. We need to do this because Vulkan lets you
2312 * wait on a fence that has not yet been submitted and I915_GEM_BUSY
2313 * will say it's idle in this case.
2317 enum anv_bo_fence_state state
;
2320 /** DRM syncobj handle for syncobj-based fences */
2324 struct wsi_fence
*fence_wsi
;
2329 /* Permanent fence state. Every fence has some form of permanent state
2330 * (type != ANV_SEMAPHORE_TYPE_NONE). This may be a BO to fence on (for
2331 * cross-process fences) or it could just be a dummy for use internally.
2333 struct anv_fence_impl permanent
;
2335 /* Temporary fence state. A fence *may* have temporary state. That state
2336 * is added to the fence by an import operation and is reset back to
2337 * ANV_SEMAPHORE_TYPE_NONE when the fence is reset. A fence with temporary
2338 * state cannot be signaled because the fence must already be signaled
2339 * before the temporary state can be exported from the fence in the other
2340 * process and imported here.
2342 struct anv_fence_impl temporary
;
2347 struct anv_state state
;
2350 enum anv_semaphore_type
{
2351 ANV_SEMAPHORE_TYPE_NONE
= 0,
2352 ANV_SEMAPHORE_TYPE_DUMMY
,
2353 ANV_SEMAPHORE_TYPE_BO
,
2354 ANV_SEMAPHORE_TYPE_SYNC_FILE
,
2355 ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ
,
2358 struct anv_semaphore_impl
{
2359 enum anv_semaphore_type type
;
2362 /* A BO representing this semaphore when type == ANV_SEMAPHORE_TYPE_BO.
2363 * This BO will be added to the object list on any execbuf2 calls for
2364 * which this semaphore is used as a wait or signal fence. When used as
2365 * a signal fence, the EXEC_OBJECT_WRITE flag will be set.
2369 /* The sync file descriptor when type == ANV_SEMAPHORE_TYPE_SYNC_FILE.
2370 * If the semaphore is in the unsignaled state due to either just being
2371 * created or because it has been used for a wait, fd will be -1.
2375 /* Sync object handle when type == ANV_SEMAPHORE_TYPE_DRM_SYNCOBJ.
2376 * Unlike GEM BOs, DRM sync objects aren't deduplicated by the kernel on
2377 * import so we don't need to bother with a userspace cache.
2383 struct anv_semaphore
{
2384 /* Permanent semaphore state. Every semaphore has some form of permanent
2385 * state (type != ANV_SEMAPHORE_TYPE_NONE). This may be a BO to fence on
2386 * (for cross-process semaphores0 or it could just be a dummy for use
2389 struct anv_semaphore_impl permanent
;
2391 /* Temporary semaphore state. A semaphore *may* have temporary state.
2392 * That state is added to the semaphore by an import operation and is reset
2393 * back to ANV_SEMAPHORE_TYPE_NONE when the semaphore is waited on. A
2394 * semaphore with temporary state cannot be signaled because the semaphore
2395 * must already be signaled before the temporary state can be exported from
2396 * the semaphore in the other process and imported here.
2398 struct anv_semaphore_impl temporary
;
2401 void anv_semaphore_reset_temporary(struct anv_device
*device
,
2402 struct anv_semaphore
*semaphore
);
2404 struct anv_shader_module
{
2405 unsigned char sha1
[20];
2410 static inline gl_shader_stage
2411 vk_to_mesa_shader_stage(VkShaderStageFlagBits vk_stage
)
2413 assert(__builtin_popcount(vk_stage
) == 1);
2414 return ffs(vk_stage
) - 1;
2417 static inline VkShaderStageFlagBits
2418 mesa_to_vk_shader_stage(gl_shader_stage mesa_stage
)
2420 return (1 << mesa_stage
);
2423 #define ANV_STAGE_MASK ((1 << MESA_SHADER_STAGES) - 1)
2425 #define anv_foreach_stage(stage, stage_bits) \
2426 for (gl_shader_stage stage, \
2427 __tmp = (gl_shader_stage)((stage_bits) & ANV_STAGE_MASK); \
2428 stage = __builtin_ffs(__tmp) - 1, __tmp; \
2429 __tmp &= ~(1 << (stage)))
2431 struct anv_pipeline_bind_map
{
2432 uint32_t surface_count
;
2433 uint32_t sampler_count
;
2434 uint32_t image_count
;
2436 struct anv_pipeline_binding
* surface_to_descriptor
;
2437 struct anv_pipeline_binding
* sampler_to_descriptor
;
2440 struct anv_shader_bin_key
{
2445 struct anv_shader_bin
{
2448 const struct anv_shader_bin_key
*key
;
2450 struct anv_state kernel
;
2451 uint32_t kernel_size
;
2453 struct anv_state constant_data
;
2454 uint32_t constant_data_size
;
2456 const struct brw_stage_prog_data
*prog_data
;
2457 uint32_t prog_data_size
;
2459 struct anv_pipeline_bind_map bind_map
;
2462 struct anv_shader_bin
*
2463 anv_shader_bin_create(struct anv_device
*device
,
2464 const void *key
, uint32_t key_size
,
2465 const void *kernel
, uint32_t kernel_size
,
2466 const void *constant_data
, uint32_t constant_data_size
,
2467 const struct brw_stage_prog_data
*prog_data
,
2468 uint32_t prog_data_size
, const void *prog_data_param
,
2469 const struct anv_pipeline_bind_map
*bind_map
);
2472 anv_shader_bin_destroy(struct anv_device
*device
, struct anv_shader_bin
*shader
);
2475 anv_shader_bin_ref(struct anv_shader_bin
*shader
)
2477 assert(shader
&& shader
->ref_cnt
>= 1);
2478 p_atomic_inc(&shader
->ref_cnt
);
2482 anv_shader_bin_unref(struct anv_device
*device
, struct anv_shader_bin
*shader
)
2484 assert(shader
&& shader
->ref_cnt
>= 1);
2485 if (p_atomic_dec_zero(&shader
->ref_cnt
))
2486 anv_shader_bin_destroy(device
, shader
);
2489 struct anv_pipeline
{
2490 struct anv_device
* device
;
2491 struct anv_batch batch
;
2492 uint32_t batch_data
[512];
2493 struct anv_reloc_list batch_relocs
;
2494 uint32_t dynamic_state_mask
;
2495 struct anv_dynamic_state dynamic_state
;
2497 struct anv_subpass
* subpass
;
2499 bool needs_data_cache
;
2501 struct anv_shader_bin
* shaders
[MESA_SHADER_STAGES
];
2504 const struct gen_l3_config
* l3_config
;
2505 uint32_t total_size
;
2508 VkShaderStageFlags active_stages
;
2509 struct anv_state blend_state
;
2512 struct anv_pipeline_vertex_binding
{
2515 uint32_t instance_divisor
;
2518 bool primitive_restart
;
2521 uint32_t cs_right_mask
;
2524 bool depth_test_enable
;
2525 bool writes_stencil
;
2526 bool stencil_test_enable
;
2527 bool depth_clamp_enable
;
2528 bool sample_shading_enable
;
2533 uint32_t depth_stencil_state
[3];
2539 uint32_t wm_depth_stencil
[3];
2543 uint32_t wm_depth_stencil
[4];
2546 uint32_t interface_descriptor_data
[8];
2550 anv_pipeline_has_stage(const struct anv_pipeline
*pipeline
,
2551 gl_shader_stage stage
)
2553 return (pipeline
->active_stages
& mesa_to_vk_shader_stage(stage
)) != 0;
2556 #define ANV_DECL_GET_PROG_DATA_FUNC(prefix, stage) \
2557 static inline const struct brw_##prefix##_prog_data * \
2558 get_##prefix##_prog_data(const struct anv_pipeline *pipeline) \
2560 if (anv_pipeline_has_stage(pipeline, stage)) { \
2561 return (const struct brw_##prefix##_prog_data *) \
2562 pipeline->shaders[stage]->prog_data; \
2568 ANV_DECL_GET_PROG_DATA_FUNC(vs
, MESA_SHADER_VERTEX
)
2569 ANV_DECL_GET_PROG_DATA_FUNC(tcs
, MESA_SHADER_TESS_CTRL
)
2570 ANV_DECL_GET_PROG_DATA_FUNC(tes
, MESA_SHADER_TESS_EVAL
)
2571 ANV_DECL_GET_PROG_DATA_FUNC(gs
, MESA_SHADER_GEOMETRY
)
2572 ANV_DECL_GET_PROG_DATA_FUNC(wm
, MESA_SHADER_FRAGMENT
)
2573 ANV_DECL_GET_PROG_DATA_FUNC(cs
, MESA_SHADER_COMPUTE
)
2575 static inline const struct brw_vue_prog_data
*
2576 anv_pipeline_get_last_vue_prog_data(const struct anv_pipeline
*pipeline
)
2578 if (anv_pipeline_has_stage(pipeline
, MESA_SHADER_GEOMETRY
))
2579 return &get_gs_prog_data(pipeline
)->base
;
2580 else if (anv_pipeline_has_stage(pipeline
, MESA_SHADER_TESS_EVAL
))
2581 return &get_tes_prog_data(pipeline
)->base
;
2583 return &get_vs_prog_data(pipeline
)->base
;
2587 anv_pipeline_init(struct anv_pipeline
*pipeline
, struct anv_device
*device
,
2588 struct anv_pipeline_cache
*cache
,
2589 const VkGraphicsPipelineCreateInfo
*pCreateInfo
,
2590 const VkAllocationCallbacks
*alloc
);
2593 anv_pipeline_compile_cs(struct anv_pipeline
*pipeline
,
2594 struct anv_pipeline_cache
*cache
,
2595 const VkComputePipelineCreateInfo
*info
,
2596 const struct anv_shader_module
*module
,
2597 const char *entrypoint
,
2598 const VkSpecializationInfo
*spec_info
);
2600 struct anv_format_plane
{
2601 enum isl_format isl_format
:16;
2602 struct isl_swizzle swizzle
;
2604 /* Whether this plane contains chroma channels */
2607 /* For downscaling of YUV planes */
2608 uint8_t denominator_scales
[2];
2610 /* How to map sampled ycbcr planes to a single 4 component element. */
2611 struct isl_swizzle ycbcr_swizzle
;
2613 /* What aspect is associated to this plane */
2614 VkImageAspectFlags aspect
;
2619 struct anv_format_plane planes
[3];
2625 static inline uint32_t
2626 anv_image_aspect_to_plane(VkImageAspectFlags image_aspects
,
2627 VkImageAspectFlags aspect_mask
)
2629 switch (aspect_mask
) {
2630 case VK_IMAGE_ASPECT_COLOR_BIT
:
2631 case VK_IMAGE_ASPECT_DEPTH_BIT
:
2632 case VK_IMAGE_ASPECT_PLANE_0_BIT
:
2634 case VK_IMAGE_ASPECT_STENCIL_BIT
:
2635 if ((image_aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
) == 0)
2638 case VK_IMAGE_ASPECT_PLANE_1_BIT
:
2640 case VK_IMAGE_ASPECT_PLANE_2_BIT
:
2643 /* Purposefully assert with depth/stencil aspects. */
2644 unreachable("invalid image aspect");
2648 static inline VkImageAspectFlags
2649 anv_plane_to_aspect(VkImageAspectFlags image_aspects
,
2652 if (image_aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) {
2653 if (util_bitcount(image_aspects
) > 1)
2654 return VK_IMAGE_ASPECT_PLANE_0_BIT
<< plane
;
2655 return VK_IMAGE_ASPECT_COLOR_BIT
;
2657 if (image_aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
)
2658 return VK_IMAGE_ASPECT_DEPTH_BIT
<< plane
;
2659 assert(image_aspects
== VK_IMAGE_ASPECT_STENCIL_BIT
);
2660 return VK_IMAGE_ASPECT_STENCIL_BIT
;
2663 #define anv_foreach_image_aspect_bit(b, image, aspects) \
2664 for_each_bit(b, anv_image_expand_aspects(image, aspects))
2666 const struct anv_format
*
2667 anv_get_format(VkFormat format
);
2669 static inline uint32_t
2670 anv_get_format_planes(VkFormat vk_format
)
2672 const struct anv_format
*format
= anv_get_format(vk_format
);
2674 return format
!= NULL
? format
->n_planes
: 0;
2677 struct anv_format_plane
2678 anv_get_format_plane(const struct gen_device_info
*devinfo
, VkFormat vk_format
,
2679 VkImageAspectFlagBits aspect
, VkImageTiling tiling
);
2681 static inline enum isl_format
2682 anv_get_isl_format(const struct gen_device_info
*devinfo
, VkFormat vk_format
,
2683 VkImageAspectFlags aspect
, VkImageTiling tiling
)
2685 return anv_get_format_plane(devinfo
, vk_format
, aspect
, tiling
).isl_format
;
2688 static inline struct isl_swizzle
2689 anv_swizzle_for_render(struct isl_swizzle swizzle
)
2691 /* Sometimes the swizzle will have alpha map to one. We do this to fake
2692 * RGB as RGBA for texturing
2694 assert(swizzle
.a
== ISL_CHANNEL_SELECT_ONE
||
2695 swizzle
.a
== ISL_CHANNEL_SELECT_ALPHA
);
2697 /* But it doesn't matter what we render to that channel */
2698 swizzle
.a
= ISL_CHANNEL_SELECT_ALPHA
;
2704 anv_pipeline_setup_l3_config(struct anv_pipeline
*pipeline
, bool needs_slm
);
2707 * Subsurface of an anv_image.
2709 struct anv_surface
{
2710 /** Valid only if isl_surf::size_B > 0. */
2711 struct isl_surf isl
;
2714 * Offset from VkImage's base address, as bound by vkBindImageMemory().
2721 /* The original VkFormat provided by the client. This may not match any
2722 * of the actual surface formats.
2725 const struct anv_format
*format
;
2727 VkImageAspectFlags aspects
;
2730 uint32_t array_size
;
2731 uint32_t samples
; /**< VkImageCreateInfo::samples */
2733 VkImageUsageFlags usage
; /**< Superset of VkImageCreateInfo::usage. */
2734 VkImageCreateFlags create_flags
; /* Flags used when creating image. */
2735 VkImageTiling tiling
; /** VkImageCreateInfo::tiling */
2737 /** True if this is needs to be bound to an appropriately tiled BO.
2739 * When not using modifiers, consumers such as X11, Wayland, and KMS need
2740 * the tiling passed via I915_GEM_SET_TILING. When exporting these buffers
2741 * we require a dedicated allocation so that we can know to allocate a
2744 bool needs_set_tiling
;
2747 * Must be DRM_FORMAT_MOD_INVALID unless tiling is
2748 * VK_IMAGE_TILING_DRM_FORMAT_MODIFIER_EXT.
2750 uint64_t drm_format_mod
;
2755 /* Whether the image is made of several underlying buffer objects rather a
2756 * single one with different offsets.
2760 /* All the formats that can be used when creating views of this image
2761 * are CCS_E compatible.
2763 bool ccs_e_compatible
;
2765 /* Image was created with external format. */
2766 bool external_format
;
2771 * For each foo, anv_image::planes[x].surface is valid if and only if
2772 * anv_image::aspects has a x aspect. Refer to anv_image_aspect_to_plane()
2773 * to figure the number associated with a given aspect.
2775 * The hardware requires that the depth buffer and stencil buffer be
2776 * separate surfaces. From Vulkan's perspective, though, depth and stencil
2777 * reside in the same VkImage. To satisfy both the hardware and Vulkan, we
2778 * allocate the depth and stencil buffers as separate surfaces in the same
2783 * -----------------------
2785 * ----------------------- |
2786 * | shadow surface0 | |
2787 * ----------------------- | Plane 0
2788 * | aux surface0 | |
2789 * ----------------------- |
2790 * | fast clear colors0 | \|/
2791 * -----------------------
2793 * ----------------------- |
2794 * | shadow surface1 | |
2795 * ----------------------- | Plane 1
2796 * | aux surface1 | |
2797 * ----------------------- |
2798 * | fast clear colors1 | \|/
2799 * -----------------------
2802 * -----------------------
2806 * Offset of the entire plane (whenever the image is disjoint this is
2814 struct anv_surface surface
;
2817 * A surface which shadows the main surface and may have different
2818 * tiling. This is used for sampling using a tiling that isn't supported
2819 * for other operations.
2821 struct anv_surface shadow_surface
;
2824 * For color images, this is the aux usage for this image when not used
2825 * as a color attachment.
2827 * For depth/stencil images, this is set to ISL_AUX_USAGE_HIZ if the
2828 * image has a HiZ buffer.
2830 enum isl_aux_usage aux_usage
;
2832 struct anv_surface aux_surface
;
2835 * Offset of the fast clear state (used to compute the
2836 * fast_clear_state_offset of the following planes).
2838 uint32_t fast_clear_state_offset
;
2841 * BO associated with this plane, set when bound.
2843 struct anv_address address
;
2846 * When destroying the image, also free the bo.
2852 /* The ordering of this enum is important */
2853 enum anv_fast_clear_type
{
2854 /** Image does not have/support any fast-clear blocks */
2855 ANV_FAST_CLEAR_NONE
= 0,
2856 /** Image has/supports fast-clear but only to the default value */
2857 ANV_FAST_CLEAR_DEFAULT_VALUE
= 1,
2858 /** Image has/supports fast-clear with an arbitrary fast-clear value */
2859 ANV_FAST_CLEAR_ANY
= 2,
2862 /* Returns the number of auxiliary buffer levels attached to an image. */
2863 static inline uint8_t
2864 anv_image_aux_levels(const struct anv_image
* const image
,
2865 VkImageAspectFlagBits aspect
)
2867 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2868 return image
->planes
[plane
].aux_surface
.isl
.size_B
> 0 ?
2869 image
->planes
[plane
].aux_surface
.isl
.levels
: 0;
2872 /* Returns the number of auxiliary buffer layers attached to an image. */
2873 static inline uint32_t
2874 anv_image_aux_layers(const struct anv_image
* const image
,
2875 VkImageAspectFlagBits aspect
,
2876 const uint8_t miplevel
)
2880 /* The miplevel must exist in the main buffer. */
2881 assert(miplevel
< image
->levels
);
2883 if (miplevel
>= anv_image_aux_levels(image
, aspect
)) {
2884 /* There are no layers with auxiliary data because the miplevel has no
2889 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2890 return MAX2(image
->planes
[plane
].aux_surface
.isl
.logical_level0_px
.array_len
,
2891 image
->planes
[plane
].aux_surface
.isl
.logical_level0_px
.depth
>> miplevel
);
2895 static inline struct anv_address
2896 anv_image_get_clear_color_addr(const struct anv_device
*device
,
2897 const struct anv_image
*image
,
2898 VkImageAspectFlagBits aspect
)
2900 assert(image
->aspects
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
);
2902 uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2903 return anv_address_add(image
->planes
[plane
].address
,
2904 image
->planes
[plane
].fast_clear_state_offset
);
2907 static inline struct anv_address
2908 anv_image_get_fast_clear_type_addr(const struct anv_device
*device
,
2909 const struct anv_image
*image
,
2910 VkImageAspectFlagBits aspect
)
2912 struct anv_address addr
=
2913 anv_image_get_clear_color_addr(device
, image
, aspect
);
2915 const unsigned clear_color_state_size
= device
->info
.gen
>= 10 ?
2916 device
->isl_dev
.ss
.clear_color_state_size
:
2917 device
->isl_dev
.ss
.clear_value_size
;
2918 return anv_address_add(addr
, clear_color_state_size
);
2921 static inline struct anv_address
2922 anv_image_get_compression_state_addr(const struct anv_device
*device
,
2923 const struct anv_image
*image
,
2924 VkImageAspectFlagBits aspect
,
2925 uint32_t level
, uint32_t array_layer
)
2927 assert(level
< anv_image_aux_levels(image
, aspect
));
2928 assert(array_layer
< anv_image_aux_layers(image
, aspect
, level
));
2929 UNUSED
uint32_t plane
= anv_image_aspect_to_plane(image
->aspects
, aspect
);
2930 assert(image
->planes
[plane
].aux_usage
== ISL_AUX_USAGE_CCS_E
);
2932 struct anv_address addr
=
2933 anv_image_get_fast_clear_type_addr(device
, image
, aspect
);
2934 addr
.offset
+= 4; /* Go past the fast clear type */
2936 if (image
->type
== VK_IMAGE_TYPE_3D
) {
2937 for (uint32_t l
= 0; l
< level
; l
++)
2938 addr
.offset
+= anv_minify(image
->extent
.depth
, l
) * 4;
2940 addr
.offset
+= level
* image
->array_size
* 4;
2942 addr
.offset
+= array_layer
* 4;
2947 /* Returns true if a HiZ-enabled depth buffer can be sampled from. */
2949 anv_can_sample_with_hiz(const struct gen_device_info
* const devinfo
,
2950 const struct anv_image
*image
)
2952 if (!(image
->aspects
& VK_IMAGE_ASPECT_DEPTH_BIT
))
2955 if (devinfo
->gen
< 8)
2958 return image
->samples
== 1;
2962 anv_cmd_buffer_mark_image_written(struct anv_cmd_buffer
*cmd_buffer
,
2963 const struct anv_image
*image
,
2964 VkImageAspectFlagBits aspect
,
2965 enum isl_aux_usage aux_usage
,
2967 uint32_t base_layer
,
2968 uint32_t layer_count
);
2971 anv_image_clear_color(struct anv_cmd_buffer
*cmd_buffer
,
2972 const struct anv_image
*image
,
2973 VkImageAspectFlagBits aspect
,
2974 enum isl_aux_usage aux_usage
,
2975 enum isl_format format
, struct isl_swizzle swizzle
,
2976 uint32_t level
, uint32_t base_layer
, uint32_t layer_count
,
2977 VkRect2D area
, union isl_color_value clear_color
);
2979 anv_image_clear_depth_stencil(struct anv_cmd_buffer
*cmd_buffer
,
2980 const struct anv_image
*image
,
2981 VkImageAspectFlags aspects
,
2982 enum isl_aux_usage depth_aux_usage
,
2984 uint32_t base_layer
, uint32_t layer_count
,
2986 float depth_value
, uint8_t stencil_value
);
2988 anv_image_msaa_resolve(struct anv_cmd_buffer
*cmd_buffer
,
2989 const struct anv_image
*src_image
,
2990 enum isl_aux_usage src_aux_usage
,
2991 uint32_t src_level
, uint32_t src_base_layer
,
2992 const struct anv_image
*dst_image
,
2993 enum isl_aux_usage dst_aux_usage
,
2994 uint32_t dst_level
, uint32_t dst_base_layer
,
2995 VkImageAspectFlagBits aspect
,
2996 uint32_t src_x
, uint32_t src_y
,
2997 uint32_t dst_x
, uint32_t dst_y
,
2998 uint32_t width
, uint32_t height
,
2999 uint32_t layer_count
,
3000 enum blorp_filter filter
);
3002 anv_image_hiz_op(struct anv_cmd_buffer
*cmd_buffer
,
3003 const struct anv_image
*image
,
3004 VkImageAspectFlagBits aspect
, uint32_t level
,
3005 uint32_t base_layer
, uint32_t layer_count
,
3006 enum isl_aux_op hiz_op
);
3008 anv_image_hiz_clear(struct anv_cmd_buffer
*cmd_buffer
,
3009 const struct anv_image
*image
,
3010 VkImageAspectFlags aspects
,
3012 uint32_t base_layer
, uint32_t layer_count
,
3013 VkRect2D area
, uint8_t stencil_value
);
3015 anv_image_mcs_op(struct anv_cmd_buffer
*cmd_buffer
,
3016 const struct anv_image
*image
,
3017 enum isl_format format
,
3018 VkImageAspectFlagBits aspect
,
3019 uint32_t base_layer
, uint32_t layer_count
,
3020 enum isl_aux_op mcs_op
, union isl_color_value
*clear_value
,
3023 anv_image_ccs_op(struct anv_cmd_buffer
*cmd_buffer
,
3024 const struct anv_image
*image
,
3025 enum isl_format format
,
3026 VkImageAspectFlagBits aspect
, uint32_t level
,
3027 uint32_t base_layer
, uint32_t layer_count
,
3028 enum isl_aux_op ccs_op
, union isl_color_value
*clear_value
,
3032 anv_image_copy_to_shadow(struct anv_cmd_buffer
*cmd_buffer
,
3033 const struct anv_image
*image
,
3034 uint32_t base_level
, uint32_t level_count
,
3035 uint32_t base_layer
, uint32_t layer_count
);
3038 anv_layout_to_aux_usage(const struct gen_device_info
* const devinfo
,
3039 const struct anv_image
*image
,
3040 const VkImageAspectFlagBits aspect
,
3041 const VkImageLayout layout
);
3043 enum anv_fast_clear_type
3044 anv_layout_to_fast_clear_type(const struct gen_device_info
* const devinfo
,
3045 const struct anv_image
* const image
,
3046 const VkImageAspectFlagBits aspect
,
3047 const VkImageLayout layout
);
3049 /* This is defined as a macro so that it works for both
3050 * VkImageSubresourceRange and VkImageSubresourceLayers
3052 #define anv_get_layerCount(_image, _range) \
3053 ((_range)->layerCount == VK_REMAINING_ARRAY_LAYERS ? \
3054 (_image)->array_size - (_range)->baseArrayLayer : (_range)->layerCount)
3056 static inline uint32_t
3057 anv_get_levelCount(const struct anv_image
*image
,
3058 const VkImageSubresourceRange
*range
)
3060 return range
->levelCount
== VK_REMAINING_MIP_LEVELS
?
3061 image
->levels
- range
->baseMipLevel
: range
->levelCount
;
3064 static inline VkImageAspectFlags
3065 anv_image_expand_aspects(const struct anv_image
*image
,
3066 VkImageAspectFlags aspects
)
3068 /* If the underlying image has color plane aspects and
3069 * VK_IMAGE_ASPECT_COLOR_BIT has been requested, then return the aspects of
3070 * the underlying image. */
3071 if ((image
->aspects
& VK_IMAGE_ASPECT_PLANES_BITS_ANV
) != 0 &&
3072 aspects
== VK_IMAGE_ASPECT_COLOR_BIT
)
3073 return image
->aspects
;
3079 anv_image_aspects_compatible(VkImageAspectFlags aspects1
,
3080 VkImageAspectFlags aspects2
)
3082 if (aspects1
== aspects2
)
3085 /* Only 1 color aspects are compatibles. */
3086 if ((aspects1
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) != 0 &&
3087 (aspects2
& VK_IMAGE_ASPECT_ANY_COLOR_BIT_ANV
) != 0 &&
3088 util_bitcount(aspects1
) == util_bitcount(aspects2
))
3094 struct anv_image_view
{
3095 const struct anv_image
*image
; /**< VkImageViewCreateInfo::image */
3097 VkImageAspectFlags aspect_mask
;
3099 VkExtent3D extent
; /**< Extent of VkImageViewCreateInfo::baseMipLevel. */
3103 uint32_t image_plane
;
3105 struct isl_view isl
;
3108 * RENDER_SURFACE_STATE when using image as a sampler surface with an
3109 * image layout of SHADER_READ_ONLY_OPTIMAL or
3110 * DEPTH_STENCIL_READ_ONLY_OPTIMAL.
3112 struct anv_surface_state optimal_sampler_surface_state
;
3115 * RENDER_SURFACE_STATE when using image as a sampler surface with an
3116 * image layout of GENERAL.
3118 struct anv_surface_state general_sampler_surface_state
;
3121 * RENDER_SURFACE_STATE when using image as a storage image. Separate
3122 * states for write-only and readable, using the real format for
3123 * write-only and the lowered format for readable.
3125 struct anv_surface_state storage_surface_state
;
3126 struct anv_surface_state writeonly_storage_surface_state
;
3128 struct brw_image_param storage_image_param
;
3132 enum anv_image_view_state_flags
{
3133 ANV_IMAGE_VIEW_STATE_STORAGE_WRITE_ONLY
= (1 << 0),
3134 ANV_IMAGE_VIEW_STATE_TEXTURE_OPTIMAL
= (1 << 1),
3137 void anv_image_fill_surface_state(struct anv_device
*device
,
3138 const struct anv_image
*image
,
3139 VkImageAspectFlagBits aspect
,
3140 const struct isl_view
*view
,
3141 isl_surf_usage_flags_t view_usage
,
3142 enum isl_aux_usage aux_usage
,
3143 const union isl_color_value
*clear_color
,
3144 enum anv_image_view_state_flags flags
,
3145 struct anv_surface_state
*state_inout
,
3146 struct brw_image_param
*image_param_out
);
3148 struct anv_image_create_info
{
3149 const VkImageCreateInfo
*vk_info
;
3151 /** An opt-in bitmask which filters an ISL-mapping of the Vulkan tiling. */
3152 isl_tiling_flags_t isl_tiling_flags
;
3154 /** These flags will be added to any derived from VkImageCreateInfo. */
3155 isl_surf_usage_flags_t isl_extra_usage_flags
;
3158 bool external_format
;
3161 VkResult
anv_image_create(VkDevice _device
,
3162 const struct anv_image_create_info
*info
,
3163 const VkAllocationCallbacks
* alloc
,
3166 const struct anv_surface
*
3167 anv_image_get_surface_for_aspect_mask(const struct anv_image
*image
,
3168 VkImageAspectFlags aspect_mask
);
3171 anv_isl_format_for_descriptor_type(VkDescriptorType type
);
3173 static inline struct VkExtent3D
3174 anv_sanitize_image_extent(const VkImageType imageType
,
3175 const struct VkExtent3D imageExtent
)
3177 switch (imageType
) {
3178 case VK_IMAGE_TYPE_1D
:
3179 return (VkExtent3D
) { imageExtent
.width
, 1, 1 };
3180 case VK_IMAGE_TYPE_2D
:
3181 return (VkExtent3D
) { imageExtent
.width
, imageExtent
.height
, 1 };
3182 case VK_IMAGE_TYPE_3D
:
3185 unreachable("invalid image type");
3189 static inline struct VkOffset3D
3190 anv_sanitize_image_offset(const VkImageType imageType
,
3191 const struct VkOffset3D imageOffset
)
3193 switch (imageType
) {
3194 case VK_IMAGE_TYPE_1D
:
3195 return (VkOffset3D
) { imageOffset
.x
, 0, 0 };
3196 case VK_IMAGE_TYPE_2D
:
3197 return (VkOffset3D
) { imageOffset
.x
, imageOffset
.y
, 0 };
3198 case VK_IMAGE_TYPE_3D
:
3201 unreachable("invalid image type");
3205 VkFormatFeatureFlags
3206 anv_get_image_format_features(const struct gen_device_info
*devinfo
,
3208 const struct anv_format
*anv_format
,
3209 VkImageTiling vk_tiling
);
3211 void anv_fill_buffer_surface_state(struct anv_device
*device
,
3212 struct anv_state state
,
3213 enum isl_format format
,
3214 struct anv_address address
,
3215 uint32_t range
, uint32_t stride
);
3218 anv_clear_color_from_att_state(union isl_color_value
*clear_color
,
3219 const struct anv_attachment_state
*att_state
,
3220 const struct anv_image_view
*iview
)
3222 const struct isl_format_layout
*view_fmtl
=
3223 isl_format_get_layout(iview
->planes
[0].isl
.format
);
3225 #define COPY_CLEAR_COLOR_CHANNEL(c, i) \
3226 if (view_fmtl->channels.c.bits) \
3227 clear_color->u32[i] = att_state->clear_value.color.uint32[i]
3229 COPY_CLEAR_COLOR_CHANNEL(r
, 0);
3230 COPY_CLEAR_COLOR_CHANNEL(g
, 1);
3231 COPY_CLEAR_COLOR_CHANNEL(b
, 2);
3232 COPY_CLEAR_COLOR_CHANNEL(a
, 3);
3234 #undef COPY_CLEAR_COLOR_CHANNEL
3238 struct anv_ycbcr_conversion
{
3239 const struct anv_format
* format
;
3240 VkSamplerYcbcrModelConversion ycbcr_model
;
3241 VkSamplerYcbcrRange ycbcr_range
;
3242 VkComponentSwizzle mapping
[4];
3243 VkChromaLocation chroma_offsets
[2];
3244 VkFilter chroma_filter
;
3245 bool chroma_reconstruction
;
3248 struct anv_sampler
{
3249 uint32_t state
[3][4];
3251 struct anv_ycbcr_conversion
*conversion
;
3254 struct anv_framebuffer
{
3259 uint32_t attachment_count
;
3260 struct anv_image_view
* attachments
[0];
3263 struct anv_subpass_attachment
{
3264 VkImageUsageFlagBits usage
;
3265 uint32_t attachment
;
3266 VkImageLayout layout
;
3269 struct anv_subpass
{
3270 uint32_t attachment_count
;
3273 * A pointer to all attachment references used in this subpass.
3274 * Only valid if ::attachment_count > 0.
3276 struct anv_subpass_attachment
* attachments
;
3277 uint32_t input_count
;
3278 struct anv_subpass_attachment
* input_attachments
;
3279 uint32_t color_count
;
3280 struct anv_subpass_attachment
* color_attachments
;
3281 struct anv_subpass_attachment
* resolve_attachments
;
3283 struct anv_subpass_attachment
* depth_stencil_attachment
;
3284 struct anv_subpass_attachment
* ds_resolve_attachment
;
3285 VkResolveModeFlagBitsKHR depth_resolve_mode
;
3286 VkResolveModeFlagBitsKHR stencil_resolve_mode
;
3290 /** Subpass has a depth/stencil self-dependency */
3291 bool has_ds_self_dep
;
3293 /** Subpass has at least one color resolve attachment */
3294 bool has_color_resolve
;
3297 static inline unsigned
3298 anv_subpass_view_count(const struct anv_subpass
*subpass
)
3300 return MAX2(1, util_bitcount(subpass
->view_mask
));
3303 struct anv_render_pass_attachment
{
3304 /* TODO: Consider using VkAttachmentDescription instead of storing each of
3305 * its members individually.
3309 VkImageUsageFlags usage
;
3310 VkAttachmentLoadOp load_op
;
3311 VkAttachmentStoreOp store_op
;
3312 VkAttachmentLoadOp stencil_load_op
;
3313 VkImageLayout initial_layout
;
3314 VkImageLayout final_layout
;
3315 VkImageLayout first_subpass_layout
;
3317 /* The subpass id in which the attachment will be used last. */
3318 uint32_t last_subpass_idx
;
3321 struct anv_render_pass
{
3322 uint32_t attachment_count
;
3323 uint32_t subpass_count
;
3324 /* An array of subpass_count+1 flushes, one per subpass boundary */
3325 enum anv_pipe_bits
* subpass_flushes
;
3326 struct anv_render_pass_attachment
* attachments
;
3327 struct anv_subpass subpasses
[0];
3330 #define ANV_PIPELINE_STATISTICS_MASK 0x000007ff
3332 struct anv_query_pool
{
3334 VkQueryPipelineStatisticFlags pipeline_statistics
;
3335 /** Stride between slots, in bytes */
3337 /** Number of slots in this query pool */
3342 int anv_get_instance_entrypoint_index(const char *name
);
3343 int anv_get_device_entrypoint_index(const char *name
);
3346 anv_instance_entrypoint_is_enabled(int index
, uint32_t core_version
,
3347 const struct anv_instance_extension_table
*instance
);
3350 anv_device_entrypoint_is_enabled(int index
, uint32_t core_version
,
3351 const struct anv_instance_extension_table
*instance
,
3352 const struct anv_device_extension_table
*device
);
3354 void *anv_lookup_entrypoint(const struct gen_device_info
*devinfo
,
3357 void anv_dump_image_to_ppm(struct anv_device
*device
,
3358 struct anv_image
*image
, unsigned miplevel
,
3359 unsigned array_layer
, VkImageAspectFlagBits aspect
,
3360 const char *filename
);
3362 enum anv_dump_action
{
3363 ANV_DUMP_FRAMEBUFFERS_BIT
= 0x1,
3366 void anv_dump_start(struct anv_device
*device
, enum anv_dump_action actions
);
3367 void anv_dump_finish(void);
3369 void anv_dump_add_framebuffer(struct anv_cmd_buffer
*cmd_buffer
,
3370 struct anv_framebuffer
*fb
);
3372 static inline uint32_t
3373 anv_get_subpass_id(const struct anv_cmd_state
* const cmd_state
)
3375 /* This function must be called from within a subpass. */
3376 assert(cmd_state
->pass
&& cmd_state
->subpass
);
3378 const uint32_t subpass_id
= cmd_state
->subpass
- cmd_state
->pass
->subpasses
;
3380 /* The id of this subpass shouldn't exceed the number of subpasses in this
3381 * render pass minus 1.
3383 assert(subpass_id
< cmd_state
->pass
->subpass_count
);
3387 #define ANV_DEFINE_HANDLE_CASTS(__anv_type, __VkType) \
3389 static inline struct __anv_type * \
3390 __anv_type ## _from_handle(__VkType _handle) \
3392 return (struct __anv_type *) _handle; \
3395 static inline __VkType \
3396 __anv_type ## _to_handle(struct __anv_type *_obj) \
3398 return (__VkType) _obj; \
3401 #define ANV_DEFINE_NONDISP_HANDLE_CASTS(__anv_type, __VkType) \
3403 static inline struct __anv_type * \
3404 __anv_type ## _from_handle(__VkType _handle) \
3406 return (struct __anv_type *)(uintptr_t) _handle; \
3409 static inline __VkType \
3410 __anv_type ## _to_handle(struct __anv_type *_obj) \
3412 return (__VkType)(uintptr_t) _obj; \
3415 #define ANV_FROM_HANDLE(__anv_type, __name, __handle) \
3416 struct __anv_type *__name = __anv_type ## _from_handle(__handle)
3418 ANV_DEFINE_HANDLE_CASTS(anv_cmd_buffer
, VkCommandBuffer
)
3419 ANV_DEFINE_HANDLE_CASTS(anv_device
, VkDevice
)
3420 ANV_DEFINE_HANDLE_CASTS(anv_instance
, VkInstance
)
3421 ANV_DEFINE_HANDLE_CASTS(anv_physical_device
, VkPhysicalDevice
)
3422 ANV_DEFINE_HANDLE_CASTS(anv_queue
, VkQueue
)
3424 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_cmd_pool
, VkCommandPool
)
3425 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer
, VkBuffer
)
3426 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_buffer_view
, VkBufferView
)
3427 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_pool
, VkDescriptorPool
)
3428 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set
, VkDescriptorSet
)
3429 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_set_layout
, VkDescriptorSetLayout
)
3430 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_descriptor_update_template
, VkDescriptorUpdateTemplate
)
3431 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_device_memory
, VkDeviceMemory
)
3432 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_fence
, VkFence
)
3433 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_event
, VkEvent
)
3434 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_framebuffer
, VkFramebuffer
)
3435 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image
, VkImage
)
3436 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_image_view
, VkImageView
);
3437 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_cache
, VkPipelineCache
)
3438 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline
, VkPipeline
)
3439 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_pipeline_layout
, VkPipelineLayout
)
3440 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_query_pool
, VkQueryPool
)
3441 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_render_pass
, VkRenderPass
)
3442 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_sampler
, VkSampler
)
3443 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_semaphore
, VkSemaphore
)
3444 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_shader_module
, VkShaderModule
)
3445 ANV_DEFINE_NONDISP_HANDLE_CASTS(vk_debug_report_callback
, VkDebugReportCallbackEXT
)
3446 ANV_DEFINE_NONDISP_HANDLE_CASTS(anv_ycbcr_conversion
, VkSamplerYcbcrConversion
)
3448 /* Gen-specific function declarations */
3450 # include "anv_genX.h"
3452 # define genX(x) gen7_##x
3453 # include "anv_genX.h"
3455 # define genX(x) gen75_##x
3456 # include "anv_genX.h"
3458 # define genX(x) gen8_##x
3459 # include "anv_genX.h"
3461 # define genX(x) gen9_##x
3462 # include "anv_genX.h"
3464 # define genX(x) gen10_##x
3465 # include "anv_genX.h"
3467 # define genX(x) gen11_##x
3468 # include "anv_genX.h"
3472 #endif /* ANV_PRIVATE_H */