src/intel/vulkan/gen7_pipeline.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "anv_private.h"
  31
  32 #include "genxml/gen_macros.h"
  33 #include "genxml/genX_pack.h"
  34
  35 #include "genX_pipeline_util.h"
  36
  37 VkResult
  38 genX(graphics_pipeline_create)(
  39     VkDevice                                    _device,
  40     struct anv_pipeline_cache *                 cache,
  41     const VkGraphicsPipelineCreateInfo*         pCreateInfo,
  42     const VkAllocationCallbacks*                pAllocator,
  43     VkPipeline*                                 pPipeline)
  44 {
  45    ANV_FROM_HANDLE(anv_device, device, _device);
  46    ANV_FROM_HANDLE(anv_render_pass, pass, pCreateInfo->renderPass);
  47    struct anv_subpass *subpass = &pass->subpasses[pCreateInfo->subpass];
  48    struct anv_pipeline *pipeline;
  49    VkResult result;
  50
  51    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_GRAPHICS_PIPELINE_CREATE_INFO);
  52
  53    pipeline = vk_alloc2(&device->alloc, pAllocator, sizeof(*pipeline), 8,
  54                          VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
  55    if (pipeline == NULL)
  56       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
  57
  58    result = anv_pipeline_init(pipeline, device, cache,
  59                               pCreateInfo, pAllocator);
  60    if (result != VK_SUCCESS) {
  61       vk_free2(&device->alloc, pAllocator, pipeline);
  62       return result;
  63    }
  64
  65    assert(pCreateInfo->pVertexInputState);
  66    emit_vertex_input(pipeline, pCreateInfo->pVertexInputState);
  67
  68    assert(pCreateInfo->pRasterizationState);
  69    emit_rs_state(pipeline, pCreateInfo->pRasterizationState,
  70                  pCreateInfo->pMultisampleState, pass, subpass);
  71
  72    emit_ds_state(pipeline, pCreateInfo->pDepthStencilState, pass, subpass);
  73
  74    emit_cb_state(pipeline, pCreateInfo->pColorBlendState,
  75                            pCreateInfo->pMultisampleState);
  76
  77    emit_urb_setup(pipeline);
  78
  79    emit_3dstate_clip(pipeline, pCreateInfo->pViewportState,
  80                      pCreateInfo->pRasterizationState);
  81    emit_3dstate_streamout(pipeline, pCreateInfo->pRasterizationState);
  82
  83    emit_ms_state(pipeline, pCreateInfo->pMultisampleState);
  84
  85 #if 0
  86    /* From gen7_vs_state.c */
  87
  88    /**
  89     * From Graphics BSpec: 3D-Media-GPGPU Engine > 3D Pipeline Stages >
  90     * Geometry > Geometry Shader > State:
  91     *
  92     *     "Note: Because of corruption in IVB:GT2, software needs to flush the
  93     *     whole fixed function pipeline when the GS enable changes value in
  94     *     the 3DSTATE_GS."
  95     *
  96     * The hardware architects have clarified that in this context "flush the
  97     * whole fixed function pipeline" means to emit a PIPE_CONTROL with the "CS
  98     * Stall" bit set.
  99     */
 100    if (!brw->is_haswell && !brw->is_baytrail)
 101       gen7_emit_vs_workaround_flush(brw);
 102 #endif
 103
 104    emit_3dstate_vs(pipeline);
 105    emit_3dstate_gs(pipeline);
 106    emit_3dstate_sbe(pipeline);
 107    emit_3dstate_ps(pipeline);
 108
 109    if (!anv_pipeline_has_stage(pipeline, MESA_SHADER_FRAGMENT)) {
 110       anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM), wm) {
 111          wm.StatisticsEnable                    = true;
 112          wm.ThreadDispatchEnable                = false;
 113          wm.LineEndCapAntialiasingRegionWidth   = 0; /* 0.5 pixels */
 114          wm.LineAntialiasingRegionWidth         = 1; /* 1.0 pixels */
 115          wm.EarlyDepthStencilControl            = EDSC_NORMAL;
 116          wm.PointRasterizationRule              = RASTRULE_UPPER_RIGHT;
 117       }
 118    } else {
 119       const struct brw_wm_prog_data *wm_prog_data = get_wm_prog_data(pipeline);
 120
 121       if (wm_prog_data->urb_setup[VARYING_SLOT_BFC0] != -1 ||
 122           wm_prog_data->urb_setup[VARYING_SLOT_BFC1] != -1)
 123          anv_finishme("two-sided color needs sbe swizzling setup");
 124       if (wm_prog_data->urb_setup[VARYING_SLOT_PRIMITIVE_ID] != -1)
 125          anv_finishme("primitive_id needs sbe swizzling setup");
 126
 127       uint32_t samples = pCreateInfo->pMultisampleState ?
 128                          pCreateInfo->pMultisampleState->rasterizationSamples : 1;
 129
 130       /* FIXME-GEN7: This needs a lot more work, cf gen7 upload_wm_state(). */
 131       anv_batch_emit(&pipeline->batch, GENX(3DSTATE_WM), wm) {
 132          wm.StatisticsEnable                    = true;
 133          wm.ThreadDispatchEnable                = true;
 134          wm.LineEndCapAntialiasingRegionWidth   = 0; /* 0.5 pixels */
 135          wm.LineAntialiasingRegionWidth         = 1; /* 1.0 pixels */
 136          wm.PointRasterizationRule              = RASTRULE_UPPER_RIGHT;
 137          wm.PixelShaderKillsPixel               = wm_prog_data->uses_kill;
 138          wm.PixelShaderComputedDepthMode        = wm_prog_data->computed_depth_mode;
 139          wm.PixelShaderUsesSourceDepth          = wm_prog_data->uses_src_depth;
 140          wm.PixelShaderUsesSourceW              = wm_prog_data->uses_src_w;
 141          wm.PixelShaderUsesInputCoverageMask    = wm_prog_data->uses_sample_mask;
 142
 143          if (wm_prog_data->early_fragment_tests) {
 144             wm.EarlyDepthStencilControl         = EDSC_PREPS;
 145          } else if (wm_prog_data->has_side_effects) {
 146             wm.EarlyDepthStencilControl         = EDSC_PSEXEC;
 147          } else {
 148             wm.EarlyDepthStencilControl         = EDSC_NORMAL;
 149          }
 150
 151          wm.BarycentricInterpolationMode        = wm_prog_data->barycentric_interp_modes;
 152
 153          wm.MultisampleRasterizationMode        = samples > 1 ?
 154                                                   MSRASTMODE_ON_PATTERN : MSRASTMODE_OFF_PIXEL;
 155          wm.MultisampleDispatchMode             = ((samples == 1) ||
 156                                                    (samples > 1 && wm_prog_data->persample_dispatch)) ?
 157                                                   MSDISPMODE_PERSAMPLE : MSDISPMODE_PERPIXEL;
 158       }
 159    }
 160
 161    *pPipeline = anv_pipeline_to_handle(pipeline);
 162
 163    return VK_SUCCESS;
 164 }