2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "genxml/gen_macros.h"
33 #include "genxml/genX_pack.h"
37 gen8_cmd_buffer_emit_viewport(struct anv_cmd_buffer
*cmd_buffer
)
39 uint32_t count
= cmd_buffer
->state
.dynamic
.viewport
.count
;
40 const VkViewport
*viewports
= cmd_buffer
->state
.dynamic
.viewport
.viewports
;
41 struct anv_state sf_clip_state
=
42 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
, count
* 64, 64);
44 for (uint32_t i
= 0; i
< count
; i
++) {
45 const VkViewport
*vp
= &viewports
[i
];
47 /* The gen7 state struct has just the matrix and guardband fields, the
48 * gen8 struct adds the min/max viewport fields. */
49 struct GENX(SF_CLIP_VIEWPORT
) sf_clip_viewport
= {
50 .ViewportMatrixElementm00
= vp
->width
/ 2,
51 .ViewportMatrixElementm11
= vp
->height
/ 2,
52 .ViewportMatrixElementm22
= 1.0,
53 .ViewportMatrixElementm30
= vp
->x
+ vp
->width
/ 2,
54 .ViewportMatrixElementm31
= vp
->y
+ vp
->height
/ 2,
55 .ViewportMatrixElementm32
= 0.0,
56 .XMinClipGuardband
= -1.0f
,
57 .XMaxClipGuardband
= 1.0f
,
58 .YMinClipGuardband
= -1.0f
,
59 .YMaxClipGuardband
= 1.0f
,
60 .XMinViewPort
= vp
->x
,
61 .XMaxViewPort
= vp
->x
+ vp
->width
- 1,
62 .YMinViewPort
= MIN2(vp
->y
, vp
->y
+ vp
->height
),
63 .YMaxViewPort
= MAX2(vp
->y
, vp
->y
+ vp
->height
) - 1,
66 GENX(SF_CLIP_VIEWPORT_pack
)(NULL
, sf_clip_state
.map
+ i
* 64,
70 if (!cmd_buffer
->device
->info
.has_llc
)
71 anv_state_clflush(sf_clip_state
);
73 anv_batch_emit(&cmd_buffer
->batch
,
74 GENX(3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP
), clip
) {
75 clip
.SFClipViewportPointer
= sf_clip_state
.offset
;
80 gen8_cmd_buffer_emit_depth_viewport(struct anv_cmd_buffer
*cmd_buffer
,
81 bool depth_clamp_enable
)
83 uint32_t count
= cmd_buffer
->state
.dynamic
.viewport
.count
;
84 const VkViewport
*viewports
= cmd_buffer
->state
.dynamic
.viewport
.viewports
;
85 struct anv_state cc_state
=
86 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
, count
* 8, 32);
88 for (uint32_t i
= 0; i
< count
; i
++) {
89 const VkViewport
*vp
= &viewports
[i
];
91 struct GENX(CC_VIEWPORT
) cc_viewport
= {
92 .MinimumDepth
= depth_clamp_enable
? vp
->minDepth
: 0.0f
,
93 .MaximumDepth
= depth_clamp_enable
? vp
->maxDepth
: 1.0f
,
96 GENX(CC_VIEWPORT_pack
)(NULL
, cc_state
.map
+ i
* 8, &cc_viewport
);
99 if (!cmd_buffer
->device
->info
.has_llc
)
100 anv_state_clflush(cc_state
);
102 anv_batch_emit(&cmd_buffer
->batch
,
103 GENX(3DSTATE_VIEWPORT_STATE_POINTERS_CC
), cc
) {
104 cc
.CCViewportPointer
= cc_state
.offset
;
110 __emit_genx_sf_state(struct anv_cmd_buffer
*cmd_buffer
)
112 uint32_t sf_dw
[GENX(3DSTATE_SF_length
)];
113 struct GENX(3DSTATE_SF
) sf
= {
114 GENX(3DSTATE_SF_header
),
115 .LineWidth
= cmd_buffer
->state
.dynamic
.line_width
,
117 GENX(3DSTATE_SF_pack
)(NULL
, sf_dw
, &sf
);
119 anv_batch_emit_merge(&cmd_buffer
->batch
, sf_dw
,
120 cmd_buffer
->state
.pipeline
->gen8
.sf
);
124 gen9_emit_sf_state(struct anv_cmd_buffer
*cmd_buffer
);
129 gen9_emit_sf_state(struct anv_cmd_buffer
*cmd_buffer
)
131 __emit_genx_sf_state(cmd_buffer
);
139 __emit_sf_state(struct anv_cmd_buffer
*cmd_buffer
)
141 if (cmd_buffer
->device
->info
.is_cherryview
)
142 gen9_emit_sf_state(cmd_buffer
);
144 __emit_genx_sf_state(cmd_buffer
);
150 __emit_sf_state(struct anv_cmd_buffer
*cmd_buffer
)
152 __emit_genx_sf_state(cmd_buffer
);
158 genX(cmd_buffer_flush_dynamic_state
)(struct anv_cmd_buffer
*cmd_buffer
)
160 struct anv_pipeline
*pipeline
= cmd_buffer
->state
.pipeline
;
162 if (cmd_buffer
->state
.dirty
& (ANV_CMD_DIRTY_PIPELINE
|
163 ANV_CMD_DIRTY_DYNAMIC_LINE_WIDTH
)) {
164 __emit_sf_state(cmd_buffer
);
167 if (cmd_buffer
->state
.dirty
& (ANV_CMD_DIRTY_PIPELINE
|
168 ANV_CMD_DIRTY_DYNAMIC_DEPTH_BIAS
)){
169 uint32_t raster_dw
[GENX(3DSTATE_RASTER_length
)];
170 struct GENX(3DSTATE_RASTER
) raster
= {
171 GENX(3DSTATE_RASTER_header
),
172 .GlobalDepthOffsetConstant
= cmd_buffer
->state
.dynamic
.depth_bias
.bias
,
173 .GlobalDepthOffsetScale
= cmd_buffer
->state
.dynamic
.depth_bias
.slope
,
174 .GlobalDepthOffsetClamp
= cmd_buffer
->state
.dynamic
.depth_bias
.clamp
176 GENX(3DSTATE_RASTER_pack
)(NULL
, raster_dw
, &raster
);
177 anv_batch_emit_merge(&cmd_buffer
->batch
, raster_dw
,
178 pipeline
->gen8
.raster
);
181 /* Stencil reference values moved from COLOR_CALC_STATE in gen8 to
182 * 3DSTATE_WM_DEPTH_STENCIL in gen9. That means the dirty bits gets split
183 * across different state packets for gen8 and gen9. We handle that by
184 * using a big old #if switch here.
187 if (cmd_buffer
->state
.dirty
& (ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
|
188 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
)) {
189 struct anv_dynamic_state
*d
= &cmd_buffer
->state
.dynamic
;
190 struct anv_state cc_state
=
191 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
192 GENX(COLOR_CALC_STATE_length
) * 4,
194 struct GENX(COLOR_CALC_STATE
) cc
= {
195 .BlendConstantColorRed
= cmd_buffer
->state
.dynamic
.blend_constants
[0],
196 .BlendConstantColorGreen
= cmd_buffer
->state
.dynamic
.blend_constants
[1],
197 .BlendConstantColorBlue
= cmd_buffer
->state
.dynamic
.blend_constants
[2],
198 .BlendConstantColorAlpha
= cmd_buffer
->state
.dynamic
.blend_constants
[3],
199 .StencilReferenceValue
= d
->stencil_reference
.front
& 0xff,
200 .BackFaceStencilReferenceValue
= d
->stencil_reference
.back
& 0xff,
202 GENX(COLOR_CALC_STATE_pack
)(NULL
, cc_state
.map
, &cc
);
204 if (!cmd_buffer
->device
->info
.has_llc
)
205 anv_state_clflush(cc_state
);
207 anv_batch_emit(&cmd_buffer
->batch
, GENX(3DSTATE_CC_STATE_POINTERS
), ccp
) {
208 ccp
.ColorCalcStatePointer
= cc_state
.offset
;
209 ccp
.ColorCalcStatePointerValid
= true;
213 if (cmd_buffer
->state
.dirty
& (ANV_CMD_DIRTY_PIPELINE
|
214 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
|
215 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
)) {
216 uint32_t wm_depth_stencil_dw
[GENX(3DSTATE_WM_DEPTH_STENCIL_length
)];
217 struct anv_dynamic_state
*d
= &cmd_buffer
->state
.dynamic
;
219 struct GENX(3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil
) = {
220 GENX(3DSTATE_WM_DEPTH_STENCIL_header
),
222 .StencilTestMask
= d
->stencil_compare_mask
.front
& 0xff,
223 .StencilWriteMask
= d
->stencil_write_mask
.front
& 0xff,
225 .BackfaceStencilTestMask
= d
->stencil_compare_mask
.back
& 0xff,
226 .BackfaceStencilWriteMask
= d
->stencil_write_mask
.back
& 0xff,
228 .StencilBufferWriteEnable
=
229 (d
->stencil_write_mask
.front
|| d
->stencil_write_mask
.back
) &&
230 pipeline
->writes_stencil
,
232 GENX(3DSTATE_WM_DEPTH_STENCIL_pack
)(NULL
, wm_depth_stencil_dw
,
235 anv_batch_emit_merge(&cmd_buffer
->batch
, wm_depth_stencil_dw
,
236 pipeline
->gen8
.wm_depth_stencil
);
239 if (cmd_buffer
->state
.dirty
& ANV_CMD_DIRTY_DYNAMIC_BLEND_CONSTANTS
) {
240 struct anv_state cc_state
=
241 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer
,
242 GEN9_COLOR_CALC_STATE_length
* 4,
244 struct GEN9_COLOR_CALC_STATE cc
= {
245 .BlendConstantColorRed
= cmd_buffer
->state
.dynamic
.blend_constants
[0],
246 .BlendConstantColorGreen
= cmd_buffer
->state
.dynamic
.blend_constants
[1],
247 .BlendConstantColorBlue
= cmd_buffer
->state
.dynamic
.blend_constants
[2],
248 .BlendConstantColorAlpha
= cmd_buffer
->state
.dynamic
.blend_constants
[3],
250 GEN9_COLOR_CALC_STATE_pack(NULL
, cc_state
.map
, &cc
);
252 if (!cmd_buffer
->device
->info
.has_llc
)
253 anv_state_clflush(cc_state
);
255 anv_batch_emit(&cmd_buffer
->batch
, GEN9_3DSTATE_CC_STATE_POINTERS
, ccp
) {
256 ccp
.ColorCalcStatePointer
= cc_state
.offset
;
257 ccp
.ColorCalcStatePointerValid
= true;
261 if (cmd_buffer
->state
.dirty
& (ANV_CMD_DIRTY_PIPELINE
|
262 ANV_CMD_DIRTY_DYNAMIC_STENCIL_COMPARE_MASK
|
263 ANV_CMD_DIRTY_DYNAMIC_STENCIL_WRITE_MASK
|
264 ANV_CMD_DIRTY_DYNAMIC_STENCIL_REFERENCE
)) {
265 uint32_t dwords
[GEN9_3DSTATE_WM_DEPTH_STENCIL_length
];
266 struct anv_dynamic_state
*d
= &cmd_buffer
->state
.dynamic
;
267 struct GEN9_3DSTATE_WM_DEPTH_STENCIL wm_depth_stencil
= {
268 GEN9_3DSTATE_WM_DEPTH_STENCIL_header
,
270 .StencilTestMask
= d
->stencil_compare_mask
.front
& 0xff,
271 .StencilWriteMask
= d
->stencil_write_mask
.front
& 0xff,
273 .BackfaceStencilTestMask
= d
->stencil_compare_mask
.back
& 0xff,
274 .BackfaceStencilWriteMask
= d
->stencil_write_mask
.back
& 0xff,
276 .StencilReferenceValue
= d
->stencil_reference
.front
& 0xff,
277 .BackfaceStencilReferenceValue
= d
->stencil_reference
.back
& 0xff,
279 .StencilBufferWriteEnable
=
280 (d
->stencil_write_mask
.front
|| d
->stencil_write_mask
.back
) &&
281 pipeline
->writes_stencil
,
283 GEN9_3DSTATE_WM_DEPTH_STENCIL_pack(NULL
, dwords
, &wm_depth_stencil
);
285 anv_batch_emit_merge(&cmd_buffer
->batch
, dwords
,
286 pipeline
->gen9
.wm_depth_stencil
);
290 if (cmd_buffer
->state
.dirty
& (ANV_CMD_DIRTY_PIPELINE
|
291 ANV_CMD_DIRTY_INDEX_BUFFER
)) {
292 anv_batch_emit(&cmd_buffer
->batch
, GENX(3DSTATE_VF
), vf
) {
293 vf
.IndexedDrawCutIndexEnable
= pipeline
->primitive_restart
;
294 vf
.CutIndex
= cmd_buffer
->state
.restart_index
;
298 cmd_buffer
->state
.dirty
= 0;
301 void genX(CmdBindIndexBuffer
)(
302 VkCommandBuffer commandBuffer
,
305 VkIndexType indexType
)
307 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
308 ANV_FROM_HANDLE(anv_buffer
, buffer
, _buffer
);
310 static const uint32_t vk_to_gen_index_type
[] = {
311 [VK_INDEX_TYPE_UINT16
] = INDEX_WORD
,
312 [VK_INDEX_TYPE_UINT32
] = INDEX_DWORD
,
315 static const uint32_t restart_index_for_type
[] = {
316 [VK_INDEX_TYPE_UINT16
] = UINT16_MAX
,
317 [VK_INDEX_TYPE_UINT32
] = UINT32_MAX
,
320 cmd_buffer
->state
.restart_index
= restart_index_for_type
[indexType
];
322 anv_batch_emit(&cmd_buffer
->batch
, GENX(3DSTATE_INDEX_BUFFER
), ib
) {
323 ib
.IndexFormat
= vk_to_gen_index_type
[indexType
];
324 ib
.MemoryObjectControlState
= GENX(MOCS
);
325 ib
.BufferStartingAddress
=
326 (struct anv_address
) { buffer
->bo
, buffer
->offset
+ offset
};
327 ib
.BufferSize
= buffer
->size
- offset
;
330 cmd_buffer
->state
.dirty
|= ANV_CMD_DIRTY_INDEX_BUFFER
;
333 /* Set of stage bits for which are pipelined, i.e. they get queued by the
334 * command streamer for later execution.
336 #define ANV_PIPELINE_STAGE_PIPELINED_BITS \
337 (VK_PIPELINE_STAGE_VERTEX_INPUT_BIT | \
338 VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | \
339 VK_PIPELINE_STAGE_TESSELLATION_CONTROL_SHADER_BIT | \
340 VK_PIPELINE_STAGE_TESSELLATION_EVALUATION_SHADER_BIT | \
341 VK_PIPELINE_STAGE_GEOMETRY_SHADER_BIT | \
342 VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT | \
343 VK_PIPELINE_STAGE_EARLY_FRAGMENT_TESTS_BIT | \
344 VK_PIPELINE_STAGE_LATE_FRAGMENT_TESTS_BIT | \
345 VK_PIPELINE_STAGE_COLOR_ATTACHMENT_OUTPUT_BIT | \
346 VK_PIPELINE_STAGE_COMPUTE_SHADER_BIT | \
347 VK_PIPELINE_STAGE_TRANSFER_BIT | \
348 VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT | \
349 VK_PIPELINE_STAGE_ALL_GRAPHICS_BIT | \
350 VK_PIPELINE_STAGE_ALL_COMMANDS_BIT)
352 void genX(CmdSetEvent
)(
353 VkCommandBuffer commandBuffer
,
355 VkPipelineStageFlags stageMask
)
357 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
358 ANV_FROM_HANDLE(anv_event
, event
, _event
);
360 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
361 if (stageMask
& ANV_PIPELINE_STAGE_PIPELINED_BITS
) {
362 pc
.StallAtPixelScoreboard
= true;
363 pc
.CommandStreamerStallEnable
= true;
366 pc
.DestinationAddressType
= DAT_PPGTT
,
367 pc
.PostSyncOperation
= WriteImmediateData
,
368 pc
.Address
= (struct anv_address
) {
369 &cmd_buffer
->device
->dynamic_state_block_pool
.bo
,
372 pc
.ImmediateData
= VK_EVENT_SET
;
376 void genX(CmdResetEvent
)(
377 VkCommandBuffer commandBuffer
,
379 VkPipelineStageFlags stageMask
)
381 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
382 ANV_FROM_HANDLE(anv_event
, event
, _event
);
384 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
385 if (stageMask
& ANV_PIPELINE_STAGE_PIPELINED_BITS
) {
386 pc
.StallAtPixelScoreboard
= true;
387 pc
.CommandStreamerStallEnable
= true;
390 pc
.DestinationAddressType
= DAT_PPGTT
;
391 pc
.PostSyncOperation
= WriteImmediateData
;
392 pc
.Address
= (struct anv_address
) {
393 &cmd_buffer
->device
->dynamic_state_block_pool
.bo
,
396 pc
.ImmediateData
= VK_EVENT_RESET
;
400 void genX(CmdWaitEvents
)(
401 VkCommandBuffer commandBuffer
,
403 const VkEvent
* pEvents
,
404 VkPipelineStageFlags srcStageMask
,
405 VkPipelineStageFlags destStageMask
,
406 uint32_t memoryBarrierCount
,
407 const VkMemoryBarrier
* pMemoryBarriers
,
408 uint32_t bufferMemoryBarrierCount
,
409 const VkBufferMemoryBarrier
* pBufferMemoryBarriers
,
410 uint32_t imageMemoryBarrierCount
,
411 const VkImageMemoryBarrier
* pImageMemoryBarriers
)
413 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
414 for (uint32_t i
= 0; i
< eventCount
; i
++) {
415 ANV_FROM_HANDLE(anv_event
, event
, pEvents
[i
]);
417 anv_batch_emit(&cmd_buffer
->batch
, GENX(MI_SEMAPHORE_WAIT
), sem
) {
418 sem
.WaitMode
= PollingMode
,
419 sem
.CompareOperation
= COMPARE_SAD_EQUAL_SDD
,
420 sem
.SemaphoreDataDword
= VK_EVENT_SET
,
421 sem
.SemaphoreAddress
= (struct anv_address
) {
422 &cmd_buffer
->device
->dynamic_state_block_pool
.bo
,
428 genX(CmdPipelineBarrier
)(commandBuffer
, srcStageMask
, destStageMask
,
429 false, /* byRegion */
430 memoryBarrierCount
, pMemoryBarriers
,
431 bufferMemoryBarrierCount
, pBufferMemoryBarriers
,
432 imageMemoryBarrierCount
, pImageMemoryBarriers
);