src/intel/vulkan/genX_blorp_exec.c

   1 /*
   2  * Copyright © 2016 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25
  26 #include "anv_private.h"
  27
  28 /* These are defined in anv_private.h and blorp_genX_exec.h */
  29 #undef __gen_address_type
  30 #undef __gen_user_data
  31 #undef __gen_combine_address
  32
  33 #include "common/gen_l3_config.h"
  34 #include "common/gen_sample_positions.h"
  35 #include "blorp/blorp_genX_exec.h"
  36
  37 static void *
  38 blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
  39 {
  40    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
  41    return anv_batch_emit_dwords(&cmd_buffer->batch, n);
  42 }
  43
  44 static uint64_t
  45 blorp_emit_reloc(struct blorp_batch *batch,
  46                  void *location, struct blorp_address address, uint32_t delta)
  47 {
  48    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
  49    assert(cmd_buffer->batch.start <= location &&
  50           location < cmd_buffer->batch.end);
  51    return anv_batch_emit_reloc(&cmd_buffer->batch, location,
  52                                address.buffer, address.offset + delta);
  53 }
  54
  55 static void
  56 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
  57                     struct blorp_address address, uint32_t delta)
  58 {
  59    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
  60    VkResult result =
  61       anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc,
  62                          ss_offset, address.buffer, address.offset + delta);
  63    if (result != VK_SUCCESS)
  64       anv_batch_set_error(&cmd_buffer->batch, result);
  65
  66    void *dest = cmd_buffer->device->surface_state_pool.block_pool.map +
  67       ss_offset;
  68    uint64_t val = ((struct anv_bo*)address.buffer)->offset + address.offset +
  69       delta;
  70    write_reloc(cmd_buffer->device, dest, val, false);
  71 }
  72
  73 static uint64_t
  74 blorp_get_surface_address(struct blorp_batch *blorp_batch,
  75                           struct blorp_address address)
  76 {
  77    /* We'll let blorp_surface_reloc write the address. */
  78    return 0ull;
  79 }
  80
  81 #if GEN_GEN >= 7 && GEN_GEN < 10
  82 static struct blorp_address
  83 blorp_get_surface_base_address(struct blorp_batch *batch)
  84 {
  85    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
  86    return (struct blorp_address) {
  87       .buffer = &cmd_buffer->device->surface_state_pool.block_pool.bo,
  88       .offset = 0,
  89    };
  90 }
  91 #endif
  92
  93 static void *
  94 blorp_alloc_dynamic_state(struct blorp_batch *batch,
  95                           uint32_t size,
  96                           uint32_t alignment,
  97                           uint32_t *offset)
  98 {
  99    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 100
 101    struct anv_state state =
 102       anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
 103
 104    *offset = state.offset;
 105    return state.map;
 106 }
 107
 108 static void
 109 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
 110                           unsigned state_size, unsigned state_alignment,
 111                           uint32_t *bt_offset,
 112                           uint32_t *surface_offsets, void **surface_maps)
 113 {
 114    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 115
 116    uint32_t state_offset;
 117    struct anv_state bt_state;
 118
 119    VkResult result =
 120       anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, num_entries,
 121                                                &state_offset, &bt_state);
 122    if (result != VK_SUCCESS)
 123       return;
 124
 125    uint32_t *bt_map = bt_state.map;
 126    *bt_offset = bt_state.offset;
 127
 128    for (unsigned i = 0; i < num_entries; i++) {
 129       struct anv_state surface_state =
 130          anv_cmd_buffer_alloc_surface_state(cmd_buffer);
 131       bt_map[i] = surface_state.offset + state_offset;
 132       surface_offsets[i] = surface_state.offset;
 133       surface_maps[i] = surface_state.map;
 134    }
 135
 136    anv_state_flush(cmd_buffer->device, bt_state);
 137 }
 138
 139 static void *
 140 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
 141                           struct blorp_address *addr)
 142 {
 143    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 144
 145    /* From the Skylake PRM, 3DSTATE_VERTEX_BUFFERS:
 146     *
 147     *    "The VF cache needs to be invalidated before binding and then using
 148     *    Vertex Buffers that overlap with any previously bound Vertex Buffer
 149     *    (at a 64B granularity) since the last invalidation.  A VF cache
 150     *    invalidate is performed by setting the "VF Cache Invalidation Enable"
 151     *    bit in PIPE_CONTROL."
 152     *
 153     * This restriction first appears in the Skylake PRM but the internal docs
 154     * also list it as being an issue on Broadwell.  In order to avoid this
 155     * problem, we align all vertex buffer allocations to 64 bytes.
 156     */
 157    struct anv_state vb_state =
 158       anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 64);
 159
 160    *addr = (struct blorp_address) {
 161       .buffer = &cmd_buffer->device->dynamic_state_pool.block_pool.bo,
 162       .offset = vb_state.offset,
 163       .mocs = cmd_buffer->device->default_mocs,
 164    };
 165
 166    return vb_state.map;
 167 }
 168
 169 static void
 170 blorp_vf_invalidate_for_vb_48b_transitions(struct blorp_batch *batch,
 171                                            const struct blorp_address *addrs,
 172                                            unsigned num_vbs)
 173 {
 174    /* anv forces all vertex buffers into the low 4GB so there are never any
 175     * transitions that require a VF invalidation.
 176     */
 177 }
 178
 179 #if GEN_GEN >= 8
 180 static struct blorp_address
 181 blorp_get_workaround_page(struct blorp_batch *batch)
 182 {
 183    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 184
 185    return (struct blorp_address) {
 186       .buffer = &cmd_buffer->device->workaround_bo,
 187    };
 188 }
 189 #endif
 190
 191 static void
 192 blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
 193 {
 194    struct anv_device *device = batch->blorp->driver_ctx;
 195    if (!device->info.has_llc)
 196       gen_flush_range(start, size);
 197 }
 198
 199 static void
 200 blorp_emit_urb_config(struct blorp_batch *batch,
 201                       unsigned vs_entry_size, unsigned sf_entry_size)
 202 {
 203    struct anv_device *device = batch->blorp->driver_ctx;
 204    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 205
 206    assert(sf_entry_size == 0);
 207
 208    const unsigned entry_size[4] = { vs_entry_size, 1, 1, 1 };
 209
 210    genX(emit_urb_setup)(device, &cmd_buffer->batch,
 211                         cmd_buffer->state.current_l3_config,
 212                         VK_SHADER_STAGE_VERTEX_BIT |
 213                         VK_SHADER_STAGE_FRAGMENT_BIT,
 214                         entry_size);
 215 }
 216
 217 void
 218 genX(blorp_exec)(struct blorp_batch *batch,
 219                  const struct blorp_params *params)
 220 {
 221    struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
 222
 223    if (!cmd_buffer->state.current_l3_config) {
 224       const struct gen_l3_config *cfg =
 225          gen_get_default_l3_config(&cmd_buffer->device->info);
 226       genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
 227    }
 228
 229 #if GEN_GEN >= 11
 230    /* The PIPE_CONTROL command description says:
 231     *
 232     *    "Whenever a Binding Table Index (BTI) used by a Render Taget Message
 233     *     points to a different RENDER_SURFACE_STATE, SW must issue a Render
 234     *     Target Cache Flush by enabling this bit. When render target flush
 235     *     is set due to new association of BTI, PS Scoreboard Stall bit must
 236     *     be set in this packet."
 237     */
 238    cmd_buffer->state.pending_pipe_bits |=
 239       ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT |
 240       ANV_PIPE_STALL_AT_SCOREBOARD_BIT;
 241 #endif
 242
 243 #if GEN_GEN == 7
 244    /* The MI_LOAD/STORE_REGISTER_MEM commands which BLORP uses to implement
 245     * indirect fast-clear colors can cause GPU hangs if we don't stall first.
 246     * See genX(cmd_buffer_mi_memcpy) for more details.
 247     */
 248    if (params->src.clear_color_addr.buffer ||
 249        params->dst.clear_color_addr.buffer)
 250       cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_CS_STALL_BIT;
 251 #endif
 252
 253    genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
 254
 255    genX(flush_pipeline_select_3d)(cmd_buffer);
 256
 257    genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer);
 258
 259    /* BLORP doesn't do anything fancy with depth such as discards, so we want
 260     * the PMA fix off.  Also, off is always the safe option.
 261     */
 262    genX(cmd_buffer_enable_pma_fix)(cmd_buffer, false);
 263
 264    /* Disable VF statistics */
 265    blorp_emit(batch, GENX(3DSTATE_VF_STATISTICS), vf) {
 266       vf.StatisticsEnable = false;
 267    }
 268
 269    blorp_exec(batch, params);
 270
 271    cmd_buffer->state.gfx.vb_dirty = ~0;
 272    cmd_buffer->state.gfx.dirty = ~0;
 273    cmd_buffer->state.push_constants_dirty = ~0;
 274    cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_RENDER_TARGET_WRITES;
 275 }