i965: Drop AUB_TRACE_* stuff.
[mesa.git] / src / intel / vulkan / genX_blorp_exec.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25
26 #include "anv_private.h"
27
28 /* These are defined in anv_private.h and blorp_genX_exec.h */
29 #undef __gen_address_type
30 #undef __gen_user_data
31 #undef __gen_combine_address
32
33 #include "common/gen_l3_config.h"
34 #include "common/gen_sample_positions.h"
35 #include "blorp/blorp_genX_exec.h"
36
37 static void *
38 blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
39 {
40 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
41 return anv_batch_emit_dwords(&cmd_buffer->batch, n);
42 }
43
44 static uint64_t
45 blorp_emit_reloc(struct blorp_batch *batch,
46 void *location, struct blorp_address address, uint32_t delta)
47 {
48 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
49 assert(cmd_buffer->batch.start <= location &&
50 location < cmd_buffer->batch.end);
51 return anv_batch_emit_reloc(&cmd_buffer->batch, location,
52 address.buffer, address.offset + delta);
53 }
54
55 static void
56 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
57 struct blorp_address address, uint32_t delta)
58 {
59 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
60 VkResult result =
61 anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc,
62 ss_offset, address.buffer, address.offset + delta);
63 if (result != VK_SUCCESS)
64 anv_batch_set_error(&cmd_buffer->batch, result);
65 }
66
67 static void *
68 blorp_alloc_dynamic_state(struct blorp_batch *batch,
69 uint32_t size,
70 uint32_t alignment,
71 uint32_t *offset)
72 {
73 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
74
75 struct anv_state state =
76 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
77
78 *offset = state.offset;
79 return state.map;
80 }
81
82 static void
83 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
84 unsigned state_size, unsigned state_alignment,
85 uint32_t *bt_offset,
86 uint32_t *surface_offsets, void **surface_maps)
87 {
88 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
89
90 uint32_t state_offset;
91 struct anv_state bt_state;
92
93 VkResult result =
94 anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, num_entries,
95 &state_offset, &bt_state);
96 if (result != VK_SUCCESS)
97 return;
98
99 uint32_t *bt_map = bt_state.map;
100 *bt_offset = bt_state.offset;
101
102 for (unsigned i = 0; i < num_entries; i++) {
103 struct anv_state surface_state =
104 anv_cmd_buffer_alloc_surface_state(cmd_buffer);
105 bt_map[i] = surface_state.offset + state_offset;
106 surface_offsets[i] = surface_state.offset;
107 surface_maps[i] = surface_state.map;
108 }
109
110 anv_state_flush(cmd_buffer->device, bt_state);
111 }
112
113 static void *
114 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
115 struct blorp_address *addr)
116 {
117 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
118 struct anv_state vb_state =
119 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 16);
120
121 *addr = (struct blorp_address) {
122 .buffer = &cmd_buffer->device->dynamic_state_block_pool.bo,
123 .offset = vb_state.offset,
124 };
125
126 return vb_state.map;
127 }
128
129 static void
130 blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
131 {
132 struct anv_device *device = batch->blorp->driver_ctx;
133 if (!device->info.has_llc)
134 anv_flush_range(start, size);
135 }
136
137 static void
138 blorp_emit_urb_config(struct blorp_batch *batch, unsigned vs_entry_size)
139 {
140 struct anv_device *device = batch->blorp->driver_ctx;
141 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
142
143 const unsigned entry_size[4] = { vs_entry_size, 1, 1, 1 };
144
145 genX(emit_urb_setup)(device, &cmd_buffer->batch,
146 cmd_buffer->state.current_l3_config,
147 VK_SHADER_STAGE_VERTEX_BIT |
148 VK_SHADER_STAGE_FRAGMENT_BIT,
149 entry_size);
150 }
151
152 void
153 genX(blorp_exec)(struct blorp_batch *batch,
154 const struct blorp_params *params)
155 {
156 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
157
158 if (!cmd_buffer->state.current_l3_config) {
159 const struct gen_l3_config *cfg =
160 gen_get_default_l3_config(&cmd_buffer->device->info);
161 genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
162 }
163
164 genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
165
166 genX(flush_pipeline_select_3d)(cmd_buffer);
167
168 genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer);
169
170 /* BLORP doesn't do anything fancy with depth such as discards, so we want
171 * the PMA fix off. Also, off is always the safe option.
172 */
173 genX(cmd_buffer_enable_pma_fix)(cmd_buffer, false);
174
175 /* Disable VF statistics */
176 blorp_emit(batch, GENX(3DSTATE_VF_STATISTICS), vf) {
177 vf.StatisticsEnable = false;
178 }
179
180 blorp_exec(batch, params);
181
182 cmd_buffer->state.vb_dirty = ~0;
183 cmd_buffer->state.dirty = ~0;
184 cmd_buffer->state.push_constants_dirty = ~0;
185 }