anv: silence unused function warning on gen11
[mesa.git] / src / intel / vulkan / genX_blorp_exec.c
1 /*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <assert.h>
25
26 #include "anv_private.h"
27
28 /* These are defined in anv_private.h and blorp_genX_exec.h */
29 #undef __gen_address_type
30 #undef __gen_user_data
31 #undef __gen_combine_address
32
33 #include "common/gen_l3_config.h"
34 #include "common/gen_sample_positions.h"
35 #include "blorp/blorp_genX_exec.h"
36
37 static void *
38 blorp_emit_dwords(struct blorp_batch *batch, unsigned n)
39 {
40 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
41 return anv_batch_emit_dwords(&cmd_buffer->batch, n);
42 }
43
44 static uint64_t
45 blorp_emit_reloc(struct blorp_batch *batch,
46 void *location, struct blorp_address address, uint32_t delta)
47 {
48 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
49 assert(cmd_buffer->batch.start <= location &&
50 location < cmd_buffer->batch.end);
51 return anv_batch_emit_reloc(&cmd_buffer->batch, location,
52 address.buffer, address.offset + delta);
53 }
54
55 static void
56 blorp_surface_reloc(struct blorp_batch *batch, uint32_t ss_offset,
57 struct blorp_address address, uint32_t delta)
58 {
59 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
60 VkResult result =
61 anv_reloc_list_add(&cmd_buffer->surface_relocs, &cmd_buffer->pool->alloc,
62 ss_offset, address.buffer, address.offset + delta);
63 if (result != VK_SUCCESS)
64 anv_batch_set_error(&cmd_buffer->batch, result);
65 }
66
67 #if GEN_GEN >= 7 && GEN_GEN <= 10
68 static struct blorp_address
69 blorp_get_surface_base_address(struct blorp_batch *batch)
70 {
71 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
72 return (struct blorp_address) {
73 .buffer = &cmd_buffer->device->surface_state_pool.block_pool.bo,
74 .offset = 0,
75 };
76 }
77 #endif
78
79 static void *
80 blorp_alloc_dynamic_state(struct blorp_batch *batch,
81 uint32_t size,
82 uint32_t alignment,
83 uint32_t *offset)
84 {
85 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
86
87 struct anv_state state =
88 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, alignment);
89
90 *offset = state.offset;
91 return state.map;
92 }
93
94 static void
95 blorp_alloc_binding_table(struct blorp_batch *batch, unsigned num_entries,
96 unsigned state_size, unsigned state_alignment,
97 uint32_t *bt_offset,
98 uint32_t *surface_offsets, void **surface_maps)
99 {
100 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
101
102 uint32_t state_offset;
103 struct anv_state bt_state;
104
105 VkResult result =
106 anv_cmd_buffer_alloc_blorp_binding_table(cmd_buffer, num_entries,
107 &state_offset, &bt_state);
108 if (result != VK_SUCCESS)
109 return;
110
111 uint32_t *bt_map = bt_state.map;
112 *bt_offset = bt_state.offset;
113
114 for (unsigned i = 0; i < num_entries; i++) {
115 struct anv_state surface_state =
116 anv_cmd_buffer_alloc_surface_state(cmd_buffer);
117 bt_map[i] = surface_state.offset + state_offset;
118 surface_offsets[i] = surface_state.offset;
119 surface_maps[i] = surface_state.map;
120 }
121
122 anv_state_flush(cmd_buffer->device, bt_state);
123 }
124
125 static void *
126 blorp_alloc_vertex_buffer(struct blorp_batch *batch, uint32_t size,
127 struct blorp_address *addr)
128 {
129 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
130
131 /* From the Skylake PRM, 3DSTATE_VERTEX_BUFFERS:
132 *
133 * "The VF cache needs to be invalidated before binding and then using
134 * Vertex Buffers that overlap with any previously bound Vertex Buffer
135 * (at a 64B granularity) since the last invalidation. A VF cache
136 * invalidate is performed by setting the "VF Cache Invalidation Enable"
137 * bit in PIPE_CONTROL."
138 *
139 * This restriction first appears in the Skylake PRM but the internal docs
140 * also list it as being an issue on Broadwell. In order to avoid this
141 * problem, we align all vertex buffer allocations to 64 bytes.
142 */
143 struct anv_state vb_state =
144 anv_cmd_buffer_alloc_dynamic_state(cmd_buffer, size, 64);
145
146 *addr = (struct blorp_address) {
147 .buffer = &cmd_buffer->device->dynamic_state_pool.block_pool.bo,
148 .offset = vb_state.offset,
149 .mocs = cmd_buffer->device->default_mocs,
150 };
151
152 return vb_state.map;
153 }
154
155 #if GEN_GEN >= 8
156 static struct blorp_address
157 blorp_get_workaround_page(struct blorp_batch *batch)
158 {
159 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
160
161 return (struct blorp_address) {
162 .buffer = &cmd_buffer->device->workaround_bo,
163 };
164 }
165 #endif
166
167 static void
168 blorp_flush_range(struct blorp_batch *batch, void *start, size_t size)
169 {
170 struct anv_device *device = batch->blorp->driver_ctx;
171 if (!device->info.has_llc)
172 gen_flush_range(start, size);
173 }
174
175 static void
176 blorp_emit_urb_config(struct blorp_batch *batch,
177 unsigned vs_entry_size, unsigned sf_entry_size)
178 {
179 struct anv_device *device = batch->blorp->driver_ctx;
180 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
181
182 assert(sf_entry_size == 0);
183
184 const unsigned entry_size[4] = { vs_entry_size, 1, 1, 1 };
185
186 genX(emit_urb_setup)(device, &cmd_buffer->batch,
187 cmd_buffer->state.current_l3_config,
188 VK_SHADER_STAGE_VERTEX_BIT |
189 VK_SHADER_STAGE_FRAGMENT_BIT,
190 entry_size);
191 }
192
193 void
194 genX(blorp_exec)(struct blorp_batch *batch,
195 const struct blorp_params *params)
196 {
197 struct anv_cmd_buffer *cmd_buffer = batch->driver_batch;
198
199 if (!cmd_buffer->state.current_l3_config) {
200 const struct gen_l3_config *cfg =
201 gen_get_default_l3_config(&cmd_buffer->device->info);
202 genX(cmd_buffer_config_l3)(cmd_buffer, cfg);
203 }
204
205 #if GEN_GEN == 7
206 /* The MI_LOAD/STORE_REGISTER_MEM commands which BLORP uses to implement
207 * indirect fast-clear colors can cause GPU hangs if we don't stall first.
208 * See genX(cmd_buffer_mi_memcpy) for more details.
209 */
210 if (params->src.clear_color_addr.buffer ||
211 params->dst.clear_color_addr.buffer)
212 cmd_buffer->state.pending_pipe_bits |= ANV_PIPE_CS_STALL_BIT;
213 #endif
214
215 genX(cmd_buffer_apply_pipe_flushes)(cmd_buffer);
216
217 genX(flush_pipeline_select_3d)(cmd_buffer);
218
219 genX(cmd_buffer_emit_gen7_depth_flush)(cmd_buffer);
220
221 /* BLORP doesn't do anything fancy with depth such as discards, so we want
222 * the PMA fix off. Also, off is always the safe option.
223 */
224 genX(cmd_buffer_enable_pma_fix)(cmd_buffer, false);
225
226 /* Disable VF statistics */
227 blorp_emit(batch, GENX(3DSTATE_VF_STATISTICS), vf) {
228 vf.StatisticsEnable = false;
229 }
230
231 blorp_exec(batch, params);
232
233 cmd_buffer->state.gfx.vb_dirty = ~0;
234 cmd_buffer->state.gfx.dirty = ~0;
235 cmd_buffer->state.push_constants_dirty = ~0;
236 }