2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "anv_private.h"
26 #include "genxml/gen_macros.h"
27 #include "genxml/genX_pack.h"
30 genX(compute_pipeline_create
)(
32 struct anv_pipeline_cache
* cache
,
33 const VkComputePipelineCreateInfo
* pCreateInfo
,
34 const VkAllocationCallbacks
* pAllocator
,
35 VkPipeline
* pPipeline
)
37 ANV_FROM_HANDLE(anv_device
, device
, _device
);
38 struct anv_pipeline
*pipeline
;
41 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_COMPUTE_PIPELINE_CREATE_INFO
);
43 pipeline
= anv_alloc2(&device
->alloc
, pAllocator
, sizeof(*pipeline
), 8,
44 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
46 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
48 pipeline
->device
= device
;
49 pipeline
->layout
= anv_pipeline_layout_from_handle(pCreateInfo
->layout
);
51 pipeline
->blend_state
.map
= NULL
;
53 result
= anv_reloc_list_init(&pipeline
->batch_relocs
,
54 pAllocator
? pAllocator
: &device
->alloc
);
55 if (result
!= VK_SUCCESS
) {
56 anv_free2(&device
->alloc
, pAllocator
, pipeline
);
59 pipeline
->batch
.next
= pipeline
->batch
.start
= pipeline
->batch_data
;
60 pipeline
->batch
.end
= pipeline
->batch
.start
+ sizeof(pipeline
->batch_data
);
61 pipeline
->batch
.relocs
= &pipeline
->batch_relocs
;
63 /* When we free the pipeline, we detect stages based on the NULL status
64 * of various prog_data pointers. Make them NULL by default.
66 memset(pipeline
->prog_data
, 0, sizeof(pipeline
->prog_data
));
67 memset(pipeline
->scratch_start
, 0, sizeof(pipeline
->scratch_start
));
68 memset(pipeline
->bindings
, 0, sizeof(pipeline
->bindings
));
70 pipeline
->vs_simd8
= NO_KERNEL
;
71 pipeline
->vs_vec4
= NO_KERNEL
;
72 pipeline
->gs_kernel
= NO_KERNEL
;
74 pipeline
->active_stages
= 0;
75 pipeline
->total_scratch
= 0;
77 assert(pCreateInfo
->stage
.stage
== VK_SHADER_STAGE_COMPUTE_BIT
);
78 ANV_FROM_HANDLE(anv_shader_module
, module
, pCreateInfo
->stage
.module
);
79 anv_pipeline_compile_cs(pipeline
, cache
, pCreateInfo
, module
,
80 pCreateInfo
->stage
.pName
,
81 pCreateInfo
->stage
.pSpecializationInfo
);
83 pipeline
->use_repclear
= false;
85 const struct brw_cs_prog_data
*cs_prog_data
= &pipeline
->cs_prog_data
;
87 anv_batch_emit(&pipeline
->batch
, GENX(MEDIA_VFE_STATE
),
88 .ScratchSpaceBasePointer
= pipeline
->scratch_start
[MESA_SHADER_COMPUTE
],
89 .PerThreadScratchSpace
= ffs(cs_prog_data
->base
.total_scratch
/ 2048),
91 .ScratchSpaceBasePointerHigh
= 0,
96 .MaximumNumberofThreads
= device
->info
.max_cs_threads
- 1,
97 .NumberofURBEntries
= GEN_GEN
<= 7 ? 0 : 2,
98 .ResetGatewayTimer
= true,
100 .BypassGatewayControl
= true,
102 .URBEntryAllocationSize
= GEN_GEN
<= 7 ? 0 : 2,
103 .CURBEAllocationSize
= 0);
105 struct brw_cs_prog_data
*prog_data
= &pipeline
->cs_prog_data
;
106 uint32_t group_size
= prog_data
->local_size
[0] *
107 prog_data
->local_size
[1] * prog_data
->local_size
[2];
108 pipeline
->cs_thread_width_max
= DIV_ROUND_UP(group_size
, prog_data
->simd_size
);
109 uint32_t remainder
= group_size
& (prog_data
->simd_size
- 1);
112 pipeline
->cs_right_mask
= ~0u >> (32 - remainder
);
114 pipeline
->cs_right_mask
= ~0u >> (32 - prog_data
->simd_size
);
117 *pPipeline
= anv_pipeline_to_handle(pipeline
);