2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 #include "anv_private.h"
32 #include "genxml/gen_macros.h"
33 #include "genxml/genX_pack.h"
35 /* We reserve GPR 14 and 15 for conditional rendering */
36 #define GEN_MI_BUILDER_NUM_ALLOC_GPRS 14
37 #define __gen_get_batch_dwords anv_batch_emit_dwords
38 #define __gen_address_offset anv_address_add
39 #include "common/gen_mi_builder.h"
41 VkResult
genX(CreateQueryPool
)(
43 const VkQueryPoolCreateInfo
* pCreateInfo
,
44 const VkAllocationCallbacks
* pAllocator
,
45 VkQueryPool
* pQueryPool
)
47 ANV_FROM_HANDLE(anv_device
, device
, _device
);
48 const struct anv_physical_device
*pdevice
= &device
->instance
->physicalDevice
;
49 struct anv_query_pool
*pool
;
52 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_QUERY_POOL_CREATE_INFO
);
54 /* Query pool slots are made up of some number of 64-bit values packed
55 * tightly together. The first 64-bit value is always the "available" bit
56 * which is 0 when the query is unavailable and 1 when it is available.
57 * The 64-bit values that follow are determined by the type of query.
59 uint32_t uint64s_per_slot
= 1;
61 VkQueryPipelineStatisticFlags pipeline_statistics
= 0;
62 switch (pCreateInfo
->queryType
) {
63 case VK_QUERY_TYPE_OCCLUSION
:
64 /* Occlusion queries have two values: begin and end. */
65 uint64s_per_slot
+= 2;
67 case VK_QUERY_TYPE_TIMESTAMP
:
68 /* Timestamps just have the one timestamp value */
69 uint64s_per_slot
+= 1;
71 case VK_QUERY_TYPE_PIPELINE_STATISTICS
:
72 pipeline_statistics
= pCreateInfo
->pipelineStatistics
;
73 /* We're going to trust this field implicitly so we need to ensure that
74 * no unhandled extension bits leak in.
76 pipeline_statistics
&= ANV_PIPELINE_STATISTICS_MASK
;
78 /* Statistics queries have a min and max for every statistic */
79 uint64s_per_slot
+= 2 * util_bitcount(pipeline_statistics
);
81 case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
:
82 /* Transform feedback queries are 4 values, begin/end for
85 uint64s_per_slot
+= 4;
88 assert(!"Invalid query type");
91 pool
= vk_alloc2(&device
->alloc
, pAllocator
, sizeof(*pool
), 8,
92 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
94 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
96 pool
->type
= pCreateInfo
->queryType
;
97 pool
->pipeline_statistics
= pipeline_statistics
;
98 pool
->stride
= uint64s_per_slot
* sizeof(uint64_t);
99 pool
->slots
= pCreateInfo
->queryCount
;
101 uint64_t size
= pool
->slots
* pool
->stride
;
102 result
= anv_bo_init_new(&pool
->bo
, device
, size
);
103 if (result
!= VK_SUCCESS
)
106 if (pdevice
->supports_48bit_addresses
)
107 pool
->bo
.flags
|= EXEC_OBJECT_SUPPORTS_48B_ADDRESS
;
109 if (pdevice
->use_softpin
)
110 pool
->bo
.flags
|= EXEC_OBJECT_PINNED
;
112 if (pdevice
->has_exec_async
)
113 pool
->bo
.flags
|= EXEC_OBJECT_ASYNC
;
115 anv_vma_alloc(device
, &pool
->bo
);
117 /* For query pools, we set the caching mode to I915_CACHING_CACHED. On LLC
118 * platforms, this does nothing. On non-LLC platforms, this means snooping
119 * which comes at a slight cost. However, the buffers aren't big, won't be
120 * written frequently, and trying to handle the flushing manually without
121 * doing too much flushing is extremely painful.
123 anv_gem_set_caching(device
, pool
->bo
.gem_handle
, I915_CACHING_CACHED
);
125 pool
->bo
.map
= anv_gem_mmap(device
, pool
->bo
.gem_handle
, 0, size
, 0);
127 *pQueryPool
= anv_query_pool_to_handle(pool
);
132 vk_free2(&device
->alloc
, pAllocator
, pool
);
137 void genX(DestroyQueryPool
)(
140 const VkAllocationCallbacks
* pAllocator
)
142 ANV_FROM_HANDLE(anv_device
, device
, _device
);
143 ANV_FROM_HANDLE(anv_query_pool
, pool
, _pool
);
148 anv_gem_munmap(pool
->bo
.map
, pool
->bo
.size
);
149 anv_vma_free(device
, &pool
->bo
);
150 anv_gem_close(device
, pool
->bo
.gem_handle
);
151 vk_free2(&device
->alloc
, pAllocator
, pool
);
154 static struct anv_address
155 anv_query_address(struct anv_query_pool
*pool
, uint32_t query
)
157 return (struct anv_address
) {
159 .offset
= query
* pool
->stride
,
164 cpu_write_query_result(void *dst_slot
, VkQueryResultFlags flags
,
165 uint32_t value_index
, uint64_t result
)
167 if (flags
& VK_QUERY_RESULT_64_BIT
) {
168 uint64_t *dst64
= dst_slot
;
169 dst64
[value_index
] = result
;
171 uint32_t *dst32
= dst_slot
;
172 dst32
[value_index
] = result
;
177 query_is_available(uint64_t *slot
)
179 return *(volatile uint64_t *)slot
;
183 wait_for_available(struct anv_device
*device
,
184 struct anv_query_pool
*pool
, uint64_t *slot
)
187 if (query_is_available(slot
))
190 int ret
= anv_gem_busy(device
, pool
->bo
.gem_handle
);
192 /* The BO is still busy, keep waiting. */
194 } else if (ret
== -1) {
195 /* We don't know the real error. */
196 return anv_device_set_lost(device
, "gem wait failed: %m");
199 /* The BO is no longer busy. */
200 if (query_is_available(slot
)) {
203 VkResult status
= anv_device_query_status(device
);
204 if (status
!= VK_SUCCESS
)
207 /* If we haven't seen availability yet, then we never will. This
208 * can only happen if we have a client error where they call
209 * GetQueryPoolResults on a query that they haven't submitted to
210 * the GPU yet. The spec allows us to do anything in this case,
211 * but returning VK_SUCCESS doesn't seem right and we shouldn't
212 * just keep spinning.
220 VkResult
genX(GetQueryPoolResults
)(
222 VkQueryPool queryPool
,
228 VkQueryResultFlags flags
)
230 ANV_FROM_HANDLE(anv_device
, device
, _device
);
231 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
233 assert(pool
->type
== VK_QUERY_TYPE_OCCLUSION
||
234 pool
->type
== VK_QUERY_TYPE_PIPELINE_STATISTICS
||
235 pool
->type
== VK_QUERY_TYPE_TIMESTAMP
||
236 pool
->type
== VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
);
238 if (anv_device_is_lost(device
))
239 return VK_ERROR_DEVICE_LOST
;
244 void *data_end
= pData
+ dataSize
;
246 VkResult status
= VK_SUCCESS
;
247 for (uint32_t i
= 0; i
< queryCount
; i
++) {
248 uint64_t *slot
= pool
->bo
.map
+ (firstQuery
+ i
) * pool
->stride
;
250 /* Availability is always at the start of the slot */
251 bool available
= slot
[0];
253 if (!available
&& (flags
& VK_QUERY_RESULT_WAIT_BIT
)) {
254 status
= wait_for_available(device
, pool
, slot
);
255 if (status
!= VK_SUCCESS
)
261 /* From the Vulkan 1.0.42 spec:
263 * "If VK_QUERY_RESULT_WAIT_BIT and VK_QUERY_RESULT_PARTIAL_BIT are
264 * both not set then no result values are written to pData for
265 * queries that are in the unavailable state at the time of the call,
266 * and vkGetQueryPoolResults returns VK_NOT_READY. However,
267 * availability state is still written to pData for those queries if
268 * VK_QUERY_RESULT_WITH_AVAILABILITY_BIT is set."
270 bool write_results
= available
|| (flags
& VK_QUERY_RESULT_PARTIAL_BIT
);
273 switch (pool
->type
) {
274 case VK_QUERY_TYPE_OCCLUSION
:
276 cpu_write_query_result(pData
, flags
, idx
, slot
[2] - slot
[1]);
280 case VK_QUERY_TYPE_PIPELINE_STATISTICS
: {
281 uint32_t statistics
= pool
->pipeline_statistics
;
283 uint32_t stat
= u_bit_scan(&statistics
);
285 uint64_t result
= slot
[idx
* 2 + 2] - slot
[idx
* 2 + 1];
287 /* WaDividePSInvocationCountBy4:HSW,BDW */
288 if ((device
->info
.gen
== 8 || device
->info
.is_haswell
) &&
289 (1 << stat
) == VK_QUERY_PIPELINE_STATISTIC_FRAGMENT_SHADER_INVOCATIONS_BIT
)
292 cpu_write_query_result(pData
, flags
, idx
, result
);
296 assert(idx
== util_bitcount(pool
->pipeline_statistics
));
300 case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
:
302 cpu_write_query_result(pData
, flags
, idx
, slot
[2] - slot
[1]);
305 cpu_write_query_result(pData
, flags
, idx
, slot
[4] - slot
[3]);
309 case VK_QUERY_TYPE_TIMESTAMP
:
311 cpu_write_query_result(pData
, flags
, idx
, slot
[1]);
316 unreachable("invalid pool type");
320 status
= VK_NOT_READY
;
322 if (flags
& VK_QUERY_RESULT_WITH_AVAILABILITY_BIT
)
323 cpu_write_query_result(pData
, flags
, idx
, available
);
326 if (pData
>= data_end
)
334 emit_ps_depth_count(struct anv_cmd_buffer
*cmd_buffer
,
335 struct anv_address addr
)
337 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
338 pc
.DestinationAddressType
= DAT_PPGTT
;
339 pc
.PostSyncOperation
= WritePSDepthCount
;
340 pc
.DepthStallEnable
= true;
343 if (GEN_GEN
== 9 && cmd_buffer
->device
->info
.gt
== 4)
344 pc
.CommandStreamerStallEnable
= true;
349 emit_query_availability(struct anv_cmd_buffer
*cmd_buffer
,
350 struct anv_address addr
)
352 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
353 pc
.DestinationAddressType
= DAT_PPGTT
;
354 pc
.PostSyncOperation
= WriteImmediateData
;
356 pc
.ImmediateData
= 1;
361 * Goes through a series of consecutive query indices in the given pool
362 * setting all element values to 0 and emitting them as available.
365 emit_zero_queries(struct anv_cmd_buffer
*cmd_buffer
,
366 struct anv_query_pool
*pool
,
367 uint32_t first_index
, uint32_t num_queries
)
369 for (uint32_t i
= 0; i
< num_queries
; i
++) {
370 struct anv_address slot_addr
=
371 anv_query_address(pool
, first_index
+ i
);
372 genX(cmd_buffer_mi_memset
)(cmd_buffer
, anv_address_add(slot_addr
, 8),
373 0, pool
->stride
- 8);
374 emit_query_availability(cmd_buffer
, slot_addr
);
378 void genX(CmdResetQueryPool
)(
379 VkCommandBuffer commandBuffer
,
380 VkQueryPool queryPool
,
384 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
385 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
387 for (uint32_t i
= 0; i
< queryCount
; i
++) {
388 anv_batch_emit(&cmd_buffer
->batch
, GENX(MI_STORE_DATA_IMM
), sdm
) {
389 sdm
.Address
= anv_query_address(pool
, firstQuery
+ i
);
390 sdm
.ImmediateData
= 0;
395 void genX(ResetQueryPoolEXT
)(
397 VkQueryPool queryPool
,
401 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
403 for (uint32_t i
= 0; i
< queryCount
; i
++) {
404 uint64_t *slot
= pool
->bo
.map
+ (firstQuery
+ i
) * pool
->stride
;
409 static const uint32_t vk_pipeline_stat_to_reg
[] = {
410 GENX(IA_VERTICES_COUNT_num
),
411 GENX(IA_PRIMITIVES_COUNT_num
),
412 GENX(VS_INVOCATION_COUNT_num
),
413 GENX(GS_INVOCATION_COUNT_num
),
414 GENX(GS_PRIMITIVES_COUNT_num
),
415 GENX(CL_INVOCATION_COUNT_num
),
416 GENX(CL_PRIMITIVES_COUNT_num
),
417 GENX(PS_INVOCATION_COUNT_num
),
418 GENX(HS_INVOCATION_COUNT_num
),
419 GENX(DS_INVOCATION_COUNT_num
),
420 GENX(CS_INVOCATION_COUNT_num
),
424 emit_pipeline_stat(struct gen_mi_builder
*b
, uint32_t stat
,
425 struct anv_address addr
)
427 STATIC_ASSERT(ANV_PIPELINE_STATISTICS_MASK
==
428 (1 << ARRAY_SIZE(vk_pipeline_stat_to_reg
)) - 1);
430 assert(stat
< ARRAY_SIZE(vk_pipeline_stat_to_reg
));
431 gen_mi_store(b
, gen_mi_mem64(addr
),
432 gen_mi_reg64(vk_pipeline_stat_to_reg
[stat
]));
436 emit_xfb_query(struct gen_mi_builder
*b
, uint32_t stream
,
437 struct anv_address addr
)
439 assert(stream
< MAX_XFB_STREAMS
);
441 gen_mi_store(b
, gen_mi_mem64(anv_address_add(addr
, 0)),
442 gen_mi_reg64(GENX(SO_NUM_PRIMS_WRITTEN0_num
) + stream
* 8));
443 gen_mi_store(b
, gen_mi_mem64(anv_address_add(addr
, 16)),
444 gen_mi_reg64(GENX(SO_PRIM_STORAGE_NEEDED0_num
) + stream
* 8));
447 void genX(CmdBeginQuery
)(
448 VkCommandBuffer commandBuffer
,
449 VkQueryPool queryPool
,
451 VkQueryControlFlags flags
)
453 genX(CmdBeginQueryIndexedEXT
)(commandBuffer
, queryPool
, query
, flags
, 0);
456 void genX(CmdBeginQueryIndexedEXT
)(
457 VkCommandBuffer commandBuffer
,
458 VkQueryPool queryPool
,
460 VkQueryControlFlags flags
,
463 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
464 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
465 struct anv_address query_addr
= anv_query_address(pool
, query
);
467 struct gen_mi_builder b
;
468 gen_mi_builder_init(&b
, &cmd_buffer
->batch
);
470 switch (pool
->type
) {
471 case VK_QUERY_TYPE_OCCLUSION
:
472 emit_ps_depth_count(cmd_buffer
, anv_address_add(query_addr
, 8));
475 case VK_QUERY_TYPE_PIPELINE_STATISTICS
: {
476 /* TODO: This might only be necessary for certain stats */
477 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
478 pc
.CommandStreamerStallEnable
= true;
479 pc
.StallAtPixelScoreboard
= true;
482 uint32_t statistics
= pool
->pipeline_statistics
;
485 uint32_t stat
= u_bit_scan(&statistics
);
486 emit_pipeline_stat(&b
, stat
, anv_address_add(query_addr
, offset
));
492 case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
:
493 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
494 pc
.CommandStreamerStallEnable
= true;
495 pc
.StallAtPixelScoreboard
= true;
497 emit_xfb_query(&b
, index
, anv_address_add(query_addr
, 8));
505 void genX(CmdEndQuery
)(
506 VkCommandBuffer commandBuffer
,
507 VkQueryPool queryPool
,
508 VkQueryControlFlags flags
)
510 genX(CmdEndQueryIndexedEXT
)(commandBuffer
, queryPool
, flags
, 0);
513 void genX(CmdEndQueryIndexedEXT
)(
514 VkCommandBuffer commandBuffer
,
515 VkQueryPool queryPool
,
519 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
520 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
521 struct anv_address query_addr
= anv_query_address(pool
, query
);
523 struct gen_mi_builder b
;
524 gen_mi_builder_init(&b
, &cmd_buffer
->batch
);
526 switch (pool
->type
) {
527 case VK_QUERY_TYPE_OCCLUSION
:
528 emit_ps_depth_count(cmd_buffer
, anv_address_add(query_addr
, 16));
529 emit_query_availability(cmd_buffer
, query_addr
);
532 case VK_QUERY_TYPE_PIPELINE_STATISTICS
: {
533 /* TODO: This might only be necessary for certain stats */
534 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
535 pc
.CommandStreamerStallEnable
= true;
536 pc
.StallAtPixelScoreboard
= true;
539 uint32_t statistics
= pool
->pipeline_statistics
;
540 uint32_t offset
= 16;
542 uint32_t stat
= u_bit_scan(&statistics
);
543 emit_pipeline_stat(&b
, stat
, anv_address_add(query_addr
, offset
));
547 emit_query_availability(cmd_buffer
, query_addr
);
551 case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
:
552 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
553 pc
.CommandStreamerStallEnable
= true;
554 pc
.StallAtPixelScoreboard
= true;
557 emit_xfb_query(&b
, index
, anv_address_add(query_addr
, 16));
558 emit_query_availability(cmd_buffer
, query_addr
);
565 /* When multiview is active the spec requires that N consecutive query
566 * indices are used, where N is the number of active views in the subpass.
567 * The spec allows that we only write the results to one of the queries
568 * but we still need to manage result availability for all the query indices.
569 * Since we only emit a single query for all active views in the
570 * first index, mark the other query indices as being already available
573 if (cmd_buffer
->state
.subpass
&& cmd_buffer
->state
.subpass
->view_mask
) {
574 const uint32_t num_queries
=
575 util_bitcount(cmd_buffer
->state
.subpass
->view_mask
);
577 emit_zero_queries(cmd_buffer
, pool
, query
+ 1, num_queries
- 1);
581 #define TIMESTAMP 0x2358
583 void genX(CmdWriteTimestamp
)(
584 VkCommandBuffer commandBuffer
,
585 VkPipelineStageFlagBits pipelineStage
,
586 VkQueryPool queryPool
,
589 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
590 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
591 struct anv_address query_addr
= anv_query_address(pool
, query
);
593 assert(pool
->type
== VK_QUERY_TYPE_TIMESTAMP
);
595 struct gen_mi_builder b
;
596 gen_mi_builder_init(&b
, &cmd_buffer
->batch
);
598 switch (pipelineStage
) {
599 case VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT
:
600 gen_mi_store(&b
, gen_mi_mem64(anv_address_add(query_addr
, 8)),
601 gen_mi_reg64(TIMESTAMP
));
605 /* Everything else is bottom-of-pipe */
606 anv_batch_emit(&cmd_buffer
->batch
, GENX(PIPE_CONTROL
), pc
) {
607 pc
.DestinationAddressType
= DAT_PPGTT
;
608 pc
.PostSyncOperation
= WriteTimestamp
;
609 pc
.Address
= anv_address_add(query_addr
, 8);
611 if (GEN_GEN
== 9 && cmd_buffer
->device
->info
.gt
== 4)
612 pc
.CommandStreamerStallEnable
= true;
617 emit_query_availability(cmd_buffer
, query_addr
);
619 /* When multiview is active the spec requires that N consecutive query
620 * indices are used, where N is the number of active views in the subpass.
621 * The spec allows that we only write the results to one of the queries
622 * but we still need to manage result availability for all the query indices.
623 * Since we only emit a single query for all active views in the
624 * first index, mark the other query indices as being already available
627 if (cmd_buffer
->state
.subpass
&& cmd_buffer
->state
.subpass
->view_mask
) {
628 const uint32_t num_queries
=
629 util_bitcount(cmd_buffer
->state
.subpass
->view_mask
);
631 emit_zero_queries(cmd_buffer
, pool
, query
+ 1, num_queries
- 1);
635 #if GEN_GEN > 7 || GEN_IS_HASWELL
638 gpu_write_query_result(struct gen_mi_builder
*b
,
639 struct anv_address dst_addr
,
640 VkQueryResultFlags flags
,
641 uint32_t value_index
,
642 struct gen_mi_value query_result
)
644 if (flags
& VK_QUERY_RESULT_64_BIT
) {
645 struct anv_address res_addr
= anv_address_add(dst_addr
, value_index
* 8);
646 gen_mi_store(b
, gen_mi_mem64(res_addr
), query_result
);
648 struct anv_address res_addr
= anv_address_add(dst_addr
, value_index
* 4);
649 gen_mi_store(b
, gen_mi_mem32(res_addr
), query_result
);
653 static struct gen_mi_value
654 compute_query_result(struct gen_mi_builder
*b
, struct anv_address addr
)
656 return gen_mi_isub(b
, gen_mi_mem64(anv_address_add(addr
, 8)),
657 gen_mi_mem64(anv_address_add(addr
, 0)));
660 void genX(CmdCopyQueryPoolResults
)(
661 VkCommandBuffer commandBuffer
,
662 VkQueryPool queryPool
,
666 VkDeviceSize destOffset
,
667 VkDeviceSize destStride
,
668 VkQueryResultFlags flags
)
670 ANV_FROM_HANDLE(anv_cmd_buffer
, cmd_buffer
, commandBuffer
);
671 ANV_FROM_HANDLE(anv_query_pool
, pool
, queryPool
);
672 ANV_FROM_HANDLE(anv_buffer
, buffer
, destBuffer
);
674 struct gen_mi_builder b
;
675 gen_mi_builder_init(&b
, &cmd_buffer
->batch
);
676 struct gen_mi_value result
;
678 /* If render target writes are ongoing, request a render target cache flush
679 * to ensure proper ordering of the commands from the 3d pipe and the
682 if (cmd_buffer
->state
.pending_pipe_bits
& ANV_PIPE_RENDER_TARGET_BUFFER_WRITES
) {
683 cmd_buffer
->state
.pending_pipe_bits
|=
684 ANV_PIPE_RENDER_TARGET_CACHE_FLUSH_BIT
;
687 if ((flags
& VK_QUERY_RESULT_WAIT_BIT
) ||
688 (cmd_buffer
->state
.pending_pipe_bits
& ANV_PIPE_FLUSH_BITS
)) {
689 cmd_buffer
->state
.pending_pipe_bits
|= ANV_PIPE_CS_STALL_BIT
;
690 genX(cmd_buffer_apply_pipe_flushes
)(cmd_buffer
);
693 struct anv_address dest_addr
= anv_address_add(buffer
->address
, destOffset
);
694 for (uint32_t i
= 0; i
< queryCount
; i
++) {
695 struct anv_address query_addr
= anv_query_address(pool
, firstQuery
+ i
);
697 switch (pool
->type
) {
698 case VK_QUERY_TYPE_OCCLUSION
:
699 result
= compute_query_result(&b
, anv_address_add(query_addr
, 8));
700 gpu_write_query_result(&b
, dest_addr
, flags
, idx
++, result
);
703 case VK_QUERY_TYPE_PIPELINE_STATISTICS
: {
704 uint32_t statistics
= pool
->pipeline_statistics
;
706 uint32_t stat
= u_bit_scan(&statistics
);
708 result
= compute_query_result(&b
, anv_address_add(query_addr
,
711 /* WaDividePSInvocationCountBy4:HSW,BDW */
712 if ((cmd_buffer
->device
->info
.gen
== 8 ||
713 cmd_buffer
->device
->info
.is_haswell
) &&
714 (1 << stat
) == VK_QUERY_PIPELINE_STATISTIC_FRAGMENT_SHADER_INVOCATIONS_BIT
) {
715 result
= gen_mi_ushr32_imm(&b
, result
, 2);
718 gpu_write_query_result(&b
, dest_addr
, flags
, idx
++, result
);
720 assert(idx
== util_bitcount(pool
->pipeline_statistics
));
724 case VK_QUERY_TYPE_TRANSFORM_FEEDBACK_STREAM_EXT
:
725 result
= compute_query_result(&b
, anv_address_add(query_addr
, 8));
726 gpu_write_query_result(&b
, dest_addr
, flags
, idx
++, result
);
727 result
= compute_query_result(&b
, anv_address_add(query_addr
, 24));
728 gpu_write_query_result(&b
, dest_addr
, flags
, idx
++, result
);
731 case VK_QUERY_TYPE_TIMESTAMP
:
732 result
= gen_mi_mem64(anv_address_add(query_addr
, 8));
733 gpu_write_query_result(&b
, dest_addr
, flags
, 0, result
);
737 unreachable("unhandled query type");
740 if (flags
& VK_QUERY_RESULT_WITH_AVAILABILITY_BIT
) {
741 gpu_write_query_result(&b
, dest_addr
, flags
, idx
,
742 gen_mi_mem64(query_addr
));
745 dest_addr
= anv_address_add(dest_addr
, destStride
);
750 void genX(CmdCopyQueryPoolResults
)(
751 VkCommandBuffer commandBuffer
,
752 VkQueryPool queryPool
,
756 VkDeviceSize destOffset
,
757 VkDeviceSize destStride
,
758 VkQueryResultFlags flags
)
760 anv_finishme("Queries not yet supported on Ivy Bridge");