src/intel/vulkan/genX_state.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include <assert.h>
  25 #include <stdbool.h>
  26 #include <string.h>
  27 #include <unistd.h>
  28 #include <fcntl.h>
  29
  30 #include "anv_private.h"
  31
  32 #include "common/gen_sample_positions.h"
  33 #include "genxml/gen_macros.h"
  34 #include "genxml/genX_pack.h"
  35
  36 #include "vk_util.h"
  37
  38 #if GEN_GEN == 10
  39 /**
  40  * From Gen10 Workarounds page in h/w specs:
  41  * WaSampleOffsetIZ:
  42  *    "Prior to the 3DSTATE_SAMPLE_PATTERN driver must ensure there are no
  43  *     markers in the pipeline by programming a PIPE_CONTROL with stall."
  44  */
  45 static void
  46 gen10_emit_wa_cs_stall_flush(struct anv_batch *batch)
  47 {
  48
  49    anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
  50       pc.CommandStreamerStallEnable = true;
  51       pc.StallAtPixelScoreboard = true;
  52    }
  53 }
  54
  55 /**
  56  * From Gen10 Workarounds page in h/w specs:
  57  * WaSampleOffsetIZ:_cs_stall_flush
  58  *    "When 3DSTATE_SAMPLE_PATTERN is programmed, driver must then issue an
  59  *     MI_LOAD_REGISTER_IMM command to an offset between 0x7000 and 0x7FFF(SVL)
  60  *     after the command to ensure the state has been delivered prior to any
  61  *     command causing a marker in the pipeline."
  62  */
  63 static void
  64 gen10_emit_wa_lri_to_cache_mode_zero(struct anv_batch *batch)
  65 {
  66    /* Before changing the value of CACHE_MODE_0 register, GFX pipeline must
  67     * be idle; i.e., full flush is required.
  68     */
  69    anv_batch_emit(batch, GENX(PIPE_CONTROL), pc) {
  70       pc.DepthCacheFlushEnable = true;
  71       pc.DCFlushEnable = true;
  72       pc.RenderTargetCacheFlushEnable = true;
  73       pc.InstructionCacheInvalidateEnable = true;
  74       pc.StateCacheInvalidationEnable = true;
  75       pc.TextureCacheInvalidationEnable = true;
  76       pc.VFCacheInvalidationEnable = true;
  77       pc.ConstantCacheInvalidationEnable =true;
  78    }
  79
  80    /* Write to CACHE_MODE_0 (0x7000) */
  81    uint32_t cache_mode_0 = 0;
  82    anv_pack_struct(&cache_mode_0, GENX(CACHE_MODE_0));
  83
  84    anv_batch_emit(batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
  85       lri.RegisterOffset = GENX(CACHE_MODE_0_num);
  86       lri.DataDWord      = cache_mode_0;
  87    }
  88 }
  89 #endif
  90
  91 VkResult
  92 genX(init_device_state)(struct anv_device *device)
  93 {
  94    GENX(MEMORY_OBJECT_CONTROL_STATE_pack)(NULL, &device->default_mocs,
  95                                           &GENX(MOCS));
  96
  97    struct anv_batch batch;
  98
  99    uint32_t cmds[64];
 100    batch.start = batch.next = cmds;
 101    batch.end = (void *) cmds + sizeof(cmds);
 102
 103    anv_batch_emit(&batch, GENX(PIPELINE_SELECT), ps) {
 104 #if GEN_GEN >= 9
 105       ps.MaskBits = 3;
 106 #endif
 107       ps.PipelineSelection = _3D;
 108    }
 109
 110 #if GEN_GEN == 9
 111    uint32_t cache_mode_1;
 112    anv_pack_struct(&cache_mode_1, GENX(CACHE_MODE_1),
 113                    .FloatBlendOptimizationEnable = true,
 114                    .FloatBlendOptimizationEnableMask = true,
 115                    .PartialResolveDisableInVC = true,
 116                    .PartialResolveDisableInVCMask = true);
 117
 118    anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
 119       lri.RegisterOffset = GENX(CACHE_MODE_1_num);
 120       lri.DataDWord      = cache_mode_1;
 121    }
 122 #endif
 123
 124    anv_batch_emit(&batch, GENX(3DSTATE_AA_LINE_PARAMETERS), aa);
 125
 126    anv_batch_emit(&batch, GENX(3DSTATE_DRAWING_RECTANGLE), rect) {
 127       rect.ClippedDrawingRectangleYMin = 0;
 128       rect.ClippedDrawingRectangleXMin = 0;
 129       rect.ClippedDrawingRectangleYMax = UINT16_MAX;
 130       rect.ClippedDrawingRectangleXMax = UINT16_MAX;
 131       rect.DrawingRectangleOriginY = 0;
 132       rect.DrawingRectangleOriginX = 0;
 133    }
 134
 135 #if GEN_GEN >= 8
 136    anv_batch_emit(&batch, GENX(3DSTATE_WM_CHROMAKEY), ck);
 137
 138 #if GEN_GEN == 10
 139    gen10_emit_wa_cs_stall_flush(&batch);
 140 #endif
 141
 142    /* See the Vulkan 1.0 spec Table 24.1 "Standard sample locations" and
 143     * VkPhysicalDeviceFeatures::standardSampleLocations.
 144     */
 145    anv_batch_emit(&batch, GENX(3DSTATE_SAMPLE_PATTERN), sp) {
 146       GEN_SAMPLE_POS_1X(sp._1xSample);
 147       GEN_SAMPLE_POS_2X(sp._2xSample);
 148       GEN_SAMPLE_POS_4X(sp._4xSample);
 149       GEN_SAMPLE_POS_8X(sp._8xSample);
 150 #if GEN_GEN >= 9
 151       GEN_SAMPLE_POS_16X(sp._16xSample);
 152 #endif
 153    }
 154 #endif
 155
 156 #if GEN_GEN == 10
 157    gen10_emit_wa_lri_to_cache_mode_zero(&batch);
 158 #endif
 159
 160 #if GEN_GEN == 11
 161    /* The default behavior of bit 5 "Headerless Message for Pre-emptable
 162     * Contexts" in SAMPLER MODE register is set to 0, which means
 163     * headerless sampler messages are not allowed for pre-emptable
 164     * contexts. Set the bit 5 to 1 to allow them.
 165     */
 166    uint32_t sampler_mode;
 167    anv_pack_struct(&sampler_mode, GENX(SAMPLER_MODE),
 168                    .HeaderlessMessageforPreemptableContexts = true,
 169                    .HeaderlessMessageforPreemptableContextsMask = true);
 170
 171     anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
 172       lri.RegisterOffset = GENX(SAMPLER_MODE_num);
 173       lri.DataDWord      = sampler_mode;
 174    }
 175
 176    /* Bit 1 "Enabled Texel Offset Precision Fix" must be set in
 177     * HALF_SLICE_CHICKEN7 register.
 178     */
 179    uint32_t half_slice_chicken7;
 180    anv_pack_struct(&half_slice_chicken7, GENX(HALF_SLICE_CHICKEN7),
 181                    .EnabledTexelOffsetPrecisionFix = true,
 182                    .EnabledTexelOffsetPrecisionFixMask = true);
 183
 184     anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
 185       lri.RegisterOffset = GENX(HALF_SLICE_CHICKEN7_num);
 186       lri.DataDWord      = half_slice_chicken7;
 187    }
 188
 189 #endif
 190
 191    /* Set the "CONSTANT_BUFFER Address Offset Disable" bit, so
 192     * 3DSTATE_CONSTANT_XS buffer 0 is an absolute address.
 193     *
 194     * This is only safe on kernels with context isolation support.
 195     */
 196    if (GEN_GEN >= 8 &&
 197        device->instance->physicalDevice.has_context_isolation) {
 198       UNUSED uint32_t tmp_reg;
 199 #if GEN_GEN >= 9
 200       anv_pack_struct(&tmp_reg, GENX(CS_DEBUG_MODE2),
 201                       .CONSTANT_BUFFERAddressOffsetDisable = true,
 202                       .CONSTANT_BUFFERAddressOffsetDisableMask = true);
 203       anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
 204          lri.RegisterOffset = GENX(CS_DEBUG_MODE2_num);
 205          lri.DataDWord      = tmp_reg;
 206       }
 207 #elif GEN_GEN == 8
 208       anv_pack_struct(&tmp_reg, GENX(INSTPM),
 209                       .CONSTANT_BUFFERAddressOffsetDisable = true,
 210                       .CONSTANT_BUFFERAddressOffsetDisableMask = true);
 211       anv_batch_emit(&batch, GENX(MI_LOAD_REGISTER_IMM), lri) {
 212          lri.RegisterOffset = GENX(INSTPM_num);
 213          lri.DataDWord      = tmp_reg;
 214       }
 215 #endif
 216    }
 217
 218    anv_batch_emit(&batch, GENX(MI_BATCH_BUFFER_END), bbe);
 219
 220    assert(batch.next <= batch.end);
 221
 222    return anv_device_submit_simple_batch(device, &batch);
 223 }
 224
 225 static uint32_t
 226 vk_to_gen_tex_filter(VkFilter filter, bool anisotropyEnable)
 227 {
 228    switch (filter) {
 229    default:
 230       assert(!"Invalid filter");
 231    case VK_FILTER_NEAREST:
 232       return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_NEAREST;
 233    case VK_FILTER_LINEAR:
 234       return anisotropyEnable ? MAPFILTER_ANISOTROPIC : MAPFILTER_LINEAR;
 235    }
 236 }
 237
 238 static uint32_t
 239 vk_to_gen_max_anisotropy(float ratio)
 240 {
 241    return (anv_clamp_f(ratio, 2, 16) - 2) / 2;
 242 }
 243
 244 static const uint32_t vk_to_gen_mipmap_mode[] = {
 245    [VK_SAMPLER_MIPMAP_MODE_NEAREST]          = MIPFILTER_NEAREST,
 246    [VK_SAMPLER_MIPMAP_MODE_LINEAR]           = MIPFILTER_LINEAR
 247 };
 248
 249 static const uint32_t vk_to_gen_tex_address[] = {
 250    [VK_SAMPLER_ADDRESS_MODE_REPEAT]          = TCM_WRAP,
 251    [VK_SAMPLER_ADDRESS_MODE_MIRRORED_REPEAT] = TCM_MIRROR,
 252    [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_EDGE]   = TCM_CLAMP,
 253    [VK_SAMPLER_ADDRESS_MODE_MIRROR_CLAMP_TO_EDGE] = TCM_MIRROR_ONCE,
 254    [VK_SAMPLER_ADDRESS_MODE_CLAMP_TO_BORDER] = TCM_CLAMP_BORDER,
 255 };
 256
 257 /* Vulkan specifies the result of shadow comparisons as:
 258  *     1     if   ref <op> texel,
 259  *     0     otherwise.
 260  *
 261  * The hardware does:
 262  *     0     if texel <op> ref,
 263  *     1     otherwise.
 264  *
 265  * So, these look a bit strange because there's both a negation
 266  * and swapping of the arguments involved.
 267  */
 268 static const uint32_t vk_to_gen_shadow_compare_op[] = {
 269    [VK_COMPARE_OP_NEVER]                        = PREFILTEROPALWAYS,
 270    [VK_COMPARE_OP_LESS]                         = PREFILTEROPLEQUAL,
 271    [VK_COMPARE_OP_EQUAL]                        = PREFILTEROPNOTEQUAL,
 272    [VK_COMPARE_OP_LESS_OR_EQUAL]                = PREFILTEROPLESS,
 273    [VK_COMPARE_OP_GREATER]                      = PREFILTEROPGEQUAL,
 274    [VK_COMPARE_OP_NOT_EQUAL]                    = PREFILTEROPEQUAL,
 275    [VK_COMPARE_OP_GREATER_OR_EQUAL]             = PREFILTEROPGREATER,
 276    [VK_COMPARE_OP_ALWAYS]                       = PREFILTEROPNEVER,
 277 };
 278
 279 #if GEN_GEN >= 9
 280 static const uint32_t vk_to_gen_sampler_reduction_mode[] = {
 281    [VK_SAMPLER_REDUCTION_MODE_WEIGHTED_AVERAGE_EXT] = STD_FILTER,
 282    [VK_SAMPLER_REDUCTION_MODE_MIN_EXT]              = MINIMUM,
 283    [VK_SAMPLER_REDUCTION_MODE_MAX_EXT]              = MAXIMUM,
 284 };
 285 #endif
 286
 287 VkResult genX(CreateSampler)(
 288     VkDevice                                    _device,
 289     const VkSamplerCreateInfo*                  pCreateInfo,
 290     const VkAllocationCallbacks*                pAllocator,
 291     VkSampler*                                  pSampler)
 292 {
 293    ANV_FROM_HANDLE(anv_device, device, _device);
 294    struct anv_sampler *sampler;
 295
 296    assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_SAMPLER_CREATE_INFO);
 297
 298    sampler = vk_zalloc2(&device->alloc, pAllocator, sizeof(*sampler), 8,
 299                         VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 300    if (!sampler)
 301       return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 302
 303    sampler->n_planes = 1;
 304
 305    uint32_t border_color_offset = device->border_colors.offset +
 306                                   pCreateInfo->borderColor * 64;
 307
 308 #if GEN_GEN >= 9
 309    unsigned sampler_reduction_mode = STD_FILTER;
 310    bool enable_sampler_reduction = false;
 311 #endif
 312
 313    vk_foreach_struct(ext, pCreateInfo->pNext) {
 314       switch (ext->sType) {
 315       case VK_STRUCTURE_TYPE_SAMPLER_YCBCR_CONVERSION_INFO: {
 316          VkSamplerYcbcrConversionInfo *pSamplerConversion =
 317             (VkSamplerYcbcrConversionInfo *) ext;
 318          ANV_FROM_HANDLE(anv_ycbcr_conversion, conversion,
 319                          pSamplerConversion->conversion);
 320
 321          if (conversion == NULL)
 322             break;
 323
 324          sampler->n_planes = conversion->format->n_planes;
 325          sampler->conversion = conversion;
 326          break;
 327       }
 328 #if GEN_GEN >= 9
 329       case VK_STRUCTURE_TYPE_SAMPLER_REDUCTION_MODE_CREATE_INFO_EXT: {
 330          struct VkSamplerReductionModeCreateInfoEXT *sampler_reduction =
 331             (struct VkSamplerReductionModeCreateInfoEXT *) ext;
 332          sampler_reduction_mode =
 333             vk_to_gen_sampler_reduction_mode[sampler_reduction->reductionMode];
 334          enable_sampler_reduction = true;
 335          break;
 336       }
 337 #endif
 338       default:
 339          anv_debug_ignored_stype(ext->sType);
 340          break;
 341       }
 342    }
 343
 344    for (unsigned p = 0; p < sampler->n_planes; p++) {
 345       const bool plane_has_chroma =
 346          sampler->conversion && sampler->conversion->format->planes[p].has_chroma;
 347       const VkFilter min_filter =
 348          plane_has_chroma ? sampler->conversion->chroma_filter : pCreateInfo->minFilter;
 349       const VkFilter mag_filter =
 350          plane_has_chroma ? sampler->conversion->chroma_filter : pCreateInfo->magFilter;
 351       const bool enable_min_filter_addr_rounding = min_filter != VK_FILTER_NEAREST;
 352       const bool enable_mag_filter_addr_rounding = mag_filter != VK_FILTER_NEAREST;
 353       /* From Broadwell PRM, SAMPLER_STATE:
 354        *   "Mip Mode Filter must be set to MIPFILTER_NONE for Planar YUV surfaces."
 355        */
 356       const uint32_t mip_filter_mode =
 357          (sampler->conversion &&
 358           isl_format_is_yuv(sampler->conversion->format->planes[0].isl_format)) ?
 359          MIPFILTER_NONE : vk_to_gen_mipmap_mode[pCreateInfo->mipmapMode];
 360
 361       struct GENX(SAMPLER_STATE) sampler_state = {
 362          .SamplerDisable = false,
 363          .TextureBorderColorMode = DX10OGL,
 364
 365 #if GEN_GEN >= 8
 366          .LODPreClampMode = CLAMP_MODE_OGL,
 367 #else
 368          .LODPreClampEnable = CLAMP_ENABLE_OGL,
 369 #endif
 370
 371 #if GEN_GEN == 8
 372          .BaseMipLevel = 0.0,
 373 #endif
 374          .MipModeFilter = mip_filter_mode,
 375          .MagModeFilter = vk_to_gen_tex_filter(mag_filter, pCreateInfo->anisotropyEnable),
 376          .MinModeFilter = vk_to_gen_tex_filter(min_filter, pCreateInfo->anisotropyEnable),
 377          .TextureLODBias = anv_clamp_f(pCreateInfo->mipLodBias, -16, 15.996),
 378          .AnisotropicAlgorithm = EWAApproximation,
 379          .MinLOD = anv_clamp_f(pCreateInfo->minLod, 0, 14),
 380          .MaxLOD = anv_clamp_f(pCreateInfo->maxLod, 0, 14),
 381          .ChromaKeyEnable = 0,
 382          .ChromaKeyIndex = 0,
 383          .ChromaKeyMode = 0,
 384          .ShadowFunction = vk_to_gen_shadow_compare_op[pCreateInfo->compareOp],
 385          .CubeSurfaceControlMode = OVERRIDE,
 386
 387          .BorderColorPointer = border_color_offset,
 388
 389 #if GEN_GEN >= 8
 390          .LODClampMagnificationMode = MIPNONE,
 391 #endif
 392
 393          .MaximumAnisotropy = vk_to_gen_max_anisotropy(pCreateInfo->maxAnisotropy),
 394          .RAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
 395          .RAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
 396          .VAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
 397          .VAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
 398          .UAddressMinFilterRoundingEnable = enable_min_filter_addr_rounding,
 399          .UAddressMagFilterRoundingEnable = enable_mag_filter_addr_rounding,
 400          .TrilinearFilterQuality = 0,
 401          .NonnormalizedCoordinateEnable = pCreateInfo->unnormalizedCoordinates,
 402          .TCXAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeU],
 403          .TCYAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeV],
 404          .TCZAddressControlMode = vk_to_gen_tex_address[pCreateInfo->addressModeW],
 405
 406 #if GEN_GEN >= 9
 407          .ReductionType = sampler_reduction_mode,
 408          .ReductionTypeEnable = enable_sampler_reduction,
 409 #endif
 410       };
 411
 412       GENX(SAMPLER_STATE_pack)(NULL, sampler->state[p], &sampler_state);
 413    }
 414
 415    *pSampler = anv_sampler_to_handle(sampler);
 416
 417    return VK_SUCCESS;
 418 }